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authorJames Smart <James.Smart@Emulex.Com>2009-11-18 15:41:10 -0500
committerJames Bottomley <James.Bottomley@suse.de>2009-12-04 13:01:52 -0500
commita747c9ce56533e376993473321d96ec8c23a3e43 (patch)
treee8ff74c01fa1bbd117acbd461f942a16f14b7b70
parent1c6f4ef5d6be7ef4cbe92a86286217971f52e2cd (diff)
[SCSI] lpfc 8.3.6 : Hardware related fixes and changes
Hardware related Fixes and Changes. - Added new Adapter IDs and update default Adapter names. - Added PCI read after EQarm doorbell PCI write to flush the write and avoid spurrious interrupts when in INTx mode. - Phase out use of ONLINE registers. - Fix for lost MSI interrupt Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h3
-rw-r--r--drivers/scsi/lpfc/lpfc_hw4.h4
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c168
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c55
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h7
5 files changed, 133 insertions, 104 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index f279d191b628..c9faa1d8c3c8 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -1168,7 +1168,8 @@ typedef struct {
1168#define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 1168#define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12
1169#define PCI_VENDOR_ID_SERVERENGINE 0x19a2 1169#define PCI_VENDOR_ID_SERVERENGINE 0x19a2
1170#define PCI_DEVICE_ID_TIGERSHARK 0x0704 1170#define PCI_DEVICE_ID_TIGERSHARK 0x0704
1171#define PCI_DEVICE_ID_TS_BE3 0x0714 1171#define PCI_DEVICE_ID_TOMCAT 0x0714
1172#define PCI_DEVICE_ID_FALCON 0xf180
1172 1173
1173#define JEDEC_ID_ADDRESS 0x0080001c 1174#define JEDEC_ID_ADDRESS 0x0080001c
1174#define FIREFLY_JEDEC_ID 0x1ACC 1175#define FIREFLY_JEDEC_ID 0x1ACC
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index fa3306386786..1585148a17e5 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -514,8 +514,8 @@ struct lpfc_register {
514 514
515#define LPFC_UERR_STATUS_HI 0x00A4 515#define LPFC_UERR_STATUS_HI 0x00A4
516#define LPFC_UERR_STATUS_LO 0x00A0 516#define LPFC_UERR_STATUS_LO 0x00A0
517#define LPFC_ONLINE0 0x00B0 517#define LPFC_UE_MASK_HI 0x00AC
518#define LPFC_ONLINE1 0x00B4 518#define LPFC_UE_MASK_LO 0x00A8
519#define LPFC_SCRATCHPAD 0x0058 519#define LPFC_SCRATCHPAD 0x0058
520 520
521/* BAR0 Registers */ 521/* BAR0 Registers */
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 5f5b2283d58c..0ba35a9a5c5f 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -1529,10 +1529,10 @@ lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
1529 int GE = 0; 1529 int GE = 0;
1530 int oneConnect = 0; /* default is not a oneConnect */ 1530 int oneConnect = 0; /* default is not a oneConnect */
1531 struct { 1531 struct {
1532 char * name; 1532 char *name;
1533 int max_speed; 1533 char *bus;
1534 char * bus; 1534 char *function;
1535 } m = {"<Unknown>", 0, ""}; 1535 } m = {"<Unknown>", "", ""};
1536 1536
1537 if (mdp && mdp[0] != '\0' 1537 if (mdp && mdp[0] != '\0'
1538 && descp && descp[0] != '\0') 1538 && descp && descp[0] != '\0')
@@ -1553,136 +1553,155 @@ lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
1553 1553
1554 switch (dev_id) { 1554 switch (dev_id) {
1555 case PCI_DEVICE_ID_FIREFLY: 1555 case PCI_DEVICE_ID_FIREFLY:
1556 m = (typeof(m)){"LP6000", max_speed, "PCI"}; 1556 m = (typeof(m)){"LP6000", "PCI", "Fibre Channel Adapter"};
1557 break; 1557 break;
1558 case PCI_DEVICE_ID_SUPERFLY: 1558 case PCI_DEVICE_ID_SUPERFLY:
1559 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 1559 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
1560 m = (typeof(m)){"LP7000", max_speed, "PCI"}; 1560 m = (typeof(m)){"LP7000", "PCI",
1561 "Fibre Channel Adapter"};
1561 else 1562 else
1562 m = (typeof(m)){"LP7000E", max_speed, "PCI"}; 1563 m = (typeof(m)){"LP7000E", "PCI",
1564 "Fibre Channel Adapter"};
1563 break; 1565 break;
1564 case PCI_DEVICE_ID_DRAGONFLY: 1566 case PCI_DEVICE_ID_DRAGONFLY:
1565 m = (typeof(m)){"LP8000", max_speed, "PCI"}; 1567 m = (typeof(m)){"LP8000", "PCI",
1568 "Fibre Channel Adapter"};
1566 break; 1569 break;
1567 case PCI_DEVICE_ID_CENTAUR: 1570 case PCI_DEVICE_ID_CENTAUR:
1568 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 1571 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
1569 m = (typeof(m)){"LP9002", max_speed, "PCI"}; 1572 m = (typeof(m)){"LP9002", "PCI",
1573 "Fibre Channel Adapter"};
1570 else 1574 else
1571 m = (typeof(m)){"LP9000", max_speed, "PCI"}; 1575 m = (typeof(m)){"LP9000", "PCI",
1576 "Fibre Channel Adapter"};
1572 break; 1577 break;
1573 case PCI_DEVICE_ID_RFLY: 1578 case PCI_DEVICE_ID_RFLY:
1574 m = (typeof(m)){"LP952", max_speed, "PCI"}; 1579 m = (typeof(m)){"LP952", "PCI",
1580 "Fibre Channel Adapter"};
1575 break; 1581 break;
1576 case PCI_DEVICE_ID_PEGASUS: 1582 case PCI_DEVICE_ID_PEGASUS:
1577 m = (typeof(m)){"LP9802", max_speed, "PCI-X"}; 1583 m = (typeof(m)){"LP9802", "PCI-X",
1584 "Fibre Channel Adapter"};
1578 break; 1585 break;
1579 case PCI_DEVICE_ID_THOR: 1586 case PCI_DEVICE_ID_THOR:
1580 m = (typeof(m)){"LP10000", max_speed, "PCI-X"}; 1587 m = (typeof(m)){"LP10000", "PCI-X",
1588 "Fibre Channel Adapter"};
1581 break; 1589 break;
1582 case PCI_DEVICE_ID_VIPER: 1590 case PCI_DEVICE_ID_VIPER:
1583 m = (typeof(m)){"LPX1000", max_speed, "PCI-X"}; 1591 m = (typeof(m)){"LPX1000", "PCI-X",
1592 "Fibre Channel Adapter"};
1584 break; 1593 break;
1585 case PCI_DEVICE_ID_PFLY: 1594 case PCI_DEVICE_ID_PFLY:
1586 m = (typeof(m)){"LP982", max_speed, "PCI-X"}; 1595 m = (typeof(m)){"LP982", "PCI-X",
1596 "Fibre Channel Adapter"};
1587 break; 1597 break;
1588 case PCI_DEVICE_ID_TFLY: 1598 case PCI_DEVICE_ID_TFLY:
1589 m = (typeof(m)){"LP1050", max_speed, "PCI-X"}; 1599 m = (typeof(m)){"LP1050", "PCI-X",
1600 "Fibre Channel Adapter"};
1590 break; 1601 break;
1591 case PCI_DEVICE_ID_HELIOS: 1602 case PCI_DEVICE_ID_HELIOS:
1592 m = (typeof(m)){"LP11000", max_speed, "PCI-X2"}; 1603 m = (typeof(m)){"LP11000", "PCI-X2",
1604 "Fibre Channel Adapter"};
1593 break; 1605 break;
1594 case PCI_DEVICE_ID_HELIOS_SCSP: 1606 case PCI_DEVICE_ID_HELIOS_SCSP:
1595 m = (typeof(m)){"LP11000-SP", max_speed, "PCI-X2"}; 1607 m = (typeof(m)){"LP11000-SP", "PCI-X2",
1608 "Fibre Channel Adapter"};
1596 break; 1609 break;
1597 case PCI_DEVICE_ID_HELIOS_DCSP: 1610 case PCI_DEVICE_ID_HELIOS_DCSP:
1598 m = (typeof(m)){"LP11002-SP", max_speed, "PCI-X2"}; 1611 m = (typeof(m)){"LP11002-SP", "PCI-X2",
1612 "Fibre Channel Adapter"};
1599 break; 1613 break;
1600 case PCI_DEVICE_ID_NEPTUNE: 1614 case PCI_DEVICE_ID_NEPTUNE:
1601 m = (typeof(m)){"LPe1000", max_speed, "PCIe"}; 1615 m = (typeof(m)){"LPe1000", "PCIe", "Fibre Channel Adapter"};
1602 break; 1616 break;
1603 case PCI_DEVICE_ID_NEPTUNE_SCSP: 1617 case PCI_DEVICE_ID_NEPTUNE_SCSP:
1604 m = (typeof(m)){"LPe1000-SP", max_speed, "PCIe"}; 1618 m = (typeof(m)){"LPe1000-SP", "PCIe", "Fibre Channel Adapter"};
1605 break; 1619 break;
1606 case PCI_DEVICE_ID_NEPTUNE_DCSP: 1620 case PCI_DEVICE_ID_NEPTUNE_DCSP:
1607 m = (typeof(m)){"LPe1002-SP", max_speed, "PCIe"}; 1621 m = (typeof(m)){"LPe1002-SP", "PCIe", "Fibre Channel Adapter"};
1608 break; 1622 break;
1609 case PCI_DEVICE_ID_BMID: 1623 case PCI_DEVICE_ID_BMID:
1610 m = (typeof(m)){"LP1150", max_speed, "PCI-X2"}; 1624 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
1611 break; 1625 break;
1612 case PCI_DEVICE_ID_BSMB: 1626 case PCI_DEVICE_ID_BSMB:
1613 m = (typeof(m)){"LP111", max_speed, "PCI-X2"}; 1627 m = (typeof(m)){"LP111", "PCI-X2", "Fibre Channel Adapter"};
1614 break; 1628 break;
1615 case PCI_DEVICE_ID_ZEPHYR: 1629 case PCI_DEVICE_ID_ZEPHYR:
1616 m = (typeof(m)){"LPe11000", max_speed, "PCIe"}; 1630 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
1617 break; 1631 break;
1618 case PCI_DEVICE_ID_ZEPHYR_SCSP: 1632 case PCI_DEVICE_ID_ZEPHYR_SCSP:
1619 m = (typeof(m)){"LPe11000", max_speed, "PCIe"}; 1633 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
1620 break; 1634 break;
1621 case PCI_DEVICE_ID_ZEPHYR_DCSP: 1635 case PCI_DEVICE_ID_ZEPHYR_DCSP:
1622 m = (typeof(m)){"LP2105", max_speed, "PCIe"}; 1636 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
1623 GE = 1; 1637 GE = 1;
1624 break; 1638 break;
1625 case PCI_DEVICE_ID_ZMID: 1639 case PCI_DEVICE_ID_ZMID:
1626 m = (typeof(m)){"LPe1150", max_speed, "PCIe"}; 1640 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
1627 break; 1641 break;
1628 case PCI_DEVICE_ID_ZSMB: 1642 case PCI_DEVICE_ID_ZSMB:
1629 m = (typeof(m)){"LPe111", max_speed, "PCIe"}; 1643 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
1630 break; 1644 break;
1631 case PCI_DEVICE_ID_LP101: 1645 case PCI_DEVICE_ID_LP101:
1632 m = (typeof(m)){"LP101", max_speed, "PCI-X"}; 1646 m = (typeof(m)){"LP101", "PCI-X", "Fibre Channel Adapter"};
1633 break; 1647 break;
1634 case PCI_DEVICE_ID_LP10000S: 1648 case PCI_DEVICE_ID_LP10000S:
1635 m = (typeof(m)){"LP10000-S", max_speed, "PCI"}; 1649 m = (typeof(m)){"LP10000-S", "PCI", "Fibre Channel Adapter"};
1636 break; 1650 break;
1637 case PCI_DEVICE_ID_LP11000S: 1651 case PCI_DEVICE_ID_LP11000S:
1638 m = (typeof(m)){"LP11000-S", max_speed, 1652 m = (typeof(m)){"LP11000-S", "PCI-X2", "Fibre Channel Adapter"};
1639 "PCI-X2"};
1640 break; 1653 break;
1641 case PCI_DEVICE_ID_LPE11000S: 1654 case PCI_DEVICE_ID_LPE11000S:
1642 m = (typeof(m)){"LPe11000-S", max_speed, 1655 m = (typeof(m)){"LPe11000-S", "PCIe", "Fibre Channel Adapter"};
1643 "PCIe"};
1644 break; 1656 break;
1645 case PCI_DEVICE_ID_SAT: 1657 case PCI_DEVICE_ID_SAT:
1646 m = (typeof(m)){"LPe12000", max_speed, "PCIe"}; 1658 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
1647 break; 1659 break;
1648 case PCI_DEVICE_ID_SAT_MID: 1660 case PCI_DEVICE_ID_SAT_MID:
1649 m = (typeof(m)){"LPe1250", max_speed, "PCIe"}; 1661 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
1650 break; 1662 break;
1651 case PCI_DEVICE_ID_SAT_SMB: 1663 case PCI_DEVICE_ID_SAT_SMB:
1652 m = (typeof(m)){"LPe121", max_speed, "PCIe"}; 1664 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
1653 break; 1665 break;
1654 case PCI_DEVICE_ID_SAT_DCSP: 1666 case PCI_DEVICE_ID_SAT_DCSP:
1655 m = (typeof(m)){"LPe12002-SP", max_speed, "PCIe"}; 1667 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
1656 break; 1668 break;
1657 case PCI_DEVICE_ID_SAT_SCSP: 1669 case PCI_DEVICE_ID_SAT_SCSP:
1658 m = (typeof(m)){"LPe12000-SP", max_speed, "PCIe"}; 1670 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
1659 break; 1671 break;
1660 case PCI_DEVICE_ID_SAT_S: 1672 case PCI_DEVICE_ID_SAT_S:
1661 m = (typeof(m)){"LPe12000-S", max_speed, "PCIe"}; 1673 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
1662 break; 1674 break;
1663 case PCI_DEVICE_ID_HORNET: 1675 case PCI_DEVICE_ID_HORNET:
1664 m = (typeof(m)){"LP21000", max_speed, "PCIe"}; 1676 m = (typeof(m)){"LP21000", "PCIe", "FCoE Adapter"};
1665 GE = 1; 1677 GE = 1;
1666 break; 1678 break;
1667 case PCI_DEVICE_ID_PROTEUS_VF: 1679 case PCI_DEVICE_ID_PROTEUS_VF:
1668 m = (typeof(m)) {"LPev12000", max_speed, "PCIe IOV"}; 1680 m = (typeof(m)){"LPev12000", "PCIe IOV",
1681 "Fibre Channel Adapter"};
1669 break; 1682 break;
1670 case PCI_DEVICE_ID_PROTEUS_PF: 1683 case PCI_DEVICE_ID_PROTEUS_PF:
1671 m = (typeof(m)) {"LPev12000", max_speed, "PCIe IOV"}; 1684 m = (typeof(m)){"LPev12000", "PCIe IOV",
1685 "Fibre Channel Adapter"};
1672 break; 1686 break;
1673 case PCI_DEVICE_ID_PROTEUS_S: 1687 case PCI_DEVICE_ID_PROTEUS_S:
1674 m = (typeof(m)) {"LPemv12002-S", max_speed, "PCIe IOV"}; 1688 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
1689 "Fibre Channel Adapter"};
1675 break; 1690 break;
1676 case PCI_DEVICE_ID_TIGERSHARK: 1691 case PCI_DEVICE_ID_TIGERSHARK:
1677 oneConnect = 1; 1692 oneConnect = 1;
1678 m = (typeof(m)) {"OCe10100-F", max_speed, "PCIe"}; 1693 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
1679 break; 1694 break;
1680 case PCI_DEVICE_ID_TS_BE3: 1695 case PCI_DEVICE_ID_TOMCAT:
1681 oneConnect = 1; 1696 oneConnect = 1;
1682 m = (typeof(m)) {"OCeXXXXX-F", max_speed, "PCIe"}; 1697 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
1698 break;
1699 case PCI_DEVICE_ID_FALCON:
1700 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
1701 "EmulexSecure Fibre"};
1683 break; 1702 break;
1684 default: 1703 default:
1685 m = (typeof(m)){ NULL }; 1704 m = (typeof(m)){"Unknown", "", ""};
1686 break; 1705 break;
1687 } 1706 }
1688 1707
@@ -1694,17 +1713,14 @@ lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
1694 if (descp && descp[0] == '\0') { 1713 if (descp && descp[0] == '\0') {
1695 if (oneConnect) 1714 if (oneConnect)
1696 snprintf(descp, 255, 1715 snprintf(descp, 255,
1697 "Emulex OneConnect %s, FCoE Initiator, Port %s", 1716 "Emulex OneConnect %s, %s Initiator, Port %s",
1698 m.name, 1717 m.name, m.function,
1699 phba->Port); 1718 phba->Port);
1700 else 1719 else
1701 snprintf(descp, 255, 1720 snprintf(descp, 255,
1702 "Emulex %s %d%s %s %s", 1721 "Emulex %s %d%s %s %s",
1703 m.name, m.max_speed, 1722 m.name, max_speed, (GE) ? "GE" : "Gb",
1704 (GE) ? "GE" : "Gb", 1723 m.bus, m.function);
1705 m.bus,
1706 (GE) ? "FCoE Adapter" :
1707 "Fibre Channel Adapter");
1708 } 1724 }
1709} 1725}
1710 1726
@@ -4618,7 +4634,6 @@ int
4618lpfc_sli4_post_status_check(struct lpfc_hba *phba) 4634lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4619{ 4635{
4620 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad; 4636 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad;
4621 uint32_t onlnreg0, onlnreg1;
4622 int i, port_error = -ENODEV; 4637 int i, port_error = -ENODEV;
4623 4638
4624 if (!phba->sli4_hba.STAregaddr) 4639 if (!phba->sli4_hba.STAregaddr)
@@ -4662,21 +4677,20 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4662 bf_get(lpfc_scratchpad_slirev, &scratchpad), 4677 bf_get(lpfc_scratchpad_slirev, &scratchpad),
4663 bf_get(lpfc_scratchpad_featurelevel1, &scratchpad), 4678 bf_get(lpfc_scratchpad_featurelevel1, &scratchpad),
4664 bf_get(lpfc_scratchpad_featurelevel2, &scratchpad)); 4679 bf_get(lpfc_scratchpad_featurelevel2, &scratchpad));
4665 4680 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr);
4681 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr);
4666 /* With uncoverable error, log the error message and return error */ 4682 /* With uncoverable error, log the error message and return error */
4667 onlnreg0 = readl(phba->sli4_hba.ONLINE0regaddr); 4683 uerrlo_reg.word0 = readl(phba->sli4_hba.UERRLOregaddr);
4668 onlnreg1 = readl(phba->sli4_hba.ONLINE1regaddr); 4684 uerrhi_reg.word0 = readl(phba->sli4_hba.UERRHIregaddr);
4669 if ((onlnreg0 != LPFC_ONLINE_NERR) || (onlnreg1 != LPFC_ONLINE_NERR)) { 4685 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
4670 uerrlo_reg.word0 = readl(phba->sli4_hba.UERRLOregaddr); 4686 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
4671 uerrhi_reg.word0 = readl(phba->sli4_hba.UERRHIregaddr); 4687 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4672 if (uerrlo_reg.word0 || uerrhi_reg.word0) { 4688 "1422 HBA Unrecoverable error: "
4673 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 4689 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
4674 "1422 HBA Unrecoverable error: " 4690 "ue_mask_lo_reg=0x%x, ue_mask_hi_reg=0x%x\n",
4675 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, " 4691 uerrlo_reg.word0, uerrhi_reg.word0,
4676 "online0_reg=0x%x, online1_reg=0x%x\n", 4692 phba->sli4_hba.ue_mask_lo,
4677 uerrlo_reg.word0, uerrhi_reg.word0, 4693 phba->sli4_hba.ue_mask_hi);
4678 onlnreg0, onlnreg1);
4679 }
4680 return -ENODEV; 4694 return -ENODEV;
4681 } 4695 }
4682 4696
@@ -4697,10 +4711,10 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba)
4697 LPFC_UERR_STATUS_LO; 4711 LPFC_UERR_STATUS_LO;
4698 phba->sli4_hba.UERRHIregaddr = phba->sli4_hba.conf_regs_memmap_p + 4712 phba->sli4_hba.UERRHIregaddr = phba->sli4_hba.conf_regs_memmap_p +
4699 LPFC_UERR_STATUS_HI; 4713 LPFC_UERR_STATUS_HI;
4700 phba->sli4_hba.ONLINE0regaddr = phba->sli4_hba.conf_regs_memmap_p + 4714 phba->sli4_hba.UEMASKLOregaddr = phba->sli4_hba.conf_regs_memmap_p +
4701 LPFC_ONLINE0; 4715 LPFC_UE_MASK_LO;
4702 phba->sli4_hba.ONLINE1regaddr = phba->sli4_hba.conf_regs_memmap_p + 4716 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p +
4703 LPFC_ONLINE1; 4717 LPFC_UE_MASK_HI;
4704 phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p + 4718 phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p +
4705 LPFC_SCRATCHPAD; 4719 LPFC_SCRATCHPAD;
4706} 4720}
@@ -8116,7 +8130,9 @@ static struct pci_device_id lpfc_id_table[] = {
8116 PCI_ANY_ID, PCI_ANY_ID, }, 8130 PCI_ANY_ID, PCI_ANY_ID, },
8117 {PCI_VENDOR_ID_SERVERENGINE, PCI_DEVICE_ID_TIGERSHARK, 8131 {PCI_VENDOR_ID_SERVERENGINE, PCI_DEVICE_ID_TIGERSHARK,
8118 PCI_ANY_ID, PCI_ANY_ID, }, 8132 PCI_ANY_ID, PCI_ANY_ID, },
8119 {PCI_VENDOR_ID_SERVERENGINE, PCI_DEVICE_ID_TS_BE3, 8133 {PCI_VENDOR_ID_SERVERENGINE, PCI_DEVICE_ID_TOMCAT,
8134 PCI_ANY_ID, PCI_ANY_ID, },
8135 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FALCON,
8120 PCI_ANY_ID, PCI_ANY_ID, }, 8136 PCI_ANY_ID, PCI_ANY_ID, },
8121 { 0 } 8137 { 0 }
8122}; 8138};
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 1d2f65c4eb0b..b3a69f984d95 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -263,6 +263,9 @@ lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
263 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT); 263 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
264 bf_set(lpfc_eqcq_doorbell_eqid, &doorbell, q->queue_id); 264 bf_set(lpfc_eqcq_doorbell_eqid, &doorbell, q->queue_id);
265 writel(doorbell.word0, q->phba->sli4_hba.EQCQDBregaddr); 265 writel(doorbell.word0, q->phba->sli4_hba.EQCQDBregaddr);
266 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
267 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
268 readl(q->phba->sli4_hba.EQCQDBregaddr);
266 return released; 269 return released;
267} 270}
268 271
@@ -7686,31 +7689,28 @@ static int
7686lpfc_sli4_eratt_read(struct lpfc_hba *phba) 7689lpfc_sli4_eratt_read(struct lpfc_hba *phba)
7687{ 7690{
7688 uint32_t uerr_sta_hi, uerr_sta_lo; 7691 uint32_t uerr_sta_hi, uerr_sta_lo;
7689 uint32_t onlnreg0, onlnreg1;
7690 7692
7691 /* For now, use the SLI4 device internal unrecoverable error 7693 /* For now, use the SLI4 device internal unrecoverable error
7692 * registers for error attention. This can be changed later. 7694 * registers for error attention. This can be changed later.
7693 */ 7695 */
7694 onlnreg0 = readl(phba->sli4_hba.ONLINE0regaddr); 7696 uerr_sta_lo = readl(phba->sli4_hba.UERRLOregaddr);
7695 onlnreg1 = readl(phba->sli4_hba.ONLINE1regaddr); 7697 uerr_sta_hi = readl(phba->sli4_hba.UERRHIregaddr);
7696 if ((onlnreg0 != LPFC_ONLINE_NERR) || (onlnreg1 != LPFC_ONLINE_NERR)) { 7698 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
7697 uerr_sta_lo = readl(phba->sli4_hba.UERRLOregaddr); 7699 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
7698 uerr_sta_hi = readl(phba->sli4_hba.UERRHIregaddr); 7700 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7699 if (uerr_sta_lo || uerr_sta_hi) { 7701 "1423 HBA Unrecoverable error: "
7700 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7702 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
7701 "1423 HBA Unrecoverable error: " 7703 "ue_mask_lo_reg=0x%x, ue_mask_hi_reg=0x%x\n",
7702 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, " 7704 uerr_sta_lo, uerr_sta_hi,
7703 "online0_reg=0x%x, online1_reg=0x%x\n", 7705 phba->sli4_hba.ue_mask_lo,
7704 uerr_sta_lo, uerr_sta_hi, 7706 phba->sli4_hba.ue_mask_hi);
7705 onlnreg0, onlnreg1); 7707 phba->work_status[0] = uerr_sta_lo;
7706 phba->work_status[0] = uerr_sta_lo; 7708 phba->work_status[1] = uerr_sta_hi;
7707 phba->work_status[1] = uerr_sta_hi; 7709 /* Set the driver HA work bitmap */
7708 /* Set the driver HA work bitmap */ 7710 phba->work_ha |= HA_ERATT;
7709 phba->work_ha |= HA_ERATT; 7711 /* Indicate polling handles this ERATT */
7710 /* Indicate polling handles this ERATT */ 7712 phba->hba_flag |= HBA_ERATT_HANDLED;
7711 phba->hba_flag |= HBA_ERATT_HANDLED; 7713 return 1;
7712 return 1;
7713 }
7714 } 7714 }
7715 return 0; 7715 return 0;
7716} 7716}
@@ -7833,7 +7833,7 @@ irqreturn_t
7833lpfc_sli_sp_intr_handler(int irq, void *dev_id) 7833lpfc_sli_sp_intr_handler(int irq, void *dev_id)
7834{ 7834{
7835 struct lpfc_hba *phba; 7835 struct lpfc_hba *phba;
7836 uint32_t ha_copy; 7836 uint32_t ha_copy, hc_copy;
7837 uint32_t work_ha_copy; 7837 uint32_t work_ha_copy;
7838 unsigned long status; 7838 unsigned long status;
7839 unsigned long iflag; 7839 unsigned long iflag;
@@ -7891,8 +7891,13 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
7891 } 7891 }
7892 7892
7893 /* Clear up only attention source related to slow-path */ 7893 /* Clear up only attention source related to slow-path */
7894 hc_copy = readl(phba->HCregaddr);
7895 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
7896 HC_LAINT_ENA | HC_ERINT_ENA),
7897 phba->HCregaddr);
7894 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)), 7898 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
7895 phba->HAregaddr); 7899 phba->HAregaddr);
7900 writel(hc_copy, phba->HCregaddr);
7896 readl(phba->HAregaddr); /* flush */ 7901 readl(phba->HAregaddr); /* flush */
7897 spin_unlock_irqrestore(&phba->hbalock, iflag); 7902 spin_unlock_irqrestore(&phba->hbalock, iflag);
7898 } else 7903 } else
@@ -8202,6 +8207,7 @@ lpfc_sli_intr_handler(int irq, void *dev_id)
8202 struct lpfc_hba *phba; 8207 struct lpfc_hba *phba;
8203 irqreturn_t sp_irq_rc, fp_irq_rc; 8208 irqreturn_t sp_irq_rc, fp_irq_rc;
8204 unsigned long status1, status2; 8209 unsigned long status1, status2;
8210 uint32_t hc_copy;
8205 8211
8206 /* 8212 /*
8207 * Get the driver's phba structure from the dev_id and 8213 * Get the driver's phba structure from the dev_id and
@@ -8239,7 +8245,12 @@ lpfc_sli_intr_handler(int irq, void *dev_id)
8239 } 8245 }
8240 8246
8241 /* Clear attention sources except link and error attentions */ 8247 /* Clear attention sources except link and error attentions */
8248 hc_copy = readl(phba->HCregaddr);
8249 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
8250 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
8251 phba->HCregaddr);
8242 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr); 8252 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
8253 writel(hc_copy, phba->HCregaddr);
8243 readl(phba->HAregaddr); /* flush */ 8254 readl(phba->HAregaddr); /* flush */
8244 spin_unlock(&phba->hbalock); 8255 spin_unlock(&phba->hbalock);
8245 8256
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 6a4558ba93b6..25d66d070cf8 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -293,9 +293,8 @@ struct lpfc_sli4_hba {
293 /* BAR0 PCI config space register memory map */ 293 /* BAR0 PCI config space register memory map */
294 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */ 294 void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
295 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ 295 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
296 void __iomem *ONLINE0regaddr; /* Address to components of internal UE */ 296 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
297 void __iomem *ONLINE1regaddr; /* Address to components of internal UE */ 297 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
298#define LPFC_ONLINE_NERR 0xFFFFFFFF
299 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ 298 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */
300 /* BAR1 FCoE function CSR register memory map */ 299 /* BAR1 FCoE function CSR register memory map */
301 void __iomem *STAregaddr; /* Address to HST_STATE register */ 300 void __iomem *STAregaddr; /* Address to HST_STATE register */
@@ -309,6 +308,8 @@ struct lpfc_sli4_hba {
309 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */ 308 void __iomem *MQDBregaddr; /* Address to MQ_DOORBELL register */
310 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */ 309 void __iomem *BMBXregaddr; /* Address to BootStrap MBX register */
311 310
311 uint32_t ue_mask_lo;
312 uint32_t ue_mask_hi;
312 struct msix_entry *msix_entries; 313 struct msix_entry *msix_entries;
313 uint32_t cfg_eqn; 314 uint32_t cfg_eqn;
314 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ 315 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */