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authorAlex Deucher <alexdeucher@gmail.com>2010-10-18 23:54:56 -0400
committerDave Airlie <airlied@redhat.com>2010-10-26 00:47:54 -0400
commit881fe6c1d06bf49f4ab7aef212cdaf66bd059614 (patch)
tree53b482c43c60ba9301e312f27d05631f0780fd4c
parent354da653233898ed1e51f20cebac9705456bf9b1 (diff)
drm/radeon/kms: properly compute group_size on 6xx/7xx
Needed for tiled surfaces. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/r600.c7
-rw-r--r--drivers/gpu/drm/radeon/rv770.c9
2 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 83ba9644dcb9..33952a12f0a3 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1608,8 +1608,11 @@ void r600_gpu_init(struct radeon_device *rdev)
1608 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; 1608 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes;
1609 rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); 1609 rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
1610 tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); 1610 tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
1611 tiling_config |= GROUP_SIZE(0); 1611 tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
1612 rdev->config.r600.tiling_group_size = 256; 1612 if ((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
1613 rdev->config.r600.tiling_group_size = 512;
1614 else
1615 rdev->config.r600.tiling_group_size = 256;
1613 tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT; 1616 tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
1614 if (tmp > 3) { 1617 if (tmp > 3) {
1615 tiling_config |= ROW_TILING(3); 1618 tiling_config |= ROW_TILING(3);
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index ab83f688263a..245374e2b778 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -644,10 +644,11 @@ static void rv770_gpu_init(struct radeon_device *rdev)
644 else 644 else
645 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); 645 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
646 rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3); 646 rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
647 647 gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
648 gb_tiling_config |= GROUP_SIZE(0); 648 if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
649 rdev->config.rv770.tiling_group_size = 256; 649 rdev->config.rv770.tiling_group_size = 512;
650 650 else
651 rdev->config.rv770.tiling_group_size = 256;
651 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { 652 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
652 gb_tiling_config |= ROW_TILING(3); 653 gb_tiling_config |= ROW_TILING(3);
653 gb_tiling_config |= SAMPLE_SPLIT(3); 654 gb_tiling_config |= SAMPLE_SPLIT(3);