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authorMatt Carlson <mcarlson@broadcom.com>2010-01-20 11:58:03 -0500
committerDavid S. Miller <davem@davemloft.net>2010-01-20 22:20:58 -0500
commit666bc831cf820e16cbd0c2d5be780c512b1afe15 (patch)
treecc3b0a085cddf1dcb65f464361ad90d04dbccd92
parent614b05900ec3516b835cd06f848ef6bc915beeea (diff)
tg3: Improve internal resource allocations
The 5717 and the 57765 have more resources at their disposal internally. This patch tunes the driver to get better performance. The adjustments made here only apply to the 57765 and 5717 asic revs. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/tg3.c25
-rw-r--r--drivers/net/tg3.h4
2 files changed, 25 insertions, 4 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index b80e7eef8af9..adb579f0d75d 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8152,7 +8152,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8152 /* Prevent chip from dropping frames when flow control 8152 /* Prevent chip from dropping frames when flow control
8153 * is enabled. 8153 * is enabled.
8154 */ 8154 */
8155 tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, 2); 8155 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
8156 val = 1;
8157 else
8158 val = 2;
8159 tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val);
8156 8160
8157 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && 8161 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
8158 (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) { 8162 (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
@@ -14091,9 +14095,22 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
14091 14095
14092static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) 14096static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
14093{ 14097{
14094 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS && 14098 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
14095 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && 14099 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
14096 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { 14100 tp->bufmgr_config.mbuf_read_dma_low_water =
14101 DEFAULT_MB_RDMA_LOW_WATER_5705;
14102 tp->bufmgr_config.mbuf_mac_rx_low_water =
14103 DEFAULT_MB_MACRX_LOW_WATER_57765;
14104 tp->bufmgr_config.mbuf_high_water =
14105 DEFAULT_MB_HIGH_WATER_57765;
14106
14107 tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
14108 DEFAULT_MB_RDMA_LOW_WATER_5705;
14109 tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
14110 DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765;
14111 tp->bufmgr_config.mbuf_high_water_jumbo =
14112 DEFAULT_MB_HIGH_WATER_JUMBO_57765;
14113 } else if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
14097 tp->bufmgr_config.mbuf_read_dma_low_water = 14114 tp->bufmgr_config.mbuf_read_dma_low_water =
14098 DEFAULT_MB_RDMA_LOW_WATER_5705; 14115 DEFAULT_MB_RDMA_LOW_WATER_5705;
14099 tp->bufmgr_config.mbuf_mac_rx_low_water = 14116 tp->bufmgr_config.mbuf_mac_rx_low_water =
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 44a505d07e20..91139fdf7f43 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1203,14 +1203,18 @@
1203#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020 1203#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
1204#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 1204#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
1205#define DEFAULT_MB_MACRX_LOW_WATER_5906 0x00000004 1205#define DEFAULT_MB_MACRX_LOW_WATER_5906 0x00000004
1206#define DEFAULT_MB_MACRX_LOW_WATER_57765 0x0000002a
1206#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098 1207#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
1207#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b 1208#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
1209#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765 0x0000007e
1208#define BUFMGR_MB_HIGH_WATER 0x00004418 1210#define BUFMGR_MB_HIGH_WATER 0x00004418
1209#define DEFAULT_MB_HIGH_WATER 0x00000060 1211#define DEFAULT_MB_HIGH_WATER 0x00000060
1210#define DEFAULT_MB_HIGH_WATER_5705 0x00000060 1212#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
1211#define DEFAULT_MB_HIGH_WATER_5906 0x00000010 1213#define DEFAULT_MB_HIGH_WATER_5906 0x00000010
1214#define DEFAULT_MB_HIGH_WATER_57765 0x000000a0
1212#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c 1215#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
1213#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096 1216#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
1217#define DEFAULT_MB_HIGH_WATER_JUMBO_57765 0x000000ea
1214#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c 1218#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
1215#define BUFMGR_MB_ALLOC_BIT 0x10000000 1219#define BUFMGR_MB_ALLOC_BIT 0x10000000
1216#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420 1220#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420