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authorStephen Hemminger <shemminger@osdl.org>2006-02-22 14:45:02 -0500
committerFrancois Romieu <romieu@fr.zoreil.com>2006-02-22 19:25:23 -0500
commit56a645cc1bc16ab33b33a3e0854a46c5d2c864f3 (patch)
tree22ecf36723c1a60d87168583dd2f85f049ccfd88
parent9a6d343188f5f1e9537e700fc4139c2d905ff129 (diff)
[PATCH] sky2: use device iomem to access PCI config
To avoid problems with PCI config access without ACPI (or busted ACPI tables), use the device's window into PCI config space. I know this probably will upset the purists, but I would rather have users than ACPI testers. It also generates less code. Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
-rw-r--r--drivers/net/sky2.c81
-rw-r--r--drivers/net/sky2.h21
2 files changed, 54 insertions, 48 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index d913d3407e90..fbbc85532c2e 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -195,11 +195,11 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
195 pr_debug("sky2_set_power_state %d\n", state); 195 pr_debug("sky2_set_power_state %d\n", state);
196 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 196 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
197 197
198 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_PMC, &power_control); 198 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC);
199 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) && 199 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
200 (power_control & PCI_PM_CAP_PME_D3cold); 200 (power_control & PCI_PM_CAP_PME_D3cold);
201 201
202 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_CTRL, &power_control); 202 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
203 203
204 power_control |= PCI_PM_CTRL_PME_STATUS; 204 power_control |= PCI_PM_CTRL_PME_STATUS;
205 power_control &= ~(PCI_PM_CTRL_STATE_MASK); 205 power_control &= ~(PCI_PM_CTRL_STATE_MASK);
@@ -223,7 +223,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
223 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 223 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
224 224
225 /* Turn off phy power saving */ 225 /* Turn off phy power saving */
226 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 226 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
227 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 227 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
228 228
229 /* looks like this XL is back asswards .. */ 229 /* looks like this XL is back asswards .. */
@@ -234,26 +234,26 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
234 } 234 }
235 235
236 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { 236 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
237 pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0); 237 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
238 pci_read_config_dword(hw->pdev, PCI_DEV_REG4, &reg1); 238 reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
239 reg1 &= P_ASPM_CONTROL_MSK; 239 reg1 &= P_ASPM_CONTROL_MSK;
240 pci_write_config_dword(hw->pdev, PCI_DEV_REG4, reg1); 240 sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
241 pci_write_config_dword(hw->pdev, PCI_DEV_REG5, 0); 241 sky2_pci_write32(hw, PCI_DEV_REG5, 0);
242 } 242 }
243 243
244 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 244 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
245 245
246 break; 246 break;
247 247
248 case PCI_D3hot: 248 case PCI_D3hot:
249 case PCI_D3cold: 249 case PCI_D3cold:
250 /* Turn on phy power saving */ 250 /* Turn on phy power saving */
251 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 251 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
252 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 252 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
253 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 253 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
254 else 254 else
255 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 255 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
256 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 256 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
257 257
258 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 258 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
259 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 259 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
@@ -275,7 +275,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
275 ret = -1; 275 ret = -1;
276 } 276 }
277 277
278 pci_write_config_byte(hw->pdev, hw->pm_cap + PCI_PM_CTRL, power_control); 278 sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
279 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 279 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
280 return ret; 280 return ret;
281} 281}
@@ -2059,13 +2059,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2059 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { 2059 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
2060 u16 pci_err; 2060 u16 pci_err;
2061 2061
2062 pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err); 2062 pci_err = sky2_pci_read16(hw, PCI_STATUS);
2063 if (net_ratelimit()) 2063 if (net_ratelimit())
2064 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n", 2064 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
2065 pci_name(hw->pdev), pci_err); 2065 pci_name(hw->pdev), pci_err);
2066 2066
2067 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2067 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2068 pci_write_config_word(hw->pdev, PCI_STATUS, 2068 sky2_pci_write16(hw, PCI_STATUS,
2069 pci_err | PCI_STATUS_ERROR_BITS); 2069 pci_err | PCI_STATUS_ERROR_BITS);
2070 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2070 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2071 } 2071 }
@@ -2074,7 +2074,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2074 /* PCI-Express uncorrectable Error occurred */ 2074 /* PCI-Express uncorrectable Error occurred */
2075 u32 pex_err; 2075 u32 pex_err;
2076 2076
2077 pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err); 2077 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
2078 2078
2079 if (net_ratelimit()) 2079 if (net_ratelimit())
2080 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", 2080 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
@@ -2082,7 +2082,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2082 2082
2083 /* clear the interrupt */ 2083 /* clear the interrupt */
2084 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2084 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2085 pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2085 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2086 0xffffffffUL); 2086 0xffffffffUL);
2087 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2087 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2088 2088
@@ -2212,7 +2212,7 @@ static int sky2_reset(struct sky2_hw *hw)
2212{ 2212{
2213 u16 status; 2213 u16 status;
2214 u8 t8, pmd_type; 2214 u8 t8, pmd_type;
2215 int i, err; 2215 int i;
2216 2216
2217 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2217 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2218 2218
@@ -2234,25 +2234,18 @@ static int sky2_reset(struct sky2_hw *hw)
2234 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2234 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2235 2235
2236 /* clear PCI errors, if any */ 2236 /* clear PCI errors, if any */
2237 err = pci_read_config_word(hw->pdev, PCI_STATUS, &status); 2237 status = sky2_pci_read16(hw, PCI_STATUS);
2238 if (err)
2239 goto pci_err;
2240 2238
2241 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2239 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2242 err = pci_write_config_word(hw->pdev, PCI_STATUS, 2240 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
2243 status | PCI_STATUS_ERROR_BITS); 2241
2244 if (err)
2245 goto pci_err;
2246 2242
2247 sky2_write8(hw, B0_CTST, CS_MRST_CLR); 2243 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2248 2244
2249 /* clear any PEX errors */ 2245 /* clear any PEX errors */
2250 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) { 2246 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2251 err = pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2247 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2252 0xffffffffUL); 2248
2253 if (err)
2254 goto pci_err;
2255 }
2256 2249
2257 pmd_type = sky2_read8(hw, B2_PMD_TYP); 2250 pmd_type = sky2_read8(hw, B2_PMD_TYP);
2258 hw->copper = !(pmd_type == 'L' || pmd_type == 'S'); 2251 hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
@@ -2362,14 +2355,6 @@ static int sky2_reset(struct sky2_hw *hw)
2362 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); 2355 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
2363 2356
2364 return 0; 2357 return 0;
2365
2366pci_err:
2367 /* This is to catch a BIOS bug workaround where
2368 * mmconfig table doesn't have other buses.
2369 */
2370 printk(KERN_ERR PFX "%s: can't access PCI config space\n",
2371 pci_name(hw->pdev));
2372 return err;
2373} 2358}
2374 2359
2375static u32 sky2_supported_modes(const struct sky2_hw *hw) 2360static u32 sky2_supported_modes(const struct sky2_hw *hw)
@@ -3239,17 +3224,6 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3239 } 3224 }
3240 } 3225 }
3241 3226
3242#ifdef __BIG_ENDIAN
3243 /* byte swap descriptors in hardware */
3244 {
3245 u32 reg;
3246
3247 pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
3248 reg |= PCI_REV_DESC;
3249 pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
3250 }
3251#endif
3252
3253 err = -ENOMEM; 3227 err = -ENOMEM;
3254 hw = kzalloc(sizeof(*hw), GFP_KERNEL); 3228 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
3255 if (!hw) { 3229 if (!hw) {
@@ -3268,6 +3242,17 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3268 } 3242 }
3269 hw->pm_cap = pm_cap; 3243 hw->pm_cap = pm_cap;
3270 3244
3245#ifdef __BIG_ENDIAN
3246 /* byte swap descriptors in hardware */
3247 {
3248 u32 reg;
3249
3250 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
3251 reg |= PCI_REV_DESC;
3252 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
3253 }
3254#endif
3255
3271 /* ring for status responses */ 3256 /* ring for status responses */
3272 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES, 3257 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
3273 &hw->st_dma); 3258 &hw->st_dma);
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index d1c71f50d8b9..9e40766150b4 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -1951,4 +1951,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
1951 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); 1951 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
1952 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); 1952 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
1953} 1953}
1954
1955/* PCI config space access */
1956static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
1957{
1958 return sky2_read32(hw, Y2_CFG_SPC + reg);
1959}
1960
1961static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
1962{
1963 return sky2_read16(hw, Y2_CFG_SPC + reg);
1964}
1965
1966static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
1967{
1968 sky2_write32(hw, Y2_CFG_SPC + reg, val);
1969}
1970
1971static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
1972{
1973 sky2_write16(hw, Y2_CFG_SPC + reg, val);
1974}
1954#endif 1975#endif