diff options
author | Andi Kleen <ak@suse.de> | 2005-09-12 12:49:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 13:49:55 -0400 |
commit | 61c11341ed798db9b99b30c1711c1cf458457806 (patch) | |
tree | 2e5ff34ede24ca3e88b5f49170fb1b717b80c080 | |
parent | eddfb4ed290383abf912630fa8dac5acf65c9e55 (diff) |
[PATCH] x86-64: Remove esr disable hack in APIC code
This was just needed for the Numasaurus, which fortunately
doesn't support x86-64 CPUs.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | arch/x86_64/kernel/apic.c | 21 | ||||
-rw-r--r-- | include/asm-x86_64/apic.h | 1 |
2 files changed, 1 insertions, 21 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c index 375d369570ca..9af0cc3e2ccc 100644 --- a/arch/x86_64/kernel/apic.c +++ b/arch/x86_64/kernel/apic.c | |||
@@ -325,14 +325,6 @@ void __cpuinit setup_local_APIC (void) | |||
325 | { | 325 | { |
326 | unsigned int value, ver, maxlvt; | 326 | unsigned int value, ver, maxlvt; |
327 | 327 | ||
328 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ | ||
329 | if (esr_disable) { | ||
330 | apic_write(APIC_ESR, 0); | ||
331 | apic_write(APIC_ESR, 0); | ||
332 | apic_write(APIC_ESR, 0); | ||
333 | apic_write(APIC_ESR, 0); | ||
334 | } | ||
335 | |||
336 | value = apic_read(APIC_LVR); | 328 | value = apic_read(APIC_LVR); |
337 | ver = GET_APIC_VERSION(value); | 329 | ver = GET_APIC_VERSION(value); |
338 | 330 | ||
@@ -434,7 +426,7 @@ void __cpuinit setup_local_APIC (void) | |||
434 | value |= APIC_LVT_LEVEL_TRIGGER; | 426 | value |= APIC_LVT_LEVEL_TRIGGER; |
435 | apic_write_around(APIC_LVT1, value); | 427 | apic_write_around(APIC_LVT1, value); |
436 | 428 | ||
437 | if (APIC_INTEGRATED(ver) && !esr_disable) { /* !82489DX */ | 429 | { |
438 | unsigned oldvalue; | 430 | unsigned oldvalue; |
439 | maxlvt = get_maxlvt(); | 431 | maxlvt = get_maxlvt(); |
440 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ | 432 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
@@ -452,17 +444,6 @@ void __cpuinit setup_local_APIC (void) | |||
452 | apic_printk(APIC_VERBOSE, | 444 | apic_printk(APIC_VERBOSE, |
453 | "ESR value after enabling vector: %08x, after %08x\n", | 445 | "ESR value after enabling vector: %08x, after %08x\n", |
454 | oldvalue, value); | 446 | oldvalue, value); |
455 | } else { | ||
456 | if (esr_disable) | ||
457 | /* | ||
458 | * Something untraceble is creating bad interrupts on | ||
459 | * secondary quads ... for the moment, just leave the | ||
460 | * ESR disabled - we can't do anything useful with the | ||
461 | * errors anyway - mbligh | ||
462 | */ | ||
463 | apic_printk(APIC_DEBUG, "Leaving ESR disabled.\n"); | ||
464 | else | ||
465 | apic_printk(APIC_DEBUG, "No ESR for 82489DX.\n"); | ||
466 | } | 447 | } |
467 | 448 | ||
468 | nmi_watchdog_default(); | 449 | nmi_watchdog_default(); |
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h index 16ec82e16b21..1559d78894ac 100644 --- a/include/asm-x86_64/apic.h +++ b/include/asm-x86_64/apic.h | |||
@@ -111,7 +111,6 @@ extern unsigned int nmi_watchdog; | |||
111 | 111 | ||
112 | #endif /* CONFIG_X86_LOCAL_APIC */ | 112 | #endif /* CONFIG_X86_LOCAL_APIC */ |
113 | 113 | ||
114 | #define esr_disable 0 | ||
115 | extern unsigned boot_cpu_id; | 114 | extern unsigned boot_cpu_id; |
116 | 115 | ||
117 | #endif /* __ASM_APIC_H */ | 116 | #endif /* __ASM_APIC_H */ |