Regulator: LP3972 PMIC regulator driver

This patch adds regulator drivers for National Semiconductors LP3972 PMIC.
This LP3972 PMIC controller has 3 DC/DC voltage converters and 5 low drop-out
(LDO) regulators. LP3972 PMIC controller uses I2C interface.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

4 files changed, 705 insertions, 0 deletions

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 4889caabc632..dd30e883d4a7 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -172,6 +172,13 @@ config REGULATOR_LP3971
          Say Y here to support the voltage regulators and convertors
          on National Semiconductors LP3971 PMIC
 
+config REGULATOR_LP3972
+        tristate "National Semiconductors LP3972 PMIC regulator driver"
+        depends on I2C
+        help
+         Say Y here to support the voltage regulators and convertors
+         on National Semiconductors LP3972 PMIC
+
 config REGULATOR_PCAP
         tristate "PCAP2 regulator driver"
         depends on EZX_PCAP
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index beff6da6eff6..6cae6419b8b1 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o
 obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
 obj-$(CONFIG_REGULATOR_DUMMY) += dummy.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
+obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
 obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o
 obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o
diff --git a/drivers/regulator/lp3972.c b/drivers/regulator/lp3972.c
new file mode 100644
index 000000000000..0d9b47569c1b
--- /dev/null
+++ b/drivers/regulator/lp3972.c
@@ -0,0 +1,649 @@
+/*
+ * Regulator driver for National Semiconductors LP3972 PMIC chip
+ *
+ * Based on lp3971.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/bug.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/kernel.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/lp3972.h>
+#include <linux/slab.h>
+
+struct lp3972 {
+        struct device *dev;
+        struct mutex io_lock;
+        struct i2c_client *i2c;
+        int num_regulators;
+        struct regulator_dev **rdev;
+};
+
+/* LP3972 Control Registers */
+#define LP3972_SCR_REG          0x07
+#define LP3972_OVER1_REG        0x10
+#define LP3972_OVSR1_REG        0x11
+#define LP3972_OVER2_REG        0x12
+#define LP3972_OVSR2_REG        0x13
+#define LP3972_VCC1_REG         0x20
+#define LP3972_ADTV1_REG        0x23
+#define LP3972_ADTV2_REG        0x24
+#define LP3972_AVRC_REG         0x25
+#define LP3972_CDTC1_REG        0x26
+#define LP3972_CDTC2_REG        0x27
+#define LP3972_SDTV1_REG        0x29
+#define LP3972_SDTV2_REG        0x2A
+#define LP3972_MDTV1_REG        0x32
+#define LP3972_MDTV2_REG        0x33
+#define LP3972_L2VCR_REG        0x39
+#define LP3972_L34VCR_REG       0x3A
+#define LP3972_SCR1_REG         0x80
+#define LP3972_SCR2_REG         0x81
+#define LP3972_OEN3_REG         0x82
+#define LP3972_OSR3_REG         0x83
+#define LP3972_LOER4_REG        0x84
+#define LP3972_B2TV_REG         0x85
+#define LP3972_B3TV_REG         0x86
+#define LP3972_B32RC_REG        0x87
+#define LP3972_ISRA_REG         0x88
+#define LP3972_BCCR_REG         0x89
+#define LP3972_II1RR_REG        0x8E
+#define LP3972_II2RR_REG        0x8F
+
+#define LP3972_SYS_CONTROL1_REG         LP3972_SCR1_REG
+/* System control register 1 initial value,
+ * bits 5, 6 and 7 are EPROM programmable */
+#define SYS_CONTROL1_INIT_VAL           0x02
+#define SYS_CONTROL1_INIT_MASK          0x1F
+
+#define LP3972_VOL_CHANGE_REG           LP3972_VCC1_REG
+#define LP3972_VOL_CHANGE_FLAG_GO       0x01
+#define LP3972_VOL_CHANGE_FLAG_MASK     0x03
+
+/* LDO output enable mask */
+#define LP3972_OEN3_L1EN        BIT(0)
+#define LP3972_OVER2_LDO2_EN    BIT(2)
+#define LP3972_OVER2_LDO3_EN    BIT(3)
+#define LP3972_OVER2_LDO4_EN    BIT(4)
+#define LP3972_OVER1_S_EN       BIT(2)
+
+static const int ldo1_voltage_map[] = {
+        1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875,
+        1900, 1925, 1950, 1975, 2000,
+};
+
+static const int ldo23_voltage_map[] = {
+        1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500,
+        2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300,
+};
+
+static const int ldo4_voltage_map[] = {
+        1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350,
+        1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300,
+};
+
+static const int ldo5_voltage_map[] = {
+           0,    0,    0,    0,    0,  850,  875,  900,
+         925,  950,  975, 1000, 1025, 1050, 1075, 1100,
+        1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
+        1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
+};
+
+static const int buck1_voltage_map[] = {
+         725,  750,  775,  800,  825,  850,  875,  900,
+         925,  950,  975, 1000, 1025, 1050, 1075, 1100,
+        1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
+        1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
+};
+
+static const int buck23_voltage_map[] = {
+           0,  800,  850,  900,  950, 1000, 1050, 1100,
+        1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500,
+        1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800,
+        3000, 3300,
+};
+
+static const int *ldo_voltage_map[] = {
+        ldo1_voltage_map,
+        ldo23_voltage_map,
+        ldo23_voltage_map,
+        ldo4_voltage_map,
+        ldo5_voltage_map,
+};
+
+static const int *buck_voltage_map[] = {
+        buck1_voltage_map,
+        buck23_voltage_map,
+        buck23_voltage_map,
+};
+
+static const int ldo_output_enable_mask[] = {
+        LP3972_OEN3_L1EN,
+        LP3972_OVER2_LDO2_EN,
+        LP3972_OVER2_LDO3_EN,
+        LP3972_OVER2_LDO4_EN,
+        LP3972_OVER1_S_EN,
+};
+
+static const int ldo_output_enable_addr[] = {
+        LP3972_OEN3_REG,
+        LP3972_OVER2_REG,
+        LP3972_OVER2_REG,
+        LP3972_OVER2_REG,
+        LP3972_OVER1_REG,
+};
+
+static const int ldo_vol_ctl_addr[] = {
+        LP3972_MDTV1_REG,
+        LP3972_L2VCR_REG,
+        LP3972_L34VCR_REG,
+        LP3972_L34VCR_REG,
+        LP3972_SDTV1_REG,
+};
+
+static const int buck_vol_enable_addr[] = {
+        LP3972_OVER1_REG,
+        LP3972_OEN3_REG,
+        LP3972_OEN3_REG,
+};
+
+static const int buck_base_addr[] = {
+        LP3972_ADTV1_REG,
+        LP3972_B2TV_REG,
+        LP3972_B3TV_REG,
+};
+