diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-07-15 08:03:35 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-07-29 18:47:14 -0400 |
commit | 9b71de49b030ad8fd4d13d38571b5c42dc9ed8dd (patch) | |
tree | e580b76f032c029f6b5541647c4f01a4f8acaa72 | |
parent | 1d91e1a296244690461a7c36d71710dfbabbc219 (diff) |
S3C64XX: Fix ARMCLK configuration
The value of armclk_mask needs to be inverted for use as a mask on
the register value when updating ARM_RATIO.
This is critical for cpufreq support, without it attempts to scale
the frequency of the core trash pretty much the entire clock tree.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r-- | arch/arm/plat-s3c64xx/s3c6400-clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index f8165e622478..febac1950d8e 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c | |||
@@ -175,7 +175,7 @@ static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate) | |||
175 | div = clk_get_rate(clk->parent) / rate; | 175 | div = clk_get_rate(clk->parent) / rate; |
176 | 176 | ||
177 | val = __raw_readl(S3C_CLK_DIV0); | 177 | val = __raw_readl(S3C_CLK_DIV0); |
178 | val &= armclk_mask; | 178 | val &= ~armclk_mask; |
179 | val |= (div - 1); | 179 | val |= (div - 1); |
180 | __raw_writel(val, S3C_CLK_DIV0); | 180 | __raw_writel(val, S3C_CLK_DIV0); |
181 | 181 | ||