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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-09-15 17:44:00 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-11-11 22:43:30 -0500
commit8c68e2f7885b22f0a63bf087752a46b690d6b6ea (patch)
tree5dcb238c4bb85f43ab46d9c33ad3c060824773cf
parent3cfee0aaa1c7767e1b85272a0621e3a78ece7879 (diff)
powerpc/86xx: Add power management support for MPC8610HPCD boards
This patch adds needed nodes and properties to support suspend/resume on the MPC8610HPCD boards. There is a dedicated switch (SW9) that is used to wake up the boards. By default the SW9 button is routed to IRQ8, but could be re-routed (via PIXIS) to sreset. With 'no_console_suspend' kernel command line argument specified, the board is also able to wakeup upon serial port input. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> [dts] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/board.txt4
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts26
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c48
3 files changed, 74 insertions, 4 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt
index e8b5bc24d0ac..39e941515a36 100644
--- a/Documentation/powerpc/dts-bindings/fsl/board.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/board.txt
@@ -20,12 +20,16 @@ Required properities:
20- compatible : should be "fsl,fpga-pixis". 20- compatible : should be "fsl,fpga-pixis".
21- reg : should contain the address and the length of the FPPGA register 21- reg : should contain the address and the length of the FPPGA register
22 set. 22 set.
23- interrupt-parent: should specify phandle for the interrupt controller.
24- interrupts : should specify event (wakeup) IRQ.
23 25
24Example (MPC8610HPCD): 26Example (MPC8610HPCD):
25 27
26 board-control@e8000000 { 28 board-control@e8000000 {
27 compatible = "fsl,fpga-pixis"; 29 compatible = "fsl,fpga-pixis";
28 reg = <0xe8000000 32>; 30 reg = <0xe8000000 32>;
31 interrupt-parent = <&mpic>;
32 interrupts = <8 8>;
29 }; 33 };
30 34
31* Freescale BCSR GPIO banks 35* Freescale BCSR GPIO banks
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index f468d215f716..9535ce68caae 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -35,6 +35,8 @@
35 i-cache-line-size = <32>; 35 i-cache-line-size = <32>;
36 d-cache-size = <32768>; // L1 36 d-cache-size = <32768>; // L1
37 i-cache-size = <32768>; // L1 37 i-cache-size = <32768>; // L1
38 sleep = <&pmc 0x00008000 0 // core
39 &pmc 0x00004000 0>; // timebase
38 timebase-frequency = <0>; // From uboot 40 timebase-frequency = <0>; // From uboot
39 bus-frequency = <0>; // From uboot 41 bus-frequency = <0>; // From uboot
40 clock-frequency = <0>; // From uboot 42 clock-frequency = <0>; // From uboot
@@ -60,6 +62,7 @@
60 5 0 0xe8480000 0x00008000 62 5 0 0xe8480000 0x00008000
61 6 0 0xe84c0000 0x00008000 63 6 0 0xe84c0000 0x00008000
62 3 0 0xe8000000 0x00000020>; 64 3 0 0xe8000000 0x00000020>;
65 sleep = <&pmc 0x08000000 0>;
63 66
64 flash@0,0 { 67 flash@0,0 {
65 compatible = "cfi-flash"; 68 compatible = "cfi-flash";
@@ -105,6 +108,8 @@
105 compatible = "fsl,fpga-pixis"; 108 compatible = "fsl,fpga-pixis";
106 reg = <3 0 0x20>; 109 reg = <3 0 0x20>;
107 ranges = <0 3 0 0x20>; 110 ranges = <0 3 0 0x20>;
111 interrupt-parent = <&mpic>;
112 interrupts = <8 8>;
108 113
109 sdcsr_pio: gpio-controller@a { 114 sdcsr_pio: gpio-controller@a {
110 #gpio-cells = <2>; 115 #gpio-cells = <2>;
@@ -163,6 +168,7 @@
163 reg = <0x3100 0x100>; 168 reg = <0x3100 0x100>;
164 interrupts = <43 2>; 169 interrupts = <43 2>;
165 interrupt-parent = <&mpic>; 170 interrupt-parent = <&mpic>;
171 sleep = <&pmc 0x00000004 0>;
166 dfsrr; 172 dfsrr;
167 }; 173 };
168 174
@@ -174,6 +180,7 @@
174 clock-frequency = <0>; 180 clock-frequency = <0>;
175 interrupts = <42 2>; 181 interrupts = <42 2>;
176 interrupt-parent = <&mpic>; 182 interrupt-parent = <&mpic>;
183 sleep = <&pmc 0x00000002 0>;
177 }; 184 };
178 185
179 serial1: serial@4600 { 186 serial1: serial@4600 {
@@ -184,6 +191,7 @@
184 clock-frequency = <0>; 191 clock-frequency = <0>;
185 interrupts = <42 2>; 192 interrupts = <42 2>;
186 interrupt-parent = <&mpic>; 193 interrupt-parent = <&mpic>;
194 sleep = <&pmc 0x00000008 0>;
187 }; 195 };
188 196
189 spi@7000 { 197 spi@7000 {
@@ -196,6 +204,7 @@
196 interrupt-parent = <&mpic>; 204 interrupt-parent = <&mpic>;
197 mode = "cpu"; 205 mode = "cpu";
198 gpios = <&sdcsr_pio 7 0>; 206 gpios = <&sdcsr_pio 7 0>;
207 sleep = <&pmc 0x00000800 0>;
199 208
200 mmc-slot@0 { 209 mmc-slot@0 {
201 compatible = "fsl,mpc8610hpcd-mmc-slot", 210 compatible = "fsl,mpc8610hpcd-mmc-slot",
@@ -213,6 +222,7 @@
213 reg = <0x2c000 100>; 222 reg = <0x2c000 100>;
214 interrupts = <72 2>; 223 interrupts = <72 2>;
215 interrupt-parent = <&mpic>; 224 interrupt-parent = <&mpic>;
225 sleep = <&pmc 0x04000000 0>;
216 }; 226 };
217 227
218 mpic: interrupt-controller@40000 { 228 mpic: interrupt-controller@40000 {
@@ -241,9 +251,18 @@
241 }; 251 };
242 252
243 global-utilities@e0000 { 253 global-utilities@e0000 {
254 #address-cells = <1>;
255 #size-cells = <1>;
244 compatible = "fsl,mpc8610-guts"; 256 compatible = "fsl,mpc8610-guts";
245 reg = <0xe0000 0x1000>; 257 reg = <0xe0000 0x1000>;
258 ranges = <0 0xe0000 0x1000>;
246 fsl,has-rstcr; 259 fsl,has-rstcr;
260
261 pmc: power@70 {
262 compatible = "fsl,mpc8610-pmc",
263 "fsl,mpc8641d-pmc";
264 reg = <0x70 0x20>;
265 };
247 }; 266 };
248 267
249 wdt@e4000 { 268 wdt@e4000 {
@@ -262,6 +281,7 @@
262 fsl,playback-dma = <&dma00>; 281 fsl,playback-dma = <&dma00>;
263 fsl,capture-dma = <&dma01>; 282 fsl,capture-dma = <&dma01>;
264 fsl,fifo-depth = <8>; 283 fsl,fifo-depth = <8>;
284 sleep = <&pmc 0 0x08000000>;
265 }; 285 };
266 286
267 ssi@16100 { 287 ssi@16100 {
@@ -271,6 +291,7 @@
271 interrupt-parent = <&mpic>; 291 interrupt-parent = <&mpic>;
272 interrupts = <63 2>; 292 interrupts = <63 2>;
273 fsl,fifo-depth = <8>; 293 fsl,fifo-depth = <8>;
294 sleep = <&pmc 0 0x04000000>;
274 }; 295 };
275 296
276 dma@21300 { 297 dma@21300 {
@@ -280,6 +301,7 @@
280 cell-index = <0>; 301 cell-index = <0>;
281 reg = <0x21300 0x4>; /* DMA general status register */ 302 reg = <0x21300 0x4>; /* DMA general status register */
282 ranges = <0x0 0x21100 0x200>; 303 ranges = <0x0 0x21100 0x200>;
304 sleep = <&pmc 0x00000400 0>;
283 305
284 dma00: dma-channel@0 { 306 dma00: dma-channel@0 {
285 compatible = "fsl,mpc8610-dma-channel", 307 compatible = "fsl,mpc8610-dma-channel",
@@ -322,6 +344,7 @@
322 cell-index = <1>; 344 cell-index = <1>;
323 reg = <0xc300 0x4>; /* DMA general status register */ 345 reg = <0xc300 0x4>; /* DMA general status register */
324 ranges = <0x0 0xc100 0x200>; 346 ranges = <0x0 0xc100 0x200>;
347 sleep = <&pmc 0x00000200 0>;
325 348
326 dma-channel@0 { 349 dma-channel@0 {
327 compatible = "fsl,mpc8610-dma-channel", 350 compatible = "fsl,mpc8610-dma-channel",
@@ -369,6 +392,7 @@
369 bus-range = <0 0>; 392 bus-range = <0 0>;
370 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 393 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
371 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>; 394 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>;
395 sleep = <&pmc 0x80000000 0>;
372 clock-frequency = <33333333>; 396 clock-frequency = <33333333>;
373 interrupt-parent = <&mpic>; 397 interrupt-parent = <&mpic>;
374 interrupts = <24 2>; 398 interrupts = <24 2>;
@@ -398,6 +422,7 @@
398 bus-range = <1 3>; 422 bus-range = <1 3>;
399 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 423 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
400 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; 424 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
425 sleep = <&pmc 0x40000000 0>;
401 clock-frequency = <33333333>; 426 clock-frequency = <33333333>;
402 interrupt-parent = <&mpic>; 427 interrupt-parent = <&mpic>;
403 interrupts = <26 2>; 428 interrupts = <26 2>;
@@ -474,6 +499,7 @@
474 0x0000 0 0 4 &mpic 7 1>; 499 0x0000 0 0 4 &mpic 7 1>;
475 interrupt-parent = <&mpic>; 500 interrupt-parent = <&mpic>;
476 interrupts = <25 2>; 501 interrupts = <25 2>;
502 sleep = <&pmc 0x20000000 0>;
477 clock-frequency = <33333333>; 503 clock-frequency = <33333333>;
478 }; 504 };
479}; 505};
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 627908a4cd77..5abe137f6309 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -19,6 +19,7 @@
19#include <linux/stddef.h> 19#include <linux/stddef.h>
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/pci.h> 21#include <linux/pci.h>
22#include <linux/interrupt.h>
22#include <linux/kdev_t.h> 23#include <linux/kdev_t.h>
23#include <linux/delay.h> 24#include <linux/delay.h>
24#include <linux/seq_file.h> 25#include <linux/seq_file.h>
@@ -41,10 +42,46 @@
41 42
42#include "mpc86xx.h" 43#include "mpc86xx.h"
43 44
45static struct device_node *pixis_node;
44static unsigned char *pixis_bdcfg0, *pixis_arch; 46static unsigned char *pixis_bdcfg0, *pixis_arch;
45 47
48#ifdef CONFIG_SUSPEND
49static irqreturn_t mpc8610_sw9_irq(int irq, void *data)
50{
51 pr_debug("%s: PIXIS' event (sw9/wakeup) IRQ handled\n", __func__);
52 return IRQ_HANDLED;
53}
54
55static void __init mpc8610_suspend_init(void)
56{
57 int irq;
58 int ret;
59
60 if (!pixis_node)
61 return;
62
63 irq = irq_of_parse_and_map(pixis_node, 0);
64 if (!irq) {
65 pr_err("%s: can't map pixis event IRQ.\n", __func__);
66 return;
67 }
68
69 ret = request_irq(irq, mpc8610_sw9_irq, 0, "sw9/wakeup", NULL);
70 if (ret) {
71 pr_err("%s: can't request pixis event IRQ: %d\n",
72 __func__, ret);
73 irq_dispose_mapping(irq);
74 }
75
76 enable_irq_wake(irq);
77}
78#else
79static inline void mpc8610_suspend_init(void) { }
80#endif /* CONFIG_SUSPEND */
81
46static struct of_device_id __initdata mpc8610_ids[] = { 82static struct of_device_id __initdata mpc8610_ids[] = {
47 { .compatible = "fsl,mpc8610-immr", }, 83 { .compatible = "fsl,mpc8610-immr", },
84 { .compatible = "fsl,mpc8610-guts", },
48 { .compatible = "simple-bus", }, 85 { .compatible = "simple-bus", },
49 { .compatible = "gianfar", }, 86 { .compatible = "gianfar", },
50 {} 87 {}
@@ -55,6 +92,9 @@ static int __init mpc8610_declare_of_platform_devices(void)
55 /* Firstly, register PIXIS GPIOs. */ 92 /* Firstly, register PIXIS GPIOs. */
56 simple_gpiochip_init("fsl,fpga-pixis-gpio-bank"); 93 simple_gpiochip_init("fsl,fpga-pixis-gpio-bank");
57 94
95 /* Enable wakeup on PIXIS' event IRQ. */
96 mpc8610_suspend_init();
97
58 /* Without this call, the SSI device driver won't get probed. */ 98 /* Without this call, the SSI device driver won't get probed. */
59 of_platform_bus_probe(NULL, mpc8610_ids, NULL); 99 of_platform_bus_probe(NULL, mpc8610_ids, NULL);
60 100
@@ -250,10 +290,10 @@ static void __init mpc86xx_hpcd_setup_arch(void)
250 diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port; 290 diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port;
251#endif 291#endif
252 292
253 np = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis"); 293 pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");
254 if (np) { 294 if (pixis_node) {
255 of_address_to_resource(np, 0, &r); 295 of_address_to_resource(pixis_node, 0, &r);
256 of_node_put(np); 296 of_node_put(pixis_node);
257 pixis = ioremap(r.start, 32); 297 pixis = ioremap(r.start, 32);
258 if (!pixis) { 298 if (!pixis) {
259 printk(KERN_ERR "Err: can't map FPGA cfg register!\n"); 299 printk(KERN_ERR "Err: can't map FPGA cfg register!\n");