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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-08-10 09:23:29 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-08-10 09:23:29 -0400
commit7063c88c726a704e648ba36ca78baa630f8b7b0a (patch)
treee5bfd784a7d34a5c04005fa4169986921f9fdcd1
parentf4b9a988685da6386d7f9a72df3098bcc3270526 (diff)
parent4177662ec9f5e50b69ef074369fdb429dd48d97e (diff)
Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
-rw-r--r--arch/arm/configs/rx51_defconfig7
-rw-r--r--arch/arm/mach-omap2/board-overo.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c5
-rw-r--r--arch/arm/mach-omap2/mmc-twl4030.c6
-rw-r--r--arch/arm/plat-omap/dma.c4
-rw-r--r--arch/arm/plat-omap/gpio.c121
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h5
-rw-r--r--arch/arm/plat-omap/sram.c4
8 files changed, 110 insertions, 44 deletions
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index eb2cb31825c0..f238df66efd4 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -282,7 +282,7 @@ CONFIG_ALIGNMENT_TRAP=y
282# 282#
283CONFIG_ZBOOT_ROM_TEXT=0x0 283CONFIG_ZBOOT_ROM_TEXT=0x0
284CONFIG_ZBOOT_ROM_BSS=0x0 284CONFIG_ZBOOT_ROM_BSS=0x0
285CONFIG_CMDLINE="init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,log console=tty0" 285CONFIG_CMDLINE="init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,log console=tty0 console=ttyS2,115200n8"
286# CONFIG_XIP_KERNEL is not set 286# CONFIG_XIP_KERNEL is not set
287# CONFIG_KEXEC is not set 287# CONFIG_KEXEC is not set
288 288
@@ -1354,7 +1354,7 @@ CONFIG_USB_OTG_UTILS=y
1354# CONFIG_USB_GPIO_VBUS is not set 1354# CONFIG_USB_GPIO_VBUS is not set
1355# CONFIG_ISP1301_OMAP is not set 1355# CONFIG_ISP1301_OMAP is not set
1356CONFIG_TWL4030_USB=y 1356CONFIG_TWL4030_USB=y
1357CONFIG_MMC=m 1357CONFIG_MMC=y
1358# CONFIG_MMC_DEBUG is not set 1358# CONFIG_MMC_DEBUG is not set
1359# CONFIG_MMC_UNSAFE_RESUME is not set 1359# CONFIG_MMC_UNSAFE_RESUME is not set
1360 1360
@@ -1449,7 +1449,8 @@ CONFIG_RTC_DRV_TWL4030=m
1449# on-CPU RTC drivers 1449# on-CPU RTC drivers
1450# 1450#
1451# CONFIG_DMADEVICES is not set 1451# CONFIG_DMADEVICES is not set
1452# CONFIG_REGULATOR is not set 1452CONFIG_REGULATOR=y
1453CONFIG_REGULATOR_TWL4030=y
1453# CONFIG_UIO is not set 1454# CONFIG_UIO is not set
1454# CONFIG_STAGING is not set 1455# CONFIG_STAGING is not set
1455 1456
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index dff5528fbfb5..fec1bb19b9ff 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -146,7 +146,7 @@ static struct platform_device overo_smsc911x_device = {
146 .name = "smsc911x", 146 .name = "smsc911x",
147 .id = -1, 147 .id = -1,
148 .num_resources = ARRAY_SIZE(overo_smsc911x_resources), 148 .num_resources = ARRAY_SIZE(overo_smsc911x_resources),
149 .resource = &overo_smsc911x_resources, 149 .resource = overo_smsc911x_resources,
150 .dev = { 150 .dev = {
151 .platform_data = &overo_smsc911x_config, 151 .platform_data = &overo_smsc911x_config,
152 }, 152 },
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 9a0bf6744a05..56d931a425f7 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -278,6 +278,10 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
278 .setup = rx51_twlgpio_setup, 278 .setup = rx51_twlgpio_setup,
279}; 279};
280 280
281static struct twl4030_usb_data rx51_usb_data = {
282 .usb_mode = T2_USB_MODE_ULPI,
283};
284
281static struct twl4030_platform_data rx51_twldata = { 285static struct twl4030_platform_data rx51_twldata = {
282 .irq_base = TWL4030_IRQ_BASE, 286 .irq_base = TWL4030_IRQ_BASE,
283 .irq_end = TWL4030_IRQ_END, 287 .irq_end = TWL4030_IRQ_END,
@@ -286,6 +290,7 @@ static struct twl4030_platform_data rx51_twldata = {
286 .gpio = &rx51_gpio_data, 290 .gpio = &rx51_gpio_data,
287 .keypad = &rx51_kp_data, 291 .keypad = &rx51_kp_data,
288 .madc = &rx51_madc_data, 292 .madc = &rx51_madc_data,
293 .usb = &rx51_usb_data,
289 294
290 .vaux1 = &rx51_vaux1, 295 .vaux1 = &rx51_vaux1,
291 .vaux2 = &rx51_vaux2, 296 .vaux2 = &rx51_vaux2,
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
index 1541fd4c8d0f..3c04c2f1b23f 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -119,6 +119,7 @@ static int twl_mmc_late_init(struct device *dev)
119 if (i != 0) 119 if (i != 0)
120 break; 120 break;
121 ret = PTR_ERR(reg); 121 ret = PTR_ERR(reg);
122 hsmmc[i].vcc = NULL;
122 goto err; 123 goto err;
123 } 124 }
124 hsmmc[i].vcc = reg; 125 hsmmc[i].vcc = reg;
@@ -165,8 +166,13 @@ done:
165static void twl_mmc_cleanup(struct device *dev) 166static void twl_mmc_cleanup(struct device *dev)
166{ 167{
167 struct omap_mmc_platform_data *mmc = dev->platform_data; 168 struct omap_mmc_platform_data *mmc = dev->platform_data;
169 int i;
168 170
169 gpio_free(mmc->slots[0].switch_pin); 171 gpio_free(mmc->slots[0].switch_pin);
172 for(i = 0; i < ARRAY_SIZE(hsmmc); i++) {
173 regulator_put(hsmmc[i].vcc);
174 regulator_put(hsmmc[i].vcc_aux);
175 }
170} 176}
171 177
172#ifdef CONFIG_PM 178#ifdef CONFIG_PM
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7677a4a1cef2..e3ac94f09006 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -946,7 +946,9 @@ void omap_start_dma(int lch)
946 946
947 cur_lch = next_lch; 947 cur_lch = next_lch;
948 } while (next_lch != -1); 948 } while (next_lch != -1);
949 } else if (cpu_class_is_omap2()) { 949 } else if (cpu_is_omap242x() ||
950 (cpu_is_omap243x() && omap_type() <= OMAP2430_REV_ES1_0)) {
951
950 /* Errata: Need to write lch even if not using chaining */ 952 /* Errata: Need to write lch even if not using chaining */
951 dma_write(lch, CLNK_CTRL(lch)); 953 dma_write(lch, CLNK_CTRL(lch));
952 } 954 }
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 26b387c12423..9c16ca8d293c 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -476,14 +476,12 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
476 __raw_writel(l, reg); 476 __raw_writel(l, reg);
477} 477}
478 478
479static int __omap_get_gpio_datain(int gpio) 479static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
480{ 480{
481 struct gpio_bank *bank;
482 void __iomem *reg; 481 void __iomem *reg;
483 482
484 if (check_gpio(gpio) < 0) 483 if (check_gpio(gpio) < 0)
485 return -EINVAL; 484 return -EINVAL;
486 bank = get_gpio_bank(gpio);
487 reg = bank->base; 485 reg = bank->base;
488 switch (bank->method) { 486 switch (bank->method) {
489#ifdef CONFIG_ARCH_OMAP1 487#ifdef CONFIG_ARCH_OMAP1
@@ -524,6 +522,53 @@ static int __omap_get_gpio_datain(int gpio)
524 & (1 << get_gpio_index(gpio))) != 0; 522 & (1 << get_gpio_index(gpio))) != 0;
525} 523}
526 524
525static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
526{
527 void __iomem *reg;
528
529 if (check_gpio(gpio) < 0)
530 return -EINVAL;
531 reg = bank->base;
532
533 switch (bank->method) {
534#ifdef CONFIG_ARCH_OMAP1
535 case METHOD_MPUIO:
536 reg += OMAP_MPUIO_OUTPUT;
537 break;
538#endif
539#ifdef CONFIG_ARCH_OMAP15XX
540 case METHOD_GPIO_1510:
541 reg += OMAP1510_GPIO_DATA_OUTPUT;
542 break;
543#endif
544#ifdef CONFIG_ARCH_OMAP16XX
545 case METHOD_GPIO_1610:
546 reg += OMAP1610_GPIO_DATAOUT;
547 break;
548#endif
549#ifdef CONFIG_ARCH_OMAP730
550 case METHOD_GPIO_730:
551 reg += OMAP730_GPIO_DATA_OUTPUT;
552 break;
553#endif
554#ifdef CONFIG_ARCH_OMAP850
555 case METHOD_GPIO_850:
556 reg += OMAP850_GPIO_DATA_OUTPUT;
557 break;
558#endif
559#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
560 defined(CONFIG_ARCH_OMAP4)
561 case METHOD_GPIO_24XX:
562 reg += OMAP24XX_GPIO_DATAOUT;
563 break;
564#endif
565 default:
566 return -EINVAL;
567 }
568
569 return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;
570}
571
527#define MOD_REG_BIT(reg, bit_mask, set) \ 572#define MOD_REG_BIT(reg, bit_mask, set) \
528do { \ 573do { \
529 int l = __raw_readl(base + reg); \ 574 int l = __raw_readl(base + reg); \
@@ -1350,9 +1395,49 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
1350 return 0; 1395 return 0;
1351} 1396}
1352 1397
1398static int gpio_is_input(struct gpio_bank *bank, int mask)
1399{
1400 void __iomem *reg = bank->base;
1401
1402 switch (bank->method) {
1403 case METHOD_MPUIO:
1404 reg += OMAP_MPUIO_IO_CNTL;
1405 break;
1406 case METHOD_GPIO_1510:
1407 reg += OMAP1510_GPIO_DIR_CONTROL;
1408 break;
1409 case METHOD_GPIO_1610:
1410 reg += OMAP1610_GPIO_DIRECTION;
1411 break;
1412 case METHOD_GPIO_730:
1413 reg += OMAP730_GPIO_DIR_CONTROL;
1414 break;
1415 case METHOD_GPIO_850:
1416 reg += OMAP850_GPIO_DIR_CONTROL;
1417 break;
1418 case METHOD_GPIO_24XX:
1419 reg += OMAP24XX_GPIO_OE;
1420 break;
1421 }
1422 return __raw_readl(reg) & mask;
1423}
1424
1353static int gpio_get(struct gpio_chip *chip, unsigned offset) 1425static int gpio_get(struct gpio_chip *chip, unsigned offset)
1354{ 1426{
1355 return __omap_get_gpio_datain(chip->base + offset); 1427 struct gpio_bank *bank;
1428 void __iomem *reg;
1429 int gpio;
1430 u32 mask;
1431
1432 gpio = chip->base + offset;
1433 bank = get_gpio_bank(gpio);
1434 reg = bank->base;
1435 mask = 1 << get_gpio_index(gpio);
1436
1437 if (gpio_is_input(bank, mask))
1438 return _get_gpio_datain(bank, gpio);
1439 else
1440 return _get_gpio_dataout(bank, gpio);
1356} 1441}
1357 1442
1358static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) 1443static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
@@ -1886,34 +1971,6 @@ arch_initcall(omap_gpio_sysinit);
1886#include <linux/debugfs.h> 1971#include <linux/debugfs.h>
1887#include <linux/seq_file.h> 1972#include <linux/seq_file.h>
1888 1973
1889static int gpio_is_input(struct gpio_bank *bank, int mask)
1890{
1891 void __iomem *reg = bank->base;
1892
1893 switch (bank->method) {
1894 case METHOD_MPUIO:
1895 reg += OMAP_MPUIO_IO_CNTL;
1896 break;
1897 case METHOD_GPIO_1510:
1898 reg += OMAP1510_GPIO_DIR_CONTROL;
1899 break;
1900 case METHOD_GPIO_1610:
1901 reg += OMAP1610_GPIO_DIRECTION;
1902 break;
1903 case METHOD_GPIO_730:
1904 reg += OMAP730_GPIO_DIR_CONTROL;
1905 break;
1906 case METHOD_GPIO_850:
1907 reg += OMAP850_GPIO_DIR_CONTROL;
1908 break;
1909 case METHOD_GPIO_24XX:
1910 reg += OMAP24XX_GPIO_OE;
1911 break;
1912 }
1913 return __raw_readl(reg) & mask;
1914}
1915
1916
1917static int dbg_gpio_show(struct seq_file *s, void *unused) 1974static int dbg_gpio_show(struct seq_file *s, void *unused)
1918{ 1975{
1919 unsigned i, j, gpio; 1976 unsigned i, j, gpio;
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 285eaa3a8275..11e73d9e8928 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -378,9 +378,6 @@ IS_OMAP_TYPE(3430, 0x3430)
378#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ 378#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
379 cpu_is_omap44xx()) 379 cpu_is_omap44xx())
380 380
381#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
382 defined(CONFIG_ARCH_OMAP4)
383
384/* Various silicon revisions for omap2 */ 381/* Various silicon revisions for omap2 */
385#define OMAP242X_CLASS 0x24200024 382#define OMAP242X_CLASS 0x24200024
386#define OMAP2420_REV_ES1_0 0x24200024 383#define OMAP2420_REV_ES1_0 0x24200024
@@ -436,5 +433,3 @@ IS_OMAP_TYPE(3430, 0x3430)
436 433
437int omap_chip_is(struct omap_chip_id oci); 434int omap_chip_is(struct omap_chip_id oci);
438void omap2_check_revision(void); 435void omap2_check_revision(void);
439
440#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4ea73804d21e..2890b11f2387 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -44,9 +44,9 @@
44#define OMAP2_SRAM_VA 0xe3000000 44#define OMAP2_SRAM_VA 0xe3000000
45#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) 45#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
46#define OMAP3_SRAM_PA 0x40200000 46#define OMAP3_SRAM_PA 0x40200000
47#define OMAP3_SRAM_VA 0xd7000000 47#define OMAP3_SRAM_VA 0xe3000000
48#define OMAP3_SRAM_PUB_PA 0x40208000 48#define OMAP3_SRAM_PUB_PA 0x40208000
49#define OMAP3_SRAM_PUB_VA 0xd7008000 49#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
50#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ 50#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/
51#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/ 51#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/
52 52