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authorDavid Jander <david@protonic.nl>2010-10-08 05:24:01 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2010-10-11 10:12:22 -0400
commit6ff554e06869e970e6ef2c4d44ea43315917d22c (patch)
treeeeadd8cf15f3ed4f1d39a3b3b647bee5371a67ca
parent4b5ee7a7689e3551f304b9154ecadbb0c3ae292f (diff)
spi/imx: Support different fifo sizes
The i.MX51 ECSPI has a fifo size of 64 entries instead of 8 entries as found on the other cspi bus devices. Cc: Jason Wang <jason77.wang@gmail.com> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/spi/spi_imx.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 6bab2cfd93c1..55a38e2c6c13 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
@@ -77,6 +77,7 @@ struct spi_imx_devtype_data {
77 void (*trigger)(struct spi_imx_data *); 77 void (*trigger)(struct spi_imx_data *);
78 int (*rx_available)(struct spi_imx_data *); 78 int (*rx_available)(struct spi_imx_data *);
79 void (*reset)(struct spi_imx_data *); 79 void (*reset)(struct spi_imx_data *);
80 unsigned int fifosize;
80}; 81};
81 82
82struct spi_imx_data { 83struct spi_imx_data {
@@ -541,6 +542,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = {
541 .trigger = mx1_trigger, 542 .trigger = mx1_trigger,
542 .rx_available = mx1_rx_available, 543 .rx_available = mx1_rx_available,
543 .reset = mx1_reset, 544 .reset = mx1_reset,
545 .fifosize = 8,
544 }, 546 },
545#endif 547#endif
546#ifdef CONFIG_SPI_IMX_VER_0_0 548#ifdef CONFIG_SPI_IMX_VER_0_0
@@ -550,6 +552,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = {
550 .trigger = mx27_trigger, 552 .trigger = mx27_trigger,
551 .rx_available = mx27_rx_available, 553 .rx_available = mx27_rx_available,
552 .reset = spi_imx0_0_reset, 554 .reset = spi_imx0_0_reset,
555 .fifosize = 8,
553 }, 556 },
554#endif 557#endif
555#ifdef CONFIG_SPI_IMX_VER_0_4 558#ifdef CONFIG_SPI_IMX_VER_0_4
@@ -559,6 +562,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = {
559 .trigger = mx31_trigger, 562 .trigger = mx31_trigger,
560 .rx_available = mx31_rx_available, 563 .rx_available = mx31_rx_available,
561 .reset = spi_imx0_4_reset, 564 .reset = spi_imx0_4_reset,
565 .fifosize = 8,
562 }, 566 },
563#endif 567#endif
564#ifdef CONFIG_SPI_IMX_VER_0_7 568#ifdef CONFIG_SPI_IMX_VER_0_7
@@ -568,6 +572,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = {
568 .trigger = mx31_trigger, 572 .trigger = mx31_trigger,
569 .rx_available = mx31_rx_available, 573 .rx_available = mx31_rx_available,
570 .reset = spi_imx0_4_reset, 574 .reset = spi_imx0_4_reset,
575 .fifosize = 8,
571 }, 576 },
572#endif 577#endif
573#ifdef CONFIG_SPI_IMX_VER_2_3 578#ifdef CONFIG_SPI_IMX_VER_2_3
@@ -577,6 +582,7 @@ static struct spi_imx_devtype_data spi_imx_devtype_data[] __devinitdata = {
577 .trigger = spi_imx2_3_trigger, 582 .trigger = spi_imx2_3_trigger,
578 .rx_available = spi_imx2_3_rx_available, 583 .rx_available = spi_imx2_3_rx_available,
579 .reset = spi_imx2_3_reset, 584 .reset = spi_imx2_3_reset,
585 .fifosize = 64,
580 }, 586 },
581#endif 587#endif
582}; 588};
@@ -596,7 +602,7 @@ static void spi_imx_chipselect(struct spi_device *spi, int is_active)
596 602
597static void spi_imx_push(struct spi_imx_data *spi_imx) 603static void spi_imx_push(struct spi_imx_data *spi_imx)
598{ 604{
599 while (spi_imx->txfifo < 8) { 605 while (spi_imx->txfifo < spi_imx->devtype_data.fifosize) {
600 if (!spi_imx->count) 606 if (!spi_imx->count)
601 break; 607 break;
602 spi_imx->tx(spi_imx); 608 spi_imx->tx(spi_imx);