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authorKuninori Morimoto <morimoto.kuninori@renesas.com>2009-04-10 16:35:28 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-10 16:35:28 -0400
commit1bc571853381b81514cfc815b07a5cc2be4c86d2 (patch)
tree01b92fe6930f93da8e64e2db14cf3b1c5be93f08
parentf802d969b6a89d3f9b67ef879179824d53420ebe (diff)
sh: urquell: Fix up address mapping in board comments.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/boards/board-urquell.c33
1 files changed, 18 insertions, 15 deletions
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index f217f3553626..beb88c4da2c1 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -23,26 +23,29 @@
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <asm/sizes.h> 24#include <asm/sizes.h>
25 25
26/* SWx 8765 4321 26/*
27 * bit 1234 5678
27 *---------------------------- 28 *----------------------------
28 * SW1 1101 0010 -> Pck 66MHz version 29 * SW1 0101 0010 -> Pck 33MHz version
29 * (0101 0010) Pck 33MHz version (check CS1BCR) 30 * (1101 0010) Pck 66MHz version
30 * SW2 xxxx x1x0 -> little endian 31 * SW2 0x1x xxxx -> little endian
31 * 29bit mode 32 * 29bit mode
32 * SW47 0001 1000 -> CS0 : nor flash 33 * SW47 0001 1000 -> CS0 : on-board flash
33 * CS1 : SRAM, registers, LAN, PCMCIA 34 * CS1 : SRAM, registers, LAN, PCMCIA
34 * 38400 bps 35 * 38400 bps for SCIF1
35 * 36 *
36 * Address 37 * Address
37 * 0x00000000 Nor Flash 38 * 0x00000000 - 0x04000000 (CS0) Nor Flash
38 * 0x04000000 SRAM 39 * 0x04000000 - 0x04200000 (CS1) SRAM
39 * 0x05000000 FPGA register 40 * 0x05000000 - 0x05800000 (CS1) on board register
40 * 0x05800000 LAN91C111 41 * 0x05800000 - 0x06000000 (CS1) LAN91C111
41 * 0x06000000 PCMCIA 42 * 0x06000000 - 0x06400000 (CS1) PCMCIA
42 * 0x10000000 PCIe 43 * 0x08000000 - 0x10000000 (CS2-CS3) DDR3
43 * 0x14000000 LRAM/URAM 44 * 0x10000000 - 0x14000000 (CS4) PCIe
44 * 0x18000000 ATA/NAND-Flash 45 * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
45 * 0x1C000000 SH7786 Control register 46 * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
47 * 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash
48 * 0x1C000000 - (CS7) SH7786 Control register
46 */ 49 */
47 50
48/* HeartBeat */ 51/* HeartBeat */