aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorShawn Guo <shawn.guo@linaro.org>2011-09-28 05:16:03 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-09-28 07:39:41 -0400
commitf1263de200a25e89a2529202889e75bfd50320ba (patch)
tree455154ba61fbe611615f2633d25980489fe4c9ad
parentfcb8ce5cfe30ca9ca5c9a79cdfe26d1993e65e0c (diff)
arm/imx: merge mm-imx35.c into mm-imx31.c
As imx31 and imx35 have much in common at soc level, this patch merges mm-imx35.c into mm-imx31.c, so that the common functions between imx31 and imx35 can be added in one file later. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/mm-imx31.c78
-rw-r--r--arch/arm/mach-imx/mm-imx35.c109
3 files changed, 79 insertions, 110 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e9eb36dad888..4fe6bbe78dab 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
9obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o 9obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
10 10
11obj-$(CONFIG_SOC_IMX31) += mm-imx31.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o 11obj-$(CONFIG_SOC_IMX31) += mm-imx31.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
12obj-$(CONFIG_SOC_IMX35) += mm-imx35.o cpu-imx35.o clock-imx35.o ehci-imx35.o 12obj-$(CONFIG_SOC_IMX35) += mm-imx31.o cpu-imx35.o clock-imx35.o ehci-imx35.o
13obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 13obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
14 14
15# Support for CMOS sensor interface 15# Support for CMOS sensor interface
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
index b7c55e7db000..e06eed12a7b0 100644
--- a/arch/arm/mach-imx/mm-imx31.c
+++ b/arch/arm/mach-imx/mm-imx31.c
@@ -47,17 +47,42 @@ void __init mx31_map_io(void)
47 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); 47 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
48} 48}
49 49
50static struct map_desc mx35_io_desc[] __initdata = {
51 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
52 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
53 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
54 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
55 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
56};
57
58void __init mx35_map_io(void)
59{
60 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
61}
62
50void __init imx31_init_early(void) 63void __init imx31_init_early(void)
51{ 64{
52 mxc_set_cpu_type(MXC_CPU_MX31); 65 mxc_set_cpu_type(MXC_CPU_MX31);
53 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 66 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
54} 67}
55 68
69void __init imx35_init_early(void)
70{
71 mxc_set_cpu_type(MXC_CPU_MX35);
72 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
73 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
74}
75
56void __init mx31_init_irq(void) 76void __init mx31_init_irq(void)
57{ 77{
58 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); 78 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
59} 79}
60 80
81void __init mx35_init_irq(void)
82{
83 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
84}
85
61static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { 86static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
62 .per_2_per_addr = 1677, 87 .per_2_per_addr = 1677,
63}; 88};
@@ -89,3 +114,56 @@ void __init imx31_soc_init(void)
89 114
90 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); 115 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
91} 116}
117
118static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
119 .ap_2_ap_addr = 642,
120 .uart_2_mcu_addr = 817,
121 .mcu_2_app_addr = 747,
122 .uartsh_2_mcu_addr = 1183,
123 .per_2_shp_addr = 1033,
124 .mcu_2_shp_addr = 961,
125 .ata_2_mcu_addr = 1333,
126 .mcu_2_ata_addr = 1252,
127 .app_2_mcu_addr = 683,
128 .shp_2_per_addr = 1111,
129 .shp_2_mcu_addr = 892,
130};
131
132static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
133 .ap_2_ap_addr = 729,
134 .uart_2_mcu_addr = 904,
135 .per_2_app_addr = 1597,
136 .mcu_2_app_addr = 834,
137 .uartsh_2_mcu_addr = 1270,
138 .per_2_shp_addr = 1120,
139 .mcu_2_shp_addr = 1048,
140 .ata_2_mcu_addr = 1429,
141 .mcu_2_ata_addr = 1339,
142 .app_2_per_addr = 1531,
143 .app_2_mcu_addr = 770,
144 .shp_2_per_addr = 1198,
145 .shp_2_mcu_addr = 979,
146};
147
148static struct sdma_platform_data imx35_sdma_pdata __initdata = {
149 .fw_name = "sdma-imx35-to2.bin",
150 .script_addrs = &imx35_to2_sdma_script,
151};
152
153void __init imx35_soc_init(void)
154{
155 int to_version = mx35_revision() >> 4;
156
157 /* i.mx35 has the i.mx31 type gpio */
158 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
159 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
160 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
161
162 if (to_version == 1) {
163 strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
164 strlen(imx35_sdma_pdata.fw_name));
165 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
166 }
167
168 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
169}
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
deleted file mode 100644
index f49bac7a1ede..000000000000
--- a/arch/arm/mach-imx/mm-imx35.c
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/mach/map.h>
25#include <asm/hardware/cache-l2x0.h>
26
27#include <mach/common.h>
28#include <mach/devices-common.h>
29#include <mach/hardware.h>
30#include <mach/iomux-v3.h>
31#include <mach/irqs.h>
32
33static struct map_desc mx35_io_desc[] __initdata = {
34 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
35 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
36 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
37 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
38 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
39};
40
41void __init mx35_map_io(void)
42{
43 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
44}
45
46void __init imx35_init_early(void)
47{
48 mxc_set_cpu_type(MXC_CPU_MX35);
49 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
50 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
51}
52
53void __init mx35_init_irq(void)
54{
55 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
56}
57
58static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
59 .ap_2_ap_addr = 642,
60 .uart_2_mcu_addr = 817,
61 .mcu_2_app_addr = 747,
62 .uartsh_2_mcu_addr = 1183,
63 .per_2_shp_addr = 1033,
64 .mcu_2_shp_addr = 961,
65 .ata_2_mcu_addr = 1333,
66 .mcu_2_ata_addr = 1252,
67 .app_2_mcu_addr = 683,
68 .shp_2_per_addr = 1111,
69 .shp_2_mcu_addr = 892,
70};
71
72static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
73 .ap_2_ap_addr = 729,
74 .uart_2_mcu_addr = 904,
75 .per_2_app_addr = 1597,
76 .mcu_2_app_addr = 834,
77 .uartsh_2_mcu_addr = 1270,
78 .per_2_shp_addr = 1120,
79 .mcu_2_shp_addr = 1048,
80 .ata_2_mcu_addr = 1429,
81 .mcu_2_ata_addr = 1339,
82 .app_2_per_addr = 1531,
83 .app_2_mcu_addr = 770,
84 .shp_2_per_addr = 1198,
85 .shp_2_mcu_addr = 979,
86};
87
88static struct sdma_platform_data imx35_sdma_pdata __initdata = {
89 .fw_name = "sdma-imx35-to2.bin",
90 .script_addrs = &imx35_to2_sdma_script,
91};
92
93void __init imx35_soc_init(void)
94{
95 int to_version = mx35_revision() >> 4;
96
97 /* i.mx35 has the i.mx31 type gpio */
98 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
99 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
100 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
101
102 if (to_version == 1) {
103 strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
104 strlen(imx35_sdma_pdata.fw_name));
105 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
106 }
107
108 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
109}