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authorBen Skeggs <bskeggs@redhat.com>2011-07-19 21:44:52 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-07-24 19:43:38 -0400
commit9962cc6eba013607d6199b723afca23301df7b47 (patch)
tree2114c4aee75c09241f3935b02df0e1ff4113f171
parent6c320fef5835240bf414b54e697e517a160663f4 (diff)
drm/nouveau/gr: disable fifo access and idle before suspend ctx unload
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nv04_graph.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv10_graph.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv20_graph.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c5
4 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 774cb7ab79f2..dbdea8ed3925 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -540,6 +540,11 @@ nv04_graph_init(struct drm_device *dev, int engine)
540static int 540static int
541nv04_graph_fini(struct drm_device *dev, int engine, bool suspend) 541nv04_graph_fini(struct drm_device *dev, int engine, bool suspend)
542{ 542{
543 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
544 if (!nv_wait(dev, NV04_PGRAPH_STATUS, ~0, 0) && suspend) {
545 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
546 return -EBUSY;
547 }
543 nv04_graph_unload_context(dev); 548 nv04_graph_unload_context(dev);
544 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000); 549 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000);
545 return 0; 550 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index f22b323080a5..7255e4a4d3f3 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -959,6 +959,11 @@ nv10_graph_init(struct drm_device *dev, int engine)
959static int 959static int
960nv10_graph_fini(struct drm_device *dev, int engine, bool suspend) 960nv10_graph_fini(struct drm_device *dev, int engine, bool suspend)
961{ 961{
962 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
963 if (!nv_wait(dev, NV04_PGRAPH_STATUS, ~0, 0) && suspend) {
964 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
965 return -EBUSY;
966 }
962 nv10_graph_unload_context(dev); 967 nv10_graph_unload_context(dev);
963 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000); 968 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000);
964 return 0; 969 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index a54b7d9e7e26..183e37512ef9 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -656,6 +656,11 @@ nv30_graph_init(struct drm_device *dev, int engine)
656int 656int
657nv20_graph_fini(struct drm_device *dev, int engine, bool suspend) 657nv20_graph_fini(struct drm_device *dev, int engine, bool suspend)
658{ 658{
659 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
660 if (!nv_wait(dev, NV04_PGRAPH_STATUS, ~0, 0) && suspend) {
661 nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
662 return -EBUSY;
663 }
659 nv20_graph_unload_context(dev); 664 nv20_graph_unload_context(dev);
660 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000); 665 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0x00000000);
661 return 0; 666 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index cce95dd99901..d27dcf0790de 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -256,6 +256,11 @@ nv50_graph_init(struct drm_device *dev, int engine)
256static int 256static int
257nv50_graph_fini(struct drm_device *dev, int engine, bool suspend) 257nv50_graph_fini(struct drm_device *dev, int engine, bool suspend)
258{ 258{
259 nv_mask(dev, 0x400500, 0x00010001, 0x00000000);
260 if (!nv_wait(dev, 0x400700, ~0, 0) && suspend) {
261 nv_mask(dev, 0x400500, 0x00010001, 0x00010001);
262 return -EBUSY;
263 }
259 nv50_graph_unload_context(dev); 264 nv50_graph_unload_context(dev);
260 nv_wr32(dev, 0x40013c, 0x00000000); 265 nv_wr32(dev, 0x40013c, 0x00000000);
261 return 0; 266 return 0;