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authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2011-12-16 17:38:18 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2012-01-06 17:02:26 -0500
commit76ccc297018d25d55b789bbd508861ef1e2cdb0c (patch)
tree27789ff0ea4a77ce4972987a836156255808f703
parentfb7ebfe4108e2cdfa2bb88e57148087717463dfa (diff)
x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
The MSI restore function will become a function pointer in an x86_msi_ops struct. It defaults to the implementation in the io_apic.c and msi.c. We piggyback on the indirection mechanism introduced by "x86: Introduce x86_msi_ops". Cc: x86@kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: linux-pci@vger.kernel.org Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--arch/x86/include/asm/pci.h9
-rw-r--r--arch/x86/include/asm/x86_init.h1
-rw-r--r--arch/x86/kernel/x86_init.c1
-rw-r--r--drivers/pci/msi.c29
4 files changed, 38 insertions, 2 deletions
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d498943b906c..df75d07571ce 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -112,19 +112,28 @@ static inline void x86_teardown_msi_irq(unsigned int irq)
112{ 112{
113 x86_msi.teardown_msi_irq(irq); 113 x86_msi.teardown_msi_irq(irq);
114} 114}
115static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
116{
117 x86_msi.restore_msi_irqs(dev, irq);
118}
115#define arch_setup_msi_irqs x86_setup_msi_irqs 119#define arch_setup_msi_irqs x86_setup_msi_irqs
116#define arch_teardown_msi_irqs x86_teardown_msi_irqs 120#define arch_teardown_msi_irqs x86_teardown_msi_irqs
117#define arch_teardown_msi_irq x86_teardown_msi_irq 121#define arch_teardown_msi_irq x86_teardown_msi_irq
122#define arch_restore_msi_irqs x86_restore_msi_irqs
118/* implemented in arch/x86/kernel/apic/io_apic. */ 123/* implemented in arch/x86/kernel/apic/io_apic. */
119int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); 124int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
120void native_teardown_msi_irq(unsigned int irq); 125void native_teardown_msi_irq(unsigned int irq);
126void native_restore_msi_irqs(struct pci_dev *dev, int irq);
121/* default to the implementation in drivers/lib/msi.c */ 127/* default to the implementation in drivers/lib/msi.c */
122#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS 128#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
129#define HAVE_DEFAULT_MSI_RESTORE_IRQS
123void default_teardown_msi_irqs(struct pci_dev *dev); 130void default_teardown_msi_irqs(struct pci_dev *dev);
131void default_restore_msi_irqs(struct pci_dev *dev, int irq);
124#else 132#else
125#define native_setup_msi_irqs NULL 133#define native_setup_msi_irqs NULL
126#define native_teardown_msi_irq NULL 134#define native_teardown_msi_irq NULL
127#define default_teardown_msi_irqs NULL 135#define default_teardown_msi_irqs NULL
136#define default_restore_msi_irqs NULL
128#endif 137#endif
129 138
130#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) 139#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1971e652d24b..cd5208446c2d 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -177,6 +177,7 @@ struct x86_msi_ops {
177 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type); 177 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
178 void (*teardown_msi_irq)(unsigned int irq); 178 void (*teardown_msi_irq)(unsigned int irq);
179 void (*teardown_msi_irqs)(struct pci_dev *dev); 179 void (*teardown_msi_irqs)(struct pci_dev *dev);
180 void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
180}; 181};
181 182
182extern struct x86_init_ops x86_init; 183extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index c1d6cd549397..83b05adaadf1 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -114,4 +114,5 @@ struct x86_msi_ops x86_msi = {
114 .setup_msi_irqs = native_setup_msi_irqs, 114 .setup_msi_irqs = native_setup_msi_irqs,
115 .teardown_msi_irq = native_teardown_msi_irq, 115 .teardown_msi_irq = native_teardown_msi_irq,
116 .teardown_msi_irqs = default_teardown_msi_irqs, 116 .teardown_msi_irqs = default_teardown_msi_irqs,
117 .restore_msi_irqs = default_restore_msi_irqs,
117}; 118};
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 82de95ec2ea0..a825d78fd0aa 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -86,6 +86,31 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
86} 86}
87#endif 87#endif
88 88
89#ifndef arch_restore_msi_irqs
90# define arch_restore_msi_irqs default_restore_msi_irqs
91# define HAVE_DEFAULT_MSI_RESTORE_IRQS
92#endif
93
94#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
95void default_restore_msi_irqs(struct pci_dev *dev, int irq)
96{
97 struct msi_desc *entry;
98
99 entry = NULL;
100 if (dev->msix_enabled) {
101 list_for_each_entry(entry, &dev->msi_list, list) {
102 if (irq == entry->irq)
103 break;
104 }
105 } else if (dev->msi_enabled) {
106 entry = irq_get_msi_desc(irq);
107 }
108
109 if (entry)
110 write_msi_msg(irq, &entry->msg);
111}
112#endif
113
89static void msi_set_enable(struct pci_dev *dev, int pos, int enable) 114static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
90{ 115{
91 u16 control; 116 u16 control;
@@ -372,7 +397,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
372 397
373 pci_intx_for_msi(dev, 0); 398 pci_intx_for_msi(dev, 0);
374 msi_set_enable(dev, pos, 0); 399 msi_set_enable(dev, pos, 0);
375 write_msi_msg(dev->irq, &entry->msg); 400 arch_restore_msi_irqs(dev, dev->irq);
376 401
377 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 402 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
378 msi_mask_irq(entry, msi_capable_mask(control), entry->masked); 403 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
@@ -400,7 +425,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
400 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 425 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
401 426
402 list_for_each_entry(entry, &dev->msi_list, list) { 427 list_for_each_entry(entry, &dev->msi_list, list) {
403 write_msi_msg(entry->irq, &entry->msg); 428 arch_restore_msi_irqs(dev, entry->irq);
404 msix_mask_irq(entry, entry->masked); 429 msix_mask_irq(entry, entry->masked);
405 } 430 }
406 431