diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-04-04 05:25:09 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 10:53:39 -0400 |
commit | 718a35006f3fa48540d69bd649ff76ea4cdc1ef2 (patch) | |
tree | 6efc8537d5f5691335d9630c89cc492105399120 | |
parent | 89b82915c4b5afa9e51e09636f7919bbb6f9cc1b (diff) |
ARM: i.MX51: Add PATA support
This adds the PATA device and the pinctrl group for to the i.MX51 dts.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 0f6d3315f7c8..58204ee7d6d9 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -440,6 +440,42 @@ | |||
440 | }; | 440 | }; |
441 | }; | 441 | }; |
442 | 442 | ||
443 | pata { | ||
444 | pinctrl_pata_1: patagrp-1 { | ||
445 | fsl,pins = < | ||
446 | MX51_PAD_NANDF_WE_B__PATA_DIOW 0x2004 | ||
447 | MX51_PAD_NANDF_RE_B__PATA_DIOR 0x2004 | ||
448 | MX51_PAD_NANDF_ALE__PATA_BUFFER_EN 0x2004 | ||
449 | MX51_PAD_NANDF_CLE__PATA_RESET_B 0x2004 | ||
450 | MX51_PAD_NANDF_WP_B__PATA_DMACK 0x2004 | ||
451 | MX51_PAD_NANDF_RB0__PATA_DMARQ 0x2004 | ||
452 | MX51_PAD_NANDF_RB1__PATA_IORDY 0x2004 | ||
453 | MX51_PAD_GPIO_NAND__PATA_INTRQ 0x2004 | ||
454 | MX51_PAD_NANDF_CS2__PATA_CS_0 0x2004 | ||
455 | MX51_PAD_NANDF_CS3__PATA_CS_1 0x2004 | ||
456 | MX51_PAD_NANDF_CS4__PATA_DA_0 0x2004 | ||
457 | MX51_PAD_NANDF_CS5__PATA_DA_1 0x2004 | ||
458 | MX51_PAD_NANDF_CS6__PATA_DA_2 0x2004 | ||
459 | MX51_PAD_NANDF_D15__PATA_DATA15 0x2004 | ||
460 | MX51_PAD_NANDF_D14__PATA_DATA14 0x2004 | ||
461 | MX51_PAD_NANDF_D13__PATA_DATA13 0x2004 | ||
462 | MX51_PAD_NANDF_D12__PATA_DATA12 0x2004 | ||
463 | MX51_PAD_NANDF_D11__PATA_DATA11 0x2004 | ||
464 | MX51_PAD_NANDF_D10__PATA_DATA10 0x2004 | ||
465 | MX51_PAD_NANDF_D9__PATA_DATA9 0x2004 | ||
466 | MX51_PAD_NANDF_D8__PATA_DATA8 0x2004 | ||
467 | MX51_PAD_NANDF_D7__PATA_DATA7 0x2004 | ||
468 | MX51_PAD_NANDF_D6__PATA_DATA6 0x2004 | ||
469 | MX51_PAD_NANDF_D5__PATA_DATA5 0x2004 | ||
470 | MX51_PAD_NANDF_D4__PATA_DATA4 0x2004 | ||
471 | MX51_PAD_NANDF_D3__PATA_DATA3 0x2004 | ||
472 | MX51_PAD_NANDF_D2__PATA_DATA2 0x2004 | ||
473 | MX51_PAD_NANDF_D1__PATA_DATA1 0x2004 | ||
474 | MX51_PAD_NANDF_D0__PATA_DATA0 0x2004 | ||
475 | >; | ||
476 | }; | ||
477 | }; | ||
478 | |||
443 | uart1 { | 479 | uart1 { |
444 | pinctrl_uart1_1: uart1grp-1 { | 480 | pinctrl_uart1_1: uart1grp-1 { |
445 | fsl,pins = < | 481 | fsl,pins = < |
@@ -626,6 +662,14 @@ | |||
626 | status = "disabled"; | 662 | status = "disabled"; |
627 | }; | 663 | }; |
628 | 664 | ||
665 | pata: pata@83fe0000 { | ||
666 | compatible = "fsl,imx51-pata", "fsl,imx27-pata"; | ||
667 | reg = <0x83fe0000 0x4000>; | ||
668 | interrupts = <70>; | ||
669 | clocks = <&clks 161>; | ||
670 | status = "disabled"; | ||
671 | }; | ||
672 | |||
629 | ssi3: ssi@83fe8000 { | 673 | ssi3: ssi@83fe8000 { |
630 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; | 674 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; |
631 | reg = <0x83fe8000 0x4000>; | 675 | reg = <0x83fe8000 0x4000>; |