diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2010-04-16 02:23:56 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-04-16 15:47:07 -0400 |
commit | 6819d57f07440a8f9540967d9212a70e9c98eceb (patch) | |
tree | 4f2385496fddef6ff3855d4dbd44dfd1e6f34cef | |
parent | 20b3efd979c0d5d9fdf497a98668a806266a63e4 (diff) |
ath9k_hw: Relocate Opmode initialization
Programming the opmode in the HW can be done
before the assoc_id and STA_ID registers are
setup. This helps ath9k_htc when multiple register
writes are used.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 894f5fc7489e..35fe58f5675b 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -1238,6 +1238,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1238 | ath9k_hw_spur_mitigate_freq(ah, chan); | 1238 | ath9k_hw_spur_mitigate_freq(ah, chan); |
1239 | ah->eep_ops->set_board_values(ah, chan); | 1239 | ah->eep_ops->set_board_values(ah, chan); |
1240 | 1240 | ||
1241 | ath9k_hw_set_operating_mode(ah, ah->opmode); | ||
1242 | |||
1241 | REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr)); | 1243 | REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr)); |
1242 | REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(common->macaddr + 4) | 1244 | REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(common->macaddr + 4) |
1243 | | macStaId1 | 1245 | | macStaId1 |
@@ -1245,16 +1247,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1245 | | (ah->config. | 1247 | | (ah->config. |
1246 | ack_6mb ? AR_STA_ID1_ACKCTS_6MB : 0) | 1248 | ack_6mb ? AR_STA_ID1_ACKCTS_6MB : 0) |
1247 | | ah->sta_id1_defaults); | 1249 | | ah->sta_id1_defaults); |
1248 | ath9k_hw_set_operating_mode(ah, ah->opmode); | ||
1249 | |||
1250 | ath_hw_setbssidmask(common); | 1250 | ath_hw_setbssidmask(common); |
1251 | |||
1252 | REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna); | 1251 | REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna); |
1253 | |||
1254 | ath9k_hw_write_associd(ah); | 1252 | ath9k_hw_write_associd(ah); |
1255 | |||
1256 | REG_WRITE(ah, AR_ISR, ~0); | 1253 | REG_WRITE(ah, AR_ISR, ~0); |
1257 | |||
1258 | REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); | 1254 | REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); |
1259 | 1255 | ||
1260 | r = ath9k_hw_rf_set_freq(ah, chan); | 1256 | r = ath9k_hw_rf_set_freq(ah, chan); |