aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGreg Ungerer <gerg@uclinux.org>2012-07-13 00:48:23 -0400
committerGreg Ungerer <gerg@uclinux.org>2012-12-04 19:51:24 -0500
commit610ac9381e41e8bdcd5482c24028bc777404321f (patch)
tree6d32a8534d4c4f0e571e61b78e2d17bf3cfaa46b
parent423c01eac31fe9e6c9eee7bf45ace9abcd57251b (diff)
m68knommu: add clock creation support macro for other ColdFire CPUs
The clock support code for ColdFire CPUs currently supports those that have the clock control register PPMCR. Expose the struct clk for all CPU types and add a definition for all other ColdFire CPU types. With this we will be able to define simple clock trees for all ColdFire CPU types, even though they will not be able to be enabled or disabled. They will be able to report the clock rate. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68k/include/asm/mcfclk.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/mcfclk.h b/arch/m68k/include/asm/mcfclk.h
index b676a02bb392..ea4791e3a557 100644
--- a/arch/m68k/include/asm/mcfclk.h
+++ b/arch/m68k/include/asm/mcfclk.h
@@ -8,7 +8,6 @@
8 8
9struct clk; 9struct clk;
10 10
11#ifdef MCFPM_PPMCR0
12struct clk_ops { 11struct clk_ops {
13 void (*enable)(struct clk *); 12 void (*enable)(struct clk *);
14 void (*disable)(struct clk *); 13 void (*disable)(struct clk *);
@@ -23,6 +22,8 @@ struct clk {
23}; 22};
24 23
25extern struct clk *mcf_clks[]; 24extern struct clk *mcf_clks[];
25
26#ifdef MCFPM_PPMCR0
26extern struct clk_ops clk_ops0; 27extern struct clk_ops clk_ops0;
27#ifdef MCFPM_PPMCR1 28#ifdef MCFPM_PPMCR1
28extern struct clk_ops clk_ops1; 29extern struct clk_ops clk_ops1;
@@ -38,6 +39,12 @@ static struct clk __clk_##clk_bank##_##clk_slot = { \
38 39
39void __clk_init_enabled(struct clk *); 40void __clk_init_enabled(struct clk *);
40void __clk_init_disabled(struct clk *); 41void __clk_init_disabled(struct clk *);
42#else
43#define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
44 static struct clk clk_##clk_ref = { \
45 .name = clk_name, \
46 .rate = clk_rate, \
47 }
41#endif /* MCFPM_PPMCR0 */ 48#endif /* MCFPM_PPMCR0 */
42 49
43#endif /* mcfclk_h */ 50#endif /* mcfclk_h */