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authorAlex Deucher <alexdeucher@gmail.com>2009-12-23 14:39:36 -0500
committerDave Airlie <airlied@redhat.com>2010-02-08 18:32:30 -0500
commit530079a8f3f35828a80ba4981c1be902982363e7 (patch)
tree3fcbaa18c7f2bfe918f55b67e9e7ff192f8563f5
parent516d0e46c80d2d20391f4145c2c5e3915253b8bf (diff)
drm/radeon/kms: use power states for dynamic reclocking
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon.h4
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c31
2 files changed, 14 insertions, 21 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ece84fde76a6..da1177375976 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -666,10 +666,6 @@ struct radeon_pm {
666 bool vblank_callback; 666 bool vblank_callback;
667 int active_crtcs; 667 int active_crtcs;
668 int req_vblank; 668 int req_vblank;
669 uint32_t min_gpu_engine_clock;
670 uint32_t min_gpu_memory_clock;
671 uint32_t min_mode_engine_clock;
672 uint32_t min_mode_memory_clock;
673 fixed20_12 max_bandwidth; 669 fixed20_12 max_bandwidth;
674 fixed20_12 igp_sideport_mclk; 670 fixed20_12 igp_sideport_mclk;
675 fixed20_12 igp_system_mclk; 671 fixed20_12 igp_system_mclk;
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 87d2776624bb..f500c8d200e7 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -26,7 +26,6 @@
26#define RADEON_IDLE_LOOP_MS 100 26#define RADEON_IDLE_LOOP_MS 100
27#define RADEON_RECLOCK_DELAY_MS 200 27#define RADEON_RECLOCK_DELAY_MS 200
28 28
29static void radeon_pm_check_limits(struct radeon_device *rdev);
30static void radeon_pm_set_clocks_locked(struct radeon_device *rdev); 29static void radeon_pm_set_clocks_locked(struct radeon_device *rdev);
31static void radeon_pm_set_clocks(struct radeon_device *rdev); 30static void radeon_pm_set_clocks(struct radeon_device *rdev);
32static void radeon_pm_reclock_work_handler(struct work_struct *work); 31static void radeon_pm_reclock_work_handler(struct work_struct *work);
@@ -186,12 +185,21 @@ static void radeon_get_power_state(struct radeon_device *rdev,
186 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH); 185 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH);
187 break; 186 break;
188 } 187 }
188 DRM_INFO("Requested: e: %d m: %d p: %d\n",
189 rdev->pm.requested_power_state->requested_clock_mode->sclk,
190 rdev->pm.requested_power_state->requested_clock_mode->mclk,
191 rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
189} 192}
190 193
191static void radeon_set_power_state(struct radeon_device *rdev) 194static void radeon_set_power_state(struct radeon_device *rdev)
192{ 195{
193 if (rdev->pm.requested_power_state == rdev->pm.current_power_state) 196 if (rdev->pm.requested_power_state == rdev->pm.current_power_state)
194 return; 197 return;
198
199 DRM_INFO("Setting: e: %d m: %d p: %d\n",
200 rdev->pm.requested_power_state->requested_clock_mode->sclk,
201 rdev->pm.requested_power_state->requested_clock_mode->mclk,
202 rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
195 /* set pcie lanes */ 203 /* set pcie lanes */
196 /* set voltage */ 204 /* set voltage */
197 /* set engine clock */ 205 /* set engine clock */
@@ -216,8 +224,6 @@ int radeon_pm_init(struct radeon_device *rdev)
216 radeon_print_power_mode_info(rdev); 224 radeon_print_power_mode_info(rdev);
217 } 225 }
218 226
219 radeon_pm_check_limits(rdev);
220
221 if (radeon_debugfs_pm_init(rdev)) { 227 if (radeon_debugfs_pm_init(rdev)) {
222 DRM_ERROR("Failed to register debugfs file for PM!\n"); 228 DRM_ERROR("Failed to register debugfs file for PM!\n");
223 } 229 }
@@ -235,12 +241,6 @@ int radeon_pm_init(struct radeon_device *rdev)
235 return 0; 241 return 0;
236} 242}
237 243
238static void radeon_pm_check_limits(struct radeon_device *rdev)
239{
240 rdev->pm.min_gpu_engine_clock = rdev->clock.default_sclk - 5000;
241 rdev->pm.min_gpu_memory_clock = rdev->clock.default_mclk - 5000;
242}
243
244void radeon_pm_compute_clocks(struct radeon_device *rdev) 244void radeon_pm_compute_clocks(struct radeon_device *rdev)
245{ 245{
246 struct drm_device *ddev = rdev->ddev; 246 struct drm_device *ddev = rdev->ddev;
@@ -287,8 +287,6 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
287 mutex_unlock(&rdev->pm.mutex); 287 mutex_unlock(&rdev->pm.mutex);
288 } 288 }
289 } else if (count == 1) { 289 } else if (count == 1) {
290 rdev->pm.min_mode_engine_clock = rdev->pm.min_gpu_engine_clock;
291 rdev->pm.min_mode_memory_clock = rdev->pm.min_gpu_memory_clock;
292 /* TODO: Increase clocks if needed for current mode */ 290 /* TODO: Increase clocks if needed for current mode */
293 291
294 if (rdev->pm.state == PM_STATE_MINIMUM) { 292 if (rdev->pm.state == PM_STATE_MINIMUM) {
@@ -326,23 +324,22 @@ static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
326 /*radeon_fence_wait_last(rdev);*/ 324 /*radeon_fence_wait_last(rdev);*/
327 switch (rdev->pm.planned_action) { 325 switch (rdev->pm.planned_action) {
328 case PM_ACTION_UPCLOCK: 326 case PM_ACTION_UPCLOCK:
329 radeon_set_engine_clock(rdev, rdev->clock.default_sclk); 327 radeon_get_power_state(rdev, PM_ACTION_UPCLOCK);
330 rdev->pm.downclocked = false; 328 rdev->pm.downclocked = false;
331 break; 329 break;
332 case PM_ACTION_DOWNCLOCK: 330 case PM_ACTION_DOWNCLOCK:
333 radeon_set_engine_clock(rdev, 331 radeon_get_power_state(rdev, PM_ACTION_DOWNCLOCK);
334 rdev->pm.min_mode_engine_clock);
335 rdev->pm.downclocked = true; 332 rdev->pm.downclocked = true;
336 break; 333 break;
337 case PM_ACTION_MINIMUM: 334 case PM_ACTION_MINIMUM:
338 radeon_set_engine_clock(rdev, 335 radeon_get_power_state(rdev, PM_ACTION_MINIMUM);
339 rdev->pm.min_gpu_engine_clock);
340 break; 336 break;
341 case PM_ACTION_NONE: 337 case PM_ACTION_NONE:
338 radeon_get_power_state(rdev, PM_ACTION_NONE);
342 DRM_ERROR("%s: PM_ACTION_NONE\n", __func__); 339 DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
343 break; 340 break;
344 } 341 }
345 342 radeon_set_power_state(rdev);
346 rdev->pm.planned_action = PM_ACTION_NONE; 343 rdev->pm.planned_action = PM_ACTION_NONE;
347} 344}
348 345