diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2013-04-02 02:38:11 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 10:53:39 -0400 |
commit | 1aa8b3e06f5fcc294b54fe2c35b2e34b09048e94 (patch) | |
tree | 755fbb3d4aaf645254cf7a4db9b260c95128afce | |
parent | 9a8d6d55f6989961298b995e3ef91eb90e034cf2 (diff) |
ARM: dts: imx: add initial imx6dl-sabreauto support
Add initial imx6dl-sabreauto support based on the common stuff already
in imx6qdl-sabreauto.dtsi.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6dl-sabreauto.dts | 31 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 29 |
3 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 38d19b005854..5345ac16595e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -98,6 +98,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ | |||
98 | imx53-mba53.dtb \ | 98 | imx53-mba53.dtb \ |
99 | imx53-qsb.dtb \ | 99 | imx53-qsb.dtb \ |
100 | imx53-smd.dtb \ | 100 | imx53-smd.dtb \ |
101 | imx6dl-sabreauto.dtb \ | ||
101 | imx6dl-sabresd.dtb \ | 102 | imx6dl-sabresd.dtb \ |
102 | imx6q-arm2.dtb \ | 103 | imx6q-arm2.dtb \ |
103 | imx6q-sabreauto.dtb \ | 104 | imx6q-sabreauto.dtb \ |
diff --git a/arch/arm/boot/dts/imx6dl-sabreauto.dts b/arch/arm/boot/dts/imx6dl-sabreauto.dts new file mode 100644 index 000000000000..7adcec360213 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-sabreauto.dts | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /dts-v1/; | ||
10 | |||
11 | #include "imx6dl.dtsi" | ||
12 | #include "imx6qdl-sabreauto.dtsi" | ||
13 | |||
14 | / { | ||
15 | model = "Freescale i.MX6 DualLite/Solo SABRE Automotive Board"; | ||
16 | compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl"; | ||
17 | }; | ||
18 | |||
19 | &iomuxc { | ||
20 | pinctrl-names = "default"; | ||
21 | pinctrl-0 = <&pinctrl_hog>; | ||
22 | |||
23 | hog { | ||
24 | pinctrl_hog: hoggrp { | ||
25 | fsl,pins = < | ||
26 | MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 | ||
27 | MX6DL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 | ||
28 | >; | ||
29 | }; | ||
30 | }; | ||
31 | }; | ||
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 3e07f6e9095c..fab6306662cc 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi | |||
@@ -56,6 +56,26 @@ | |||
56 | MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | 56 | MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
57 | >; | 57 | >; |
58 | }; | 58 | }; |
59 | |||
60 | pinctrl_enet_2: enetgrp-2 { | ||
61 | fsl,pins = < | ||
62 | MX6DL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 | ||
63 | MX6DL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 | ||
64 | MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | ||
65 | MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | ||
66 | MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | ||
67 | MX6DL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | ||
68 | MX6DL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | ||
69 | MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | ||
70 | MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | ||
71 | MX6DL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | ||
72 | MX6DL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | ||
73 | MX6DL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | ||
74 | MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | ||
75 | MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | ||
76 | MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | ||
77 | >; | ||
78 | }; | ||
59 | }; | 79 | }; |
60 | 80 | ||
61 | uart1 { | 81 | uart1 { |
@@ -67,6 +87,15 @@ | |||
67 | }; | 87 | }; |
68 | }; | 88 | }; |
69 | 89 | ||
90 | uart4 { | ||
91 | pinctrl_uart4_1: uart4grp-1 { | ||
92 | fsl,pins = < | ||
93 | MX6DL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 | ||
94 | MX6DL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 | ||
95 | >; | ||
96 | }; | ||
97 | }; | ||
98 | |||
70 | usbotg { | 99 | usbotg { |
71 | pinctrl_usbotg_2: usbotggrp-2 { | 100 | pinctrl_usbotg_2: usbotggrp-2 { |
72 | fsl,pins = < | 101 | fsl,pins = < |