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authorTony Lindgren <tony@atomide.com>2012-06-22 04:45:13 -0400
committerTony Lindgren <tony@atomide.com>2012-06-22 04:45:13 -0400
commit19f3a98d82cabdff5a1a437811d472ef52f34954 (patch)
tree86fc625aa9cd9fb2817b88a3793d557a103444e4
parent485802a6c524e62b5924849dd727ddbb1497cc71 (diff)
parent07b3a13957aa250ff5b5409b8ed756b113544112 (diff)
Merge tag 'omap-cleanup-a-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-hwmod
Some OMAP hwmod, clock, and System Control Module cleanup patches for 3.6.
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c4
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c10
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c10
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/clockdomains2420_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains_common_data.c24
-rw-r--r--arch/arm/mach-omap2/control.c43
-rw-r--r--arch/arm/mach-omap2/control.h2
-rw-r--r--arch/arm/mach-omap2/dsp.c4
-rw-r--r--arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c427
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c23
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c4
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/dsp.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h2
22 files changed, 409 insertions, 187 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fa742f3c2629..bc7d2393161f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
116 116
117# PRCM clockdomain control 117# PRCM clockdomain control
118clockdomain-common += clockdomain.o 118clockdomain-common += clockdomain.o
119clockdomain-common += clockdomains_common_data.o
120obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) 119obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
121obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o 120obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
122obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o 121obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace9308a4db..7e39015357b1 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1774,8 +1774,6 @@ static struct omap_clk omap2420_clks[] = {
1774 CLK(NULL, "osc_ck", &osc_ck, CK_242X), 1774 CLK(NULL, "osc_ck", &osc_ck, CK_242X),
1775 CLK(NULL, "sys_ck", &sys_ck, CK_242X), 1775 CLK(NULL, "sys_ck", &sys_ck, CK_242X),
1776 CLK(NULL, "alt_ck", &alt_ck, CK_242X), 1776 CLK(NULL, "alt_ck", &alt_ck, CK_242X),
1777 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X),
1778 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X),
1779 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), 1777 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X),
1780 /* internal analog sources */ 1778 /* internal analog sources */
1781 CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), 1779 CLK(NULL, "dpll_ck", &dpll_ck, CK_242X),
@@ -1784,8 +1782,6 @@ static struct omap_clk omap2420_clks[] = {
1784 /* internal prcm root sources */ 1782 /* internal prcm root sources */
1785 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), 1783 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X),
1786 CLK(NULL, "core_ck", &core_ck, CK_242X), 1784 CLK(NULL, "core_ck", &core_ck, CK_242X),
1787 CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X),
1788 CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X),
1789 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), 1785 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X),
1790 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), 1786 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X),
1791 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), 1787 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a50399..90a08c3b12ac 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1858,11 +1858,6 @@ static struct omap_clk omap2430_clks[] = {
1858 CLK(NULL, "osc_ck", &osc_ck, CK_243X), 1858 CLK(NULL, "osc_ck", &osc_ck, CK_243X),
1859 CLK(NULL, "sys_ck", &sys_ck, CK_243X), 1859 CLK(NULL, "sys_ck", &sys_ck, CK_243X),
1860 CLK(NULL, "alt_ck", &alt_ck, CK_243X), 1860 CLK(NULL, "alt_ck", &alt_ck, CK_243X),
1861 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
1862 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
1863 CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
1864 CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
1865 CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
1866 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), 1861 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
1867 /* internal analog sources */ 1862 /* internal analog sources */
1868 CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), 1863 CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
@@ -1871,11 +1866,6 @@ static struct omap_clk omap2430_clks[] = {
1871 /* internal prcm root sources */ 1866 /* internal prcm root sources */
1872 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), 1867 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
1873 CLK(NULL, "core_ck", &core_ck, CK_243X), 1868 CLK(NULL, "core_ck", &core_ck, CK_243X),
1874 CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
1875 CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
1876 CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
1877 CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
1878 CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
1879 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), 1869 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
1880 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), 1870 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
1881 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), 1871 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0e8cc8..d6889b58dd05 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3236,11 +3236,6 @@ static struct omap_clk omap3xxx_clks[] = {
3236 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), 3236 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
3237 CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), 3237 CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
3238 CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), 3238 CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
3239 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX),
3240 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX),
3241 CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX),
3242 CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX),
3243 CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX),
3244 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), 3239 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
3245 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), 3240 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
3246 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), 3241 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
@@ -3307,8 +3302,6 @@ static struct omap_clk omap3xxx_clks[] = {
3307 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3302 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3308 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3303 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3309 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3304 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3310 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3311 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3312 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3305 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
3313 CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3306 CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3314 CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), 3307 CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX),
@@ -3413,9 +3406,6 @@ static struct omap_clk omap3xxx_clks[] = {
3413 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), 3406 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
3414 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), 3407 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
3415 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), 3408 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
3416 CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX),
3417 CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX),
3418 CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX),
3419 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), 3409 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
3420 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), 3410 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
3421 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), 3411 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f7b58609bad8..349dcbb6fecb 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -206,7 +206,5 @@ extern struct clkdm_ops omap4_clkdm_operations;
206extern struct clkdm_dep gfx_24xx_wkdeps[]; 206extern struct clkdm_dep gfx_24xx_wkdeps[];
207extern struct clkdm_dep dsp_24xx_wkdeps[]; 207extern struct clkdm_dep dsp_24xx_wkdeps[];
208extern struct clockdomain wkup_common_clkdm; 208extern struct clockdomain wkup_common_clkdm;
209extern struct clockdomain prm_common_clkdm;
210extern struct clockdomain cm_common_clkdm;
211 209
212#endif 210#endif
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 0ab8e46d5b2b..5c741852fac0 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = {
131 131
132static struct clockdomain *clockdomains_omap242x[] __initdata = { 132static struct clockdomain *clockdomains_omap242x[] __initdata = {
133 &wkup_common_clkdm, 133 &wkup_common_clkdm,
134 &cm_common_clkdm,
135 &prm_common_clkdm,
136 &mpu_2420_clkdm, 134 &mpu_2420_clkdm,
137 &iva1_2420_clkdm, 135 &iva1_2420_clkdm,
138 &dsp_2420_clkdm, 136 &dsp_2420_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index 3645ed044890..f09617555e15 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = {
157 157
158static struct clockdomain *clockdomains_omap243x[] __initdata = { 158static struct clockdomain *clockdomains_omap243x[] __initdata = {
159 &wkup_common_clkdm, 159 &wkup_common_clkdm,
160 &cm_common_clkdm,
161 &prm_common_clkdm,
162 &mpu_2430_clkdm, 160 &mpu_2430_clkdm,
163 &mdm_clkdm, 161 &mdm_clkdm,
164 &dsp_2430_clkdm, 162 &dsp_2430_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb97710..2cdc17c9d2fa 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -347,8 +347,6 @@ static struct clkdm_autodep clkdm_autodeps[] = {
347 347
348static struct clockdomain *clockdomains_omap3430_common[] __initdata = { 348static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
349 &wkup_common_clkdm, 349 &wkup_common_clkdm,
350 &cm_common_clkdm,
351 &prm_common_clkdm,
352 &mpu_3xxx_clkdm, 350 &mpu_3xxx_clkdm,
353 &neon_clkdm, 351 &neon_clkdm,
354 &iva2_clkdm, 352 &iva2_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c53425847493..bd7ed13515cc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
430 &l4_wkup_44xx_clkdm, 430 &l4_wkup_44xx_clkdm,
431 &emu_sys_44xx_clkdm, 431 &emu_sys_44xx_clkdm,
432 &l3_dma_44xx_clkdm, 432 &l3_dma_44xx_clkdm,
433 &prm_common_clkdm,
434 &cm_common_clkdm,
435 NULL 433 NULL
436}; 434};
437 435
diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c
deleted file mode 100644
index 615b1f04967d..000000000000
--- a/arch/arm/mach-omap2/clockdomains_common_data.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * OMAP2+-common clockdomain data
3 *
4 * Copyright (C) 2008-2012 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni Högander
8 */
9
10#include <linux/kernel.h>
11#include <linux/io.h>
12
13#include "clockdomain.h"
14
15/* These are implicit clockdomains - they are never defined as such in TRM */
16struct clockdomain prm_common_clkdm = {
17 .name = "prm_clkdm",
18 .pwrdm = { .name = "wkup_pwrdm" },
19};
20
21struct clockdomain cm_common_clkdm = {
22 .name = "cm_clkdm",
23 .pwrdm = { .name = "core_pwrdm" },
24};
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674bb0417..3223b81e7532 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -241,6 +241,49 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
241 241
242#endif 242#endif
243 243
244/**
245 * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor
246 * @bootaddr: physical address of the boot loader
247 *
248 * Set boot address for the boot loader of a supported processor
249 * when a power ON sequence occurs.
250 */
251void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
252{
253 u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
254 cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
255 cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
256 0;
257
258 if (!offset) {
259 pr_err("%s: unsupported omap type\n", __func__);
260 return;
261 }
262
263 omap_ctrl_writel(bootaddr, offset);
264}
265
266/**
267 * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor
268 * @bootmode: 8-bit value to pass to some boot code
269 *
270 * Sets boot mode for the boot loader of a supported processor
271 * when a power ON sequence occurs.
272 */
273void omap_ctrl_write_dsp_boot_mode(u8 bootmode)
274{
275 u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD :
276 cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD :
277 0;
278
279 if (!offset) {
280 pr_err("%s: unsupported omap type\n", __func__);
281 return;
282 }
283
284 omap_ctrl_writel(bootmode, offset);
285}
286
244#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) 287#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
245/* 288/*
246 * Clears the scratchpad contents in case of cold boot- 289 * Clears the scratchpad contents in case of cold boot-
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd045ce1..fcc98f822d9d 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -397,6 +397,8 @@ extern u32 omap3_arm_context[128];
397extern void omap3_control_save_context(void); 397extern void omap3_control_save_context(void);
398extern void omap3_control_restore_context(void); 398extern void omap3_control_restore_context(void);
399extern void omap3_ctrl_write_boot_mode(u8 bootmode); 399extern void omap3_ctrl_write_boot_mode(u8 bootmode);
400extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
401extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
400extern void omap3630_ctrl_disable_rta(void); 402extern void omap3630_ctrl_disable_rta(void);
401extern int omap3_ctrl_save_padconf(void); 403extern int omap3_ctrl_save_padconf(void);
402#else 404#else
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 845309f146fe..8b251a995abf 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -20,6 +20,7 @@
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include "control.h"
23#include "cm2xxx_3xxx.h" 24#include "cm2xxx_3xxx.h"
24#include "prm2xxx_3xxx.h" 25#include "prm2xxx_3xxx.h"
25#ifdef CONFIG_BRIDGE_DVFS 26#ifdef CONFIG_BRIDGE_DVFS
@@ -43,6 +44,9 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
43 .dsp_cm_read = omap2_cm_read_mod_reg, 44 .dsp_cm_read = omap2_cm_read_mod_reg,
44 .dsp_cm_write = omap2_cm_write_mod_reg, 45 .dsp_cm_write = omap2_cm_write_mod_reg,
45 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, 46 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
47
48 .set_bootaddr = omap_ctrl_write_dsp_boot_addr,
49 .set_bootmode = omap_ctrl_write_dsp_boot_mode,
46}; 50};
47 51
48static phys_addr_t omap_dsp_phys_mempool_base; 52static phys_addr_t omap_dsp_phys_mempool_base;
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
index 2f7ac70a20d8..01970824e0e5 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
@@ -42,6 +42,7 @@
42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
45#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304
45#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 47#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
47#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 48#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bf86f7e8f91f..c55df5eed7c8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -166,6 +166,31 @@
166 */ 166 */
167#define LINKS_PER_OCP_IF 2 167#define LINKS_PER_OCP_IF 2
168 168
169/**
170 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
171 * @enable_module: function to enable a module (via MODULEMODE)
172 * @disable_module: function to disable a module (via MODULEMODE)
173 *
174 * XXX Eventually this functionality will be hidden inside the PRM/CM
175 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
176 * conditionals in this code.
177 */
178struct omap_hwmod_soc_ops {
179 void (*enable_module)(struct omap_hwmod *oh);
180 int (*disable_module)(struct omap_hwmod *oh);
181 int (*wait_target_ready)(struct omap_hwmod *oh);
182 int (*assert_hardreset)(struct omap_hwmod *oh,
183 struct omap_hwmod_rst_info *ohri);
184 int (*deassert_hardreset)(struct omap_hwmod *oh,
185 struct omap_hwmod_rst_info *ohri);
186 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
187 struct omap_hwmod_rst_info *ohri);
188 int (*init_clkdm)(struct omap_hwmod *oh);
189};
190
191/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
192static struct omap_hwmod_soc_ops soc_ops;
193
169/* omap_hwmod_list contains all registered struct omap_hwmods */ 194/* omap_hwmod_list contains all registered struct omap_hwmods */
170static LIST_HEAD(omap_hwmod_list); 195static LIST_HEAD(omap_hwmod_list);
171 196
@@ -186,6 +211,9 @@ static struct omap_hwmod_link *linkspace;
186 */ 211 */
187static unsigned short free_ls, max_ls, ls_supp; 212static unsigned short free_ls, max_ls, ls_supp;
188 213
214/* inited: set to true once the hwmod code is initialized */
215static bool inited;
216
189/* Private functions */ 217/* Private functions */
190 218
191/** 219/**
@@ -771,23 +799,19 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
771} 799}
772 800
773/** 801/**
774 * _enable_module - enable CLKCTRL modulemode on OMAP4 802 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
775 * @oh: struct omap_hwmod * 803 * @oh: struct omap_hwmod *
776 * 804 *
777 * Enables the PRCM module mode related to the hwmod @oh. 805 * Enables the PRCM module mode related to the hwmod @oh.
778 * No return value. 806 * No return value.
779 */ 807 */
780static void _enable_module(struct omap_hwmod *oh) 808static void _omap4_enable_module(struct omap_hwmod *oh)
781{ 809{
782 /* The module mode does not exist prior OMAP4 */
783 if (cpu_is_omap24xx() || cpu_is_omap34xx())
784 return;
785
786 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 810 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
787 return; 811 return;
788 812
789 pr_debug("omap_hwmod: %s: _enable_module: %d\n", 813 pr_debug("omap_hwmod: %s: %s: %d\n",
790 oh->name, oh->prcm.omap4.modulemode); 814 oh->name, __func__, oh->prcm.omap4.modulemode);
791 815
792 omap4_cminst_module_enable(oh->prcm.omap4.modulemode, 816 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
793 oh->clkdm->prcm_partition, 817 oh->clkdm->prcm_partition,
@@ -807,10 +831,7 @@ static void _enable_module(struct omap_hwmod *oh)
807 */ 831 */
808static int _omap4_wait_target_disable(struct omap_hwmod *oh) 832static int _omap4_wait_target_disable(struct omap_hwmod *oh)
809{ 833{
810 if (!cpu_is_omap44xx()) 834 if (!oh || !oh->clkdm)
811 return 0;
812
813 if (!oh)
814 return -EINVAL; 835 return -EINVAL;
815 836
816 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 837 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
@@ -1285,24 +1306,20 @@ static struct omap_hwmod *_lookup(const char *name)
1285 1306
1286 return oh; 1307 return oh;
1287} 1308}
1309
1288/** 1310/**
1289 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1311 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1290 * @oh: struct omap_hwmod * 1312 * @oh: struct omap_hwmod *
1291 * 1313 *
1292 * Convert a clockdomain name stored in a struct omap_hwmod into a 1314 * Convert a clockdomain name stored in a struct omap_hwmod into a
1293 * clockdomain pointer, and save it into the struct omap_hwmod. 1315 * clockdomain pointer, and save it into the struct omap_hwmod.
1294 * return -EINVAL if clkdm_name does not exist or if the lookup failed. 1316 * Return -EINVAL if the clkdm_name lookup failed.
1295 */ 1317 */
1296static int _init_clkdm(struct omap_hwmod *oh) 1318static int _init_clkdm(struct omap_hwmod *oh)
1297{ 1319{
1298 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1320 if (!oh->clkdm_name)
1299 return 0; 1321 return 0;
1300 1322
1301 if (!oh->clkdm_name) {
1302 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1323 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1307 if (!oh->clkdm) { 1324 if (!oh->clkdm) {
1308 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", 1325 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
@@ -1338,7 +1355,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
1338 ret |= _init_main_clk(oh); 1355 ret |= _init_main_clk(oh);
1339 ret |= _init_interface_clks(oh); 1356 ret |= _init_interface_clks(oh);
1340 ret |= _init_opt_clks(oh); 1357 ret |= _init_opt_clks(oh);
1341 ret |= _init_clkdm(oh); 1358 if (soc_ops.init_clkdm)
1359 ret |= soc_ops.init_clkdm(oh);
1342 1360
1343 if (!ret) 1361 if (!ret)
1344 oh->_state = _HWMOD_STATE_CLKS_INITED; 1362 oh->_state = _HWMOD_STATE_CLKS_INITED;
@@ -1349,53 +1367,6 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
1349} 1367}
1350 1368
1351/** 1369/**
1352 * _wait_target_ready - wait for a module to leave slave idle
1353 * @oh: struct omap_hwmod *
1354 *
1355 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1356 * does not have an IDLEST bit or if the module successfully leaves
1357 * slave idle; otherwise, pass along the return value of the
1358 * appropriate *_cm*_wait_module_ready() function.
1359 */
1360static int _wait_target_ready(struct omap_hwmod *oh)
1361{
1362 struct omap_hwmod_ocp_if *os;
1363 int ret;
1364
1365 if (!oh)
1366 return -EINVAL;
1367
1368 if (oh->flags & HWMOD_NO_IDLEST)
1369 return 0;
1370
1371 os = _find_mpu_rt_port(oh);
1372 if (!os)
1373 return 0;
1374
1375 /* XXX check module SIDLEMODE */
1376
1377 /* XXX check clock enable states */
1378
1379 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1380 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1381 oh->prcm.omap2.idlest_reg_id,
1382 oh->prcm.omap2.idlest_idle_bit);
1383 } else if (cpu_is_omap44xx()) {
1384 if (!oh->clkdm)
1385 return -EINVAL;
1386
1387 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1388 oh->clkdm->cm_inst,
1389 oh->clkdm->clkdm_offs,
1390 oh->prcm.omap4.clkctrl_offs);
1391 } else {
1392 BUG();
1393 };
1394
1395 return ret;
1396}
1397
1398/**
1399 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1370 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1400 * @oh: struct omap_hwmod * 1371 * @oh: struct omap_hwmod *
1401 * @name: name of the reset line in the context of this hwmod 1372 * @name: name of the reset line in the context of this hwmod
@@ -1431,32 +1402,31 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1431 * @oh: struct omap_hwmod * 1402 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line to lookup and assert 1403 * @name: name of the reset line to lookup and assert
1433 * 1404 *
1434 * Some IP like dsp, ipu or iva contain processor that require 1405 * Some IP like dsp, ipu or iva contain processor that require an HW
1435 * an HW reset line to be assert / deassert in order to enable fully 1406 * reset line to be assert / deassert in order to enable fully the IP.
1436 * the IP. 1407 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1408 * asserting the hardreset line on the currently-booted SoC, or passes
1409 * along the return value from _lookup_hardreset() or the SoC's
1410 * assert_hardreset code.
1437 */ 1411 */
1438static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1412static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1439{ 1413{
1440 struct omap_hwmod_rst_info ohri; 1414 struct omap_hwmod_rst_info ohri;
1441 u8 ret; 1415 u8 ret = -EINVAL;
1442 1416
1443 if (!oh) 1417 if (!oh)
1444 return -EINVAL; 1418 return -EINVAL;
1445 1419
1420 if (!soc_ops.assert_hardreset)
1421 return -ENOSYS;
1422
1446 ret = _lookup_hardreset(oh, name, &ohri); 1423 ret = _lookup_hardreset(oh, name, &ohri);
1447 if (IS_ERR_VALUE(ret)) 1424 if (IS_ERR_VALUE(ret))
1448 return ret; 1425 return ret;
1449 1426
1450 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1427 ret = soc_ops.assert_hardreset(oh, &ohri);
1451 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, 1428
1452 ohri.rst_shift); 1429 return ret;
1453 else if (cpu_is_omap44xx())
1454 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1455 oh->clkdm->pwrdm.ptr->prcm_partition,
1456 oh->clkdm->pwrdm.ptr->prcm_offs,
1457 oh->prcm.omap4.rstctrl_offs);
1458 else
1459 return -EINVAL;
1460} 1430}
1461 1431
1462/** 1432/**
@@ -1465,38 +1435,29 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1465 * @oh: struct omap_hwmod * 1435 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to look up and deassert 1436 * @name: name of the reset line to look up and deassert
1467 * 1437 *
1468 * Some IP like dsp, ipu or iva contain processor that require 1438 * Some IP like dsp, ipu or iva contain processor that require an HW
1469 * an HW reset line to be assert / deassert in order to enable fully 1439 * reset line to be assert / deassert in order to enable fully the IP.
1470 * the IP. 1440 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1441 * deasserting the hardreset line on the currently-booted SoC, or passes
1442 * along the return value from _lookup_hardreset() or the SoC's
1443 * deassert_hardreset code.
1471 */ 1444 */
1472static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1445static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1473{ 1446{
1474 struct omap_hwmod_rst_info ohri; 1447 struct omap_hwmod_rst_info ohri;
1475 int ret; 1448 int ret = -EINVAL;
1476 1449
1477 if (!oh) 1450 if (!oh)
1478 return -EINVAL; 1451 return -EINVAL;
1479 1452
1453 if (!soc_ops.deassert_hardreset)
1454 return -ENOSYS;
1455
1480 ret = _lookup_hardreset(oh, name, &ohri); 1456 ret = _lookup_hardreset(oh, name, &ohri);
1481 if (IS_ERR_VALUE(ret)) 1457 if (IS_ERR_VALUE(ret))
1482 return ret; 1458 return ret;
1483 1459
1484 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1460 ret = soc_ops.deassert_hardreset(oh, &ohri);
1485 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1486 ohri.rst_shift,
1487 ohri.st_shift);
1488 } else if (cpu_is_omap44xx()) {
1489 if (ohri.st_shift)
1490 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1491 oh->name, name);
1492 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1493 oh->clkdm->pwrdm.ptr->prcm_partition,
1494 oh->clkdm->pwrdm.ptr->prcm_offs,
1495 oh->prcm.omap4.rstctrl_offs);
1496 } else {
1497 return -EINVAL;
1498 }
1499
1500 if (ret == -EBUSY) 1461 if (ret == -EBUSY)
1501 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); 1462 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1502 1463
@@ -1509,31 +1470,28 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1509 * @oh: struct omap_hwmod * 1470 * @oh: struct omap_hwmod *
1510 * @name: name of the reset line to look up and read 1471 * @name: name of the reset line to look up and read
1511 * 1472 *
1512 * Return the state of the reset line. 1473 * Return the state of the reset line. Returns -EINVAL if @oh is
1474 * null, -ENOSYS if we have no way of reading the hardreset line
1475 * status on the currently-booted SoC, or passes along the return
1476 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1477 * code.
1513 */ 1478 */
1514static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1479static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1515{ 1480{
1516 struct omap_hwmod_rst_info ohri; 1481 struct omap_hwmod_rst_info ohri;
1517 u8 ret; 1482 u8 ret = -EINVAL;
1518 1483
1519 if (!oh) 1484 if (!oh)
1520 return -EINVAL; 1485 return -EINVAL;
1521 1486
1487 if (!soc_ops.is_hardreset_asserted)
1488 return -ENOSYS;
1489
1522 ret = _lookup_hardreset(oh, name, &ohri); 1490 ret = _lookup_hardreset(oh, name, &ohri);
1523 if (IS_ERR_VALUE(ret)) 1491 if (IS_ERR_VALUE(ret))
1524 return ret; 1492 return ret;
1525 1493
1526 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1494 return soc_ops.is_hardreset_asserted(oh, &ohri);
1527 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1528 ohri.st_shift);
1529 } else if (cpu_is_omap44xx()) {
1530 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1531 oh->clkdm->pwrdm.ptr->prcm_partition,
1532 oh->clkdm->pwrdm.ptr->prcm_offs,
1533 oh->prcm.omap4.rstctrl_offs);
1534 } else {
1535 return -EINVAL;
1536 }
1537} 1495}
1538 1496
1539/** 1497/**
@@ -1571,10 +1529,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
1571{ 1529{
1572 int v; 1530 int v;
1573 1531
1574 /* The module mode does not exist prior OMAP4 */
1575 if (!cpu_is_omap44xx())
1576 return -EINVAL;
1577
1578 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1532 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1579 return -EINVAL; 1533 return -EINVAL;
1580 1534
@@ -1814,9 +1768,11 @@ static int _enable(struct omap_hwmod *oh)
1814 } 1768 }
1815 1769
1816 _enable_clocks(oh); 1770 _enable_clocks(oh);
1817 _enable_module(oh); 1771 if (soc_ops.enable_module)
1772 soc_ops.enable_module(oh);
1818 1773
1819 r = _wait_target_ready(oh); 1774 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1775 -EINVAL;
1820 if (!r) { 1776 if (!r) {
1821 /* 1777 /*
1822 * Set the clockdomain to HW_AUTO only if the target is ready, 1778 * Set the clockdomain to HW_AUTO only if the target is ready,
@@ -1870,7 +1826,8 @@ static int _idle(struct omap_hwmod *oh)
1870 _idle_sysc(oh); 1826 _idle_sysc(oh);
1871 _del_initiator_dep(oh, mpu_oh); 1827 _del_initiator_dep(oh, mpu_oh);
1872 1828
1873 _omap4_disable_module(oh); 1829 if (soc_ops.disable_module)
1830 soc_ops.disable_module(oh);
1874 1831
1875 /* 1832 /*
1876 * The module must be in idle mode before disabling any parents 1833 * The module must be in idle mode before disabling any parents
@@ -1975,7 +1932,8 @@ static int _shutdown(struct omap_hwmod *oh)
1975 if (oh->_state == _HWMOD_STATE_ENABLED) { 1932 if (oh->_state == _HWMOD_STATE_ENABLED) {
1976 _del_initiator_dep(oh, mpu_oh); 1933 _del_initiator_dep(oh, mpu_oh);
1977 /* XXX what about the other system initiators here? dma, dsp */ 1934 /* XXX what about the other system initiators here? dma, dsp */
1978 _omap4_disable_module(oh); 1935 if (soc_ops.disable_module)
1936 soc_ops.disable_module(oh);
1979 _disable_clocks(oh); 1937 _disable_clocks(oh);
1980 if (oh->clkdm) 1938 if (oh->clkdm)
1981 clkdm_hwmod_disable(oh->clkdm, oh); 1939 clkdm_hwmod_disable(oh->clkdm, oh);
@@ -2431,6 +2389,194 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2431 return 0; 2389 return 0;
2432} 2390}
2433 2391
2392/* Static functions intended only for use in soc_ops field function pointers */
2393
2394/**
2395 * _omap2_wait_target_ready - wait for a module to leave slave idle
2396 * @oh: struct omap_hwmod *
2397 *
2398 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2399 * does not have an IDLEST bit or if the module successfully leaves
2400 * slave idle; otherwise, pass along the return value of the
2401 * appropriate *_cm*_wait_module_ready() function.
2402 */
2403static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2404{
2405 if (!oh)
2406 return -EINVAL;
2407
2408 if (oh->flags & HWMOD_NO_IDLEST)
2409 return 0;
2410
2411 if (!_find_mpu_rt_port(oh))
2412 return 0;
2413
2414 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2415
2416 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2417 oh->prcm.omap2.idlest_reg_id,
2418 oh->prcm.omap2.idlest_idle_bit);
2419}
2420
2421/**
2422 * _omap4_wait_target_ready - wait for a module to leave slave idle
2423 * @oh: struct omap_hwmod *
2424 *
2425 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2426 * does not have an IDLEST bit or if the module successfully leaves
2427 * slave idle; otherwise, pass along the return value of the
2428 * appropriate *_cm*_wait_module_ready() function.
2429 */
2430static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2431{
2432 if (!oh || !oh->clkdm)
2433 return -EINVAL;
2434
2435 if (oh->flags & HWMOD_NO_IDLEST)
2436 return 0;
2437
2438 if (!_find_mpu_rt_port(oh))
2439 return 0;
2440
2441 /* XXX check module SIDLEMODE, hardreset status */
2442
2443 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2444 oh->clkdm->cm_inst,
2445 oh->clkdm->clkdm_offs,
2446 oh->prcm.omap4.clkctrl_offs);
2447}
2448
2449/**
2450 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2451 * @oh: struct omap_hwmod * to assert hardreset
2452 * @ohri: hardreset line data
2453 *
2454 * Call omap2_prm_assert_hardreset() with parameters extracted from
2455 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2456 * use as an soc_ops function pointer. Passes along the return value
2457 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2458 * for removal when the PRM code is moved into drivers/.
2459 */
2460static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2461 struct omap_hwmod_rst_info *ohri)
2462{
2463 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2464 ohri->rst_shift);
2465}
2466
2467/**
2468 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2469 * @oh: struct omap_hwmod * to deassert hardreset
2470 * @ohri: hardreset line data
2471 *
2472 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2473 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2474 * use as an soc_ops function pointer. Passes along the return value
2475 * from omap2_prm_deassert_hardreset(). XXX This function is
2476 * scheduled for removal when the PRM code is moved into drivers/.
2477 */
2478static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2479 struct omap_hwmod_rst_info *ohri)
2480{
2481 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2482 ohri->rst_shift,
2483 ohri->st_shift);
2484}
2485
2486/**
2487 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2488 * @oh: struct omap_hwmod * to test hardreset
2489 * @ohri: hardreset line data
2490 *
2491 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2492 * from the hwmod @oh and the hardreset line data @ohri. Only
2493 * intended for use as an soc_ops function pointer. Passes along the
2494 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2495 * function is scheduled for removal when the PRM code is moved into
2496 * drivers/.
2497 */
2498static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2499 struct omap_hwmod_rst_info *ohri)
2500{
2501 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2502 ohri->st_shift);
2503}
2504
2505/**
2506 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2507 * @oh: struct omap_hwmod * to assert hardreset
2508 * @ohri: hardreset line data
2509 *
2510 * Call omap4_prminst_assert_hardreset() with parameters extracted
2511 * from the hwmod @oh and the hardreset line data @ohri. Only
2512 * intended for use as an soc_ops function pointer. Passes along the
2513 * return value from omap4_prminst_assert_hardreset(). XXX This
2514 * function is scheduled for removal when the PRM code is moved into
2515 * drivers/.
2516 */
2517static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2518 struct omap_hwmod_rst_info *ohri)
2519{
2520 if (!oh->clkdm)
2521 return -EINVAL;
2522
2523 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2524 oh->clkdm->pwrdm.ptr->prcm_partition,
2525 oh->clkdm->pwrdm.ptr->prcm_offs,
2526 oh->prcm.omap4.rstctrl_offs);
2527}
2528
2529/**
2530 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2531 * @oh: struct omap_hwmod * to deassert hardreset
2532 * @ohri: hardreset line data
2533 *
2534 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2535 * from the hwmod @oh and the hardreset line data @ohri. Only
2536 * intended for use as an soc_ops function pointer. Passes along the
2537 * return value from omap4_prminst_deassert_hardreset(). XXX This
2538 * function is scheduled for removal when the PRM code is moved into
2539 * drivers/.
2540 */
2541static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2542 struct omap_hwmod_rst_info *ohri)
2543{
2544 if (!oh->clkdm)
2545 return -EINVAL;
2546
2547 if (ohri->st_shift)
2548 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2549 oh->name, ohri->name);
2550 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2551 oh->clkdm->pwrdm.ptr->prcm_partition,
2552 oh->clkdm->pwrdm.ptr->prcm_offs,
2553 oh->prcm.omap4.rstctrl_offs);
2554}
2555
2556/**
2557 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2558 * @oh: struct omap_hwmod * to test hardreset
2559 * @ohri: hardreset line data
2560 *
2561 * Call omap4_prminst_is_hardreset_asserted() with parameters
2562 * extracted from the hwmod @oh and the hardreset line data @ohri.
2563 * Only intended for use as an soc_ops function pointer. Passes along
2564 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2565 * This function is scheduled for removal when the PRM code is moved
2566 * into drivers/.
2567 */
2568static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2569 struct omap_hwmod_rst_info *ohri)
2570{
2571 if (!oh->clkdm)
2572 return -EINVAL;
2573
2574 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2575 oh->clkdm->pwrdm.ptr->prcm_partition,
2576 oh->clkdm->pwrdm.ptr->prcm_offs,
2577 oh->prcm.omap4.rstctrl_offs);
2578}
2579
2434/* Public functions */ 2580/* Public functions */
2435 2581
2436u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 2582u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
@@ -2563,12 +2709,18 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2563 * 2709 *
2564 * Intended to be called early in boot before the clock framework is 2710 * Intended to be called early in boot before the clock framework is
2565 * initialized. If @ois is not null, will register all omap_hwmods 2711 * initialized. If @ois is not null, will register all omap_hwmods
2566 * listed in @ois that are valid for this chip. Returns 0. 2712 * listed in @ois that are valid for this chip. Returns -EINVAL if
2713 * omap_hwmod_init() hasn't been called before calling this function,
2714 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2715 * success.
2567 */ 2716 */
2568int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) 2717int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2569{ 2718{
2570 int r, i; 2719 int r, i;
2571 2720
2721 if (!inited)
2722 return -EINVAL;
2723
2572 if (!ois) 2724 if (!ois)
2573 return 0; 2725 return 0;
2574 2726
@@ -3401,3 +3553,32 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3401 3553
3402 return 0; 3554 return 0;
3403} 3555}
3556
3557/**
3558 * omap_hwmod_init - initialize the hwmod code
3559 *
3560 * Sets up some function pointers needed by the hwmod code to operate on the
3561 * currently-booted SoC. Intended to be called once during kernel init
3562 * before any hwmods are registered. No return value.
3563 */
3564void __init omap_hwmod_init(void)
3565{
3566 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3567 soc_ops.wait_target_ready = _omap2_wait_target_ready;
3568 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3569 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3570 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3571 } else if (cpu_is_omap44xx()) {
3572 soc_ops.enable_module = _omap4_enable_module;
3573 soc_ops.disable_module = _omap4_disable_module;
3574 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3575 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3576 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3577 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3578 soc_ops.init_clkdm = _init_clkdm;
3579 } else {
3580 WARN(1, "omap_hwmod: unknown SoC type\n");
3581 }
3582
3583 inited = true;
3584}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a7640d1b215e..50cfab61b0e2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -192,6 +192,11 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
192 .name = "mcbsp", 192 .name = "mcbsp",
193}; 193};
194 194
195static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
196 { .role = "pad_fck", .clk = "mcbsp_clks" },
197 { .role = "prcm_fck", .clk = "func_96m_ck" },
198};
199
195/* mcbsp1 */ 200/* mcbsp1 */
196static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { 201static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
197 { .name = "tx", .irq = 59 }, 202 { .name = "tx", .irq = 59 },
@@ -214,6 +219,8 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
214 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 219 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
215 }, 220 },
216 }, 221 },
222 .opt_clks = mcbsp_opt_clks,
223 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
217}; 224};
218 225
219/* mcbsp2 */ 226/* mcbsp2 */
@@ -238,6 +245,8 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
238 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 245 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
239 }, 246 },
240 }, 247 },
248 .opt_clks = mcbsp_opt_clks,
249 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
241}; 250};
242 251
243static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { 252static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {
@@ -585,5 +594,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
585 594
586int __init omap2420_hwmod_init(void) 595int __init omap2420_hwmod_init(void)
587{ 596{
597 omap_hwmod_init();
588 return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); 598 return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
589} 599}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 4d7264981230..58b5bc196d32 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -296,6 +296,11 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
296 .rev = MCBSP_CONFIG_TYPE2, 296 .rev = MCBSP_CONFIG_TYPE2,
297}; 297};
298 298
299static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
300 { .role = "pad_fck", .clk = "mcbsp_clks" },
301 { .role = "prcm_fck", .clk = "func_96m_ck" },
302};
303
299/* mcbsp1 */ 304/* mcbsp1 */
300static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { 305static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
301 { .name = "tx", .irq = 59 }, 306 { .name = "tx", .irq = 59 },
@@ -320,6 +325,8 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
320 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 325 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
321 }, 326 },
322 }, 327 },
328 .opt_clks = mcbsp_opt_clks,
329 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
323}; 330};
324 331
325/* mcbsp2 */ 332/* mcbsp2 */
@@ -345,6 +352,8 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
345 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 352 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
346 }, 353 },
347 }, 354 },
355 .opt_clks = mcbsp_opt_clks,
356 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
348}; 357};
349 358
350/* mcbsp3 */ 359/* mcbsp3 */
@@ -370,6 +379,8 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
370 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 379 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
371 }, 380 },
372 }, 381 },
382 .opt_clks = mcbsp_opt_clks,
383 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
373}; 384};
374 385
375/* mcbsp4 */ 386/* mcbsp4 */
@@ -401,6 +412,8 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
401 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 412 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
402 }, 413 },
403 }, 414 },
415 .opt_clks = mcbsp_opt_clks,
416 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
404}; 417};
405 418
406/* mcbsp5 */ 419/* mcbsp5 */
@@ -432,6 +445,8 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
432 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 445 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
433 }, 446 },
434 }, 447 },
448 .opt_clks = mcbsp_opt_clks,
449 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
435}; 450};
436 451
437/* MMC/SD/SDIO common */ 452/* MMC/SD/SDIO common */
@@ -938,5 +953,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
938 953
939int __init omap2430_hwmod_init(void) 954int __init omap2430_hwmod_init(void)
940{ 955{
956 omap_hwmod_init();
941 return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 957 return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);
942} 958}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index b26d3c9bca16..8379b8d7244a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1074,6 +1074,17 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
1074 .rev = MCBSP_CONFIG_TYPE3, 1074 .rev = MCBSP_CONFIG_TYPE3,
1075}; 1075};
1076 1076
1077/* McBSP functional clock mapping */
1078static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = {
1079 { .role = "pad_fck", .clk = "mcbsp_clks" },
1080 { .role = "prcm_fck", .clk = "core_96m_fck" },
1081};
1082
1083static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
1084 { .role = "pad_fck", .clk = "mcbsp_clks" },
1085 { .role = "prcm_fck", .clk = "per_96m_fck" },
1086};
1087
1077/* mcbsp1 */ 1088/* mcbsp1 */
1078static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { 1089static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
1079 { .name = "common", .irq = 16 }, 1090 { .name = "common", .irq = 16 },
@@ -1097,6 +1108,8 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
1097 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, 1108 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
1098 }, 1109 },
1099 }, 1110 },
1111 .opt_clks = mcbsp15_opt_clks,
1112 .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
1100}; 1113};
1101 1114
1102/* mcbsp2 */ 1115/* mcbsp2 */
@@ -1126,6 +1139,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
1126 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, 1139 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
1127 }, 1140 },
1128 }, 1141 },
1142 .opt_clks = mcbsp234_opt_clks,
1143 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1129 .dev_attr = &omap34xx_mcbsp2_dev_attr, 1144 .dev_attr = &omap34xx_mcbsp2_dev_attr,
1130}; 1145};
1131 1146
@@ -1156,6 +1171,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
1156 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, 1171 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
1157 }, 1172 },
1158 }, 1173 },
1174 .opt_clks = mcbsp234_opt_clks,
1175 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1159 .dev_attr = &omap34xx_mcbsp3_dev_attr, 1176 .dev_attr = &omap34xx_mcbsp3_dev_attr,
1160}; 1177};
1161 1178
@@ -1188,6 +1205,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
1188 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, 1205 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
1189 }, 1206 },
1190 }, 1207 },
1208 .opt_clks = mcbsp234_opt_clks,
1209 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1191}; 1210};
1192 1211
1193/* mcbsp5 */ 1212/* mcbsp5 */
@@ -1219,6 +1238,8 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
1219 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, 1238 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
1220 }, 1239 },
1221 }, 1240 },
1241 .opt_clks = mcbsp15_opt_clks,
1242 .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
1222}; 1243};
1223 1244
1224/* 'mcbsp sidetone' class */ 1245/* 'mcbsp sidetone' class */
@@ -3283,6 +3304,8 @@ int __init omap3xxx_hwmod_init(void)
3283 struct omap_hwmod_ocp_if **h = NULL; 3304 struct omap_hwmod_ocp_if **h = NULL;
3284 unsigned int rev; 3305 unsigned int rev;
3285 3306
3307 omap_hwmod_init();
3308
3286 /* Register hwmod links common to all OMAP3 */ 3309 /* Register hwmod links common to all OMAP3 */
3287 r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); 3310 r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);
3288 if (r < 0) 3311 if (r < 0)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a3fa31..fa2953aff248 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2540,14 +2540,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
2540static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { 2540static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
2541 .name = "cm_core_aon", 2541 .name = "cm_core_aon",
2542 .class = &omap44xx_prcm_hwmod_class, 2542 .class = &omap44xx_prcm_hwmod_class,
2543 .clkdm_name = "cm_clkdm",
2544}; 2543};
2545 2544
2546/* cm_core */ 2545/* cm_core */
2547static struct omap_hwmod omap44xx_cm_core_hwmod = { 2546static struct omap_hwmod omap44xx_cm_core_hwmod = {
2548 .name = "cm_core", 2547 .name = "cm_core",
2549 .class = &omap44xx_prcm_hwmod_class, 2548 .class = &omap44xx_prcm_hwmod_class,
2550 .clkdm_name = "cm_clkdm",
2551}; 2549};
2552 2550
2553/* prm */ 2551/* prm */
@@ -2564,7 +2562,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
2564static struct omap_hwmod omap44xx_prm_hwmod = { 2562static struct omap_hwmod omap44xx_prm_hwmod = {
2565 .name = "prm", 2563 .name = "prm",
2566 .class = &omap44xx_prcm_hwmod_class, 2564 .class = &omap44xx_prcm_hwmod_class,
2567 .clkdm_name = "prm_clkdm",
2568 .mpu_irqs = omap44xx_prm_irqs, 2565 .mpu_irqs = omap44xx_prm_irqs,
2569 .rst_lines = omap44xx_prm_resets, 2566 .rst_lines = omap44xx_prm_resets,
2570 .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), 2567 .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
@@ -6144,6 +6141,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6144 6141
6145int __init omap44xx_hwmod_init(void) 6142int __init omap44xx_hwmod_init(void)
6146{ 6143{
6144 omap_hwmod_init();
6147 return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); 6145 return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);
6148} 6146}
6149 6147
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index d0ef57c1d71b..656b9862279e 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -156,7 +156,6 @@ struct dpll_data {
156 u8 min_divider; 156 u8 min_divider;
157 u16 max_divider; 157 u16 max_divider;
158 u8 modes; 158 u8 modes;
159#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
160 void __iomem *autoidle_reg; 159 void __iomem *autoidle_reg;
161 void __iomem *idlest_reg; 160 void __iomem *idlest_reg;
162 u32 autoidle_mask; 161 u32 autoidle_mask;
@@ -167,7 +166,6 @@ struct dpll_data {
167 u8 auto_recal_bit; 166 u8 auto_recal_bit;
168 u8 recal_en_bit; 167 u8 recal_en_bit;
169 u8 recal_st_bit; 168 u8 recal_st_bit;
170# endif
171 u8 flags; 169 u8 flags;
172}; 170};
173 171
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
index 9c604b390f9f..5927709b1908 100644
--- a/arch/arm/plat-omap/include/plat/dsp.h
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -18,6 +18,9 @@ struct omap_dsp_platform_data {
18 u32 (*dsp_cm_read)(s16 , u16); 18 u32 (*dsp_cm_read)(s16 , u16);
19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); 19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
20 20
21 void (*set_bootaddr)(u32);
22 void (*set_bootmode)(u8);
23
21 phys_addr_t phys_mempool_base; 24 phys_addr_t phys_mempool_base;
22 phys_addr_t phys_mempool_size; 25 phys_addr_t phys_mempool_size;
23}; 26};
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index c835b7194ff5..a8ecc53b3670 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
629 629
630int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); 630int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
631 631
632extern void __init omap_hwmod_init(void);
633
632/* 634/*
633 * Chip variant-specific hwmod init routines - XXX should be converted 635 * Chip variant-specific hwmod init routines - XXX should be converted
634 * to use initcalls once the initial boot ordering is straightened out 636 * to use initcalls once the initial boot ordering is straightened out