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authorPaul Walmsley <paul@pwsan.com>2012-04-19 06:04:31 -0400
committerPaul Walmsley <paul@pwsan.com>2012-04-19 06:04:31 -0400
commit0a78c5c5963d3bb2119795f9442a3eeec3aebc1a (patch)
treed436c2f94c7c209d5daf095fd290cb7e7fa24f93
parent2221b5cddc2ebcfa4b0217266d2edc98e7eec93b (diff)
ARM: OMAP2+: hwmod data: convert to link registration
Register interconnect links between IP blocks, rather than the IP blocks themselves. (The IP blocks will be registered as a side-effect of registering the links.) The objective is to reduce the number of lines of static data and facilitate the sharing of IP block data between different SoCs. These objectives come at the penalty of increased boot time due to increased computation. While here, fix a few whitespace problems and inaccurate variable names. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
Diffstat
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c383
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c460
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c774
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c935
4 files changed, 370 insertions, 2182 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 3e8938005da8..42921ff12e86 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -2,6 +2,7 @@
2 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips 2 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
3 * 3 *
4 * Copyright (C) 2009-2011 Nokia Corporation 4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley 6 * Paul Walmsley
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -69,11 +70,6 @@ static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = {
69 .user = OCP_USER_MPU, 70 .user = OCP_USER_MPU,
70}; 71};
71 72
72/* Slave interfaces on the L3 interconnect */
73static struct omap_hwmod_ocp_if *omap2420_l3_main_slaves[] = {
74 &omap2420_mpu__l3_main,
75};
76
77/* DSS -> l3 */ 73/* DSS -> l3 */
78static struct omap_hwmod_ocp_if omap2420_dss__l3 = { 74static struct omap_hwmod_ocp_if omap2420_dss__l3 = {
79 .master = &omap2420_dss_core_hwmod, 75 .master = &omap2420_dss_core_hwmod,
@@ -87,19 +83,10 @@ static struct omap_hwmod_ocp_if omap2420_dss__l3 = {
87 .user = OCP_USER_MPU | OCP_USER_SDMA, 83 .user = OCP_USER_MPU | OCP_USER_SDMA,
88}; 84};
89 85
90/* Master interfaces on the L3 interconnect */
91static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = {
92 &omap2420_l3_main__l4_core,
93};
94
95/* L3 */ 86/* L3 */
96static struct omap_hwmod omap2420_l3_main_hwmod = { 87static struct omap_hwmod omap2420_l3_main_hwmod = {
97 .name = "l3_main", 88 .name = "l3_main",
98 .class = &l3_hwmod_class, 89 .class = &l3_hwmod_class,
99 .masters = omap2420_l3_main_masters,
100 .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters),
101 .slaves = omap2420_l3_main_slaves,
102 .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves),
103 .flags = HWMOD_NO_IDLEST, 90 .flags = HWMOD_NO_IDLEST,
104}; 91};
105 92
@@ -182,64 +169,25 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
182 .user = OCP_USER_MPU | OCP_USER_SDMA, 169 .user = OCP_USER_MPU | OCP_USER_SDMA,
183}; 170};
184 171
185/* Slave interfaces on the L4_CORE interconnect */
186static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
187 &omap2420_l3_main__l4_core,
188};
189
190/* Master interfaces on the L4_CORE interconnect */
191static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
192 &omap2420_l4_core__l4_wkup,
193 &omap2_l4_core__uart1,
194 &omap2_l4_core__uart2,
195 &omap2_l4_core__uart3,
196 &omap2420_l4_core__i2c1,
197 &omap2420_l4_core__i2c2
198};
199
200/* L4 CORE */ 172/* L4 CORE */
201static struct omap_hwmod omap2420_l4_core_hwmod = { 173static struct omap_hwmod omap2420_l4_core_hwmod = {
202 .name = "l4_core", 174 .name = "l4_core",
203 .class = &l4_hwmod_class, 175 .class = &l4_hwmod_class,
204 .masters = omap2420_l4_core_masters,
205 .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
206 .slaves = omap2420_l4_core_slaves,
207 .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
208 .flags = HWMOD_NO_IDLEST, 176 .flags = HWMOD_NO_IDLEST,
209}; 177};
210 178
211/* Slave interfaces on the L4_WKUP interconnect */
212static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
213 &omap2420_l4_core__l4_wkup,
214};
215
216/* Master interfaces on the L4_WKUP interconnect */
217static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
218};
219
220/* L4 WKUP */ 179/* L4 WKUP */
221static struct omap_hwmod omap2420_l4_wkup_hwmod = { 180static struct omap_hwmod omap2420_l4_wkup_hwmod = {
222 .name = "l4_wkup", 181 .name = "l4_wkup",
223 .class = &l4_hwmod_class, 182 .class = &l4_hwmod_class,
224 .masters = omap2420_l4_wkup_masters,
225 .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
226 .slaves = omap2420_l4_wkup_slaves,
227 .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
228 .flags = HWMOD_NO_IDLEST, 183 .flags = HWMOD_NO_IDLEST,
229}; 184};
230 185
231/* Master interfaces on the MPU device */
232static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
233 &omap2420_mpu__l3_main,
234};
235
236/* MPU */ 186/* MPU */
237static struct omap_hwmod omap2420_mpu_hwmod = { 187static struct omap_hwmod omap2420_mpu_hwmod = {
238 .name = "mpu", 188 .name = "mpu",
239 .class = &mpu_hwmod_class, 189 .class = &mpu_hwmod_class,
240 .main_clk = "mpu_ck", 190 .main_clk = "mpu_ck",
241 .masters = omap2420_mpu_masters,
242 .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
243}; 191};
244 192
245/* 193/*
@@ -254,10 +202,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__iva = {
254 .user = OCP_USER_MPU | OCP_USER_SDMA, 202 .user = OCP_USER_MPU | OCP_USER_SDMA,
255}; 203};
256 204
257static struct omap_hwmod_ocp_if *omap2420_iva_masters[] = {
258 &omap2420_l3__iva,
259};
260
261/* 205/*
262 * IVA2 (IVA2) 206 * IVA2 (IVA2)
263 */ 207 */
@@ -265,8 +209,6 @@ static struct omap_hwmod_ocp_if *omap2420_iva_masters[] = {
265static struct omap_hwmod omap2420_iva_hwmod = { 209static struct omap_hwmod omap2420_iva_hwmod = {
266 .name = "iva", 210 .name = "iva",
267 .class = &iva_hwmod_class, 211 .class = &iva_hwmod_class,
268 .masters = omap2420_iva_masters,
269 .masters_cnt = ARRAY_SIZE(omap2420_iva_masters),
270}; 212};
271 213
272/* always-on timers dev attribute */ 214/* always-on timers dev attribute */
@@ -300,11 +242,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
300 .user = OCP_USER_MPU | OCP_USER_SDMA, 242 .user = OCP_USER_MPU | OCP_USER_SDMA,
301}; 243};
302 244
303/* timer1 slave port */
304static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
305 &omap2420_l4_wkup__timer1,
306};
307
308/* timer1 hwmod */ 245/* timer1 hwmod */
309static struct omap_hwmod omap2420_timer1_hwmod = { 246static struct omap_hwmod omap2420_timer1_hwmod = {
310 .name = "timer1", 247 .name = "timer1",
@@ -320,8 +257,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
320 }, 257 },
321 }, 258 },
322 .dev_attr = &capability_alwon_dev_attr, 259 .dev_attr = &capability_alwon_dev_attr,
323 .slaves = omap2420_timer1_slaves,
324 .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
325 .class = &omap2xxx_timer_hwmod_class, 260 .class = &omap2xxx_timer_hwmod_class,
326}; 261};
327 262
@@ -337,11 +272,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
337 .user = OCP_USER_MPU | OCP_USER_SDMA, 272 .user = OCP_USER_MPU | OCP_USER_SDMA,
338}; 273};
339 274
340/* timer2 slave port */
341static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
342 &omap2420_l4_core__timer2,
343};
344
345/* timer2 hwmod */ 275/* timer2 hwmod */
346static struct omap_hwmod omap2420_timer2_hwmod = { 276static struct omap_hwmod omap2420_timer2_hwmod = {
347 .name = "timer2", 277 .name = "timer2",
@@ -357,8 +287,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
357 }, 287 },
358 }, 288 },
359 .dev_attr = &capability_alwon_dev_attr, 289 .dev_attr = &capability_alwon_dev_attr,
360 .slaves = omap2420_timer2_slaves,
361 .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves),
362 .class = &omap2xxx_timer_hwmod_class, 290 .class = &omap2xxx_timer_hwmod_class,
363}; 291};
364 292
@@ -374,11 +302,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
374 .user = OCP_USER_MPU | OCP_USER_SDMA, 302 .user = OCP_USER_MPU | OCP_USER_SDMA,
375}; 303};
376 304
377/* timer3 slave port */
378static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {
379 &omap2420_l4_core__timer3,
380};
381
382/* timer3 hwmod */ 305/* timer3 hwmod */
383static struct omap_hwmod omap2420_timer3_hwmod = { 306static struct omap_hwmod omap2420_timer3_hwmod = {
384 .name = "timer3", 307 .name = "timer3",
@@ -394,8 +317,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
394 }, 317 },
395 }, 318 },
396 .dev_attr = &capability_alwon_dev_attr, 319 .dev_attr = &capability_alwon_dev_attr,
397 .slaves = omap2420_timer3_slaves,
398 .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves),
399 .class = &omap2xxx_timer_hwmod_class, 320 .class = &omap2xxx_timer_hwmod_class,
400}; 321};
401 322
@@ -411,11 +332,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
411 .user = OCP_USER_MPU | OCP_USER_SDMA, 332 .user = OCP_USER_MPU | OCP_USER_SDMA,
412}; 333};
413 334
414/* timer4 slave port */
415static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {
416 &omap2420_l4_core__timer4,
417};
418
419/* timer4 hwmod */ 335/* timer4 hwmod */
420static struct omap_hwmod omap2420_timer4_hwmod = { 336static struct omap_hwmod omap2420_timer4_hwmod = {
421 .name = "timer4", 337 .name = "timer4",
@@ -431,8 +347,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
431 }, 347 },
432 }, 348 },
433 .dev_attr = &capability_alwon_dev_attr, 349 .dev_attr = &capability_alwon_dev_attr,
434 .slaves = omap2420_timer4_slaves,
435 .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves),
436 .class = &omap2xxx_timer_hwmod_class, 350 .class = &omap2xxx_timer_hwmod_class,
437}; 351};
438 352
@@ -448,11 +362,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
448 .user = OCP_USER_MPU | OCP_USER_SDMA, 362 .user = OCP_USER_MPU | OCP_USER_SDMA,
449}; 363};
450 364
451/* timer5 slave port */
452static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {
453 &omap2420_l4_core__timer5,
454};
455
456/* timer5 hwmod */ 365/* timer5 hwmod */
457static struct omap_hwmod omap2420_timer5_hwmod = { 366static struct omap_hwmod omap2420_timer5_hwmod = {
458 .name = "timer5", 367 .name = "timer5",
@@ -468,8 +377,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
468 }, 377 },
469 }, 378 },
470 .dev_attr = &capability_alwon_dev_attr, 379 .dev_attr = &capability_alwon_dev_attr,
471 .slaves = omap2420_timer5_slaves,
472 .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves),
473 .class = &omap2xxx_timer_hwmod_class, 380 .class = &omap2xxx_timer_hwmod_class,
474}; 381};
475 382
@@ -486,11 +393,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
486 .user = OCP_USER_MPU | OCP_USER_SDMA, 393 .user = OCP_USER_MPU | OCP_USER_SDMA,
487}; 394};
488 395
489/* timer6 slave port */
490static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {
491 &omap2420_l4_core__timer6,
492};
493
494/* timer6 hwmod */ 396/* timer6 hwmod */
495static struct omap_hwmod omap2420_timer6_hwmod = { 397static struct omap_hwmod omap2420_timer6_hwmod = {
496 .name = "timer6", 398 .name = "timer6",
@@ -506,8 +408,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
506 }, 408 },
507 }, 409 },
508 .dev_attr = &capability_alwon_dev_attr, 410 .dev_attr = &capability_alwon_dev_attr,
509 .slaves = omap2420_timer6_slaves,
510 .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves),
511 .class = &omap2xxx_timer_hwmod_class, 411 .class = &omap2xxx_timer_hwmod_class,
512}; 412};
513 413
@@ -523,11 +423,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
523 .user = OCP_USER_MPU | OCP_USER_SDMA, 423 .user = OCP_USER_MPU | OCP_USER_SDMA,
524}; 424};
525 425
526/* timer7 slave port */
527static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {
528 &omap2420_l4_core__timer7,
529};
530
531/* timer7 hwmod */ 426/* timer7 hwmod */
532static struct omap_hwmod omap2420_timer7_hwmod = { 427static struct omap_hwmod omap2420_timer7_hwmod = {
533 .name = "timer7", 428 .name = "timer7",
@@ -543,8 +438,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
543 }, 438 },
544 }, 439 },
545 .dev_attr = &capability_alwon_dev_attr, 440 .dev_attr = &capability_alwon_dev_attr,
546 .slaves = omap2420_timer7_slaves,
547 .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves),
548 .class = &omap2xxx_timer_hwmod_class, 441 .class = &omap2xxx_timer_hwmod_class,
549}; 442};
550 443
@@ -560,11 +453,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
560 .user = OCP_USER_MPU | OCP_USER_SDMA, 453 .user = OCP_USER_MPU | OCP_USER_SDMA,
561}; 454};
562 455
563/* timer8 slave port */
564static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {
565 &omap2420_l4_core__timer8,
566};
567
568/* timer8 hwmod */ 456/* timer8 hwmod */
569static struct omap_hwmod omap2420_timer8_hwmod = { 457static struct omap_hwmod omap2420_timer8_hwmod = {
570 .name = "timer8", 458 .name = "timer8",
@@ -580,8 +468,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
580 }, 468 },
581 }, 469 },
582 .dev_attr = &capability_alwon_dev_attr, 470 .dev_attr = &capability_alwon_dev_attr,
583 .slaves = omap2420_timer8_slaves,
584 .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves),
585 .class = &omap2xxx_timer_hwmod_class, 471 .class = &omap2xxx_timer_hwmod_class,
586}; 472};
587 473
@@ -597,11 +483,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
597 .user = OCP_USER_MPU | OCP_USER_SDMA, 483 .user = OCP_USER_MPU | OCP_USER_SDMA,
598}; 484};
599 485
600/* timer9 slave port */
601static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {
602 &omap2420_l4_core__timer9,
603};
604
605/* timer9 hwmod */ 486/* timer9 hwmod */
606static struct omap_hwmod omap2420_timer9_hwmod = { 487static struct omap_hwmod omap2420_timer9_hwmod = {
607 .name = "timer9", 488 .name = "timer9",
@@ -617,8 +498,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
617 }, 498 },
618 }, 499 },
619 .dev_attr = &capability_pwm_dev_attr, 500 .dev_attr = &capability_pwm_dev_attr,
620 .slaves = omap2420_timer9_slaves,
621 .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves),
622 .class = &omap2xxx_timer_hwmod_class, 501 .class = &omap2xxx_timer_hwmod_class,
623}; 502};
624 503
@@ -634,11 +513,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
634 .user = OCP_USER_MPU | OCP_USER_SDMA, 513 .user = OCP_USER_MPU | OCP_USER_SDMA,
635}; 514};
636 515
637/* timer10 slave port */
638static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {
639 &omap2420_l4_core__timer10,
640};
641
642/* timer10 hwmod */ 516/* timer10 hwmod */
643static struct omap_hwmod omap2420_timer10_hwmod = { 517static struct omap_hwmod omap2420_timer10_hwmod = {
644 .name = "timer10", 518 .name = "timer10",
@@ -654,8 +528,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
654 }, 528 },
655 }, 529 },
656 .dev_attr = &capability_pwm_dev_attr, 530 .dev_attr = &capability_pwm_dev_attr,
657 .slaves = omap2420_timer10_slaves,
658 .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves),
659 .class = &omap2xxx_timer_hwmod_class, 531 .class = &omap2xxx_timer_hwmod_class,
660}; 532};
661 533
@@ -671,11 +543,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
671 .user = OCP_USER_MPU | OCP_USER_SDMA, 543 .user = OCP_USER_MPU | OCP_USER_SDMA,
672}; 544};
673 545
674/* timer11 slave port */
675static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {
676 &omap2420_l4_core__timer11,
677};
678
679/* timer11 hwmod */ 546/* timer11 hwmod */
680static struct omap_hwmod omap2420_timer11_hwmod = { 547static struct omap_hwmod omap2420_timer11_hwmod = {
681 .name = "timer11", 548 .name = "timer11",
@@ -691,8 +558,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
691 }, 558 },
692 }, 559 },
693 .dev_attr = &capability_pwm_dev_attr, 560 .dev_attr = &capability_pwm_dev_attr,
694 .slaves = omap2420_timer11_slaves,
695 .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves),
696 .class = &omap2xxx_timer_hwmod_class, 561 .class = &omap2xxx_timer_hwmod_class,
697}; 562};
698 563
@@ -708,11 +573,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
708 .user = OCP_USER_MPU | OCP_USER_SDMA, 573 .user = OCP_USER_MPU | OCP_USER_SDMA,
709}; 574};
710 575
711/* timer12 slave port */
712static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {
713 &omap2420_l4_core__timer12,
714};
715
716/* timer12 hwmod */ 576/* timer12 hwmod */
717static struct omap_hwmod omap2420_timer12_hwmod = { 577static struct omap_hwmod omap2420_timer12_hwmod = {
718 .name = "timer12", 578 .name = "timer12",
@@ -728,8 +588,6 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
728 }, 588 },
729 }, 589 },
730 .dev_attr = &capability_pwm_dev_attr, 590 .dev_attr = &capability_pwm_dev_attr,
731 .slaves = omap2420_timer12_slaves,
732 .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves),
733 .class = &omap2xxx_timer_hwmod_class, 591 .class = &omap2xxx_timer_hwmod_class,
734}; 592};
735 593
@@ -751,11 +609,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
751 .user = OCP_USER_MPU | OCP_USER_SDMA, 609 .user = OCP_USER_MPU | OCP_USER_SDMA,
752}; 610};
753 611
754/* wd_timer2 */
755static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {
756 &omap2420_l4_wkup__wd_timer2,
757};
758
759static struct omap_hwmod omap2420_wd_timer2_hwmod = { 612static struct omap_hwmod omap2420_wd_timer2_hwmod = {
760 .name = "wd_timer2", 613 .name = "wd_timer2",
761 .class = &omap2xxx_wd_timer_hwmod_class, 614 .class = &omap2xxx_wd_timer_hwmod_class,
@@ -769,16 +622,10 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
769 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 622 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
770 }, 623 },
771 }, 624 },
772 .slaves = omap2420_wd_timer2_slaves,
773 .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves),
774}; 625};
775 626
776/* UART1 */ 627/* UART1 */
777 628
778static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
779 &omap2_l4_core__uart1,
780};
781
782static struct omap_hwmod omap2420_uart1_hwmod = { 629static struct omap_hwmod omap2420_uart1_hwmod = {
783 .name = "uart1", 630 .name = "uart1",
784 .mpu_irqs = omap2_uart1_mpu_irqs, 631 .mpu_irqs = omap2_uart1_mpu_irqs,
@@ -793,17 +640,11 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
793 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 640 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
794 }, 641 },
795 }, 642 },
796 .slaves = omap2420_uart1_slaves,
797 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
798 .class = &omap2_uart_class, 643 .class = &omap2_uart_class,
799}; 644};
800 645
801/* UART2 */ 646/* UART2 */
802 647
803static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
804 &omap2_l4_core__uart2,
805};
806
807static struct omap_hwmod omap2420_uart2_hwmod = { 648static struct omap_hwmod omap2420_uart2_hwmod = {
808 .name = "uart2", 649 .name = "uart2",
809 .mpu_irqs = omap2_uart2_mpu_irqs, 650 .mpu_irqs = omap2_uart2_mpu_irqs,
@@ -818,17 +659,11 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
818 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 659 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
819 }, 660 },
820 }, 661 },
821 .slaves = omap2420_uart2_slaves,
822 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
823 .class = &omap2_uart_class, 662 .class = &omap2_uart_class,
824}; 663};
825 664
826/* UART3 */ 665/* UART3 */
827 666
828static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
829 &omap2_l4_core__uart3,
830};
831
832static struct omap_hwmod omap2420_uart3_hwmod = { 667static struct omap_hwmod omap2420_uart3_hwmod = {
833 .name = "uart3", 668 .name = "uart3",
834 .mpu_irqs = omap2_uart3_mpu_irqs, 669 .mpu_irqs = omap2_uart3_mpu_irqs,
@@ -843,16 +678,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
843 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 678 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
844 }, 679 },
845 }, 680 },
846 .slaves = omap2420_uart3_slaves,
847 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
848 .class = &omap2_uart_class, 681 .class = &omap2_uart_class,
849}; 682};
850 683
851/* dss */ 684/* dss */
852/* dss master ports */
853static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
854 &omap2420_dss__l3,
855};
856 685
857/* l4_core -> dss */ 686/* l4_core -> dss */
858static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { 687static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
@@ -869,11 +698,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
869 .user = OCP_USER_MPU | OCP_USER_SDMA, 698 .user = OCP_USER_MPU | OCP_USER_SDMA,
870}; 699};
871 700
872/* dss slave ports */
873static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
874 &omap2420_l4_core__dss,
875};
876
877static struct omap_hwmod_opt_clk dss_opt_clks[] = { 701static struct omap_hwmod_opt_clk dss_opt_clks[] = {
878 /* 702 /*
879 * The DSS HW needs all DSS clocks enabled during reset. The dss_core 703 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
@@ -899,10 +723,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
899 }, 723 },
900 .opt_clks = dss_opt_clks, 724 .opt_clks = dss_opt_clks,
901 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 725 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
902 .slaves = omap2420_dss_slaves,
903 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
904 .masters = omap2420_dss_masters,
905 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
906 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET, 726 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
907}; 727};
908 728
@@ -921,11 +741,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
921 .user = OCP_USER_MPU | OCP_USER_SDMA, 741 .user = OCP_USER_MPU | OCP_USER_SDMA,
922}; 742};
923 743
924/* dss_dispc slave ports */
925static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
926 &omap2420_l4_core__dss_dispc,
927};
928
929static struct omap_hwmod omap2420_dss_dispc_hwmod = { 744static struct omap_hwmod omap2420_dss_dispc_hwmod = {
930 .name = "dss_dispc", 745 .name = "dss_dispc",
931 .class = &omap2_dispc_hwmod_class, 746 .class = &omap2_dispc_hwmod_class,
@@ -940,8 +755,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
940 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, 755 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
941 }, 756 },
942 }, 757 },
943 .slaves = omap2420_dss_dispc_slaves,
944 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
945 .flags = HWMOD_NO_IDLEST, 758 .flags = HWMOD_NO_IDLEST,
946 .dev_attr = &omap2_3_dss_dispc_dev_attr 759 .dev_attr = &omap2_3_dss_dispc_dev_attr
947}; 760};
@@ -961,11 +774,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
961 .user = OCP_USER_MPU | OCP_USER_SDMA, 774 .user = OCP_USER_MPU | OCP_USER_SDMA,
962}; 775};
963 776
964/* dss_rfbi slave ports */
965static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
966 &omap2420_l4_core__dss_rfbi,
967};
968
969static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { 777static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
970 { .role = "ick", .clk = "dss_ick" }, 778 { .role = "ick", .clk = "dss_ick" },
971}; 779};
@@ -983,8 +791,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
983 }, 791 },
984 .opt_clks = dss_rfbi_opt_clks, 792 .opt_clks = dss_rfbi_opt_clks,
985 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), 793 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
986 .slaves = omap2420_dss_rfbi_slaves,
987 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
988 .flags = HWMOD_NO_IDLEST, 794 .flags = HWMOD_NO_IDLEST,
989}; 795};
990 796
@@ -1003,11 +809,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1003 .user = OCP_USER_MPU | OCP_USER_SDMA, 809 .user = OCP_USER_MPU | OCP_USER_SDMA,
1004}; 810};
1005 811
1006/* dss_venc slave ports */
1007static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
1008 &omap2420_l4_core__dss_venc,
1009};
1010
1011static struct omap_hwmod omap2420_dss_venc_hwmod = { 812static struct omap_hwmod omap2420_dss_venc_hwmod = {
1012 .name = "dss_venc", 813 .name = "dss_venc",
1013 .class = &omap2_venc_hwmod_class, 814 .class = &omap2_venc_hwmod_class,
@@ -1019,8 +820,6 @@ static struct omap_hwmod omap2420_dss_venc_hwmod = {
1019 .module_offs = CORE_MOD, 820 .module_offs = CORE_MOD,
1020 }, 821 },
1021 }, 822 },
1022 .slaves = omap2420_dss_venc_slaves,
1023 .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves),
1024 .flags = HWMOD_NO_IDLEST, 823 .flags = HWMOD_NO_IDLEST,
1025}; 824};
1026 825
@@ -1049,10 +848,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
1049 848
1050/* I2C1 */ 849/* I2C1 */
1051 850
1052static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
1053 &omap2420_l4_core__i2c1,
1054};
1055
1056static struct omap_hwmod omap2420_i2c1_hwmod = { 851static struct omap_hwmod omap2420_i2c1_hwmod = {
1057 .name = "i2c1", 852 .name = "i2c1",
1058 .mpu_irqs = omap2_i2c1_mpu_irqs, 853 .mpu_irqs = omap2_i2c1_mpu_irqs,
@@ -1067,8 +862,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1067 .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT, 862 .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,
1068 }, 863 },
1069 }, 864 },
1070 .slaves = omap2420_i2c1_slaves,
1071 .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves),
1072 .class = &i2c_class, 865 .class = &i2c_class,
1073 .dev_attr = &i2c_dev_attr, 866 .dev_attr = &i2c_dev_attr,
1074 .flags = HWMOD_16BIT_REG, 867 .flags = HWMOD_16BIT_REG,
@@ -1076,10 +869,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1076 869
1077/* I2C2 */ 870/* I2C2 */
1078 871
1079static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
1080 &omap2420_l4_core__i2c2,
1081};
1082
1083static struct omap_hwmod omap2420_i2c2_hwmod = { 872static struct omap_hwmod omap2420_i2c2_hwmod = {
1084 .name = "i2c2", 873 .name = "i2c2",
1085 .mpu_irqs = omap2_i2c2_mpu_irqs, 874 .mpu_irqs = omap2_i2c2_mpu_irqs,
@@ -1094,8 +883,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
1094 .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT, 883 .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,
1095 }, 884 },
1096 }, 885 },
1097 .slaves = omap2420_i2c2_slaves,
1098 .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves),
1099 .class = &i2c_class, 886 .class = &i2c_class,
1100 .dev_attr = &i2c_dev_attr, 887 .dev_attr = &i2c_dev_attr,
1101 .flags = HWMOD_16BIT_REG, 888 .flags = HWMOD_16BIT_REG,
@@ -1180,10 +967,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1180}; 967};
1181 968
1182/* gpio1 */ 969/* gpio1 */
1183static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
1184 &omap2420_l4_wkup__gpio1,
1185};
1186
1187static struct omap_hwmod omap2420_gpio1_hwmod = { 970static struct omap_hwmod omap2420_gpio1_hwmod = {
1188 .name = "gpio1", 971 .name = "gpio1",
1189 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 972 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1198,17 +981,11 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
1198 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 981 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1199 }, 982 },
1200 }, 983 },
1201 .slaves = omap2420_gpio1_slaves,
1202 .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves),
1203 .class = &omap2xxx_gpio_hwmod_class, 984 .class = &omap2xxx_gpio_hwmod_class,
1204 .dev_attr = &gpio_dev_attr, 985 .dev_attr = &gpio_dev_attr,
1205}; 986};
1206 987
1207/* gpio2 */ 988/* gpio2 */
1208static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
1209 &omap2420_l4_wkup__gpio2,
1210};
1211
1212static struct omap_hwmod omap2420_gpio2_hwmod = { 989static struct omap_hwmod omap2420_gpio2_hwmod = {
1213 .name = "gpio2", 990 .name = "gpio2",
1214 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 991 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1223,17 +1000,11 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
1223 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1000 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1224 }, 1001 },
1225 }, 1002 },
1226 .slaves = omap2420_gpio2_slaves,
1227 .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves),
1228 .class = &omap2xxx_gpio_hwmod_class, 1003 .class = &omap2xxx_gpio_hwmod_class,
1229 .dev_attr = &gpio_dev_attr, 1004 .dev_attr = &gpio_dev_attr,
1230}; 1005};
1231 1006
1232/* gpio3 */ 1007/* gpio3 */
1233static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
1234 &omap2420_l4_wkup__gpio3,
1235};
1236
1237static struct omap_hwmod omap2420_gpio3_hwmod = { 1008static struct omap_hwmod omap2420_gpio3_hwmod = {
1238 .name = "gpio3", 1009 .name = "gpio3",
1239 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1010 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1248,17 +1019,11 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
1248 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1019 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1249 }, 1020 },
1250 }, 1021 },
1251 .slaves = omap2420_gpio3_slaves,
1252 .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves),
1253 .class = &omap2xxx_gpio_hwmod_class, 1022 .class = &omap2xxx_gpio_hwmod_class,
1254 .dev_attr = &gpio_dev_attr, 1023 .dev_attr = &gpio_dev_attr,
1255}; 1024};
1256 1025
1257/* gpio4 */ 1026/* gpio4 */
1258static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
1259 &omap2420_l4_wkup__gpio4,
1260};
1261
1262static struct omap_hwmod omap2420_gpio4_hwmod = { 1027static struct omap_hwmod omap2420_gpio4_hwmod = {
1263 .name = "gpio4", 1028 .name = "gpio4",
1264 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1029 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1273,8 +1038,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
1273 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1038 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1274 }, 1039 },
1275 }, 1040 },
1276 .slaves = omap2420_gpio4_slaves,
1277 .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves),
1278 .class = &omap2xxx_gpio_hwmod_class, 1041 .class = &omap2xxx_gpio_hwmod_class,
1279 .dev_attr = &gpio_dev_attr, 1042 .dev_attr = &gpio_dev_attr,
1280}; 1043};
@@ -1294,11 +1057,6 @@ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
1294 .user = OCP_USER_MPU | OCP_USER_SDMA, 1057 .user = OCP_USER_MPU | OCP_USER_SDMA,
1295}; 1058};
1296 1059
1297/* dma_system master ports */
1298static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
1299 &omap2420_dma_system__l3,
1300};
1301
1302/* l4_core -> dma_system */ 1060/* l4_core -> dma_system */
1303static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { 1061static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
1304 .master = &omap2420_l4_core_hwmod, 1062 .master = &omap2420_l4_core_hwmod,
@@ -1308,20 +1066,11 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
1308 .user = OCP_USER_MPU | OCP_USER_SDMA, 1066 .user = OCP_USER_MPU | OCP_USER_SDMA,
1309}; 1067};
1310 1068
1311/* dma_system slave ports */
1312static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
1313 &omap2420_l4_core__dma_system,
1314};
1315
1316static struct omap_hwmod omap2420_dma_system_hwmod = { 1069static struct omap_hwmod omap2420_dma_system_hwmod = {
1317 .name = "dma", 1070 .name = "dma",
1318 .class = &omap2xxx_dma_hwmod_class, 1071 .class = &omap2xxx_dma_hwmod_class,
1319 .mpu_irqs = omap2_dma_system_irqs, 1072 .mpu_irqs = omap2_dma_system_irqs,
1320 .main_clk = "core_l3_ck", 1073 .main_clk = "core_l3_ck",
1321 .slaves = omap2420_dma_system_slaves,
1322 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
1323 .masters = omap2420_dma_system_masters,
1324 .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters),
1325 .dev_attr = &dma_dev_attr, 1074 .dev_attr = &dma_dev_attr,
1326 .flags = HWMOD_NO_IDLEST, 1075 .flags = HWMOD_NO_IDLEST,
1327}; 1076};
@@ -1342,11 +1091,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
1342 .user = OCP_USER_MPU | OCP_USER_SDMA, 1091 .user = OCP_USER_MPU | OCP_USER_SDMA,
1343}; 1092};
1344 1093
1345/* mailbox slave ports */
1346static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = {
1347 &omap2420_l4_core__mailbox,
1348};
1349
1350static struct omap_hwmod omap2420_mailbox_hwmod = { 1094static struct omap_hwmod omap2420_mailbox_hwmod = {
1351 .name = "mailbox", 1095 .name = "mailbox",
1352 .class = &omap2xxx_mailbox_hwmod_class, 1096 .class = &omap2xxx_mailbox_hwmod_class,
@@ -1361,15 +1105,9 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
1361 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 1105 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
1362 }, 1106 },
1363 }, 1107 },
1364 .slaves = omap2420_mailbox_slaves,
1365 .slaves_cnt = ARRAY_SIZE(omap2420_mailbox_slaves),
1366}; 1108};
1367 1109
1368/* mcspi1 */ 1110/* mcspi1 */
1369static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
1370 &omap2420_l4_core__mcspi1,
1371};
1372
1373static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { 1111static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1374 .num_chipselect = 4, 1112 .num_chipselect = 4,
1375}; 1113};
@@ -1388,17 +1126,11 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
1388 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, 1126 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1389 }, 1127 },
1390 }, 1128 },
1391 .slaves = omap2420_mcspi1_slaves,
1392 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves),
1393 .class = &omap2xxx_mcspi_class, 1129 .class = &omap2xxx_mcspi_class,
1394 .dev_attr = &omap_mcspi1_dev_attr, 1130 .dev_attr = &omap_mcspi1_dev_attr,
1395}; 1131};
1396 1132
1397/* mcspi2 */ 1133/* mcspi2 */
1398static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = {
1399 &omap2420_l4_core__mcspi2,
1400};
1401
1402static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { 1134static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1403 .num_chipselect = 2, 1135 .num_chipselect = 2,
1404}; 1136};
@@ -1417,8 +1149,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
1417 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, 1149 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1418 }, 1150 },
1419 }, 1151 },
1420 .slaves = omap2420_mcspi2_slaves,
1421 .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves),
1422 .class = &omap2xxx_mcspi_class, 1152 .class = &omap2xxx_mcspi_class,
1423 .dev_attr = &omap_mcspi2_dev_attr, 1153 .dev_attr = &omap_mcspi2_dev_attr,
1424}; 1154};
@@ -1448,11 +1178,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
1448 .user = OCP_USER_MPU | OCP_USER_SDMA, 1178 .user = OCP_USER_MPU | OCP_USER_SDMA,
1449}; 1179};
1450 1180
1451/* mcbsp1 slave ports */
1452static struct omap_hwmod_ocp_if *omap2420_mcbsp1_slaves[] = {
1453 &omap2420_l4_core__mcbsp1,
1454};
1455
1456static struct omap_hwmod omap2420_mcbsp1_hwmod = { 1181static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1457 .name = "mcbsp1", 1182 .name = "mcbsp1",
1458 .class = &omap2420_mcbsp_hwmod_class, 1183 .class = &omap2420_mcbsp_hwmod_class,
@@ -1468,8 +1193,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1468 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 1193 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
1469 }, 1194 },
1470 }, 1195 },
1471 .slaves = omap2420_mcbsp1_slaves,
1472 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves),
1473}; 1196};
1474 1197
1475/* mcbsp2 */ 1198/* mcbsp2 */
@@ -1488,11 +1211,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
1488 .user = OCP_USER_MPU | OCP_USER_SDMA, 1211 .user = OCP_USER_MPU | OCP_USER_SDMA,
1489}; 1212};
1490 1213
1491/* mcbsp2 slave ports */
1492static struct omap_hwmod_ocp_if *omap2420_mcbsp2_slaves[] = {
1493 &omap2420_l4_core__mcbsp2,
1494};
1495
1496static struct omap_hwmod omap2420_mcbsp2_hwmod = { 1214static struct omap_hwmod omap2420_mcbsp2_hwmod = {
1497 .name = "mcbsp2", 1215 .name = "mcbsp2",
1498 .class = &omap2420_mcbsp_hwmod_class, 1216 .class = &omap2420_mcbsp_hwmod_class,
@@ -1508,66 +1226,51 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
1508 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 1226 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
1509 }, 1227 },
1510 }, 1228 },
1511 .slaves = omap2420_mcbsp2_slaves, 1229};
1512 .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves), 1230
1513}; 1231static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
1514 1232 &omap2420_l3_main__l4_core,
1515static __initdata struct omap_hwmod *omap2420_hwmods[] = { 1233 &omap2420_mpu__l3_main,
1516 &omap2420_l3_main_hwmod, 1234 &omap2420_dss__l3,
1517 &omap2420_l4_core_hwmod, 1235 &omap2420_l4_core__mcspi1,
1518 &omap2420_l4_wkup_hwmod, 1236 &omap2420_l4_core__mcspi2,
1519 &omap2420_mpu_hwmod, 1237 &omap2420_l4_core__l4_wkup,
1520 &omap2420_iva_hwmod, 1238 &omap2_l4_core__uart1,
1521 1239 &omap2_l4_core__uart2,
1522 &omap2420_timer1_hwmod, 1240 &omap2_l4_core__uart3,
1523 &omap2420_timer2_hwmod, 1241 &omap2420_l4_core__i2c1,
1524 &omap2420_timer3_hwmod, 1242 &omap2420_l4_core__i2c2,
1525 &omap2420_timer4_hwmod, 1243 &omap2420_l3__iva,
1526 &omap2420_timer5_hwmod, 1244 &omap2420_l4_wkup__timer1,
1527 &omap2420_timer6_hwmod, 1245 &omap2420_l4_core__timer2,
1528 &omap2420_timer7_hwmod, 1246 &omap2420_l4_core__timer3,
1529 &omap2420_timer8_hwmod, 1247 &omap2420_l4_core__timer4,
1530 &omap2420_timer9_hwmod, 1248 &omap2420_l4_core__timer5,
1531 &omap2420_timer10_hwmod, 1249 &omap2420_l4_core__timer6,
1532 &omap2420_timer11_hwmod, 1250 &omap2420_l4_core__timer7,
1533 &omap2420_timer12_hwmod, 1251 &omap2420_l4_core__timer8,
1534 1252 &omap2420_l4_core__timer9,
1535 &omap2420_wd_timer2_hwmod, 1253 &omap2420_l4_core__timer10,
1536 &omap2420_uart1_hwmod, 1254 &omap2420_l4_core__timer11,
1537 &omap2420_uart2_hwmod, 1255 &omap2420_l4_core__timer12,
1538 &omap2420_uart3_hwmod, 1256 &omap2420_l4_wkup__wd_timer2,
1539 /* dss class */ 1257 &omap2420_l4_core__dss,
1540 &omap2420_dss_core_hwmod, 1258 &omap2420_l4_core__dss_dispc,
1541 &omap2420_dss_dispc_hwmod, 1259 &omap2420_l4_core__dss_rfbi,
1542 &omap2420_dss_rfbi_hwmod, 1260 &omap2420_l4_core__dss_venc,
1543 &omap2420_dss_venc_hwmod, 1261 &omap2420_l4_wkup__gpio1,
1544 /* i2c class */ 1262 &omap2420_l4_wkup__gpio2,
1545 &omap2420_i2c1_hwmod, 1263 &omap2420_l4_wkup__gpio3,
1546 &omap2420_i2c2_hwmod, 1264 &omap2420_l4_wkup__gpio4,
1547 1265 &omap2420_dma_system__l3,
1548 /* gpio class */ 1266 &omap2420_l4_core__dma_system,
1549 &omap2420_gpio1_hwmod, 1267 &omap2420_l4_core__mailbox,
1550 &omap2420_gpio2_hwmod, 1268 &omap2420_l4_core__mcbsp1,
1551 &omap2420_gpio3_hwmod, 1269 &omap2420_l4_core__mcbsp2,
1552 &omap2420_gpio4_hwmod,
1553
1554 /* dma_system class*/
1555 &omap2420_dma_system_hwmod,
1556
1557 /* mailbox class */
1558 &omap2420_mailbox_hwmod,
1559
1560 /* mcbsp class */
1561 &omap2420_mcbsp1_hwmod,
1562 &omap2420_mcbsp2_hwmod,
1563
1564 /* mcspi class */
1565 &omap2420_mcspi1_hwmod,
1566 &omap2420_mcspi2_hwmod,
1567 NULL, 1270 NULL,
1568}; 1271};
1569 1272
1570int __init omap2420_hwmod_init(void) 1273int __init omap2420_hwmod_init(void)
1571{ 1274{
1572 return omap_hwmod_register(omap2420_hwmods); 1275 return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
1573} 1276}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 6a156a931097..5036cbb3913c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -2,6 +2,7 @@
2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
3 * 3 *
4 * Copyright (C) 2009-2011 Nokia Corporation 4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley 6 * Paul Walmsley
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -79,11 +80,6 @@ static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
79 .user = OCP_USER_MPU, 80 .user = OCP_USER_MPU,
80}; 81};
81 82
82/* Slave interfaces on the L3 interconnect */
83static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
84 &omap2430_mpu__l3_main,
85};
86
87/* DSS -> l3 */ 83/* DSS -> l3 */
88static struct omap_hwmod_ocp_if omap2430_dss__l3 = { 84static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
89 .master = &omap2430_dss_core_hwmod, 85 .master = &omap2430_dss_core_hwmod,
@@ -97,19 +93,10 @@ static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
97 .user = OCP_USER_MPU | OCP_USER_SDMA, 93 .user = OCP_USER_MPU | OCP_USER_SDMA,
98}; 94};
99 95
100/* Master interfaces on the L3 interconnect */
101static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
102 &omap2430_l3_main__l4_core,
103};
104
105/* L3 */ 96/* L3 */
106static struct omap_hwmod omap2430_l3_main_hwmod = { 97static struct omap_hwmod omap2430_l3_main_hwmod = {
107 .name = "l3_main", 98 .name = "l3_main",
108 .class = &l3_hwmod_class, 99 .class = &l3_hwmod_class,
109 .masters = omap2430_l3_main_masters,
110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
111 .slaves = omap2430_l3_main_slaves,
112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
113 .flags = HWMOD_NO_IDLEST, 100 .flags = HWMOD_NO_IDLEST,
114}; 101};
115 102
@@ -203,14 +190,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
203 .user = OCP_USER_MPU, 190 .user = OCP_USER_MPU,
204}; 191};
205 192
206static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {
207 &omap2430_usbhsotg__l3,
208};
209
210static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
211 &omap2430_l4_core__usbhsotg,
212};
213
214/* L4 CORE -> MMC1 interface */ 193/* L4 CORE -> MMC1 interface */
215static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 194static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
216 .master = &omap2430_l4_core_hwmod, 195 .master = &omap2430_l4_core_hwmod,
@@ -229,41 +208,13 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
229 .user = OCP_USER_MPU | OCP_USER_SDMA, 208 .user = OCP_USER_MPU | OCP_USER_SDMA,
230}; 209};
231 210
232/* Slave interfaces on the L4_CORE interconnect */
233static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
234 &omap2430_l3_main__l4_core,
235};
236
237/* Master interfaces on the L4_CORE interconnect */
238static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
239 &omap2430_l4_core__l4_wkup,
240 &omap2430_l4_core__mmc1,
241 &omap2430_l4_core__mmc2,
242};
243
244/* L4 CORE */ 211/* L4 CORE */
245static struct omap_hwmod omap2430_l4_core_hwmod = { 212static struct omap_hwmod omap2430_l4_core_hwmod = {
246 .name = "l4_core", 213 .name = "l4_core",
247 .class = &l4_hwmod_class, 214 .class = &l4_hwmod_class,
248 .masters = omap2430_l4_core_masters,
249 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
250 .slaves = omap2430_l4_core_slaves,
251 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
252 .flags = HWMOD_NO_IDLEST, 215 .flags = HWMOD_NO_IDLEST,
253}; 216};
254 217
255/* Slave interfaces on the L4_WKUP interconnect */
256static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
257 &omap2430_l4_core__l4_wkup,
258 &omap2_l4_core__uart1,
259 &omap2_l4_core__uart2,
260 &omap2_l4_core__uart3,
261};
262
263/* Master interfaces on the L4_WKUP interconnect */
264static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
265};
266
267/* l4 core -> mcspi1 interface */ 218/* l4 core -> mcspi1 interface */
268static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { 219static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
269 .master = &omap2430_l4_core_hwmod, 220 .master = &omap2430_l4_core_hwmod,
@@ -295,25 +246,14 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
295static struct omap_hwmod omap2430_l4_wkup_hwmod = { 246static struct omap_hwmod omap2430_l4_wkup_hwmod = {
296 .name = "l4_wkup", 247 .name = "l4_wkup",
297 .class = &l4_hwmod_class, 248 .class = &l4_hwmod_class,
298 .masters = omap2430_l4_wkup_masters,
299 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
300 .slaves = omap2430_l4_wkup_slaves,
301 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
302 .flags = HWMOD_NO_IDLEST, 249 .flags = HWMOD_NO_IDLEST,
303}; 250};
304 251
305/* Master interfaces on the MPU device */
306static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
307 &omap2430_mpu__l3_main,
308};
309
310/* MPU */ 252/* MPU */
311static struct omap_hwmod omap2430_mpu_hwmod = { 253static struct omap_hwmod omap2430_mpu_hwmod = {
312 .name = "mpu", 254 .name = "mpu",
313 .class = &mpu_hwmod_class, 255 .class = &mpu_hwmod_class,
314 .main_clk = "mpu_ck", 256 .main_clk = "mpu_ck",
315 .masters = omap2430_mpu_masters,
316 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
317}; 257};
318 258
319/* 259/*
@@ -328,10 +268,6 @@ static struct omap_hwmod_ocp_if omap2430_l3__iva = {
328 .user = OCP_USER_MPU | OCP_USER_SDMA, 268 .user = OCP_USER_MPU | OCP_USER_SDMA,
329}; 269};
330 270
331static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
332 &omap2430_l3__iva,
333};
334
335/* 271/*
336 * IVA2 (IVA2) 272 * IVA2 (IVA2)
337 */ 273 */
@@ -339,8 +275,6 @@ static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
339static struct omap_hwmod omap2430_iva_hwmod = { 275static struct omap_hwmod omap2430_iva_hwmod = {
340 .name = "iva", 276 .name = "iva",
341 .class = &iva_hwmod_class, 277 .class = &iva_hwmod_class,
342 .masters = omap2430_iva_masters,
343 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
344}; 278};
345 279
346/* always-on timers dev attribute */ 280/* always-on timers dev attribute */
@@ -374,11 +308,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
374 .user = OCP_USER_MPU | OCP_USER_SDMA, 308 .user = OCP_USER_MPU | OCP_USER_SDMA,
375}; 309};
376 310
377/* timer1 slave port */
378static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
379 &omap2430_l4_wkup__timer1,
380};
381
382/* timer1 hwmod */ 311/* timer1 hwmod */
383static struct omap_hwmod omap2430_timer1_hwmod = { 312static struct omap_hwmod omap2430_timer1_hwmod = {
384 .name = "timer1", 313 .name = "timer1",
@@ -394,8 +323,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
394 }, 323 },
395 }, 324 },
396 .dev_attr = &capability_alwon_dev_attr, 325 .dev_attr = &capability_alwon_dev_attr,
397 .slaves = omap2430_timer1_slaves,
398 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
399 .class = &omap2xxx_timer_hwmod_class, 326 .class = &omap2xxx_timer_hwmod_class,
400}; 327};
401 328
@@ -411,11 +338,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
411 .user = OCP_USER_MPU | OCP_USER_SDMA, 338 .user = OCP_USER_MPU | OCP_USER_SDMA,
412}; 339};
413 340
414/* timer2 slave port */
415static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
416 &omap2430_l4_core__timer2,
417};
418
419/* timer2 hwmod */ 341/* timer2 hwmod */
420static struct omap_hwmod omap2430_timer2_hwmod = { 342static struct omap_hwmod omap2430_timer2_hwmod = {
421 .name = "timer2", 343 .name = "timer2",
@@ -431,8 +353,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
431 }, 353 },
432 }, 354 },
433 .dev_attr = &capability_alwon_dev_attr, 355 .dev_attr = &capability_alwon_dev_attr,
434 .slaves = omap2430_timer2_slaves,
435 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
436 .class = &omap2xxx_timer_hwmod_class, 356 .class = &omap2xxx_timer_hwmod_class,
437}; 357};
438 358
@@ -448,11 +368,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
448 .user = OCP_USER_MPU | OCP_USER_SDMA, 368 .user = OCP_USER_MPU | OCP_USER_SDMA,
449}; 369};
450 370
451/* timer3 slave port */
452static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
453 &omap2430_l4_core__timer3,
454};
455
456/* timer3 hwmod */ 371/* timer3 hwmod */
457static struct omap_hwmod omap2430_timer3_hwmod = { 372static struct omap_hwmod omap2430_timer3_hwmod = {
458 .name = "timer3", 373 .name = "timer3",
@@ -468,8 +383,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
468 }, 383 },
469 }, 384 },
470 .dev_attr = &capability_alwon_dev_attr, 385 .dev_attr = &capability_alwon_dev_attr,
471 .slaves = omap2430_timer3_slaves,
472 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
473 .class = &omap2xxx_timer_hwmod_class, 386 .class = &omap2xxx_timer_hwmod_class,
474}; 387};
475 388
@@ -485,11 +398,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
485 .user = OCP_USER_MPU | OCP_USER_SDMA, 398 .user = OCP_USER_MPU | OCP_USER_SDMA,
486}; 399};
487 400
488/* timer4 slave port */
489static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
490 &omap2430_l4_core__timer4,
491};
492
493/* timer4 hwmod */ 401/* timer4 hwmod */
494static struct omap_hwmod omap2430_timer4_hwmod = { 402static struct omap_hwmod omap2430_timer4_hwmod = {
495 .name = "timer4", 403 .name = "timer4",
@@ -505,8 +413,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
505 }, 413 },
506 }, 414 },
507 .dev_attr = &capability_alwon_dev_attr, 415 .dev_attr = &capability_alwon_dev_attr,
508 .slaves = omap2430_timer4_slaves,
509 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
510 .class = &omap2xxx_timer_hwmod_class, 416 .class = &omap2xxx_timer_hwmod_class,
511}; 417};
512 418
@@ -522,11 +428,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
522 .user = OCP_USER_MPU | OCP_USER_SDMA, 428 .user = OCP_USER_MPU | OCP_USER_SDMA,
523}; 429};
524 430
525/* timer5 slave port */
526static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
527 &omap2430_l4_core__timer5,
528};
529
530/* timer5 hwmod */ 431/* timer5 hwmod */
531static struct omap_hwmod omap2430_timer5_hwmod = { 432static struct omap_hwmod omap2430_timer5_hwmod = {
532 .name = "timer5", 433 .name = "timer5",
@@ -542,8 +443,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
542 }, 443 },
543 }, 444 },
544 .dev_attr = &capability_alwon_dev_attr, 445 .dev_attr = &capability_alwon_dev_attr,
545 .slaves = omap2430_timer5_slaves,
546 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
547 .class = &omap2xxx_timer_hwmod_class, 446 .class = &omap2xxx_timer_hwmod_class,
548}; 447};
549 448
@@ -559,11 +458,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
559 .user = OCP_USER_MPU | OCP_USER_SDMA, 458 .user = OCP_USER_MPU | OCP_USER_SDMA,
560}; 459};
561 460
562/* timer6 slave port */
563static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
564 &omap2430_l4_core__timer6,
565};
566
567/* timer6 hwmod */ 461/* timer6 hwmod */
568static struct omap_hwmod omap2430_timer6_hwmod = { 462static struct omap_hwmod omap2430_timer6_hwmod = {
569 .name = "timer6", 463 .name = "timer6",
@@ -579,8 +473,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
579 }, 473 },
580 }, 474 },
581 .dev_attr = &capability_alwon_dev_attr, 475 .dev_attr = &capability_alwon_dev_attr,
582 .slaves = omap2430_timer6_slaves,
583 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
584 .class = &omap2xxx_timer_hwmod_class, 476 .class = &omap2xxx_timer_hwmod_class,
585}; 477};
586 478
@@ -596,11 +488,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
596 .user = OCP_USER_MPU | OCP_USER_SDMA, 488 .user = OCP_USER_MPU | OCP_USER_SDMA,
597}; 489};
598 490
599/* timer7 slave port */
600static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
601 &omap2430_l4_core__timer7,
602};
603
604/* timer7 hwmod */ 491/* timer7 hwmod */
605static struct omap_hwmod omap2430_timer7_hwmod = { 492static struct omap_hwmod omap2430_timer7_hwmod = {
606 .name = "timer7", 493 .name = "timer7",
@@ -616,8 +503,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
616 }, 503 },
617 }, 504 },
618 .dev_attr = &capability_alwon_dev_attr, 505 .dev_attr = &capability_alwon_dev_attr,
619 .slaves = omap2430_timer7_slaves,
620 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
621 .class = &omap2xxx_timer_hwmod_class, 506 .class = &omap2xxx_timer_hwmod_class,
622}; 507};
623 508
@@ -633,11 +518,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
633 .user = OCP_USER_MPU | OCP_USER_SDMA, 518 .user = OCP_USER_MPU | OCP_USER_SDMA,
634}; 519};
635 520
636/* timer8 slave port */
637static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
638 &omap2430_l4_core__timer8,
639};
640
641/* timer8 hwmod */ 521/* timer8 hwmod */
642static struct omap_hwmod omap2430_timer8_hwmod = { 522static struct omap_hwmod omap2430_timer8_hwmod = {
643 .name = "timer8", 523 .name = "timer8",
@@ -653,8 +533,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
653 }, 533 },
654 }, 534 },
655 .dev_attr = &capability_alwon_dev_attr, 535 .dev_attr = &capability_alwon_dev_attr,
656 .slaves = omap2430_timer8_slaves,
657 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
658 .class = &omap2xxx_timer_hwmod_class, 536 .class = &omap2xxx_timer_hwmod_class,
659}; 537};
660 538
@@ -670,11 +548,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
670 .user = OCP_USER_MPU | OCP_USER_SDMA, 548 .user = OCP_USER_MPU | OCP_USER_SDMA,
671}; 549};
672 550
673/* timer9 slave port */
674static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
675 &omap2430_l4_core__timer9,
676};
677
678/* timer9 hwmod */ 551/* timer9 hwmod */
679static struct omap_hwmod omap2430_timer9_hwmod = { 552static struct omap_hwmod omap2430_timer9_hwmod = {
680 .name = "timer9", 553 .name = "timer9",
@@ -690,8 +563,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
690 }, 563 },
691 }, 564 },
692 .dev_attr = &capability_pwm_dev_attr, 565 .dev_attr = &capability_pwm_dev_attr,
693 .slaves = omap2430_timer9_slaves,
694 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
695 .class = &omap2xxx_timer_hwmod_class, 566 .class = &omap2xxx_timer_hwmod_class,
696}; 567};
697 568
@@ -707,11 +578,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
707 .user = OCP_USER_MPU | OCP_USER_SDMA, 578 .user = OCP_USER_MPU | OCP_USER_SDMA,
708}; 579};
709 580
710/* timer10 slave port */
711static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
712 &omap2430_l4_core__timer10,
713};
714
715/* timer10 hwmod */ 581/* timer10 hwmod */
716static struct omap_hwmod omap2430_timer10_hwmod = { 582static struct omap_hwmod omap2430_timer10_hwmod = {
717 .name = "timer10", 583 .name = "timer10",
@@ -727,8 +593,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
727 }, 593 },
728 }, 594 },
729 .dev_attr = &capability_pwm_dev_attr, 595 .dev_attr = &capability_pwm_dev_attr,
730 .slaves = omap2430_timer10_slaves,
731 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
732 .class = &omap2xxx_timer_hwmod_class, 596 .class = &omap2xxx_timer_hwmod_class,
733}; 597};
734 598
@@ -744,11 +608,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
744 .user = OCP_USER_MPU | OCP_USER_SDMA, 608 .user = OCP_USER_MPU | OCP_USER_SDMA,
745}; 609};
746 610
747/* timer11 slave port */
748static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
749 &omap2430_l4_core__timer11,
750};
751
752/* timer11 hwmod */ 611/* timer11 hwmod */
753static struct omap_hwmod omap2430_timer11_hwmod = { 612static struct omap_hwmod omap2430_timer11_hwmod = {
754 .name = "timer11", 613 .name = "timer11",
@@ -764,8 +623,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
764 }, 623 },
765 }, 624 },
766 .dev_attr = &capability_pwm_dev_attr, 625 .dev_attr = &capability_pwm_dev_attr,
767 .slaves = omap2430_timer11_slaves,
768 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
769 .class = &omap2xxx_timer_hwmod_class, 626 .class = &omap2xxx_timer_hwmod_class,
770}; 627};
771 628
@@ -781,11 +638,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
781 .user = OCP_USER_MPU | OCP_USER_SDMA, 638 .user = OCP_USER_MPU | OCP_USER_SDMA,
782}; 639};
783 640
784/* timer12 slave port */
785static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
786 &omap2430_l4_core__timer12,
787};
788
789/* timer12 hwmod */ 641/* timer12 hwmod */
790static struct omap_hwmod omap2430_timer12_hwmod = { 642static struct omap_hwmod omap2430_timer12_hwmod = {
791 .name = "timer12", 643 .name = "timer12",
@@ -801,8 +653,6 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
801 }, 653 },
802 }, 654 },
803 .dev_attr = &capability_pwm_dev_attr, 655 .dev_attr = &capability_pwm_dev_attr,
804 .slaves = omap2430_timer12_slaves,
805 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
806 .class = &omap2xxx_timer_hwmod_class, 656 .class = &omap2xxx_timer_hwmod_class,
807}; 657};
808 658
@@ -824,11 +674,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
824 .user = OCP_USER_MPU | OCP_USER_SDMA, 674 .user = OCP_USER_MPU | OCP_USER_SDMA,
825}; 675};
826 676
827/* wd_timer2 */
828static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
829 &omap2430_l4_wkup__wd_timer2,
830};
831
832static struct omap_hwmod omap2430_wd_timer2_hwmod = { 677static struct omap_hwmod omap2430_wd_timer2_hwmod = {
833 .name = "wd_timer2", 678 .name = "wd_timer2",
834 .class = &omap2xxx_wd_timer_hwmod_class, 679 .class = &omap2xxx_wd_timer_hwmod_class,
@@ -842,16 +687,9 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
842 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 687 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
843 }, 688 },
844 }, 689 },
845 .slaves = omap2430_wd_timer2_slaves,
846 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
847}; 690};
848 691
849/* UART1 */ 692/* UART1 */
850
851static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
852 &omap2_l4_core__uart1,
853};
854
855static struct omap_hwmod omap2430_uart1_hwmod = { 693static struct omap_hwmod omap2430_uart1_hwmod = {
856 .name = "uart1", 694 .name = "uart1",
857 .mpu_irqs = omap2_uart1_mpu_irqs, 695 .mpu_irqs = omap2_uart1_mpu_irqs,
@@ -866,17 +704,10 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
866 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 704 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
867 }, 705 },
868 }, 706 },
869 .slaves = omap2430_uart1_slaves,
870 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
871 .class = &omap2_uart_class, 707 .class = &omap2_uart_class,
872}; 708};
873 709
874/* UART2 */ 710/* UART2 */
875
876static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
877 &omap2_l4_core__uart2,
878};
879
880static struct omap_hwmod omap2430_uart2_hwmod = { 711static struct omap_hwmod omap2430_uart2_hwmod = {
881 .name = "uart2", 712 .name = "uart2",
882 .mpu_irqs = omap2_uart2_mpu_irqs, 713 .mpu_irqs = omap2_uart2_mpu_irqs,
@@ -891,17 +722,11 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
891 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 722 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
892 }, 723 },
893 }, 724 },
894 .slaves = omap2430_uart2_slaves,
895 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
896 .class = &omap2_uart_class, 725 .class = &omap2_uart_class,
897}; 726};
898 727
899/* UART3 */ 728/* UART3 */
900 729
901static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
902 &omap2_l4_core__uart3,
903};
904
905static struct omap_hwmod omap2430_uart3_hwmod = { 730static struct omap_hwmod omap2430_uart3_hwmod = {
906 .name = "uart3", 731 .name = "uart3",
907 .mpu_irqs = omap2_uart3_mpu_irqs, 732 .mpu_irqs = omap2_uart3_mpu_irqs,
@@ -916,16 +741,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
916 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 741 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
917 }, 742 },
918 }, 743 },
919 .slaves = omap2430_uart3_slaves,
920 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
921 .class = &omap2_uart_class, 744 .class = &omap2_uart_class,
922}; 745};
923 746
924/* dss */ 747/* dss */
925/* dss master ports */
926static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
927 &omap2430_dss__l3,
928};
929 748
930/* l4_core -> dss */ 749/* l4_core -> dss */
931static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { 750static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
@@ -936,11 +755,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
936 .user = OCP_USER_MPU | OCP_USER_SDMA, 755 .user = OCP_USER_MPU | OCP_USER_SDMA,
937}; 756};
938 757
939/* dss slave ports */
940static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
941 &omap2430_l4_core__dss,
942};
943
944static struct omap_hwmod_opt_clk dss_opt_clks[] = { 758static struct omap_hwmod_opt_clk dss_opt_clks[] = {
945 /* 759 /*
946 * The DSS HW needs all DSS clocks enabled during reset. The dss_core 760 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
@@ -966,10 +780,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
966 }, 780 },
967 .opt_clks = dss_opt_clks, 781 .opt_clks = dss_opt_clks,
968 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 782 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
969 .slaves = omap2430_dss_slaves,
970 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
971 .masters = omap2430_dss_masters,
972 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
973 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET, 783 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
974}; 784};
975 785
@@ -982,11 +792,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
982 .user = OCP_USER_MPU | OCP_USER_SDMA, 792 .user = OCP_USER_MPU | OCP_USER_SDMA,
983}; 793};
984 794
985/* dss_dispc slave ports */
986static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
987 &omap2430_l4_core__dss_dispc,
988};
989
990static struct omap_hwmod omap2430_dss_dispc_hwmod = { 795static struct omap_hwmod omap2430_dss_dispc_hwmod = {
991 .name = "dss_dispc", 796 .name = "dss_dispc",
992 .class = &omap2_dispc_hwmod_class, 797 .class = &omap2_dispc_hwmod_class,
@@ -1001,8 +806,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1001 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, 806 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
1002 }, 807 },
1003 }, 808 },
1004 .slaves = omap2430_dss_dispc_slaves,
1005 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1006 .flags = HWMOD_NO_IDLEST, 809 .flags = HWMOD_NO_IDLEST,
1007 .dev_attr = &omap2_3_dss_dispc_dev_attr 810 .dev_attr = &omap2_3_dss_dispc_dev_attr
1008}; 811};
@@ -1016,11 +819,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1016 .user = OCP_USER_MPU | OCP_USER_SDMA, 819 .user = OCP_USER_MPU | OCP_USER_SDMA,
1017}; 820};
1018 821
1019/* dss_rfbi slave ports */
1020static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1021 &omap2430_l4_core__dss_rfbi,
1022};
1023
1024static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { 822static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1025 { .role = "ick", .clk = "dss_ick" }, 823 { .role = "ick", .clk = "dss_ick" },
1026}; 824};
@@ -1038,8 +836,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1038 }, 836 },
1039 .opt_clks = dss_rfbi_opt_clks, 837 .opt_clks = dss_rfbi_opt_clks,
1040 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), 838 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1041 .slaves = omap2430_dss_rfbi_slaves,
1042 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1043 .flags = HWMOD_NO_IDLEST, 839 .flags = HWMOD_NO_IDLEST,
1044}; 840};
1045 841
@@ -1052,11 +848,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1052 .user = OCP_USER_MPU | OCP_USER_SDMA, 848 .user = OCP_USER_MPU | OCP_USER_SDMA,
1053}; 849};
1054 850
1055/* dss_venc slave ports */
1056static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1057 &omap2430_l4_core__dss_venc,
1058};
1059
1060static struct omap_hwmod omap2430_dss_venc_hwmod = { 851static struct omap_hwmod omap2430_dss_venc_hwmod = {
1061 .name = "dss_venc", 852 .name = "dss_venc",
1062 .class = &omap2_venc_hwmod_class, 853 .class = &omap2_venc_hwmod_class,
@@ -1068,8 +859,6 @@ static struct omap_hwmod omap2430_dss_venc_hwmod = {
1068 .module_offs = CORE_MOD, 859 .module_offs = CORE_MOD,
1069 }, 860 },
1070 }, 861 },
1071 .slaves = omap2430_dss_venc_slaves,
1072 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
1073 .flags = HWMOD_NO_IDLEST, 862 .flags = HWMOD_NO_IDLEST,
1074}; 863};
1075 864
@@ -1098,11 +887,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
1098}; 887};
1099 888
1100/* I2C1 */ 889/* I2C1 */
1101
1102static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
1103 &omap2430_l4_core__i2c1,
1104};
1105
1106static struct omap_hwmod omap2430_i2c1_hwmod = { 890static struct omap_hwmod omap2430_i2c1_hwmod = {
1107 .name = "i2c1", 891 .name = "i2c1",
1108 .flags = HWMOD_16BIT_REG, 892 .flags = HWMOD_16BIT_REG,
@@ -1126,18 +910,11 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1126 .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 910 .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
1127 }, 911 },
1128 }, 912 },
1129 .slaves = omap2430_i2c1_slaves,
1130 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
1131 .class = &i2c_class, 913 .class = &i2c_class,
1132 .dev_attr = &i2c_dev_attr, 914 .dev_attr = &i2c_dev_attr,
1133}; 915};
1134 916
1135/* I2C2 */ 917/* I2C2 */
1136
1137static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
1138 &omap2430_l4_core__i2c2,
1139};
1140
1141static struct omap_hwmod omap2430_i2c2_hwmod = { 918static struct omap_hwmod omap2430_i2c2_hwmod = {
1142 .name = "i2c2", 919 .name = "i2c2",
1143 .flags = HWMOD_16BIT_REG, 920 .flags = HWMOD_16BIT_REG,
@@ -1153,8 +930,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
1153 .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 930 .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
1154 }, 931 },
1155 }, 932 },
1156 .slaves = omap2430_i2c2_slaves,
1157 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
1158 .class = &i2c_class, 933 .class = &i2c_class,
1159 .dev_attr = &i2c_dev_attr, 934 .dev_attr = &i2c_dev_attr,
1160}; 935};
@@ -1256,10 +1031,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1256}; 1031};
1257 1032
1258/* gpio1 */ 1033/* gpio1 */
1259static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
1260 &omap2430_l4_wkup__gpio1,
1261};
1262
1263static struct omap_hwmod omap2430_gpio1_hwmod = { 1034static struct omap_hwmod omap2430_gpio1_hwmod = {
1264 .name = "gpio1", 1035 .name = "gpio1",
1265 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1036 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1274,17 +1045,11 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
1274 .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT, 1045 .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT,
1275 }, 1046 },
1276 }, 1047 },
1277 .slaves = omap2430_gpio1_slaves,
1278 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1279 .class = &omap2xxx_gpio_hwmod_class, 1048 .class = &omap2xxx_gpio_hwmod_class,
1280 .dev_attr = &gpio_dev_attr, 1049 .dev_attr = &gpio_dev_attr,
1281}; 1050};
1282 1051
1283/* gpio2 */ 1052/* gpio2 */
1284static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
1285 &omap2430_l4_wkup__gpio2,
1286};
1287
1288static struct omap_hwmod omap2430_gpio2_hwmod = { 1053static struct omap_hwmod omap2430_gpio2_hwmod = {
1289 .name = "gpio2", 1054 .name = "gpio2",
1290 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1055 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1299,17 +1064,11 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
1299 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1064 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1300 }, 1065 },
1301 }, 1066 },
1302 .slaves = omap2430_gpio2_slaves,
1303 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1304 .class = &omap2xxx_gpio_hwmod_class, 1067 .class = &omap2xxx_gpio_hwmod_class,
1305 .dev_attr = &gpio_dev_attr, 1068 .dev_attr = &gpio_dev_attr,
1306}; 1069};
1307 1070
1308/* gpio3 */ 1071/* gpio3 */
1309static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
1310 &omap2430_l4_wkup__gpio3,
1311};
1312
1313static struct omap_hwmod omap2430_gpio3_hwmod = { 1072static struct omap_hwmod omap2430_gpio3_hwmod = {
1314 .name = "gpio3", 1073 .name = "gpio3",
1315 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1074 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1324,17 +1083,11 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
1324 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1083 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1325 }, 1084 },
1326 }, 1085 },
1327 .slaves = omap2430_gpio3_slaves,
1328 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1329 .class = &omap2xxx_gpio_hwmod_class, 1086 .class = &omap2xxx_gpio_hwmod_class,
1330 .dev_attr = &gpio_dev_attr, 1087 .dev_attr = &gpio_dev_attr,
1331}; 1088};
1332 1089
1333/* gpio4 */ 1090/* gpio4 */
1334static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
1335 &omap2430_l4_wkup__gpio4,
1336};
1337
1338static struct omap_hwmod omap2430_gpio4_hwmod = { 1091static struct omap_hwmod omap2430_gpio4_hwmod = {
1339 .name = "gpio4", 1092 .name = "gpio4",
1340 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1093 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1349,8 +1102,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
1349 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1102 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1350 }, 1103 },
1351 }, 1104 },
1352 .slaves = omap2430_gpio4_slaves,
1353 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1354 .class = &omap2xxx_gpio_hwmod_class, 1105 .class = &omap2xxx_gpio_hwmod_class,
1355 .dev_attr = &gpio_dev_attr, 1106 .dev_attr = &gpio_dev_attr,
1356}; 1107};
@@ -1361,10 +1112,6 @@ static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
1361 { .irq = -1 } 1112 { .irq = -1 }
1362}; 1113};
1363 1114
1364static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
1365 &omap2430_l4_core__gpio5,
1366};
1367
1368static struct omap_hwmod omap2430_gpio5_hwmod = { 1115static struct omap_hwmod omap2430_gpio5_hwmod = {
1369 .name = "gpio5", 1116 .name = "gpio5",
1370 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1117 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1379,8 +1126,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
1379 .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 1126 .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
1380 }, 1127 },
1381 }, 1128 },
1382 .slaves = omap2430_gpio5_slaves,
1383 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1384 .class = &omap2xxx_gpio_hwmod_class, 1129 .class = &omap2xxx_gpio_hwmod_class,
1385 .dev_attr = &gpio_dev_attr, 1130 .dev_attr = &gpio_dev_attr,
1386}; 1131};
@@ -1400,11 +1145,6 @@ static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1400 .user = OCP_USER_MPU | OCP_USER_SDMA, 1145 .user = OCP_USER_MPU | OCP_USER_SDMA,
1401}; 1146};
1402 1147
1403/* dma_system master ports */
1404static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
1405 &omap2430_dma_system__l3,
1406};
1407
1408/* l4_core -> dma_system */ 1148/* l4_core -> dma_system */
1409static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 1149static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1410 .master = &omap2430_l4_core_hwmod, 1150 .master = &omap2430_l4_core_hwmod,
@@ -1414,20 +1154,11 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1414 .user = OCP_USER_MPU | OCP_USER_SDMA, 1154 .user = OCP_USER_MPU | OCP_USER_SDMA,
1415}; 1155};
1416 1156
1417/* dma_system slave ports */
1418static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1419 &omap2430_l4_core__dma_system,
1420};
1421
1422static struct omap_hwmod omap2430_dma_system_hwmod = { 1157static struct omap_hwmod omap2430_dma_system_hwmod = {
1423 .name = "dma", 1158 .name = "dma",
1424 .class = &omap2xxx_dma_hwmod_class, 1159 .class = &omap2xxx_dma_hwmod_class,
1425 .mpu_irqs = omap2_dma_system_irqs, 1160 .mpu_irqs = omap2_dma_system_irqs,
1426 .main_clk = "core_l3_ck", 1161 .main_clk = "core_l3_ck",
1427 .slaves = omap2430_dma_system_slaves,
1428 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
1429 .masters = omap2430_dma_system_masters,
1430 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
1431 .dev_attr = &dma_dev_attr, 1162 .dev_attr = &dma_dev_attr,
1432 .flags = HWMOD_NO_IDLEST, 1163 .flags = HWMOD_NO_IDLEST,
1433}; 1164};
@@ -1447,11 +1178,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
1447 .user = OCP_USER_MPU | OCP_USER_SDMA, 1178 .user = OCP_USER_MPU | OCP_USER_SDMA,
1448}; 1179};
1449 1180
1450/* mailbox slave ports */
1451static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1452 &omap2430_l4_core__mailbox,
1453};
1454
1455static struct omap_hwmod omap2430_mailbox_hwmod = { 1181static struct omap_hwmod omap2430_mailbox_hwmod = {
1456 .name = "mailbox", 1182 .name = "mailbox",
1457 .class = &omap2xxx_mailbox_hwmod_class, 1183 .class = &omap2xxx_mailbox_hwmod_class,
@@ -1466,15 +1192,9 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
1466 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 1192 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
1467 }, 1193 },
1468 }, 1194 },
1469 .slaves = omap2430_mailbox_slaves,
1470 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves),
1471}; 1195};
1472 1196
1473/* mcspi1 */ 1197/* mcspi1 */
1474static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1475 &omap2430_l4_core__mcspi1,
1476};
1477
1478static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { 1198static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1479 .num_chipselect = 4, 1199 .num_chipselect = 4,
1480}; 1200};
@@ -1493,17 +1213,11 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1493 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, 1213 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1494 }, 1214 },
1495 }, 1215 },
1496 .slaves = omap2430_mcspi1_slaves,
1497 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1498 .class = &omap2xxx_mcspi_class, 1216 .class = &omap2xxx_mcspi_class,
1499 .dev_attr = &omap_mcspi1_dev_attr, 1217 .dev_attr = &omap_mcspi1_dev_attr,
1500}; 1218};
1501 1219
1502/* mcspi2 */ 1220/* mcspi2 */
1503static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
1504 &omap2430_l4_core__mcspi2,
1505};
1506
1507static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { 1221static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1508 .num_chipselect = 2, 1222 .num_chipselect = 2,
1509}; 1223};
@@ -1522,8 +1236,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1522 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, 1236 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1523 }, 1237 },
1524 }, 1238 },
1525 .slaves = omap2430_mcspi2_slaves,
1526 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1527 .class = &omap2xxx_mcspi_class, 1239 .class = &omap2xxx_mcspi_class,
1528 .dev_attr = &omap_mcspi2_dev_attr, 1240 .dev_attr = &omap_mcspi2_dev_attr,
1529}; 1241};
@@ -1542,10 +1254,6 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1542 { .dma_req = -1 } 1254 { .dma_req = -1 }
1543}; 1255};
1544 1256
1545static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
1546 &omap2430_l4_core__mcspi3,
1547};
1548
1549static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 1257static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1550 .num_chipselect = 2, 1258 .num_chipselect = 2,
1551}; 1259};
@@ -1564,8 +1272,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
1564 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 1272 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
1565 }, 1273 },
1566 }, 1274 },
1567 .slaves = omap2430_mcspi3_slaves,
1568 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1569 .class = &omap2xxx_mcspi_class, 1275 .class = &omap2xxx_mcspi_class,
1570 .dev_attr = &omap_mcspi3_dev_attr, 1276 .dev_attr = &omap_mcspi3_dev_attr,
1571}; 1277};
@@ -1611,10 +1317,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1611 .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 1317 .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
1612 }, 1318 },
1613 }, 1319 },
1614 .masters = omap2430_usbhsotg_masters,
1615 .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters),
1616 .slaves = omap2430_usbhsotg_slaves,
1617 .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves),
1618 .class = &usbotg_class, 1320 .class = &usbotg_class,
1619 /* 1321 /*
1620 * Erratum ID: i479 idle_req / idle_ack mechanism potentially 1322 * Erratum ID: i479 idle_req / idle_ack mechanism potentially
@@ -1661,11 +1363,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
1661 .user = OCP_USER_MPU | OCP_USER_SDMA, 1363 .user = OCP_USER_MPU | OCP_USER_SDMA,
1662}; 1364};
1663 1365
1664/* mcbsp1 slave ports */
1665static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {
1666 &omap2430_l4_core__mcbsp1,
1667};
1668
1669static struct omap_hwmod omap2430_mcbsp1_hwmod = { 1366static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1670 .name = "mcbsp1", 1367 .name = "mcbsp1",
1671 .class = &omap2430_mcbsp_hwmod_class, 1368 .class = &omap2430_mcbsp_hwmod_class,
@@ -1681,8 +1378,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1681 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 1378 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
1682 }, 1379 },
1683 }, 1380 },
1684 .slaves = omap2430_mcbsp1_slaves,
1685 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
1686}; 1381};
1687 1382
1688/* mcbsp2 */ 1383/* mcbsp2 */
@@ -1702,11 +1397,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
1702 .user = OCP_USER_MPU | OCP_USER_SDMA, 1397 .user = OCP_USER_MPU | OCP_USER_SDMA,
1703}; 1398};
1704 1399
1705/* mcbsp2 slave ports */
1706static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {
1707 &omap2430_l4_core__mcbsp2,
1708};
1709
1710static struct omap_hwmod omap2430_mcbsp2_hwmod = { 1400static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1711 .name = "mcbsp2", 1401 .name = "mcbsp2",
1712 .class = &omap2430_mcbsp_hwmod_class, 1402 .class = &omap2430_mcbsp_hwmod_class,
@@ -1722,8 +1412,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1722 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 1412 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
1723 }, 1413 },
1724 }, 1414 },
1725 .slaves = omap2430_mcbsp2_slaves,
1726 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
1727}; 1415};
1728 1416
1729/* mcbsp3 */ 1417/* mcbsp3 */
@@ -1753,11 +1441,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
1753 .user = OCP_USER_MPU | OCP_USER_SDMA, 1441 .user = OCP_USER_MPU | OCP_USER_SDMA,
1754}; 1442};
1755 1443
1756/* mcbsp3 slave ports */
1757static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {
1758 &omap2430_l4_core__mcbsp3,
1759};
1760
1761static struct omap_hwmod omap2430_mcbsp3_hwmod = { 1444static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1762 .name = "mcbsp3", 1445 .name = "mcbsp3",
1763 .class = &omap2430_mcbsp_hwmod_class, 1446 .class = &omap2430_mcbsp_hwmod_class,
@@ -1773,8 +1456,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1773 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 1456 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
1774 }, 1457 },
1775 }, 1458 },
1776 .slaves = omap2430_mcbsp3_slaves,
1777 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
1778}; 1459};
1779 1460
1780/* mcbsp4 */ 1461/* mcbsp4 */
@@ -1810,11 +1491,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
1810 .user = OCP_USER_MPU | OCP_USER_SDMA, 1491 .user = OCP_USER_MPU | OCP_USER_SDMA,
1811}; 1492};
1812 1493
1813/* mcbsp4 slave ports */
1814static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {
1815 &omap2430_l4_core__mcbsp4,
1816};
1817
1818static struct omap_hwmod omap2430_mcbsp4_hwmod = { 1494static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1819 .name = "mcbsp4", 1495 .name = "mcbsp4",
1820 .class = &omap2430_mcbsp_hwmod_class, 1496 .class = &omap2430_mcbsp_hwmod_class,
@@ -1830,8 +1506,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1830 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 1506 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
1831 }, 1507 },
1832 }, 1508 },
1833 .slaves = omap2430_mcbsp4_slaves,
1834 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
1835}; 1509};
1836 1510
1837/* mcbsp5 */ 1511/* mcbsp5 */
@@ -1867,11 +1541,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
1867 .user = OCP_USER_MPU | OCP_USER_SDMA, 1541 .user = OCP_USER_MPU | OCP_USER_SDMA,
1868}; 1542};
1869 1543
1870/* mcbsp5 slave ports */
1871static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {
1872 &omap2430_l4_core__mcbsp5,
1873};
1874
1875static struct omap_hwmod omap2430_mcbsp5_hwmod = { 1544static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1876 .name = "mcbsp5", 1545 .name = "mcbsp5",
1877 .class = &omap2430_mcbsp_hwmod_class, 1546 .class = &omap2430_mcbsp_hwmod_class,
@@ -1887,8 +1556,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1887 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 1556 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
1888 }, 1557 },
1889 }, 1558 },
1890 .slaves = omap2430_mcbsp5_slaves,
1891 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
1892}; 1559};
1893 1560
1894/* MMC/SD/SDIO common */ 1561/* MMC/SD/SDIO common */
@@ -1926,10 +1593,6 @@ static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
1926 { .role = "dbck", .clk = "mmchsdb1_fck" }, 1593 { .role = "dbck", .clk = "mmchsdb1_fck" },
1927}; 1594};
1928 1595
1929static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
1930 &omap2430_l4_core__mmc1,
1931};
1932
1933static struct omap_mmc_dev_attr mmc1_dev_attr = { 1596static struct omap_mmc_dev_attr mmc1_dev_attr = {
1934 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 1597 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1935}; 1598};
@@ -1952,8 +1615,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
1952 }, 1615 },
1953 }, 1616 },
1954 .dev_attr = &mmc1_dev_attr, 1617 .dev_attr = &mmc1_dev_attr,
1955 .slaves = omap2430_mmc1_slaves,
1956 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
1957 .class = &omap2430_mmc_class, 1618 .class = &omap2430_mmc_class,
1958}; 1619};
1959 1620
@@ -1974,10 +1635,6 @@ static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
1974 { .role = "dbck", .clk = "mmchsdb2_fck" }, 1635 { .role = "dbck", .clk = "mmchsdb2_fck" },
1975}; 1636};
1976 1637
1977static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
1978 &omap2430_l4_core__mmc2,
1979};
1980
1981static struct omap_hwmod omap2430_mmc2_hwmod = { 1638static struct omap_hwmod omap2430_mmc2_hwmod = {
1982 .name = "mmc2", 1639 .name = "mmc2",
1983 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1640 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -1995,78 +1652,61 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
1995 .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 1652 .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
1996 }, 1653 },
1997 }, 1654 },
1998 .slaves = omap2430_mmc2_slaves,
1999 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
2000 .class = &omap2430_mmc_class, 1655 .class = &omap2430_mmc_class,
2001}; 1656};
2002 1657
2003static __initdata struct omap_hwmod *omap2430_hwmods[] = { 1658static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
2004 &omap2430_l3_main_hwmod, 1659 &omap2430_l3_main__l4_core,
2005 &omap2430_l4_core_hwmod, 1660 &omap2430_mpu__l3_main,
2006 &omap2430_l4_wkup_hwmod, 1661 &omap2430_dss__l3,
2007 &omap2430_mpu_hwmod, 1662 &omap2430_usbhsotg__l3,
2008 &omap2430_iva_hwmod, 1663 &omap2430_l4_core__i2c1,
2009 1664 &omap2430_l4_core__i2c2,
2010 &omap2430_timer1_hwmod, 1665 &omap2430_l4_core__l4_wkup,
2011 &omap2430_timer2_hwmod, 1666 &omap2_l4_core__uart1,
2012 &omap2430_timer3_hwmod, 1667 &omap2_l4_core__uart2,
2013 &omap2430_timer4_hwmod, 1668 &omap2_l4_core__uart3,
2014 &omap2430_timer5_hwmod, 1669 &omap2430_l4_core__usbhsotg,
2015 &omap2430_timer6_hwmod, 1670 &omap2430_l4_core__mmc1,
2016 &omap2430_timer7_hwmod, 1671 &omap2430_l4_core__mmc2,
2017 &omap2430_timer8_hwmod, 1672 &omap2430_l4_core__mcspi1,
2018 &omap2430_timer9_hwmod, 1673 &omap2430_l4_core__mcspi2,
2019 &omap2430_timer10_hwmod, 1674 &omap2430_l4_core__mcspi3,
2020 &omap2430_timer11_hwmod, 1675 &omap2430_l3__iva,
2021 &omap2430_timer12_hwmod, 1676 &omap2430_l4_wkup__timer1,
2022 1677 &omap2430_l4_core__timer2,
2023 &omap2430_wd_timer2_hwmod, 1678 &omap2430_l4_core__timer3,
2024 &omap2430_uart1_hwmod, 1679 &omap2430_l4_core__timer4,
2025 &omap2430_uart2_hwmod, 1680 &omap2430_l4_core__timer5,
2026 &omap2430_uart3_hwmod, 1681 &omap2430_l4_core__timer6,
2027 /* dss class */ 1682 &omap2430_l4_core__timer7,
2028 &omap2430_dss_core_hwmod, 1683 &omap2430_l4_core__timer8,
2029 &omap2430_dss_dispc_hwmod, 1684 &omap2430_l4_core__timer9,
2030 &omap2430_dss_rfbi_hwmod, 1685 &omap2430_l4_core__timer10,
2031 &omap2430_dss_venc_hwmod, 1686 &omap2430_l4_core__timer11,
2032 /* i2c class */ 1687 &omap2430_l4_core__timer12,
2033 &omap2430_i2c1_hwmod, 1688 &omap2430_l4_wkup__wd_timer2,
2034 &omap2430_i2c2_hwmod, 1689 &omap2430_l4_core__dss,
2035 &omap2430_mmc1_hwmod, 1690 &omap2430_l4_core__dss_dispc,
2036 &omap2430_mmc2_hwmod, 1691 &omap2430_l4_core__dss_rfbi,
2037 1692 &omap2430_l4_core__dss_venc,
2038 /* gpio class */ 1693 &omap2430_l4_wkup__gpio1,
2039 &omap2430_gpio1_hwmod, 1694 &omap2430_l4_wkup__gpio2,
2040 &omap2430_gpio2_hwmod, 1695 &omap2430_l4_wkup__gpio3,
2041 &omap2430_gpio3_hwmod, 1696 &omap2430_l4_wkup__gpio4,
2042 &omap2430_gpio4_hwmod, 1697 &omap2430_l4_core__gpio5,
2043 &omap2430_gpio5_hwmod, 1698 &omap2430_dma_system__l3,
2044 1699 &omap2430_l4_core__dma_system,
2045 /* dma_system class*/ 1700 &omap2430_l4_core__mailbox,
2046 &omap2430_dma_system_hwmod, 1701 &omap2430_l4_core__mcbsp1,
2047 1702 &omap2430_l4_core__mcbsp2,
2048 /* mcbsp class */ 1703 &omap2430_l4_core__mcbsp3,
2049 &omap2430_mcbsp1_hwmod, 1704 &omap2430_l4_core__mcbsp4,
2050 &omap2430_mcbsp2_hwmod, 1705 &omap2430_l4_core__mcbsp5,
2051 &omap2430_mcbsp3_hwmod,
2052 &omap2430_mcbsp4_hwmod,
2053 &omap2430_mcbsp5_hwmod,
2054
2055 /* mailbox class */
2056 &omap2430_mailbox_hwmod,
2057
2058 /* mcspi class */
2059 &omap2430_mcspi1_hwmod,
2060 &omap2430_mcspi2_hwmod,
2061 &omap2430_mcspi3_hwmod,
2062
2063 /* usbotg class*/
2064 &omap2430_usbhsotg_hwmod,
2065
2066 NULL, 1706 NULL,
2067}; 1707};
2068 1708
2069int __init omap2430_hwmod_init(void) 1709int __init omap2430_hwmod_init(void)
2070{ 1710{
2071 return omap_hwmod_register(omap2430_hwmods); 1711 return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);
2072} 1712}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c36d41fbae51..a3eeff733682 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2,6 +2,7 @@
2 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips 2 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
3 * 3 *
4 * Copyright (C) 2009-2011 Nokia Corporation 4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley 6 * Paul Walmsley
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -128,11 +129,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {
128 .user = OCP_USER_MPU, 129 .user = OCP_USER_MPU,
129}; 130};
130 131
131/* Slave interfaces on the L3 interconnect */
132static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = {
133 &omap3xxx_mpu__l3_main,
134};
135
136/* DSS -> l3 */ 132/* DSS -> l3 */
137static struct omap_hwmod_ocp_if omap3430es1_dss__l3 = { 133static struct omap_hwmod_ocp_if omap3430es1_dss__l3 = {
138 .master = &omap3430es1_dss_core_hwmod, 134 .master = &omap3430es1_dss_core_hwmod,
@@ -152,21 +148,11 @@ static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = {
152 .user = OCP_USER_MPU | OCP_USER_SDMA, 148 .user = OCP_USER_MPU | OCP_USER_SDMA,
153}; 149};
154 150
155/* Master interfaces on the L3 interconnect */
156static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
157 &omap3xxx_l3_main__l4_core,
158 &omap3xxx_l3_main__l4_per,
159};
160
161/* L3 */ 151/* L3 */
162static struct omap_hwmod omap3xxx_l3_main_hwmod = { 152static struct omap_hwmod omap3xxx_l3_main_hwmod = {
163 .name = "l3_main", 153 .name = "l3_main",
164 .class = &l3_hwmod_class, 154 .class = &l3_hwmod_class,
165 .mpu_irqs = omap3xxx_l3_main_irqs, 155 .mpu_irqs = omap3xxx_l3_main_irqs,
166 .masters = omap3xxx_l3_main_masters,
167 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
168 .slaves = omap3xxx_l3_main_slaves,
169 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves),
170 .flags = HWMOD_NO_IDLEST, 156 .flags = HWMOD_NO_IDLEST,
171}; 157};
172 158
@@ -175,7 +161,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod;
175static struct omap_hwmod omap3xxx_uart1_hwmod; 161static struct omap_hwmod omap3xxx_uart1_hwmod;
176static struct omap_hwmod omap3xxx_uart2_hwmod; 162static struct omap_hwmod omap3xxx_uart2_hwmod;
177static struct omap_hwmod omap3xxx_uart3_hwmod; 163static struct omap_hwmod omap3xxx_uart3_hwmod;
178static struct omap_hwmod omap3xxx_uart4_hwmod; 164static struct omap_hwmod omap36xx_uart4_hwmod;
179static struct omap_hwmod am35xx_uart4_hwmod; 165static struct omap_hwmod am35xx_uart4_hwmod;
180static struct omap_hwmod omap3xxx_usbhsotg_hwmod; 166static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
181 167
@@ -313,7 +299,7 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {
313}; 299};
314 300
315/* L4 PER -> UART4 interface */ 301/* L4 PER -> UART4 interface */
316static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { 302static struct omap_hwmod_addr_space omap36xx_uart4_addr_space[] = {
317 { 303 {
318 .pa_start = OMAP3_UART4_BASE, 304 .pa_start = OMAP3_UART4_BASE,
319 .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, 305 .pa_end = OMAP3_UART4_BASE + SZ_1K - 1,
@@ -322,29 +308,29 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = {
322 { } 308 { }
323}; 309};
324 310
325static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { 311static struct omap_hwmod_ocp_if omap36xx_l4_per__uart4 = {
326 .master = &omap3xxx_l4_per_hwmod, 312 .master = &omap3xxx_l4_per_hwmod,
327 .slave = &omap3xxx_uart4_hwmod, 313 .slave = &omap36xx_uart4_hwmod,
328 .clk = "uart4_ick", 314 .clk = "uart4_ick",
329 .addr = omap3xxx_uart4_addr_space, 315 .addr = omap36xx_uart4_addr_space,
330 .user = OCP_USER_MPU | OCP_USER_SDMA, 316 .user = OCP_USER_MPU | OCP_USER_SDMA,
331}; 317};
332 318
333/* AM35xx: L4 CORE -> UART4 interface */ 319/* AM35xx: L4 CORE -> UART4 interface */
334static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = { 320static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {
335 { 321 {
336 .pa_start = OMAP3_UART4_AM35XX_BASE, 322 .pa_start = OMAP3_UART4_AM35XX_BASE,
337 .pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1, 323 .pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,
338 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 324 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
339 }, 325 },
340}; 326};
341 327
342static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = { 328static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {
343 .master = &omap3xxx_l4_core_hwmod, 329 .master = &omap3xxx_l4_core_hwmod,
344 .slave = &am35xx_uart4_hwmod, 330 .slave = &am35xx_uart4_hwmod,
345 .clk = "uart4_ick", 331 .clk = "uart4_ick",
346 .addr = am35xx_uart4_addr_space, 332 .addr = am35xx_uart4_addr_space,
347 .user = OCP_USER_MPU | OCP_USER_SDMA, 333 .user = OCP_USER_MPU | OCP_USER_SDMA,
348}; 334};
349 335
350/* L4 CORE -> I2C1 interface */ 336/* L4 CORE -> I2C1 interface */
@@ -472,14 +458,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {
472 .user = OCP_USER_MPU, 458 .user = OCP_USER_MPU,
473}; 459};
474 460
475static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = {
476 &omap3xxx_usbhsotg__l3,
477};
478
479static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = {
480 &omap3xxx_l4_core__usbhsotg,
481};
482
483static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { 461static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = {
484 { 462 {
485 .pa_start = AM35XX_IPSS_USBOTGSS_BASE, 463 .pa_start = AM35XX_IPSS_USBOTGSS_BASE,
@@ -498,38 +476,17 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = {
498 .user = OCP_USER_MPU, 476 .user = OCP_USER_MPU,
499}; 477};
500 478
501static struct omap_hwmod_ocp_if *am35xx_usbhsotg_masters[] = {
502 &am35xx_usbhsotg__l3,
503};
504
505static struct omap_hwmod_ocp_if *am35xx_usbhsotg_slaves[] = {
506 &am35xx_l4_core__usbhsotg,
507};
508/* Slave interfaces on the L4_CORE interconnect */
509static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
510 &omap3xxx_l3_main__l4_core,
511};
512
513/* L4 CORE */ 479/* L4 CORE */
514static struct omap_hwmod omap3xxx_l4_core_hwmod = { 480static struct omap_hwmod omap3xxx_l4_core_hwmod = {
515 .name = "l4_core", 481 .name = "l4_core",
516 .class = &l4_hwmod_class, 482 .class = &l4_hwmod_class,
517 .slaves = omap3xxx_l4_core_slaves,
518 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves),
519 .flags = HWMOD_NO_IDLEST, 483 .flags = HWMOD_NO_IDLEST,
520}; 484};
521 485
522/* Slave interfaces on the L4_PER interconnect */
523static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = {
524 &omap3xxx_l3_main__l4_per,
525};
526
527/* L4 PER */ 486/* L4 PER */
528static struct omap_hwmod omap3xxx_l4_per_hwmod = { 487static struct omap_hwmod omap3xxx_l4_per_hwmod = {
529 .name = "l4_per", 488 .name = "l4_per",
530 .class = &l4_hwmod_class, 489 .class = &l4_hwmod_class,
531 .slaves = omap3xxx_l4_per_slaves,
532 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves),
533 .flags = HWMOD_NO_IDLEST, 490 .flags = HWMOD_NO_IDLEST,
534}; 491};
535 492
@@ -540,46 +497,25 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__l4_sec = {
540 .user = OCP_USER_MPU | OCP_USER_SDMA, 497 .user = OCP_USER_MPU | OCP_USER_SDMA,
541}; 498};
542 499
543/* Slave interfaces on the L4_WKUP interconnect */
544static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_slaves[] = {
545 &omap3xxx_l4_core__l4_wkup,
546};
547
548/* L4 WKUP */ 500/* L4 WKUP */
549static struct omap_hwmod omap3xxx_l4_wkup_hwmod = { 501static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
550 .name = "l4_wkup", 502 .name = "l4_wkup",
551 .class = &l4_hwmod_class, 503 .class = &l4_hwmod_class,
552 .slaves = omap3xxx_l4_wkup_slaves,
553 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves),
554 .flags = HWMOD_NO_IDLEST, 504 .flags = HWMOD_NO_IDLEST,
555}; 505};
556 506
557/* Slave interfaces on the L4_SEC interconnect */
558static struct omap_hwmod_ocp_if *omap3xxx_l4_sec_slaves[] = {
559 &omap3xxx_l4_wkup__l4_sec,
560};
561
562/* L4 SEC */ 507/* L4 SEC */
563static struct omap_hwmod omap3xxx_l4_sec_hwmod = { 508static struct omap_hwmod omap3xxx_l4_sec_hwmod = {
564 .name = "l4_sec", 509 .name = "l4_sec",
565 .class = &l4_hwmod_class, 510 .class = &l4_hwmod_class,
566 .slaves = omap3xxx_l4_sec_slaves,
567 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_sec_slaves),
568 .flags = HWMOD_NO_IDLEST, 511 .flags = HWMOD_NO_IDLEST,
569}; 512};
570 513
571/* Master interfaces on the MPU device */
572static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = {
573 &omap3xxx_mpu__l3_main,
574};
575
576/* MPU */ 514/* MPU */
577static struct omap_hwmod omap3xxx_mpu_hwmod = { 515static struct omap_hwmod omap3xxx_mpu_hwmod = {
578 .name = "mpu", 516 .name = "mpu",
579 .class = &mpu_hwmod_class, 517 .class = &mpu_hwmod_class,
580 .main_clk = "arm_fck", 518 .main_clk = "arm_fck",
581 .masters = omap3xxx_mpu_masters,
582 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters),
583}; 519};
584 520
585/* 521/*
@@ -594,10 +530,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = {
594 .user = OCP_USER_MPU | OCP_USER_SDMA, 530 .user = OCP_USER_MPU | OCP_USER_SDMA,
595}; 531};
596 532
597static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = {
598 &omap3xxx_l3__iva,
599};
600
601/* 533/*
602 * IVA2 (IVA2) 534 * IVA2 (IVA2)
603 */ 535 */
@@ -605,8 +537,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = {
605static struct omap_hwmod omap3xxx_iva_hwmod = { 537static struct omap_hwmod omap3xxx_iva_hwmod = {
606 .name = "iva", 538 .name = "iva",
607 .class = &iva_hwmod_class, 539 .class = &iva_hwmod_class,
608 .masters = omap3xxx_iva_masters,
609 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters),
610}; 540};
611 541
612/* timer class */ 542/* timer class */
@@ -645,12 +575,12 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
645 575
646/* secure timers dev attribute */ 576/* secure timers dev attribute */
647static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { 577static struct omap_timer_capability_dev_attr capability_secure_dev_attr = {
648 .timer_capability = OMAP_TIMER_SECURE, 578 .timer_capability = OMAP_TIMER_SECURE,
649}; 579};
650 580
651/* always-on timers dev attribute */ 581/* always-on timers dev attribute */
652static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { 582static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
653 .timer_capability = OMAP_TIMER_ALWON, 583 .timer_capability = OMAP_TIMER_ALWON,
654}; 584};
655 585
656/* pwm timers dev attribute */ 586/* pwm timers dev attribute */
@@ -679,11 +609,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {
679 .user = OCP_USER_MPU | OCP_USER_SDMA, 609 .user = OCP_USER_MPU | OCP_USER_SDMA,
680}; 610};
681 611
682/* timer1 slave port */
683static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
684 &omap3xxx_l4_wkup__timer1,
685};
686
687/* timer1 hwmod */ 612/* timer1 hwmod */
688static struct omap_hwmod omap3xxx_timer1_hwmod = { 613static struct omap_hwmod omap3xxx_timer1_hwmod = {
689 .name = "timer1", 614 .name = "timer1",
@@ -699,8 +624,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
699 }, 624 },
700 }, 625 },
701 .dev_attr = &capability_alwon_dev_attr, 626 .dev_attr = &capability_alwon_dev_attr,
702 .slaves = omap3xxx_timer1_slaves,
703 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves),
704 .class = &omap3xxx_timer_1ms_hwmod_class, 627 .class = &omap3xxx_timer_1ms_hwmod_class,
705}; 628};
706 629
@@ -725,11 +648,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {
725 .user = OCP_USER_MPU | OCP_USER_SDMA, 648 .user = OCP_USER_MPU | OCP_USER_SDMA,
726}; 649};
727 650
728/* timer2 slave port */
729static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {
730 &omap3xxx_l4_per__timer2,
731};
732
733/* timer2 hwmod */ 651/* timer2 hwmod */
734static struct omap_hwmod omap3xxx_timer2_hwmod = { 652static struct omap_hwmod omap3xxx_timer2_hwmod = {
735 .name = "timer2", 653 .name = "timer2",
@@ -745,8 +663,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
745 }, 663 },
746 }, 664 },
747 .dev_attr = &capability_alwon_dev_attr, 665 .dev_attr = &capability_alwon_dev_attr,
748 .slaves = omap3xxx_timer2_slaves,
749 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves),
750 .class = &omap3xxx_timer_1ms_hwmod_class, 666 .class = &omap3xxx_timer_1ms_hwmod_class,
751}; 667};
752 668
@@ -771,11 +687,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = {
771 .user = OCP_USER_MPU | OCP_USER_SDMA, 687 .user = OCP_USER_MPU | OCP_USER_SDMA,
772}; 688};
773 689
774/* timer3 slave port */
775static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {
776 &omap3xxx_l4_per__timer3,
777};
778
779/* timer3 hwmod */ 690/* timer3 hwmod */
780static struct omap_hwmod omap3xxx_timer3_hwmod = { 691static struct omap_hwmod omap3xxx_timer3_hwmod = {
781 .name = "timer3", 692 .name = "timer3",
@@ -791,8 +702,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
791 }, 702 },
792 }, 703 },
793 .dev_attr = &capability_alwon_dev_attr, 704 .dev_attr = &capability_alwon_dev_attr,
794 .slaves = omap3xxx_timer3_slaves,
795 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves),
796 .class = &omap3xxx_timer_hwmod_class, 705 .class = &omap3xxx_timer_hwmod_class,
797}; 706};
798 707
@@ -817,11 +726,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = {
817 .user = OCP_USER_MPU | OCP_USER_SDMA, 726 .user = OCP_USER_MPU | OCP_USER_SDMA,
818}; 727};
819 728
820/* timer4 slave port */
821static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {
822 &omap3xxx_l4_per__timer4,
823};
824
825/* timer4 hwmod */ 729/* timer4 hwmod */
826static struct omap_hwmod omap3xxx_timer4_hwmod = { 730static struct omap_hwmod omap3xxx_timer4_hwmod = {
827 .name = "timer4", 731 .name = "timer4",
@@ -837,8 +741,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
837 }, 741 },
838 }, 742 },
839 .dev_attr = &capability_alwon_dev_attr, 743 .dev_attr = &capability_alwon_dev_attr,
840 .slaves = omap3xxx_timer4_slaves,
841 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves),
842 .class = &omap3xxx_timer_hwmod_class, 744 .class = &omap3xxx_timer_hwmod_class,
843}; 745};
844 746
@@ -863,11 +765,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = {
863 .user = OCP_USER_MPU | OCP_USER_SDMA, 765 .user = OCP_USER_MPU | OCP_USER_SDMA,
864}; 766};
865 767
866/* timer5 slave port */
867static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {
868 &omap3xxx_l4_per__timer5,
869};
870
871/* timer5 hwmod */ 768/* timer5 hwmod */
872static struct omap_hwmod omap3xxx_timer5_hwmod = { 769static struct omap_hwmod omap3xxx_timer5_hwmod = {
873 .name = "timer5", 770 .name = "timer5",
@@ -883,8 +780,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
883 }, 780 },
884 }, 781 },
885 .dev_attr = &capability_alwon_dev_attr, 782 .dev_attr = &capability_alwon_dev_attr,
886 .slaves = omap3xxx_timer5_slaves,
887 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves),
888 .class = &omap3xxx_timer_hwmod_class, 783 .class = &omap3xxx_timer_hwmod_class,
889}; 784};
890 785
@@ -909,11 +804,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = {
909 .user = OCP_USER_MPU | OCP_USER_SDMA, 804 .user = OCP_USER_MPU | OCP_USER_SDMA,
910}; 805};
911 806
912/* timer6 slave port */
913static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {
914 &omap3xxx_l4_per__timer6,
915};
916
917/* timer6 hwmod */ 807/* timer6 hwmod */
918static struct omap_hwmod omap3xxx_timer6_hwmod = { 808static struct omap_hwmod omap3xxx_timer6_hwmod = {
919 .name = "timer6", 809 .name = "timer6",
@@ -929,8 +819,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
929 }, 819 },
930 }, 820 },
931 .dev_attr = &capability_alwon_dev_attr, 821 .dev_attr = &capability_alwon_dev_attr,
932 .slaves = omap3xxx_timer6_slaves,
933 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves),
934 .class = &omap3xxx_timer_hwmod_class, 822 .class = &omap3xxx_timer_hwmod_class,
935}; 823};
936 824
@@ -955,11 +843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = {
955 .user = OCP_USER_MPU | OCP_USER_SDMA, 843 .user = OCP_USER_MPU | OCP_USER_SDMA,
956}; 844};
957 845
958/* timer7 slave port */
959static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {
960 &omap3xxx_l4_per__timer7,
961};
962
963/* timer7 hwmod */ 846/* timer7 hwmod */
964static struct omap_hwmod omap3xxx_timer7_hwmod = { 847static struct omap_hwmod omap3xxx_timer7_hwmod = {
965 .name = "timer7", 848 .name = "timer7",
@@ -975,8 +858,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
975 }, 858 },
976 }, 859 },
977 .dev_attr = &capability_alwon_dev_attr, 860 .dev_attr = &capability_alwon_dev_attr,
978 .slaves = omap3xxx_timer7_slaves,
979 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves),
980 .class = &omap3xxx_timer_hwmod_class, 861 .class = &omap3xxx_timer_hwmod_class,
981}; 862};
982 863
@@ -1001,11 +882,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = {
1001 .user = OCP_USER_MPU | OCP_USER_SDMA, 882 .user = OCP_USER_MPU | OCP_USER_SDMA,
1002}; 883};
1003 884
1004/* timer8 slave port */
1005static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {
1006 &omap3xxx_l4_per__timer8,
1007};
1008
1009/* timer8 hwmod */ 885/* timer8 hwmod */
1010static struct omap_hwmod omap3xxx_timer8_hwmod = { 886static struct omap_hwmod omap3xxx_timer8_hwmod = {
1011 .name = "timer8", 887 .name = "timer8",
@@ -1021,8 +897,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
1021 }, 897 },
1022 }, 898 },
1023 .dev_attr = &capability_pwm_dev_attr, 899 .dev_attr = &capability_pwm_dev_attr,
1024 .slaves = omap3xxx_timer8_slaves,
1025 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves),
1026 .class = &omap3xxx_timer_hwmod_class, 900 .class = &omap3xxx_timer_hwmod_class,
1027}; 901};
1028 902
@@ -1047,11 +921,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = {
1047 .user = OCP_USER_MPU | OCP_USER_SDMA, 921 .user = OCP_USER_MPU | OCP_USER_SDMA,
1048}; 922};
1049 923
1050/* timer9 slave port */
1051static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {
1052 &omap3xxx_l4_per__timer9,
1053};
1054
1055/* timer9 hwmod */ 924/* timer9 hwmod */
1056static struct omap_hwmod omap3xxx_timer9_hwmod = { 925static struct omap_hwmod omap3xxx_timer9_hwmod = {
1057 .name = "timer9", 926 .name = "timer9",
@@ -1067,8 +936,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
1067 }, 936 },
1068 }, 937 },
1069 .dev_attr = &capability_pwm_dev_attr, 938 .dev_attr = &capability_pwm_dev_attr,
1070 .slaves = omap3xxx_timer9_slaves,
1071 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves),
1072 .class = &omap3xxx_timer_hwmod_class, 939 .class = &omap3xxx_timer_hwmod_class,
1073}; 940};
1074 941
@@ -1084,11 +951,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {
1084 .user = OCP_USER_MPU | OCP_USER_SDMA, 951 .user = OCP_USER_MPU | OCP_USER_SDMA,
1085}; 952};
1086 953
1087/* timer10 slave port */
1088static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {
1089 &omap3xxx_l4_core__timer10,
1090};
1091
1092/* timer10 hwmod */ 954/* timer10 hwmod */
1093static struct omap_hwmod omap3xxx_timer10_hwmod = { 955static struct omap_hwmod omap3xxx_timer10_hwmod = {
1094 .name = "timer10", 956 .name = "timer10",
@@ -1104,8 +966,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
1104 }, 966 },
1105 }, 967 },
1106 .dev_attr = &capability_pwm_dev_attr, 968 .dev_attr = &capability_pwm_dev_attr,
1107 .slaves = omap3xxx_timer10_slaves,
1108 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves),
1109 .class = &omap3xxx_timer_1ms_hwmod_class, 969 .class = &omap3xxx_timer_1ms_hwmod_class,
1110}; 970};
1111 971
@@ -1121,11 +981,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
1121 .user = OCP_USER_MPU | OCP_USER_SDMA, 981 .user = OCP_USER_MPU | OCP_USER_SDMA,
1122}; 982};
1123 983
1124/* timer11 slave port */
1125static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {
1126 &omap3xxx_l4_core__timer11,
1127};
1128
1129/* timer11 hwmod */ 984/* timer11 hwmod */
1130static struct omap_hwmod omap3xxx_timer11_hwmod = { 985static struct omap_hwmod omap3xxx_timer11_hwmod = {
1131 .name = "timer11", 986 .name = "timer11",
@@ -1141,8 +996,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
1141 }, 996 },
1142 }, 997 },
1143 .dev_attr = &capability_pwm_dev_attr, 998 .dev_attr = &capability_pwm_dev_attr,
1144 .slaves = omap3xxx_timer11_slaves,
1145 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves),
1146 .class = &omap3xxx_timer_hwmod_class, 999 .class = &omap3xxx_timer_hwmod_class,
1147}; 1000};
1148 1001
@@ -1171,11 +1024,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = {
1171 .user = OCP_USER_MPU | OCP_USER_SDMA, 1024 .user = OCP_USER_MPU | OCP_USER_SDMA,
1172}; 1025};
1173 1026
1174/* timer12 slave port */
1175static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = {
1176 &omap3xxx_l4_sec__timer12,
1177};
1178
1179/* timer12 hwmod */ 1027/* timer12 hwmod */
1180static struct omap_hwmod omap3xxx_timer12_hwmod = { 1028static struct omap_hwmod omap3xxx_timer12_hwmod = {
1181 .name = "timer12", 1029 .name = "timer12",
@@ -1191,8 +1039,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
1191 }, 1039 },
1192 }, 1040 },
1193 .dev_attr = &capability_secure_dev_attr, 1041 .dev_attr = &capability_secure_dev_attr,
1194 .slaves = omap3xxx_timer12_slaves,
1195 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves),
1196 .class = &omap3xxx_timer_hwmod_class, 1042 .class = &omap3xxx_timer_hwmod_class,
1197}; 1043};
1198 1044
@@ -1251,11 +1097,6 @@ static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = {
1251 .pre_shutdown = &omap2_wd_timer_disable 1097 .pre_shutdown = &omap2_wd_timer_disable
1252}; 1098};
1253 1099
1254/* wd_timer2 */
1255static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = {
1256 &omap3xxx_l4_wkup__wd_timer2,
1257};
1258
1259static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { 1100static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1260 .name = "wd_timer2", 1101 .name = "wd_timer2",
1261 .class = &omap3xxx_wd_timer_hwmod_class, 1102 .class = &omap3xxx_wd_timer_hwmod_class,
@@ -1269,8 +1110,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1269 .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT, 1110 .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT,
1270 }, 1111 },
1271 }, 1112 },
1272 .slaves = omap3xxx_wd_timer2_slaves,
1273 .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
1274 /* 1113 /*
1275 * XXX: Use software supervised mode, HW supervised smartidle seems to 1114 * XXX: Use software supervised mode, HW supervised smartidle seems to
1276 * block CORE power domain idle transitions. Maybe a HW bug in wdt2? 1115 * block CORE power domain idle transitions. Maybe a HW bug in wdt2?
@@ -1279,11 +1118,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1279}; 1118};
1280 1119
1281/* UART1 */ 1120/* UART1 */
1282
1283static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
1284 &omap3_l4_core__uart1,
1285};
1286
1287static struct omap_hwmod omap3xxx_uart1_hwmod = { 1121static struct omap_hwmod omap3xxx_uart1_hwmod = {
1288 .name = "uart1", 1122 .name = "uart1",
1289 .mpu_irqs = omap2_uart1_mpu_irqs, 1123 .mpu_irqs = omap2_uart1_mpu_irqs,
@@ -1298,17 +1132,10 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1298 .idlest_idle_bit = OMAP3430_EN_UART1_SHIFT, 1132 .idlest_idle_bit = OMAP3430_EN_UART1_SHIFT,
1299 }, 1133 },
1300 }, 1134 },
1301 .slaves = omap3xxx_uart1_slaves,
1302 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves),
1303 .class = &omap2_uart_class, 1135 .class = &omap2_uart_class,
1304}; 1136};
1305 1137
1306/* UART2 */ 1138/* UART2 */
1307
1308static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
1309 &omap3_l4_core__uart2,
1310};
1311
1312static struct omap_hwmod omap3xxx_uart2_hwmod = { 1139static struct omap_hwmod omap3xxx_uart2_hwmod = {
1313 .name = "uart2", 1140 .name = "uart2",
1314 .mpu_irqs = omap2_uart2_mpu_irqs, 1141 .mpu_irqs = omap2_uart2_mpu_irqs,
@@ -1323,17 +1150,10 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1323 .idlest_idle_bit = OMAP3430_EN_UART2_SHIFT, 1150 .idlest_idle_bit = OMAP3430_EN_UART2_SHIFT,
1324 }, 1151 },
1325 }, 1152 },
1326 .slaves = omap3xxx_uart2_slaves,
1327 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves),
1328 .class = &omap2_uart_class, 1153 .class = &omap2_uart_class,
1329}; 1154};
1330 1155
1331/* UART3 */ 1156/* UART3 */
1332
1333static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
1334 &omap3_l4_per__uart3,
1335};
1336
1337static struct omap_hwmod omap3xxx_uart3_hwmod = { 1157static struct omap_hwmod omap3xxx_uart3_hwmod = {
1338 .name = "uart3", 1158 .name = "uart3",
1339 .mpu_irqs = omap2_uart3_mpu_irqs, 1159 .mpu_irqs = omap2_uart3_mpu_irqs,
@@ -1348,8 +1168,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1348 .idlest_idle_bit = OMAP3430_EN_UART3_SHIFT, 1168 .idlest_idle_bit = OMAP3430_EN_UART3_SHIFT,
1349 }, 1169 },
1350 }, 1170 },
1351 .slaves = omap3xxx_uart3_slaves,
1352 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves),
1353 .class = &omap2_uart_class, 1171 .class = &omap2_uart_class,
1354}; 1172};
1355 1173
@@ -1366,11 +1184,7 @@ static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
1366 { .dma_req = -1 } 1184 { .dma_req = -1 }
1367}; 1185};
1368 1186
1369static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { 1187static struct omap_hwmod omap36xx_uart4_hwmod = {
1370 &omap3_l4_per__uart4,
1371};
1372
1373static struct omap_hwmod omap3xxx_uart4_hwmod = {
1374 .name = "uart4", 1188 .name = "uart4",
1375 .mpu_irqs = uart4_mpu_irqs, 1189 .mpu_irqs = uart4_mpu_irqs,
1376 .sdma_reqs = uart4_sdma_reqs, 1190 .sdma_reqs = uart4_sdma_reqs,
@@ -1384,8 +1198,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1384 .idlest_idle_bit = OMAP3630_EN_UART4_SHIFT, 1198 .idlest_idle_bit = OMAP3630_EN_UART4_SHIFT,
1385 }, 1199 },
1386 }, 1200 },
1387 .slaves = omap3xxx_uart4_slaves,
1388 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves),
1389 .class = &omap2_uart_class, 1201 .class = &omap2_uart_class,
1390}; 1202};
1391 1203
@@ -1398,16 +1210,12 @@ static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
1398 { .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, }, 1210 { .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
1399}; 1211};
1400 1212
1401static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {
1402 &am35xx_l4_core__uart4,
1403};
1404
1405static struct omap_hwmod am35xx_uart4_hwmod = { 1213static struct omap_hwmod am35xx_uart4_hwmod = {
1406 .name = "uart4", 1214 .name = "uart4",
1407 .mpu_irqs = am35xx_uart4_mpu_irqs, 1215 .mpu_irqs = am35xx_uart4_mpu_irqs,
1408 .sdma_reqs = am35xx_uart4_sdma_reqs, 1216 .sdma_reqs = am35xx_uart4_sdma_reqs,
1409 .main_clk = "uart4_fck", 1217 .main_clk = "uart4_fck",
1410 .prcm = { 1218 .prcm = {
1411 .omap2 = { 1219 .omap2 = {
1412 .module_offs = CORE_MOD, 1220 .module_offs = CORE_MOD,
1413 .prcm_reg_id = 1, 1221 .prcm_reg_id = 1,
@@ -1416,9 +1224,7 @@ static struct omap_hwmod am35xx_uart4_hwmod = {
1416 .idlest_idle_bit = OMAP3430_EN_UART4_SHIFT, 1224 .idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,
1417 }, 1225 },
1418 }, 1226 },
1419 .slaves = am35xx_uart4_slaves, 1227 .class = &omap2_uart_class,
1420 .slaves_cnt = ARRAY_SIZE(am35xx_uart4_slaves),
1421 .class = &omap2_uart_class,
1422}; 1228};
1423 1229
1424 1230
@@ -1436,11 +1242,6 @@ static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
1436}; 1242};
1437 1243
1438/* dss */ 1244/* dss */
1439/* dss master ports */
1440static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {
1441 &omap3xxx_dss__l3,
1442 &omap3430es1_dss__l3,
1443};
1444 1245
1445/* l4_core -> dss */ 1246/* l4_core -> dss */
1446static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { 1247static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {
@@ -1473,15 +1274,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {
1473 .user = OCP_USER_MPU | OCP_USER_SDMA, 1274 .user = OCP_USER_MPU | OCP_USER_SDMA,
1474}; 1275};
1475 1276
1476/* dss slave ports */
1477static struct omap_hwmod_ocp_if *omap3430es1_dss_slaves[] = {
1478 &omap3430es1_l4_core__dss,
1479};
1480
1481static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
1482 &omap3xxx_l4_core__dss,
1483};
1484
1485static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1277static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1486 /* 1278 /*
1487 * The DSS HW needs all DSS clocks enabled during reset. The dss_core 1279 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
@@ -1509,10 +1301,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1509 }, 1301 },
1510 .opt_clks = dss_opt_clks, 1302 .opt_clks = dss_opt_clks,
1511 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 1303 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
1512 .slaves = omap3430es1_dss_slaves,
1513 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1514 .masters = omap3xxx_dss_masters,
1515 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1516 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1304 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1517}; 1305};
1518 1306
@@ -1534,10 +1322,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1534 }, 1322 },
1535 .opt_clks = dss_opt_clks, 1323 .opt_clks = dss_opt_clks,
1536 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 1324 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
1537 .slaves = omap3xxx_dss_slaves,
1538 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves),
1539 .masters = omap3xxx_dss_masters,
1540 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1541}; 1325};
1542 1326
1543/* 1327/*
@@ -1578,11 +1362,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
1578 .user = OCP_USER_MPU | OCP_USER_SDMA, 1362 .user = OCP_USER_MPU | OCP_USER_SDMA,
1579}; 1363};
1580 1364
1581/* dss_dispc slave ports */
1582static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
1583 &omap3xxx_l4_core__dss_dispc,
1584};
1585
1586static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { 1365static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1587 .name = "dss_dispc", 1366 .name = "dss_dispc",
1588 .class = &omap3_dispc_hwmod_class, 1367 .class = &omap3_dispc_hwmod_class,
@@ -1595,8 +1374,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1595 .module_offs = OMAP3430_DSS_MOD, 1374 .module_offs = OMAP3430_DSS_MOD,
1596 }, 1375 },
1597 }, 1376 },
1598 .slaves = omap3xxx_dss_dispc_slaves,
1599 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1600 .flags = HWMOD_NO_IDLEST, 1377 .flags = HWMOD_NO_IDLEST,
1601 .dev_attr = &omap2_3_dss_dispc_dev_attr 1378 .dev_attr = &omap2_3_dss_dispc_dev_attr
1602}; 1379};
@@ -1641,11 +1418,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
1641 .user = OCP_USER_MPU | OCP_USER_SDMA, 1418 .user = OCP_USER_MPU | OCP_USER_SDMA,
1642}; 1419};
1643 1420
1644/* dss_dsi1 slave ports */
1645static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1646 &omap3xxx_l4_core__dss_dsi1,
1647};
1648
1649static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { 1421static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1650 { .role = "sys_clk", .clk = "dss2_alwon_fck" }, 1422 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1651}; 1423};
@@ -1664,8 +1436,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1664 }, 1436 },
1665 .opt_clks = dss_dsi1_opt_clks, 1437 .opt_clks = dss_dsi1_opt_clks,
1666 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), 1438 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1667 .slaves = omap3xxx_dss_dsi1_slaves,
1668 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1669 .flags = HWMOD_NO_IDLEST, 1439 .flags = HWMOD_NO_IDLEST,
1670}; 1440};
1671 1441
@@ -1685,11 +1455,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
1685 .user = OCP_USER_MPU | OCP_USER_SDMA, 1455 .user = OCP_USER_MPU | OCP_USER_SDMA,
1686}; 1456};
1687 1457
1688/* dss_rfbi slave ports */
1689static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
1690 &omap3xxx_l4_core__dss_rfbi,
1691};
1692
1693static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { 1458static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1694 { .role = "ick", .clk = "dss_ick" }, 1459 { .role = "ick", .clk = "dss_ick" },
1695}; 1460};
@@ -1707,8 +1472,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1707 }, 1472 },
1708 .opt_clks = dss_rfbi_opt_clks, 1473 .opt_clks = dss_rfbi_opt_clks,
1709 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), 1474 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1710 .slaves = omap3xxx_dss_rfbi_slaves,
1711 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1712 .flags = HWMOD_NO_IDLEST, 1475 .flags = HWMOD_NO_IDLEST,
1713}; 1476};
1714 1477
@@ -1728,11 +1491,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1728 .user = OCP_USER_MPU | OCP_USER_SDMA, 1491 .user = OCP_USER_MPU | OCP_USER_SDMA,
1729}; 1492};
1730 1493
1731/* dss_venc slave ports */
1732static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
1733 &omap3xxx_l4_core__dss_venc,
1734};
1735
1736static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = { 1494static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
1737 /* required only on OMAP3430 */ 1495 /* required only on OMAP3430 */
1738 { .role = "tv_dac_clk", .clk = "dss_96m_fck" }, 1496 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
@@ -1751,8 +1509,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1751 }, 1509 },
1752 .opt_clks = dss_venc_opt_clks, 1510 .opt_clks = dss_venc_opt_clks,
1753 .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks), 1511 .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks),
1754 .slaves = omap3xxx_dss_venc_slaves,
1755 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1756 .flags = HWMOD_NO_IDLEST, 1512 .flags = HWMOD_NO_IDLEST,
1757}; 1513};
1758 1514
@@ -1765,10 +1521,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
1765 OMAP_I2C_FLAG_BUS_SHIFT_2, 1521 OMAP_I2C_FLAG_BUS_SHIFT_2,
1766}; 1522};
1767 1523
1768static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
1769 &omap3_l4_core__i2c1,
1770};
1771
1772static struct omap_hwmod omap3xxx_i2c1_hwmod = { 1524static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1773 .name = "i2c1", 1525 .name = "i2c1",
1774 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, 1526 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@@ -1784,8 +1536,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1784 .idlest_idle_bit = OMAP3430_ST_I2C1_SHIFT, 1536 .idlest_idle_bit = OMAP3430_ST_I2C1_SHIFT,
1785 }, 1537 },
1786 }, 1538 },
1787 .slaves = omap3xxx_i2c1_slaves,
1788 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves),
1789 .class = &i2c_class, 1539 .class = &i2c_class,
1790 .dev_attr = &i2c1_dev_attr, 1540 .dev_attr = &i2c1_dev_attr,
1791}; 1541};
@@ -1799,10 +1549,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
1799 OMAP_I2C_FLAG_BUS_SHIFT_2, 1549 OMAP_I2C_FLAG_BUS_SHIFT_2,
1800}; 1550};
1801 1551
1802static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
1803 &omap3_l4_core__i2c2,
1804};
1805
1806static struct omap_hwmod omap3xxx_i2c2_hwmod = { 1552static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1807 .name = "i2c2", 1553 .name = "i2c2",
1808 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, 1554 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@@ -1818,8 +1564,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1818 .idlest_idle_bit = OMAP3430_ST_I2C2_SHIFT, 1564 .idlest_idle_bit = OMAP3430_ST_I2C2_SHIFT,
1819 }, 1565 },
1820 }, 1566 },
1821 .slaves = omap3xxx_i2c2_slaves,
1822 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves),
1823 .class = &i2c_class, 1567 .class = &i2c_class,
1824 .dev_attr = &i2c2_dev_attr, 1568 .dev_attr = &i2c2_dev_attr,
1825}; 1569};
@@ -1844,10 +1588,6 @@ static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
1844 { .dma_req = -1 } 1588 { .dma_req = -1 }
1845}; 1589};
1846 1590
1847static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
1848 &omap3_l4_core__i2c3,
1849};
1850
1851static struct omap_hwmod omap3xxx_i2c3_hwmod = { 1591static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1852 .name = "i2c3", 1592 .name = "i2c3",
1853 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, 1593 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
@@ -1863,8 +1603,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1863 .idlest_idle_bit = OMAP3430_ST_I2C3_SHIFT, 1603 .idlest_idle_bit = OMAP3430_ST_I2C3_SHIFT,
1864 }, 1604 },
1865 }, 1605 },
1866 .slaves = omap3xxx_i2c3_slaves,
1867 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves),
1868 .class = &i2c_class, 1606 .class = &i2c_class,
1869 .dev_attr = &i2c3_dev_attr, 1607 .dev_attr = &i2c3_dev_attr,
1870}; 1608};
@@ -2004,10 +1742,6 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
2004 { .role = "dbclk", .clk = "gpio1_dbck", }, 1742 { .role = "dbclk", .clk = "gpio1_dbck", },
2005}; 1743};
2006 1744
2007static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {
2008 &omap3xxx_l4_wkup__gpio1,
2009};
2010
2011static struct omap_hwmod omap3xxx_gpio1_hwmod = { 1745static struct omap_hwmod omap3xxx_gpio1_hwmod = {
2012 .name = "gpio1", 1746 .name = "gpio1",
2013 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1747 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2024,8 +1758,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
2024 .idlest_idle_bit = OMAP3430_ST_GPIO1_SHIFT, 1758 .idlest_idle_bit = OMAP3430_ST_GPIO1_SHIFT,
2025 }, 1759 },
2026 }, 1760 },
2027 .slaves = omap3xxx_gpio1_slaves,
2028 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves),
2029 .class = &omap3xxx_gpio_hwmod_class, 1761 .class = &omap3xxx_gpio_hwmod_class,
2030 .dev_attr = &gpio_dev_attr, 1762 .dev_attr = &gpio_dev_attr,
2031}; 1763};
@@ -2035,10 +1767,6 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
2035 { .role = "dbclk", .clk = "gpio2_dbck", }, 1767 { .role = "dbclk", .clk = "gpio2_dbck", },
2036}; 1768};
2037 1769
2038static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {
2039 &omap3xxx_l4_per__gpio2,
2040};
2041
2042static struct omap_hwmod omap3xxx_gpio2_hwmod = { 1770static struct omap_hwmod omap3xxx_gpio2_hwmod = {
2043 .name = "gpio2", 1771 .name = "gpio2",
2044 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1772 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2055,8 +1783,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
2055 .idlest_idle_bit = OMAP3430_ST_GPIO2_SHIFT, 1783 .idlest_idle_bit = OMAP3430_ST_GPIO2_SHIFT,
2056 }, 1784 },
2057 }, 1785 },
2058 .slaves = omap3xxx_gpio2_slaves,
2059 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves),
2060 .class = &omap3xxx_gpio_hwmod_class, 1786 .class = &omap3xxx_gpio_hwmod_class,
2061 .dev_attr = &gpio_dev_attr, 1787 .dev_attr = &gpio_dev_attr,
2062}; 1788};
@@ -2066,10 +1792,6 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
2066 { .role = "dbclk", .clk = "gpio3_dbck", }, 1792 { .role = "dbclk", .clk = "gpio3_dbck", },
2067}; 1793};
2068 1794
2069static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {
2070 &omap3xxx_l4_per__gpio3,
2071};
2072
2073static struct omap_hwmod omap3xxx_gpio3_hwmod = { 1795static struct omap_hwmod omap3xxx_gpio3_hwmod = {
2074 .name = "gpio3", 1796 .name = "gpio3",
2075 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1797 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2086,8 +1808,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
2086 .idlest_idle_bit = OMAP3430_ST_GPIO3_SHIFT, 1808 .idlest_idle_bit = OMAP3430_ST_GPIO3_SHIFT,
2087 }, 1809 },
2088 }, 1810 },
2089 .slaves = omap3xxx_gpio3_slaves,
2090 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves),
2091 .class = &omap3xxx_gpio_hwmod_class, 1811 .class = &omap3xxx_gpio_hwmod_class,
2092 .dev_attr = &gpio_dev_attr, 1812 .dev_attr = &gpio_dev_attr,
2093}; 1813};
@@ -2097,10 +1817,6 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
2097 { .role = "dbclk", .clk = "gpio4_dbck", }, 1817 { .role = "dbclk", .clk = "gpio4_dbck", },
2098}; 1818};
2099 1819
2100static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {
2101 &omap3xxx_l4_per__gpio4,
2102};
2103
2104static struct omap_hwmod omap3xxx_gpio4_hwmod = { 1820static struct omap_hwmod omap3xxx_gpio4_hwmod = {
2105 .name = "gpio4", 1821 .name = "gpio4",
2106 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1822 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2117,8 +1833,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
2117 .idlest_idle_bit = OMAP3430_ST_GPIO4_SHIFT, 1833 .idlest_idle_bit = OMAP3430_ST_GPIO4_SHIFT,
2118 }, 1834 },
2119 }, 1835 },
2120 .slaves = omap3xxx_gpio4_slaves,
2121 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves),
2122 .class = &omap3xxx_gpio_hwmod_class, 1836 .class = &omap3xxx_gpio_hwmod_class,
2123 .dev_attr = &gpio_dev_attr, 1837 .dev_attr = &gpio_dev_attr,
2124}; 1838};
@@ -2133,10 +1847,6 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
2133 { .role = "dbclk", .clk = "gpio5_dbck", }, 1847 { .role = "dbclk", .clk = "gpio5_dbck", },
2134}; 1848};
2135 1849
2136static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = {
2137 &omap3xxx_l4_per__gpio5,
2138};
2139
2140static struct omap_hwmod omap3xxx_gpio5_hwmod = { 1850static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2141 .name = "gpio5", 1851 .name = "gpio5",
2142 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1852 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2153,8 +1863,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2153 .idlest_idle_bit = OMAP3430_ST_GPIO5_SHIFT, 1863 .idlest_idle_bit = OMAP3430_ST_GPIO5_SHIFT,
2154 }, 1864 },
2155 }, 1865 },
2156 .slaves = omap3xxx_gpio5_slaves,
2157 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves),
2158 .class = &omap3xxx_gpio_hwmod_class, 1866 .class = &omap3xxx_gpio_hwmod_class,
2159 .dev_attr = &gpio_dev_attr, 1867 .dev_attr = &gpio_dev_attr,
2160}; 1868};
@@ -2169,10 +1877,6 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
2169 { .role = "dbclk", .clk = "gpio6_dbck", }, 1877 { .role = "dbclk", .clk = "gpio6_dbck", },
2170}; 1878};
2171 1879
2172static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = {
2173 &omap3xxx_l4_per__gpio6,
2174};
2175
2176static struct omap_hwmod omap3xxx_gpio6_hwmod = { 1880static struct omap_hwmod omap3xxx_gpio6_hwmod = {
2177 .name = "gpio6", 1881 .name = "gpio6",
2178 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1882 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
@@ -2189,8 +1893,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
2189 .idlest_idle_bit = OMAP3430_ST_GPIO6_SHIFT, 1893 .idlest_idle_bit = OMAP3430_ST_GPIO6_SHIFT,
2190 }, 1894 },
2191 }, 1895 },
2192 .slaves = omap3xxx_gpio6_slaves,
2193 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves),
2194 .class = &omap3xxx_gpio_hwmod_class, 1896 .class = &omap3xxx_gpio_hwmod_class,
2195 .dev_attr = &gpio_dev_attr, 1897 .dev_attr = &gpio_dev_attr,
2196}; 1898};
@@ -2238,11 +1940,6 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
2238 { } 1940 { }
2239}; 1941};
2240 1942
2241/* dma_system master ports */
2242static struct omap_hwmod_ocp_if *omap3xxx_dma_system_masters[] = {
2243 &omap3xxx_dma_system__l3,
2244};
2245
2246/* l4_cfg -> dma_system */ 1943/* l4_cfg -> dma_system */
2247static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { 1944static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
2248 .master = &omap3xxx_l4_core_hwmod, 1945 .master = &omap3xxx_l4_core_hwmod,
@@ -2252,11 +1949,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
2252 .user = OCP_USER_MPU | OCP_USER_SDMA, 1949 .user = OCP_USER_MPU | OCP_USER_SDMA,
2253}; 1950};
2254 1951
2255/* dma_system slave ports */
2256static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
2257 &omap3xxx_l4_core__dma_system,
2258};
2259
2260static struct omap_hwmod omap3xxx_dma_system_hwmod = { 1952static struct omap_hwmod omap3xxx_dma_system_hwmod = {
2261 .name = "dma", 1953 .name = "dma",
2262 .class = &omap3xxx_dma_hwmod_class, 1954 .class = &omap3xxx_dma_hwmod_class,
@@ -2271,10 +1963,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
2271 .idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT, 1963 .idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
2272 }, 1964 },
2273 }, 1965 },
2274 .slaves = omap3xxx_dma_system_slaves,
2275 .slaves_cnt = ARRAY_SIZE(omap3xxx_dma_system_slaves),
2276 .masters = omap3xxx_dma_system_masters,
2277 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters),
2278 .dev_attr = &dma_dev_attr, 1966 .dev_attr = &dma_dev_attr,
2279 .flags = HWMOD_NO_IDLEST, 1967 .flags = HWMOD_NO_IDLEST,
2280}; 1968};
@@ -2326,11 +2014,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {
2326 .user = OCP_USER_MPU | OCP_USER_SDMA, 2014 .user = OCP_USER_MPU | OCP_USER_SDMA,
2327}; 2015};
2328 2016
2329/* mcbsp1 slave ports */
2330static struct omap_hwmod_ocp_if *omap3xxx_mcbsp1_slaves[] = {
2331 &omap3xxx_l4_core__mcbsp1,
2332};
2333
2334static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { 2017static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2335 .name = "mcbsp1", 2018 .name = "mcbsp1",
2336 .class = &omap3xxx_mcbsp_hwmod_class, 2019 .class = &omap3xxx_mcbsp_hwmod_class,
@@ -2346,8 +2029,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2346 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, 2029 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
2347 }, 2030 },
2348 }, 2031 },
2349 .slaves = omap3xxx_mcbsp1_slaves,
2350 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves),
2351}; 2032};
2352 2033
2353/* mcbsp2 */ 2034/* mcbsp2 */
@@ -2377,11 +2058,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {
2377 .user = OCP_USER_MPU | OCP_USER_SDMA, 2058 .user = OCP_USER_MPU | OCP_USER_SDMA,
2378}; 2059};
2379 2060
2380/* mcbsp2 slave ports */
2381static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = {
2382 &omap3xxx_l4_per__mcbsp2,
2383};
2384
2385static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = { 2061static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {
2386 .sidetone = "mcbsp2_sidetone", 2062 .sidetone = "mcbsp2_sidetone",
2387}; 2063};
@@ -2401,8 +2077,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
2401 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, 2077 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
2402 }, 2078 },
2403 }, 2079 },
2404 .slaves = omap3xxx_mcbsp2_slaves,
2405 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
2406 .dev_attr = &omap34xx_mcbsp2_dev_attr, 2080 .dev_attr = &omap34xx_mcbsp2_dev_attr,
2407}; 2081};
2408 2082
@@ -2433,13 +2107,8 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = {
2433 .user = OCP_USER_MPU | OCP_USER_SDMA, 2107 .user = OCP_USER_MPU | OCP_USER_SDMA,
2434}; 2108};
2435 2109
2436/* mcbsp3 slave ports */
2437static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = {
2438 &omap3xxx_l4_per__mcbsp3,
2439};
2440
2441static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = { 2110static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = {
2442 .sidetone = "mcbsp3_sidetone", 2111 .sidetone = "mcbsp3_sidetone",
2443}; 2112};
2444 2113
2445static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { 2114static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
@@ -2457,8 +2126,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
2457 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, 2126 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
2458 }, 2127 },
2459 }, 2128 },
2460 .slaves = omap3xxx_mcbsp3_slaves,
2461 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
2462 .dev_attr = &omap34xx_mcbsp3_dev_attr, 2129 .dev_attr = &omap34xx_mcbsp3_dev_attr,
2463}; 2130};
2464 2131
@@ -2495,11 +2162,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = {
2495 .user = OCP_USER_MPU | OCP_USER_SDMA, 2162 .user = OCP_USER_MPU | OCP_USER_SDMA,
2496}; 2163};
2497 2164
2498/* mcbsp4 slave ports */
2499static struct omap_hwmod_ocp_if *omap3xxx_mcbsp4_slaves[] = {
2500 &omap3xxx_l4_per__mcbsp4,
2501};
2502
2503static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { 2165static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2504 .name = "mcbsp4", 2166 .name = "mcbsp4",
2505 .class = &omap3xxx_mcbsp_hwmod_class, 2167 .class = &omap3xxx_mcbsp_hwmod_class,
@@ -2515,8 +2177,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2515 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, 2177 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
2516 }, 2178 },
2517 }, 2179 },
2518 .slaves = omap3xxx_mcbsp4_slaves,
2519 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves),
2520}; 2180};
2521 2181
2522/* mcbsp5 */ 2182/* mcbsp5 */
@@ -2552,11 +2212,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = {
2552 .user = OCP_USER_MPU | OCP_USER_SDMA, 2212 .user = OCP_USER_MPU | OCP_USER_SDMA,
2553}; 2213};
2554 2214
2555/* mcbsp5 slave ports */
2556static struct omap_hwmod_ocp_if *omap3xxx_mcbsp5_slaves[] = {
2557 &omap3xxx_l4_core__mcbsp5,
2558};
2559
2560static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { 2215static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2561 .name = "mcbsp5", 2216 .name = "mcbsp5",
2562 .class = &omap3xxx_mcbsp_hwmod_class, 2217 .class = &omap3xxx_mcbsp_hwmod_class,
@@ -2572,8 +2227,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2572 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, 2227 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
2573 }, 2228 },
2574 }, 2229 },
2575 .slaves = omap3xxx_mcbsp5_slaves,
2576 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves),
2577}; 2230};
2578/* 'mcbsp sidetone' class */ 2231/* 'mcbsp sidetone' class */
2579 2232
@@ -2613,11 +2266,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = {
2613 .user = OCP_USER_MPU, 2266 .user = OCP_USER_MPU,
2614}; 2267};
2615 2268
2616/* mcbsp2_sidetone slave ports */
2617static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_sidetone_slaves[] = {
2618 &omap3xxx_l4_per__mcbsp2_sidetone,
2619};
2620
2621static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { 2269static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2622 .name = "mcbsp2_sidetone", 2270 .name = "mcbsp2_sidetone",
2623 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 2271 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
@@ -2632,8 +2280,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2632 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, 2280 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
2633 }, 2281 },
2634 }, 2282 },
2635 .slaves = omap3xxx_mcbsp2_sidetone_slaves,
2636 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),
2637}; 2283};
2638 2284
2639/* mcbsp3_sidetone */ 2285/* mcbsp3_sidetone */
@@ -2661,11 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = {
2661 .user = OCP_USER_MPU, 2307 .user = OCP_USER_MPU,
2662}; 2308};
2663 2309
2664/* mcbsp3_sidetone slave ports */
2665static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_sidetone_slaves[] = {
2666 &omap3xxx_l4_per__mcbsp3_sidetone,
2667};
2668
2669static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { 2310static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
2670 .name = "mcbsp3_sidetone", 2311 .name = "mcbsp3_sidetone",
2671 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 2312 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
@@ -2680,8 +2321,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
2680 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, 2321 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
2681 }, 2322 },
2682 }, 2323 },
2683 .slaves = omap3xxx_mcbsp3_sidetone_slaves,
2684 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),
2685}; 2324};
2686 2325
2687 2326
@@ -2727,10 +2366,6 @@ static struct omap_smartreflex_dev_attr sr1_dev_attr = {
2727 .sensor_voltdm_name = "mpu_iva", 2366 .sensor_voltdm_name = "mpu_iva",
2728}; 2367};
2729 2368
2730static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
2731 &omap3_l4_core__sr1,
2732};
2733
2734static struct omap_hwmod omap34xx_sr1_hwmod = { 2369static struct omap_hwmod omap34xx_sr1_hwmod = {
2735 .name = "sr1", 2370 .name = "sr1",
2736 .class = &omap34xx_smartreflex_hwmod_class, 2371 .class = &omap34xx_smartreflex_hwmod_class,
@@ -2744,8 +2379,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
2744 .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT, 2379 .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
2745 }, 2380 },
2746 }, 2381 },
2747 .slaves = omap3_sr1_slaves,
2748 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2749 .dev_attr = &sr1_dev_attr, 2382 .dev_attr = &sr1_dev_attr,
2750 .mpu_irqs = omap3_smartreflex_mpu_irqs, 2383 .mpu_irqs = omap3_smartreflex_mpu_irqs,
2751 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2384 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
@@ -2764,8 +2397,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
2764 .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT, 2397 .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
2765 }, 2398 },
2766 }, 2399 },
2767 .slaves = omap3_sr1_slaves,
2768 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2769 .dev_attr = &sr1_dev_attr, 2400 .dev_attr = &sr1_dev_attr,
2770 .mpu_irqs = omap3_smartreflex_mpu_irqs, 2401 .mpu_irqs = omap3_smartreflex_mpu_irqs,
2771}; 2402};
@@ -2775,10 +2406,6 @@ static struct omap_smartreflex_dev_attr sr2_dev_attr = {
2775 .sensor_voltdm_name = "core", 2406 .sensor_voltdm_name = "core",
2776}; 2407};
2777 2408
2778static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
2779 &omap3_l4_core__sr2,
2780};
2781
2782static struct omap_hwmod omap34xx_sr2_hwmod = { 2409static struct omap_hwmod omap34xx_sr2_hwmod = {
2783 .name = "sr2", 2410 .name = "sr2",
2784 .class = &omap34xx_smartreflex_hwmod_class, 2411 .class = &omap34xx_smartreflex_hwmod_class,
@@ -2792,8 +2419,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
2792 .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT, 2419 .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
2793 }, 2420 },
2794 }, 2421 },
2795 .slaves = omap3_sr2_slaves,
2796 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2797 .dev_attr = &sr2_dev_attr, 2422 .dev_attr = &sr2_dev_attr,
2798 .mpu_irqs = omap3_smartreflex_core_irqs, 2423 .mpu_irqs = omap3_smartreflex_core_irqs,
2799 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2424 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
@@ -2812,8 +2437,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
2812 .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT, 2437 .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
2813 }, 2438 },
2814 }, 2439 },
2815 .slaves = omap3_sr2_slaves,
2816 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2817 .dev_attr = &sr2_dev_attr, 2440 .dev_attr = &sr2_dev_attr,
2818 .mpu_irqs = omap3_smartreflex_core_irqs, 2441 .mpu_irqs = omap3_smartreflex_core_irqs,
2819}; 2442};
@@ -2862,11 +2485,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = {
2862 .user = OCP_USER_MPU | OCP_USER_SDMA, 2485 .user = OCP_USER_MPU | OCP_USER_SDMA,
2863}; 2486};
2864 2487
2865/* mailbox slave ports */
2866static struct omap_hwmod_ocp_if *omap3xxx_mailbox_slaves[] = {
2867 &omap3xxx_l4_core__mailbox,
2868};
2869
2870static struct omap_hwmod omap3xxx_mailbox_hwmod = { 2488static struct omap_hwmod omap3xxx_mailbox_hwmod = {
2871 .name = "mailbox", 2489 .name = "mailbox",
2872 .class = &omap3xxx_mailbox_hwmod_class, 2490 .class = &omap3xxx_mailbox_hwmod_class,
@@ -2881,8 +2499,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
2881 .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT, 2499 .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,
2882 }, 2500 },
2883 }, 2501 },
2884 .slaves = omap3xxx_mailbox_slaves,
2885 .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves),
2886}; 2502};
2887 2503
2888/* l4 core -> mcspi1 interface */ 2504/* l4 core -> mcspi1 interface */
@@ -2954,10 +2570,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
2954}; 2570};
2955 2571
2956/* mcspi1 */ 2572/* mcspi1 */
2957static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = {
2958 &omap34xx_l4_core__mcspi1,
2959};
2960
2961static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { 2573static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
2962 .num_chipselect = 4, 2574 .num_chipselect = 4,
2963}; 2575};
@@ -2976,17 +2588,11 @@ static struct omap_hwmod omap34xx_mcspi1 = {
2976 .idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT, 2588 .idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT,
2977 }, 2589 },
2978 }, 2590 },
2979 .slaves = omap34xx_mcspi1_slaves,
2980 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves),
2981 .class = &omap34xx_mcspi_class, 2591 .class = &omap34xx_mcspi_class,
2982 .dev_attr = &omap_mcspi1_dev_attr, 2592 .dev_attr = &omap_mcspi1_dev_attr,
2983}; 2593};
2984 2594
2985/* mcspi2 */ 2595/* mcspi2 */
2986static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = {
2987 &omap34xx_l4_core__mcspi2,
2988};
2989
2990static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { 2596static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
2991 .num_chipselect = 2, 2597 .num_chipselect = 2,
2992}; 2598};
@@ -3005,8 +2611,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
3005 .idlest_idle_bit = OMAP3430_ST_MCSPI2_SHIFT, 2611 .idlest_idle_bit = OMAP3430_ST_MCSPI2_SHIFT,
3006 }, 2612 },
3007 }, 2613 },
3008 .slaves = omap34xx_mcspi2_slaves,
3009 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves),
3010 .class = &omap34xx_mcspi_class, 2614 .class = &omap34xx_mcspi_class,
3011 .dev_attr = &omap_mcspi2_dev_attr, 2615 .dev_attr = &omap_mcspi2_dev_attr,
3012}; 2616};
@@ -3025,10 +2629,6 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
3025 { .dma_req = -1 } 2629 { .dma_req = -1 }
3026}; 2630};
3027 2631
3028static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = {
3029 &omap34xx_l4_core__mcspi3,
3030};
3031
3032static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 2632static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
3033 .num_chipselect = 2, 2633 .num_chipselect = 2,
3034}; 2634};
@@ -3047,8 +2647,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
3047 .idlest_idle_bit = OMAP3430_ST_MCSPI3_SHIFT, 2647 .idlest_idle_bit = OMAP3430_ST_MCSPI3_SHIFT,
3048 }, 2648 },
3049 }, 2649 },
3050 .slaves = omap34xx_mcspi3_slaves,
3051 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves),
3052 .class = &omap34xx_mcspi_class, 2650 .class = &omap34xx_mcspi_class,
3053 .dev_attr = &omap_mcspi3_dev_attr, 2651 .dev_attr = &omap_mcspi3_dev_attr,
3054}; 2652};
@@ -3065,10 +2663,6 @@ static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
3065 { .dma_req = -1 } 2663 { .dma_req = -1 }
3066}; 2664};
3067 2665
3068static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = {
3069 &omap34xx_l4_core__mcspi4,
3070};
3071
3072static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { 2666static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {
3073 .num_chipselect = 1, 2667 .num_chipselect = 1,
3074}; 2668};
@@ -3087,8 +2681,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
3087 .idlest_idle_bit = OMAP3430_ST_MCSPI4_SHIFT, 2681 .idlest_idle_bit = OMAP3430_ST_MCSPI4_SHIFT,
3088 }, 2682 },
3089 }, 2683 },
3090 .slaves = omap34xx_mcspi4_slaves,
3091 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves),
3092 .class = &omap34xx_mcspi_class, 2684 .class = &omap34xx_mcspi_class,
3093 .dev_attr = &omap_mcspi4_dev_attr, 2685 .dev_attr = &omap_mcspi4_dev_attr,
3094}; 2686};
@@ -3134,10 +2726,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
3134 .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT 2726 .idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT
3135 }, 2727 },
3136 }, 2728 },
3137 .masters = omap3xxx_usbhsotg_masters,
3138 .masters_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_masters),
3139 .slaves = omap3xxx_usbhsotg_slaves,
3140 .slaves_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_slaves),
3141 .class = &usbotg_class, 2729 .class = &usbotg_class,
3142 2730
3143 /* 2731 /*
@@ -3169,10 +2757,6 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = {
3169 .omap2 = { 2757 .omap2 = {
3170 }, 2758 },
3171 }, 2759 },
3172 .masters = am35xx_usbhsotg_masters,
3173 .masters_cnt = ARRAY_SIZE(am35xx_usbhsotg_masters),
3174 .slaves = am35xx_usbhsotg_slaves,
3175 .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves),
3176 .class = &am35xx_usbotg_class, 2760 .class = &am35xx_usbotg_class,
3177}; 2761};
3178 2762
@@ -3211,11 +2795,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = {
3211 { .role = "dbck", .clk = "omap_32k_fck", }, 2795 { .role = "dbck", .clk = "omap_32k_fck", },
3212}; 2796};
3213 2797
3214static struct omap_hwmod_ocp_if *omap3xxx_mmc1_slaves[] = {
3215 &omap3xxx_l4_core__pre_es3_mmc1,
3216 &omap3xxx_l4_core__es3plus_mmc1,
3217};
3218
3219static struct omap_mmc_dev_attr mmc1_dev_attr = { 2798static struct omap_mmc_dev_attr mmc1_dev_attr = {
3220 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 2799 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
3221}; 2800};
@@ -3243,8 +2822,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
3243 }, 2822 },
3244 }, 2823 },
3245 .dev_attr = &mmc1_pre_es3_dev_attr, 2824 .dev_attr = &mmc1_pre_es3_dev_attr,
3246 .slaves = omap3xxx_mmc1_slaves,
3247 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3248 .class = &omap34xx_mmc_class, 2825 .class = &omap34xx_mmc_class,
3249}; 2826};
3250 2827
@@ -3265,8 +2842,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
3265 }, 2842 },
3266 }, 2843 },
3267 .dev_attr = &mmc1_dev_attr, 2844 .dev_attr = &mmc1_dev_attr,
3268 .slaves = omap3xxx_mmc1_slaves,
3269 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3270 .class = &omap34xx_mmc_class, 2845 .class = &omap34xx_mmc_class,
3271}; 2846};
3272 2847
@@ -3287,11 +2862,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = {
3287 { .role = "dbck", .clk = "omap_32k_fck", }, 2862 { .role = "dbck", .clk = "omap_32k_fck", },
3288}; 2863};
3289 2864
3290static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
3291 &omap3xxx_l4_core__pre_es3_mmc2,
3292 &omap3xxx_l4_core__es3plus_mmc2,
3293};
3294
3295/* See 35xx errata 2.1.1.128 in SPRZ278F */ 2865/* See 35xx errata 2.1.1.128 in SPRZ278F */
3296static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = { 2866static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {
3297 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ, 2867 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
@@ -3314,8 +2884,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
3314 }, 2884 },
3315 }, 2885 },
3316 .dev_attr = &mmc2_pre_es3_dev_attr, 2886 .dev_attr = &mmc2_pre_es3_dev_attr,
3317 .slaves = omap3xxx_mmc2_slaves,
3318 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3319 .class = &omap34xx_mmc_class, 2887 .class = &omap34xx_mmc_class,
3320}; 2888};
3321 2889
@@ -3335,8 +2903,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
3335 .idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT, 2903 .idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
3336 }, 2904 },
3337 }, 2905 },
3338 .slaves = omap3xxx_mmc2_slaves,
3339 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3340 .class = &omap34xx_mmc_class, 2906 .class = &omap34xx_mmc_class,
3341}; 2907};
3342 2908
@@ -3357,10 +2923,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = {
3357 { .role = "dbck", .clk = "omap_32k_fck", }, 2923 { .role = "dbck", .clk = "omap_32k_fck", },
3358}; 2924};
3359 2925
3360static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {
3361 &omap3xxx_l4_core__mmc3,
3362};
3363
3364static struct omap_hwmod omap3xxx_mmc3_hwmod = { 2926static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3365 .name = "mmc3", 2927 .name = "mmc3",
3366 .mpu_irqs = omap34xx_mmc3_mpu_irqs, 2928 .mpu_irqs = omap34xx_mmc3_mpu_irqs,
@@ -3376,8 +2938,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3376 .idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT, 2938 .idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT,
3377 }, 2939 },
3378 }, 2940 },
3379 .slaves = omap3xxx_mmc3_slaves,
3380 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves),
3381 .class = &omap34xx_mmc_class, 2941 .class = &omap34xx_mmc_class,
3382}; 2942};
3383 2943
@@ -3409,10 +2969,6 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
3409 .sysc = &omap3xxx_usb_host_hs_sysc, 2969 .sysc = &omap3xxx_usb_host_hs_sysc,
3410}; 2970};
3411 2971
3412static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {
3413 &omap3xxx_usb_host_hs__l3_main_2,
3414};
3415
3416static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = { 2972static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {
3417 { 2973 {
3418 .name = "uhh", 2974 .name = "uhh",
@@ -3441,10 +2997,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {
3441 .user = OCP_USER_MPU | OCP_USER_SDMA, 2997 .user = OCP_USER_MPU | OCP_USER_SDMA,
3442}; 2998};
3443 2999
3444static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {
3445 &omap3xxx_l4_core__usb_host_hs,
3446};
3447
3448static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = { 3000static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
3449 { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", }, 3001 { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
3450}; 3002};
@@ -3473,10 +3025,6 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
3473 }, 3025 },
3474 .opt_clks = omap3xxx_usb_host_hs_opt_clks, 3026 .opt_clks = omap3xxx_usb_host_hs_opt_clks,
3475 .opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks), 3027 .opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
3476 .slaves = omap3xxx_usb_host_hs_slaves,
3477 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),
3478 .masters = omap3xxx_usb_host_hs_masters,
3479 .masters_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_masters),
3480 3028
3481 /* 3029 /*
3482 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock 3030 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
@@ -3570,10 +3118,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {
3570 .user = OCP_USER_MPU | OCP_USER_SDMA, 3118 .user = OCP_USER_MPU | OCP_USER_SDMA,
3571}; 3119};
3572 3120
3573static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {
3574 &omap3xxx_l4_core__usb_tll_hs,
3575};
3576
3577static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { 3121static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
3578 .name = "usb_tll_hs", 3122 .name = "usb_tll_hs",
3579 .class = &omap3xxx_usb_tll_hs_hwmod_class, 3123 .class = &omap3xxx_usb_tll_hs_hwmod_class,
@@ -3589,164 +3133,158 @@ static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
3589 .idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT, 3133 .idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
3590 }, 3134 },
3591 }, 3135 },
3592 .slaves = omap3xxx_usb_tll_hs_slaves, 3136};
3593 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),
3594};
3595
3596static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3597 &omap3xxx_l3_main_hwmod,
3598 &omap3xxx_l4_core_hwmod,
3599 &omap3xxx_l4_per_hwmod,
3600 &omap3xxx_l4_wkup_hwmod,
3601 &omap3xxx_mmc3_hwmod,
3602 &omap3xxx_mpu_hwmod,
3603
3604 &omap3xxx_timer1_hwmod,
3605 &omap3xxx_timer2_hwmod,
3606 &omap3xxx_timer3_hwmod,
3607 &omap3xxx_timer4_hwmod,
3608 &omap3xxx_timer5_hwmod,
3609 &omap3xxx_timer6_hwmod,
3610 &omap3xxx_timer7_hwmod,
3611 &omap3xxx_timer8_hwmod,
3612 &omap3xxx_timer9_hwmod,
3613 &omap3xxx_timer10_hwmod,
3614 &omap3xxx_timer11_hwmod,
3615
3616 &omap3xxx_wd_timer2_hwmod,
3617 &omap3xxx_uart1_hwmod,
3618 &omap3xxx_uart2_hwmod,
3619 &omap3xxx_uart3_hwmod,
3620
3621 /* i2c class */
3622 &omap3xxx_i2c1_hwmod,
3623 &omap3xxx_i2c2_hwmod,
3624 &omap3xxx_i2c3_hwmod,
3625
3626 /* gpio class */
3627 &omap3xxx_gpio1_hwmod,
3628 &omap3xxx_gpio2_hwmod,
3629 &omap3xxx_gpio3_hwmod,
3630 &omap3xxx_gpio4_hwmod,
3631 &omap3xxx_gpio5_hwmod,
3632 &omap3xxx_gpio6_hwmod,
3633
3634 /* dma_system class*/
3635 &omap3xxx_dma_system_hwmod,
3636
3637 /* mcbsp class */
3638 &omap3xxx_mcbsp1_hwmod,
3639 &omap3xxx_mcbsp2_hwmod,
3640 &omap3xxx_mcbsp3_hwmod,
3641 &omap3xxx_mcbsp4_hwmod,
3642 &omap3xxx_mcbsp5_hwmod,
3643 &omap3xxx_mcbsp2_sidetone_hwmod,
3644 &omap3xxx_mcbsp3_sidetone_hwmod,
3645
3646
3647 /* mcspi class */
3648 &omap34xx_mcspi1,
3649 &omap34xx_mcspi2,
3650 &omap34xx_mcspi3,
3651 &omap34xx_mcspi4,
3652 3137
3138static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
3139 &omap3xxx_l3_main__l4_core,
3140 &omap3xxx_l3_main__l4_per,
3141 &omap3xxx_mpu__l3_main,
3142 &omap3xxx_l4_core__l4_wkup,
3143 &omap3xxx_l4_core__mmc3,
3144 &omap3_l4_core__uart1,
3145 &omap3_l4_core__uart2,
3146 &omap3_l4_per__uart3,
3147 &omap3_l4_core__i2c1,
3148 &omap3_l4_core__i2c2,
3149 &omap3_l4_core__i2c3,
3150 &omap3xxx_l4_wkup__l4_sec,
3151 &omap3xxx_l4_wkup__timer1,
3152 &omap3xxx_l4_per__timer2,
3153 &omap3xxx_l4_per__timer3,
3154 &omap3xxx_l4_per__timer4,
3155 &omap3xxx_l4_per__timer5,
3156 &omap3xxx_l4_per__timer6,
3157 &omap3xxx_l4_per__timer7,
3158 &omap3xxx_l4_per__timer8,
3159 &omap3xxx_l4_per__timer9,
3160 &omap3xxx_l4_core__timer10,
3161 &omap3xxx_l4_core__timer11,
3162 &omap3xxx_l4_wkup__wd_timer2,
3163 &omap3xxx_l4_wkup__gpio1,
3164 &omap3xxx_l4_per__gpio2,
3165 &omap3xxx_l4_per__gpio3,
3166 &omap3xxx_l4_per__gpio4,
3167 &omap3xxx_l4_per__gpio5,
3168 &omap3xxx_l4_per__gpio6,
3169 &omap3xxx_dma_system__l3,
3170 &omap3xxx_l4_core__dma_system,
3171 &omap3xxx_l4_core__mcbsp1,
3172 &omap3xxx_l4_per__mcbsp2,
3173 &omap3xxx_l4_per__mcbsp3,
3174 &omap3xxx_l4_per__mcbsp4,
3175 &omap3xxx_l4_core__mcbsp5,
3176 &omap3xxx_l4_per__mcbsp2_sidetone,
3177 &omap3xxx_l4_per__mcbsp3_sidetone,
3178 &omap34xx_l4_core__mcspi1,
3179 &omap34xx_l4_core__mcspi2,
3180 &omap34xx_l4_core__mcspi3,
3181 &omap34xx_l4_core__mcspi4,
3653 NULL, 3182 NULL,
3654}; 3183};
3655 3184
3656/* GP-only hwmods */ 3185/* GP-only hwmod links */
3657static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = { 3186static struct omap_hwmod_ocp_if *omap3xxx_gp_hwmod_ocp_ifs[] __initdata = {
3658 &omap3xxx_timer12_hwmod, 3187 &omap3xxx_l4_sec__timer12,
3659 NULL 3188 NULL
3660}; 3189};
3661 3190
3662/* 3430ES1-only hwmods */ 3191/* 3430ES1-only hwmod links */
3663static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { 3192static struct omap_hwmod_ocp_if *omap3430es1_hwmod_ocp_ifs[] __initdata = {
3664 &omap3430es1_dss_core_hwmod, 3193 &omap3430es1_dss__l3,
3194 &omap3430es1_l4_core__dss,
3665 NULL 3195 NULL
3666}; 3196};
3667 3197
3668/* 3430ES2+-only hwmods */ 3198/* 3430ES2+-only hwmod links */
3669static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { 3199static struct omap_hwmod_ocp_if *omap3430es2plus_hwmod_ocp_ifs[] __initdata = {
3670 &omap3xxx_dss_core_hwmod, 3200 &omap3xxx_dss__l3,
3671 &omap3xxx_usbhsotg_hwmod, 3201 &omap3xxx_l4_core__dss,
3672 &omap3xxx_usb_host_hs_hwmod, 3202 &omap3xxx_usbhsotg__l3,
3673 &omap3xxx_usb_tll_hs_hwmod, 3203 &omap3xxx_l4_core__usbhsotg,
3204 &omap3xxx_usb_host_hs__l3_main_2,
3205 &omap3xxx_l4_core__usb_host_hs,
3206 &omap3xxx_l4_core__usb_tll_hs,
3674 NULL 3207 NULL
3675}; 3208};
3676 3209
3677/* <= 3430ES3-only hwmods */ 3210/* <= 3430ES3-only hwmod links */
3678static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = { 3211static struct omap_hwmod_ocp_if *omap3430_pre_es3_hwmod_ocp_ifs[] __initdata = {
3679 &omap3xxx_pre_es3_mmc1_hwmod, 3212 &omap3xxx_l4_core__pre_es3_mmc1,
3680 &omap3xxx_pre_es3_mmc2_hwmod, 3213 &omap3xxx_l4_core__pre_es3_mmc2,
3681 NULL 3214 NULL
3682}; 3215};
3683 3216
3684/* 3430ES3+-only hwmods */ 3217/* 3430ES3+-only hwmod links */
3685static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = { 3218static struct omap_hwmod_ocp_if *omap3430_es3plus_hwmod_ocp_ifs[] __initdata = {
3686 &omap3xxx_es3plus_mmc1_hwmod, 3219 &omap3xxx_l4_core__es3plus_mmc1,
3687 &omap3xxx_es3plus_mmc2_hwmod, 3220 &omap3xxx_l4_core__es3plus_mmc2,
3688 NULL 3221 NULL
3689}; 3222};
3690 3223
3691/* 34xx-only hwmods (all ES revisions) */ 3224/* 34xx-only hwmod links (all ES revisions) */
3692static __initdata struct omap_hwmod *omap34xx_hwmods[] = { 3225static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {
3693 &omap3xxx_iva_hwmod, 3226 &omap3xxx_l3__iva,
3694 &omap34xx_sr1_hwmod, 3227 &omap34xx_l4_core__sr1,
3695 &omap34xx_sr2_hwmod, 3228 &omap34xx_l4_core__sr2,
3696 &omap3xxx_mailbox_hwmod, 3229 &omap3xxx_l4_core__mailbox,
3697 NULL 3230 NULL
3698}; 3231};
3699 3232
3700/* 36xx-only hwmods (all ES revisions) */ 3233/* 36xx-only hwmod links (all ES revisions) */
3701static __initdata struct omap_hwmod *omap36xx_hwmods[] = { 3234static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {
3702 &omap3xxx_iva_hwmod, 3235 &omap3xxx_l3__iva,
3703 &omap3xxx_uart4_hwmod, 3236 &omap36xx_l4_per__uart4,
3704 &omap3xxx_dss_core_hwmod, 3237 &omap3xxx_dss__l3,
3705 &omap36xx_sr1_hwmod, 3238 &omap3xxx_l4_core__dss,
3706 &omap36xx_sr2_hwmod, 3239 &omap36xx_l4_core__sr1,
3707 &omap3xxx_usbhsotg_hwmod, 3240 &omap36xx_l4_core__sr2,
3708 &omap3xxx_mailbox_hwmod, 3241 &omap3xxx_usbhsotg__l3,
3709 &omap3xxx_usb_host_hs_hwmod, 3242 &omap3xxx_l4_core__usbhsotg,
3710 &omap3xxx_usb_tll_hs_hwmod, 3243 &omap3xxx_l4_core__mailbox,
3711 &omap3xxx_es3plus_mmc1_hwmod, 3244 &omap3xxx_usb_host_hs__l3_main_2,
3712 &omap3xxx_es3plus_mmc2_hwmod, 3245 &omap3xxx_l4_core__usb_host_hs,
3246 &omap3xxx_l4_core__usb_tll_hs,
3247 &omap3xxx_l4_core__es3plus_mmc1,
3248 &omap3xxx_l4_core__es3plus_mmc2,
3713 NULL 3249 NULL
3714}; 3250};
3715 3251
3716static __initdata struct omap_hwmod *am35xx_hwmods[] = { 3252static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = {
3717 &omap3xxx_dss_core_hwmod, /* XXX ??? */ 3253 &omap3xxx_dss__l3,
3718 &am35xx_usbhsotg_hwmod, 3254 &omap3xxx_l4_core__dss,
3719 &am35xx_uart4_hwmod, 3255 &am35xx_usbhsotg__l3,
3720 &omap3xxx_usb_host_hs_hwmod, 3256 &am35xx_l4_core__usbhsotg,
3721 &omap3xxx_usb_tll_hs_hwmod, 3257 &am35xx_l4_core__uart4,
3722 &omap3xxx_es3plus_mmc1_hwmod, 3258 &omap3xxx_usb_host_hs__l3_main_2,
3723 &omap3xxx_es3plus_mmc2_hwmod, 3259 &omap3xxx_l4_core__usb_host_hs,
3260 &omap3xxx_l4_core__usb_tll_hs,
3261 &omap3xxx_l4_core__es3plus_mmc1,
3262 &omap3xxx_l4_core__es3plus_mmc2,
3724 NULL 3263 NULL
3725}; 3264};
3726 3265
3727static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = { 3266static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {
3728 /* dss class */ 3267 &omap3xxx_l4_core__dss_dispc,
3729 &omap3xxx_dss_dispc_hwmod, 3268 &omap3xxx_l4_core__dss_dsi1,
3730 &omap3xxx_dss_dsi1_hwmod, 3269 &omap3xxx_l4_core__dss_rfbi,
3731 &omap3xxx_dss_rfbi_hwmod, 3270 &omap3xxx_l4_core__dss_venc,
3732 &omap3xxx_dss_venc_hwmod,
3733 NULL 3271 NULL
3734}; 3272};
3735 3273
3736int __init omap3xxx_hwmod_init(void) 3274int __init omap3xxx_hwmod_init(void)
3737{ 3275{
3738 int r; 3276 int r;
3739 struct omap_hwmod **h = NULL; 3277 struct omap_hwmod_ocp_if **h = NULL;
3740 unsigned int rev; 3278 unsigned int rev;
3741 3279
3742 /* Register hwmods common to all OMAP3 */ 3280 /* Register hwmod links common to all OMAP3 */
3743 r = omap_hwmod_register(omap3xxx_hwmods); 3281 r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);
3744 if (r < 0) 3282 if (r < 0)
3745 return r; 3283 return r;
3746 3284
3747 /* Register GP-only hwmods. */ 3285 /* Register GP-only hwmod links. */
3748 if (omap_type() == OMAP2_DEVICE_TYPE_GP) { 3286 if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
3749 r = omap_hwmod_register(omap3xxx_gp_hwmods); 3287 r = omap_hwmod_register_links(omap3xxx_gp_hwmod_ocp_ifs);
3750 if (r < 0) 3288 if (r < 0)
3751 return r; 3289 return r;
3752 } 3290 }
@@ -3754,43 +3292,43 @@ int __init omap3xxx_hwmod_init(void)
3754 rev = omap_rev(); 3292 rev = omap_rev();
3755 3293
3756 /* 3294 /*
3757 * Register hwmods common to individual OMAP3 families, all 3295 * Register hwmod links common to individual OMAP3 families, all
3758 * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx) 3296 * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)
3759 * All possible revisions should be included in this conditional. 3297 * All possible revisions should be included in this conditional.
3760 */ 3298 */
3761 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 || 3299 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3762 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || 3300 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
3763 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { 3301 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
3764 h = omap34xx_hwmods; 3302 h = omap34xx_hwmod_ocp_ifs;
3765 } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) { 3303 } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {
3766 h = am35xx_hwmods; 3304 h = am35xx_hwmod_ocp_ifs;
3767 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || 3305 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
3768 rev == OMAP3630_REV_ES1_2) { 3306 rev == OMAP3630_REV_ES1_2) {
3769 h = omap36xx_hwmods; 3307 h = omap36xx_hwmod_ocp_ifs;
3770 } else { 3308 } else {
3771 WARN(1, "OMAP3 hwmod family init: unknown chip type\n"); 3309 WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
3772 return -EINVAL; 3310 return -EINVAL;
3773 }; 3311 };
3774 3312
3775 r = omap_hwmod_register(h); 3313 r = omap_hwmod_register_links(h);
3776 if (r < 0) 3314 if (r < 0)
3777 return r; 3315 return r;
3778 3316
3779 /* 3317 /*
3780 * Register hwmods specific to certain ES levels of a 3318 * Register hwmod links specific to certain ES levels of a
3781 * particular family of silicon (e.g., 34xx ES1.0) 3319 * particular family of silicon (e.g., 34xx ES1.0)
3782 */ 3320 */
3783 h = NULL; 3321 h = NULL;
3784 if (rev == OMAP3430_REV_ES1_0) { 3322 if (rev == OMAP3430_REV_ES1_0) {
3785 h = omap3430es1_hwmods; 3323 h = omap3430es1_hwmod_ocp_ifs;
3786 } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 || 3324 } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
3787 rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || 3325 rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3788 rev == OMAP3430_REV_ES3_1_2) { 3326 rev == OMAP3430_REV_ES3_1_2) {
3789 h = omap3430es2plus_hwmods; 3327 h = omap3430es2plus_hwmod_ocp_ifs;
3790 }; 3328 };
3791 3329
3792 if (h) { 3330 if (h) {
3793 r = omap_hwmod_register(h); 3331 r = omap_hwmod_register_links(h);
3794 if (r < 0) 3332 if (r < 0)
3795 return r; 3333 return r;
3796 } 3334 }
@@ -3798,29 +3336,29 @@ int __init omap3xxx_hwmod_init(void)
3798 h = NULL; 3336 h = NULL;
3799 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 || 3337 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3800 rev == OMAP3430_REV_ES2_1) { 3338 rev == OMAP3430_REV_ES2_1) {
3801 h = omap3430_pre_es3_hwmods; 3339 h = omap3430_pre_es3_hwmod_ocp_ifs;
3802 } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || 3340 } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3803 rev == OMAP3430_REV_ES3_1_2) { 3341 rev == OMAP3430_REV_ES3_1_2) {
3804 h = omap3430_es3plus_hwmods; 3342 h = omap3430_es3plus_hwmod_ocp_ifs;
3805 }; 3343 };
3806 3344
3807 if (h) 3345 if (h)
3808 r = omap_hwmod_register(h); 3346 r = omap_hwmod_register_links(h);
3809 if (r < 0) 3347 if (r < 0)
3810 return r; 3348 return r;
3811 3349
3812 /* 3350 /*
3813 * DSS code presumes that dss_core hwmod is handled first, 3351 * DSS code presumes that dss_core hwmod is handled first,
3814 * _before_ any other DSS related hwmods so register common 3352 * _before_ any other DSS related hwmods so register common
3815 * DSS hwmods last to ensure that dss_core is already registered. 3353 * DSS hwmod links last to ensure that dss_core is already
3816 * Otherwise some change things may happen, for ex. if dispc 3354 * registered. Otherwise some change things may happen, for
3817 * is handled before dss_core and DSS is enabled in bootloader 3355 * ex. if dispc is handled before dss_core and DSS is enabled
3818 * DIPSC will be reset with outputs enabled which sometimes leads 3356 * in bootloader DISPC will be reset with outputs enabled
3819 * to unrecoverable L3 error. 3357 * which sometimes leads to unrecoverable L3 error. XXX The
3820 * XXX The long-term fix to this is to ensure modules are set up 3358 * long-term fix to this is to ensure hwmods are set up in
3821 * in dependency order in the hwmod core code. 3359 * dependency order in the hwmod core code.
3822 */ 3360 */
3823 r = omap_hwmod_register(omap3xxx_dss_hwmods); 3361 r = omap_hwmod_register_links(omap3xxx_dss_hwmod_ocp_ifs);
3824 3362
3825 return r; 3363 return r;
3826} 3364}
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index cd2451038a5e..6bde469b3df2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Hardware modules present on the OMAP44xx chips 2 * Hardware modules present on the OMAP44xx chips
3 * 3 *
4 * Copyright (C) 2009-2011 Texas Instruments, Inc. 4 * Copyright (C) 2009-2012 Texas Instruments, Inc.
5 * Copyright (C) 2009-2010 Nokia Corporation 5 * Copyright (C) 2009-2010 Nokia Corporation
6 * 6 *
7 * Paul Walmsley 7 * Paul Walmsley
@@ -118,12 +118,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
118 .user = OCP_USER_MPU, 118 .user = OCP_USER_MPU,
119}; 119};
120 120
121/* dmm slave ports */
122static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
123 &omap44xx_l3_main_1__dmm,
124 &omap44xx_mpu__dmm,
125};
126
127static struct omap_hwmod omap44xx_dmm_hwmod = { 121static struct omap_hwmod omap44xx_dmm_hwmod = {
128 .name = "dmm", 122 .name = "dmm",
129 .class = &omap44xx_dmm_hwmod_class, 123 .class = &omap44xx_dmm_hwmod_class,
@@ -134,8 +128,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
134 .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, 128 .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET,
135 }, 129 },
136 }, 130 },
137 .slaves = omap44xx_dmm_slaves,
138 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
139 .mpu_irqs = omap44xx_dmm_irqs, 131 .mpu_irqs = omap44xx_dmm_irqs,
140}; 132};
141 133
@@ -174,12 +166,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
174 .user = OCP_USER_MPU, 166 .user = OCP_USER_MPU,
175}; 167};
176 168
177/* emif_fw slave ports */
178static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {
179 &omap44xx_dmm__emif_fw,
180 &omap44xx_l4_cfg__emif_fw,
181};
182
183static struct omap_hwmod omap44xx_emif_fw_hwmod = { 169static struct omap_hwmod omap44xx_emif_fw_hwmod = {
184 .name = "emif_fw", 170 .name = "emif_fw",
185 .class = &omap44xx_emif_fw_hwmod_class, 171 .class = &omap44xx_emif_fw_hwmod_class,
@@ -190,8 +176,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {
190 .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, 176 .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET,
191 }, 177 },
192 }, 178 },
193 .slaves = omap44xx_emif_fw_slaves,
194 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
195}; 179};
196 180
197/* 181/*
@@ -219,12 +203,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
219 .user = OCP_USER_MPU | OCP_USER_SDMA, 203 .user = OCP_USER_MPU | OCP_USER_SDMA,
220}; 204};
221 205
222/* l3_instr slave ports */
223static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
224 &omap44xx_iva__l3_instr,
225 &omap44xx_l3_main_3__l3_instr,
226};
227
228static struct omap_hwmod omap44xx_l3_instr_hwmod = { 206static struct omap_hwmod omap44xx_l3_instr_hwmod = {
229 .name = "l3_instr", 207 .name = "l3_instr",
230 .class = &omap44xx_l3_hwmod_class, 208 .class = &omap44xx_l3_hwmod_class,
@@ -236,8 +214,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
236 .modulemode = MODULEMODE_HWCTRL, 214 .modulemode = MODULEMODE_HWCTRL,
237 }, 215 },
238 }, 216 },
239 .slaves = omap44xx_l3_instr_slaves,
240 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
241}; 217};
242 218
243/* l3_main_1 */ 219/* l3_main_1 */
@@ -313,17 +289,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
313 .user = OCP_USER_MPU, 289 .user = OCP_USER_MPU,
314}; 290};
315 291
316/* l3_main_1 slave ports */
317static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
318 &omap44xx_dsp__l3_main_1,
319 &omap44xx_dss__l3_main_1,
320 &omap44xx_l3_main_2__l3_main_1,
321 &omap44xx_l4_cfg__l3_main_1,
322 &omap44xx_mmc1__l3_main_1,
323 &omap44xx_mmc2__l3_main_1,
324 &omap44xx_mpu__l3_main_1,
325};
326
327static struct omap_hwmod omap44xx_l3_main_1_hwmod = { 292static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
328 .name = "l3_main_1", 293 .name = "l3_main_1",
329 .class = &omap44xx_l3_hwmod_class, 294 .class = &omap44xx_l3_hwmod_class,
@@ -335,8 +300,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
335 .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, 300 .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET,
336 }, 301 },
337 }, 302 },
338 .slaves = omap44xx_l3_main_1_slaves,
339 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
340}; 303};
341 304
342/* l3_main_2 */ 305/* l3_main_2 */
@@ -414,18 +377,6 @@ static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = {
414 .user = OCP_USER_MPU | OCP_USER_SDMA, 377 .user = OCP_USER_MPU | OCP_USER_SDMA,
415}; 378};
416 379
417/* l3_main_2 slave ports */
418static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
419 &omap44xx_dma_system__l3_main_2,
420 &omap44xx_hsi__l3_main_2,
421 &omap44xx_ipu__l3_main_2,
422 &omap44xx_iss__l3_main_2,
423 &omap44xx_iva__l3_main_2,
424 &omap44xx_l3_main_1__l3_main_2,
425 &omap44xx_l4_cfg__l3_main_2,
426 &omap44xx_usb_otg_hs__l3_main_2,
427};
428
429static struct omap_hwmod omap44xx_l3_main_2_hwmod = { 380static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
430 .name = "l3_main_2", 381 .name = "l3_main_2",
431 .class = &omap44xx_l3_hwmod_class, 382 .class = &omap44xx_l3_hwmod_class,
@@ -436,8 +387,6 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
436 .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, 387 .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET,
437 }, 388 },
438 }, 389 },
439 .slaves = omap44xx_l3_main_2_slaves,
440 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
441}; 390};
442 391
443/* l3_main_3 */ 392/* l3_main_3 */
@@ -475,13 +424,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
475 .user = OCP_USER_MPU | OCP_USER_SDMA, 424 .user = OCP_USER_MPU | OCP_USER_SDMA,
476}; 425};
477 426
478/* l3_main_3 slave ports */
479static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {
480 &omap44xx_l3_main_1__l3_main_3,
481 &omap44xx_l3_main_2__l3_main_3,
482 &omap44xx_l4_cfg__l3_main_3,
483};
484
485static struct omap_hwmod omap44xx_l3_main_3_hwmod = { 427static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
486 .name = "l3_main_3", 428 .name = "l3_main_3",
487 .class = &omap44xx_l3_hwmod_class, 429 .class = &omap44xx_l3_hwmod_class,
@@ -493,8 +435,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
493 .modulemode = MODULEMODE_HWCTRL, 435 .modulemode = MODULEMODE_HWCTRL,
494 }, 436 },
495 }, 437 },
496 .slaves = omap44xx_l3_main_3_slaves,
497 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
498}; 438};
499 439
500/* 440/*
@@ -538,14 +478,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
538 .user = OCP_USER_MPU | OCP_USER_SDMA, 478 .user = OCP_USER_MPU | OCP_USER_SDMA,
539}; 479};
540 480
541/* l4_abe slave ports */
542static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
543 &omap44xx_aess__l4_abe,
544 &omap44xx_dsp__l4_abe,
545 &omap44xx_l3_main_1__l4_abe,
546 &omap44xx_mpu__l4_abe,
547};
548
549static struct omap_hwmod omap44xx_l4_abe_hwmod = { 481static struct omap_hwmod omap44xx_l4_abe_hwmod = {
550 .name = "l4_abe", 482 .name = "l4_abe",
551 .class = &omap44xx_l4_hwmod_class, 483 .class = &omap44xx_l4_hwmod_class,
@@ -555,8 +487,6 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
555 .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, 487 .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,
556 }, 488 },
557 }, 489 },
558 .slaves = omap44xx_l4_abe_slaves,
559 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
560}; 490};
561 491
562/* l4_cfg */ 492/* l4_cfg */
@@ -568,11 +498,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
568 .user = OCP_USER_MPU | OCP_USER_SDMA, 498 .user = OCP_USER_MPU | OCP_USER_SDMA,
569}; 499};
570 500
571/* l4_cfg slave ports */
572static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {
573 &omap44xx_l3_main_1__l4_cfg,
574};
575
576static struct omap_hwmod omap44xx_l4_cfg_hwmod = { 501static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
577 .name = "l4_cfg", 502 .name = "l4_cfg",
578 .class = &omap44xx_l4_hwmod_class, 503 .class = &omap44xx_l4_hwmod_class,
@@ -583,8 +508,6 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
583 .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, 508 .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
584 }, 509 },
585 }, 510 },
586 .slaves = omap44xx_l4_cfg_slaves,
587 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
588}; 511};
589 512
590/* l4_per */ 513/* l4_per */
@@ -596,11 +519,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {
596 .user = OCP_USER_MPU | OCP_USER_SDMA, 519 .user = OCP_USER_MPU | OCP_USER_SDMA,
597}; 520};
598 521
599/* l4_per slave ports */
600static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {
601 &omap44xx_l3_main_2__l4_per,
602};
603
604static struct omap_hwmod omap44xx_l4_per_hwmod = { 522static struct omap_hwmod omap44xx_l4_per_hwmod = {
605 .name = "l4_per", 523 .name = "l4_per",
606 .class = &omap44xx_l4_hwmod_class, 524 .class = &omap44xx_l4_hwmod_class,
@@ -611,8 +529,6 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
611 .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, 529 .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET,
612 }, 530 },
613 }, 531 },
614 .slaves = omap44xx_l4_per_slaves,
615 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
616}; 532};
617 533
618/* l4_wkup */ 534/* l4_wkup */
@@ -624,11 +540,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {
624 .user = OCP_USER_MPU | OCP_USER_SDMA, 540 .user = OCP_USER_MPU | OCP_USER_SDMA,
625}; 541};
626 542
627/* l4_wkup slave ports */
628static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {
629 &omap44xx_l4_cfg__l4_wkup,
630};
631
632static struct omap_hwmod omap44xx_l4_wkup_hwmod = { 543static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
633 .name = "l4_wkup", 544 .name = "l4_wkup",
634 .class = &omap44xx_l4_hwmod_class, 545 .class = &omap44xx_l4_hwmod_class,
@@ -639,8 +550,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
639 .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, 550 .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET,
640 }, 551 },
641 }, 552 },
642 .slaves = omap44xx_l4_wkup_slaves,
643 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
644}; 553};
645 554
646/* 555/*
@@ -660,17 +569,10 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
660 .user = OCP_USER_MPU | OCP_USER_SDMA, 569 .user = OCP_USER_MPU | OCP_USER_SDMA,
661}; 570};
662 571
663/* mpu_private slave ports */
664static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
665 &omap44xx_mpu__mpu_private,
666};
667
668static struct omap_hwmod omap44xx_mpu_private_hwmod = { 572static struct omap_hwmod omap44xx_mpu_private_hwmod = {
669 .name = "mpu_private", 573 .name = "mpu_private",
670 .class = &omap44xx_mpu_bus_hwmod_class, 574 .class = &omap44xx_mpu_bus_hwmod_class,
671 .clkdm_name = "mpuss_clkdm", 575 .clkdm_name = "mpuss_clkdm",
672 .slaves = omap44xx_mpu_private_slaves,
673 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
674}; 576};
675 577
676/* 578/*
@@ -756,11 +658,6 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
756 { .dma_req = -1 } 658 { .dma_req = -1 }
757}; 659};
758 660
759/* aess master ports */
760static struct omap_hwmod_ocp_if *omap44xx_aess_masters[] = {
761 &omap44xx_aess__l4_abe,
762};
763
764static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { 661static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
765 { 662 {
766 .pa_start = 0x401f1000, 663 .pa_start = 0x401f1000,
@@ -797,12 +694,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {
797 .user = OCP_USER_SDMA, 694 .user = OCP_USER_SDMA,
798}; 695};
799 696
800/* aess slave ports */
801static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = {
802 &omap44xx_l4_abe__aess,
803 &omap44xx_l4_abe__aess_dma,
804};
805
806static struct omap_hwmod omap44xx_aess_hwmod = { 697static struct omap_hwmod omap44xx_aess_hwmod = {
807 .name = "aess", 698 .name = "aess",
808 .class = &omap44xx_aess_hwmod_class, 699 .class = &omap44xx_aess_hwmod_class,
@@ -817,10 +708,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
817 .modulemode = MODULEMODE_SWCTRL, 708 .modulemode = MODULEMODE_SWCTRL,
818 }, 709 },
819 }, 710 },
820 .slaves = omap44xx_aess_slaves,
821 .slaves_cnt = ARRAY_SIZE(omap44xx_aess_slaves),
822 .masters = omap44xx_aess_masters,
823 .masters_cnt = ARRAY_SIZE(omap44xx_aess_masters),
824}; 711};
825 712
826/* 713/*
@@ -862,11 +749,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
862 .user = OCP_USER_MPU | OCP_USER_SDMA, 749 .user = OCP_USER_MPU | OCP_USER_SDMA,
863}; 750};
864 751
865/* counter_32k slave ports */
866static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
867 &omap44xx_l4_wkup__counter_32k,
868};
869
870static struct omap_hwmod omap44xx_counter_32k_hwmod = { 752static struct omap_hwmod omap44xx_counter_32k_hwmod = {
871 .name = "counter_32k", 753 .name = "counter_32k",
872 .class = &omap44xx_counter_hwmod_class, 754 .class = &omap44xx_counter_hwmod_class,
@@ -879,8 +761,6 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
879 .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, 761 .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,
880 }, 762 },
881 }, 763 },
882 .slaves = omap44xx_counter_32k_slaves,
883 .slaves_cnt = ARRAY_SIZE(omap44xx_counter_32k_slaves),
884}; 764};
885 765
886/* 766/*
@@ -923,11 +803,6 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
923 { .irq = -1 } 803 { .irq = -1 }
924}; 804};
925 805
926/* dma_system master ports */
927static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {
928 &omap44xx_dma_system__l3_main_2,
929};
930
931static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { 806static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {
932 { 807 {
933 .pa_start = 0x4a056000, 808 .pa_start = 0x4a056000,
@@ -946,11 +821,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
946 .user = OCP_USER_MPU | OCP_USER_SDMA, 821 .user = OCP_USER_MPU | OCP_USER_SDMA,
947}; 822};
948 823
949/* dma_system slave ports */
950static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
951 &omap44xx_l4_cfg__dma_system,
952};
953
954static struct omap_hwmod omap44xx_dma_system_hwmod = { 824static struct omap_hwmod omap44xx_dma_system_hwmod = {
955 .name = "dma_system", 825 .name = "dma_system",
956 .class = &omap44xx_dma_hwmod_class, 826 .class = &omap44xx_dma_hwmod_class,
@@ -964,10 +834,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
964 }, 834 },
965 }, 835 },
966 .dev_attr = &dma_dev_attr, 836 .dev_attr = &dma_dev_attr,
967 .slaves = omap44xx_dma_system_slaves,
968 .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves),
969 .masters = omap44xx_dma_system_masters,
970 .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters),
971}; 837};
972 838
973/* 839/*
@@ -1040,12 +906,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {
1040 .user = OCP_USER_SDMA, 906 .user = OCP_USER_SDMA,
1041}; 907};
1042 908
1043/* dmic slave ports */
1044static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = {
1045 &omap44xx_l4_abe__dmic,
1046 &omap44xx_l4_abe__dmic_dma,
1047};
1048
1049static struct omap_hwmod omap44xx_dmic_hwmod = { 909static struct omap_hwmod omap44xx_dmic_hwmod = {
1050 .name = "dmic", 910 .name = "dmic",
1051 .class = &omap44xx_dmic_hwmod_class, 911 .class = &omap44xx_dmic_hwmod_class,
@@ -1060,8 +920,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
1060 .modulemode = MODULEMODE_SWCTRL, 920 .modulemode = MODULEMODE_SWCTRL,
1061 }, 921 },
1062 }, 922 },
1063 .slaves = omap44xx_dmic_slaves,
1064 .slaves_cnt = ARRAY_SIZE(omap44xx_dmic_slaves),
1065}; 923};
1066 924
1067/* 925/*
@@ -1092,13 +950,6 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
1092 .user = OCP_USER_DSP, 950 .user = OCP_USER_DSP,
1093}; 951};
1094 952
1095/* dsp master ports */
1096static struct omap_hwmod_ocp_if *omap44xx_dsp_masters[] = {
1097 &omap44xx_dsp__l3_main_1,
1098 &omap44xx_dsp__l4_abe,
1099 &omap44xx_dsp__iva,
1100};
1101
1102/* l4_cfg -> dsp */ 953/* l4_cfg -> dsp */
1103static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = { 954static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {
1104 .master = &omap44xx_l4_cfg_hwmod, 955 .master = &omap44xx_l4_cfg_hwmod,
@@ -1107,11 +958,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {
1107 .user = OCP_USER_MPU | OCP_USER_SDMA, 958 .user = OCP_USER_MPU | OCP_USER_SDMA,
1108}; 959};
1109 960
1110/* dsp slave ports */
1111static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = {
1112 &omap44xx_l4_cfg__dsp,
1113};
1114
1115static struct omap_hwmod omap44xx_dsp_hwmod = { 961static struct omap_hwmod omap44xx_dsp_hwmod = {
1116 .name = "dsp", 962 .name = "dsp",
1117 .class = &omap44xx_dsp_hwmod_class, 963 .class = &omap44xx_dsp_hwmod_class,
@@ -1128,10 +974,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
1128 .modulemode = MODULEMODE_HWCTRL, 974 .modulemode = MODULEMODE_HWCTRL,
1129 }, 975 },
1130 }, 976 },
1131 .slaves = omap44xx_dsp_slaves,
1132 .slaves_cnt = ARRAY_SIZE(omap44xx_dsp_slaves),
1133 .masters = omap44xx_dsp_masters,
1134 .masters_cnt = ARRAY_SIZE(omap44xx_dsp_masters),
1135}; 977};
1136 978
1137/* 979/*
@@ -1152,11 +994,6 @@ static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
1152}; 994};
1153 995
1154/* dss */ 996/* dss */
1155/* dss master ports */
1156static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = {
1157 &omap44xx_dss__l3_main_1,
1158};
1159
1160static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { 997static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
1161 { 998 {
1162 .pa_start = 0x58000000, 999 .pa_start = 0x58000000,
@@ -1193,12 +1030,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {
1193 .user = OCP_USER_MPU, 1030 .user = OCP_USER_MPU,
1194}; 1031};
1195 1032
1196/* dss slave ports */
1197static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
1198 &omap44xx_l3_main_2__dss,
1199 &omap44xx_l4_per__dss,
1200};
1201
1202static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1033static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1203 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1034 { .role = "sys_clk", .clk = "dss_sys_clk" },
1204 { .role = "tv_clk", .clk = "dss_tv_clk" }, 1035 { .role = "tv_clk", .clk = "dss_tv_clk" },
@@ -1219,10 +1050,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = {
1219 }, 1050 },
1220 .opt_clks = dss_opt_clks, 1051 .opt_clks = dss_opt_clks,
1221 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 1052 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
1222 .slaves = omap44xx_dss_slaves,
1223 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves),
1224 .masters = omap44xx_dss_masters,
1225 .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters),
1226}; 1053};
1227 1054
1228/* 1055/*
@@ -1301,12 +1128,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
1301 .user = OCP_USER_MPU, 1128 .user = OCP_USER_MPU,
1302}; 1129};
1303 1130
1304/* dss_dispc slave ports */
1305static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
1306 &omap44xx_l3_main_2__dss_dispc,
1307 &omap44xx_l4_per__dss_dispc,
1308};
1309
1310static struct omap_hwmod omap44xx_dss_dispc_hwmod = { 1131static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1311 .name = "dss_dispc", 1132 .name = "dss_dispc",
1312 .class = &omap44xx_dispc_hwmod_class, 1133 .class = &omap44xx_dispc_hwmod_class,
@@ -1320,8 +1141,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1320 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, 1141 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1321 }, 1142 },
1322 }, 1143 },
1323 .slaves = omap44xx_dss_dispc_slaves,
1324 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
1325 .dev_attr = &omap44xx_dss_dispc_dev_attr 1144 .dev_attr = &omap44xx_dss_dispc_dev_attr
1326}; 1145};
1327 1146
@@ -1394,12 +1213,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {
1394 .user = OCP_USER_MPU, 1213 .user = OCP_USER_MPU,
1395}; 1214};
1396 1215
1397/* dss_dsi1 slave ports */
1398static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
1399 &omap44xx_l3_main_2__dss_dsi1,
1400 &omap44xx_l4_per__dss_dsi1,
1401};
1402
1403static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { 1216static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1404 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1217 { .role = "sys_clk", .clk = "dss_sys_clk" },
1405}; 1218};
@@ -1419,8 +1232,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1419 }, 1232 },
1420 .opt_clks = dss_dsi1_opt_clks, 1233 .opt_clks = dss_dsi1_opt_clks,
1421 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), 1234 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1422 .slaves = omap44xx_dss_dsi1_slaves,
1423 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
1424}; 1235};
1425 1236
1426/* dss_dsi2 */ 1237/* dss_dsi2 */
@@ -1471,12 +1282,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {
1471 .user = OCP_USER_MPU, 1282 .user = OCP_USER_MPU,
1472}; 1283};
1473 1284
1474/* dss_dsi2 slave ports */
1475static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
1476 &omap44xx_l3_main_2__dss_dsi2,
1477 &omap44xx_l4_per__dss_dsi2,
1478};
1479
1480static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { 1285static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {
1481 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1286 { .role = "sys_clk", .clk = "dss_sys_clk" },
1482}; 1287};
@@ -1496,8 +1301,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1496 }, 1301 },
1497 .opt_clks = dss_dsi2_opt_clks, 1302 .opt_clks = dss_dsi2_opt_clks,
1498 .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), 1303 .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks),
1499 .slaves = omap44xx_dss_dsi2_slaves,
1500 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
1501}; 1304};
1502 1305
1503/* 1306/*
@@ -1568,12 +1371,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {
1568 .user = OCP_USER_MPU, 1371 .user = OCP_USER_MPU,
1569}; 1372};
1570 1373
1571/* dss_hdmi slave ports */
1572static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
1573 &omap44xx_l3_main_2__dss_hdmi,
1574 &omap44xx_l4_per__dss_hdmi,
1575};
1576
1577static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { 1374static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
1578 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1375 { .role = "sys_clk", .clk = "dss_sys_clk" },
1579}; 1376};
@@ -1593,8 +1390,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1593 }, 1390 },
1594 .opt_clks = dss_hdmi_opt_clks, 1391 .opt_clks = dss_hdmi_opt_clks,
1595 .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), 1392 .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks),
1596 .slaves = omap44xx_dss_hdmi_slaves,
1597 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
1598}; 1393};
1599 1394
1600/* 1395/*
@@ -1660,12 +1455,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {
1660 .user = OCP_USER_MPU, 1455 .user = OCP_USER_MPU,
1661}; 1456};
1662 1457
1663/* dss_rfbi slave ports */
1664static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
1665 &omap44xx_l3_main_2__dss_rfbi,
1666 &omap44xx_l4_per__dss_rfbi,
1667};
1668
1669static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { 1458static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1670 { .role = "ick", .clk = "dss_fck" }, 1459 { .role = "ick", .clk = "dss_fck" },
1671}; 1460};
@@ -1684,8 +1473,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
1684 }, 1473 },
1685 .opt_clks = dss_rfbi_opt_clks, 1474 .opt_clks = dss_rfbi_opt_clks,
1686 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), 1475 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1687 .slaves = omap44xx_dss_rfbi_slaves,
1688 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
1689}; 1476};
1690 1477
1691/* 1478/*
@@ -1735,12 +1522,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
1735 .user = OCP_USER_MPU, 1522 .user = OCP_USER_MPU,
1736}; 1523};
1737 1524
1738/* dss_venc slave ports */
1739static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
1740 &omap44xx_l3_main_2__dss_venc,
1741 &omap44xx_l4_per__dss_venc,
1742};
1743
1744static struct omap_hwmod omap44xx_dss_venc_hwmod = { 1525static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1745 .name = "dss_venc", 1526 .name = "dss_venc",
1746 .class = &omap44xx_venc_hwmod_class, 1527 .class = &omap44xx_venc_hwmod_class,
@@ -1752,8 +1533,6 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1752 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, 1533 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1753 }, 1534 },
1754 }, 1535 },
1755 .slaves = omap44xx_dss_venc_slaves,
1756 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves),
1757}; 1536};
1758 1537
1759/* 1538/*
@@ -1810,11 +1589,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {
1810 .user = OCP_USER_MPU | OCP_USER_SDMA, 1589 .user = OCP_USER_MPU | OCP_USER_SDMA,
1811}; 1590};
1812 1591
1813/* gpio1 slave ports */
1814static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = {
1815 &omap44xx_l4_wkup__gpio1,
1816};
1817
1818static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { 1592static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
1819 { .role = "dbclk", .clk = "gpio1_dbclk" }, 1593 { .role = "dbclk", .clk = "gpio1_dbclk" },
1820}; 1594};
@@ -1835,8 +1609,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
1835 .opt_clks = gpio1_opt_clks, 1609 .opt_clks = gpio1_opt_clks,
1836 .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), 1610 .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
1837 .dev_attr = &gpio_dev_attr, 1611 .dev_attr = &gpio_dev_attr,
1838 .slaves = omap44xx_gpio1_slaves,
1839 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio1_slaves),
1840}; 1612};
1841 1613
1842/* gpio2 */ 1614/* gpio2 */
@@ -1864,11 +1636,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {
1864 .user = OCP_USER_MPU | OCP_USER_SDMA, 1636 .user = OCP_USER_MPU | OCP_USER_SDMA,
1865}; 1637};
1866 1638
1867/* gpio2 slave ports */
1868static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[] = {
1869 &omap44xx_l4_per__gpio2,
1870};
1871
1872static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { 1639static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
1873 { .role = "dbclk", .clk = "gpio2_dbclk" }, 1640 { .role = "dbclk", .clk = "gpio2_dbclk" },
1874}; 1641};
@@ -1890,8 +1657,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
1890 .opt_clks = gpio2_opt_clks, 1657 .opt_clks = gpio2_opt_clks,
1891 .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), 1658 .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
1892 .dev_attr = &gpio_dev_attr, 1659 .dev_attr = &gpio_dev_attr,
1893 .slaves = omap44xx_gpio2_slaves,
1894 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio2_slaves),
1895}; 1660};
1896 1661
1897/* gpio3 */ 1662/* gpio3 */
@@ -1919,11 +1684,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {
1919 .user = OCP_USER_MPU | OCP_USER_SDMA, 1684 .user = OCP_USER_MPU | OCP_USER_SDMA,
1920}; 1685};
1921 1686
1922/* gpio3 slave ports */
1923static struct omap_hwmod_ocp_if *omap44xx_gpio3_slaves[] = {
1924 &omap44xx_l4_per__gpio3,
1925};
1926
1927static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { 1687static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
1928 { .role = "dbclk", .clk = "gpio3_dbclk" }, 1688 { .role = "dbclk", .clk = "gpio3_dbclk" },
1929}; 1689};
@@ -1945,8 +1705,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
1945 .opt_clks = gpio3_opt_clks, 1705 .opt_clks = gpio3_opt_clks,
1946 .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), 1706 .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
1947 .dev_attr = &gpio_dev_attr, 1707 .dev_attr = &gpio_dev_attr,
1948 .slaves = omap44xx_gpio3_slaves,
1949 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio3_slaves),
1950}; 1708};
1951 1709
1952/* gpio4 */ 1710/* gpio4 */
@@ -1974,11 +1732,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = {
1974 .user = OCP_USER_MPU | OCP_USER_SDMA, 1732 .user = OCP_USER_MPU | OCP_USER_SDMA,
1975}; 1733};
1976 1734
1977/* gpio4 slave ports */
1978static struct omap_hwmod_ocp_if *omap44xx_gpio4_slaves[] = {
1979 &omap44xx_l4_per__gpio4,
1980};
1981
1982static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { 1735static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
1983 { .role = "dbclk", .clk = "gpio4_dbclk" }, 1736 { .role = "dbclk", .clk = "gpio4_dbclk" },
1984}; 1737};
@@ -2000,8 +1753,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
2000 .opt_clks = gpio4_opt_clks, 1753 .opt_clks = gpio4_opt_clks,
2001 .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), 1754 .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
2002 .dev_attr = &gpio_dev_attr, 1755 .dev_attr = &gpio_dev_attr,
2003 .slaves = omap44xx_gpio4_slaves,
2004 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio4_slaves),
2005}; 1756};
2006 1757
2007/* gpio5 */ 1758/* gpio5 */
@@ -2029,11 +1780,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = {
2029 .user = OCP_USER_MPU | OCP_USER_SDMA, 1780 .user = OCP_USER_MPU | OCP_USER_SDMA,
2030}; 1781};
2031 1782
2032/* gpio5 slave ports */
2033static struct omap_hwmod_ocp_if *omap44xx_gpio5_slaves[] = {
2034 &omap44xx_l4_per__gpio5,
2035};
2036
2037static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { 1783static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
2038 { .role = "dbclk", .clk = "gpio5_dbclk" }, 1784 { .role = "dbclk", .clk = "gpio5_dbclk" },
2039}; 1785};
@@ -2055,8 +1801,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
2055 .opt_clks = gpio5_opt_clks, 1801 .opt_clks = gpio5_opt_clks,
2056 .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), 1802 .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
2057 .dev_attr = &gpio_dev_attr, 1803 .dev_attr = &gpio_dev_attr,
2058 .slaves = omap44xx_gpio5_slaves,
2059 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio5_slaves),
2060}; 1804};
2061 1805
2062/* gpio6 */ 1806/* gpio6 */
@@ -2084,11 +1828,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = {
2084 .user = OCP_USER_MPU | OCP_USER_SDMA, 1828 .user = OCP_USER_MPU | OCP_USER_SDMA,
2085}; 1829};
2086 1830
2087/* gpio6 slave ports */
2088static struct omap_hwmod_ocp_if *omap44xx_gpio6_slaves[] = {
2089 &omap44xx_l4_per__gpio6,
2090};
2091
2092static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { 1831static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
2093 { .role = "dbclk", .clk = "gpio6_dbclk" }, 1832 { .role = "dbclk", .clk = "gpio6_dbclk" },
2094}; 1833};
@@ -2110,8 +1849,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
2110 .opt_clks = gpio6_opt_clks, 1849 .opt_clks = gpio6_opt_clks,
2111 .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), 1850 .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
2112 .dev_attr = &gpio_dev_attr, 1851 .dev_attr = &gpio_dev_attr,
2113 .slaves = omap44xx_gpio6_slaves,
2114 .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves),
2115}; 1852};
2116 1853
2117/* 1854/*
@@ -2146,11 +1883,6 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {
2146 { .irq = -1 } 1883 { .irq = -1 }
2147}; 1884};
2148 1885
2149/* hsi master ports */
2150static struct omap_hwmod_ocp_if *omap44xx_hsi_masters[] = {
2151 &omap44xx_hsi__l3_main_2,
2152};
2153
2154static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { 1886static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = {
2155 { 1887 {
2156 .pa_start = 0x4a058000, 1888 .pa_start = 0x4a058000,
@@ -2169,11 +1901,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {
2169 .user = OCP_USER_MPU | OCP_USER_SDMA, 1901 .user = OCP_USER_MPU | OCP_USER_SDMA,
2170}; 1902};
2171 1903
2172/* hsi slave ports */
2173static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = {
2174 &omap44xx_l4_cfg__hsi,
2175};
2176
2177static struct omap_hwmod omap44xx_hsi_hwmod = { 1904static struct omap_hwmod omap44xx_hsi_hwmod = {
2178 .name = "hsi", 1905 .name = "hsi",
2179 .class = &omap44xx_hsi_hwmod_class, 1906 .class = &omap44xx_hsi_hwmod_class,
@@ -2187,10 +1914,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
2187 .modulemode = MODULEMODE_HWCTRL, 1914 .modulemode = MODULEMODE_HWCTRL,
2188 }, 1915 },
2189 }, 1916 },
2190 .slaves = omap44xx_hsi_slaves,
2191 .slaves_cnt = ARRAY_SIZE(omap44xx_hsi_slaves),
2192 .masters = omap44xx_hsi_masters,
2193 .masters_cnt = ARRAY_SIZE(omap44xx_hsi_masters),
2194}; 1917};
2195 1918
2196/* 1919/*
@@ -2252,11 +1975,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
2252 .user = OCP_USER_MPU | OCP_USER_SDMA, 1975 .user = OCP_USER_MPU | OCP_USER_SDMA,
2253}; 1976};
2254 1977
2255/* i2c1 slave ports */
2256static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
2257 &omap44xx_l4_per__i2c1,
2258};
2259
2260static struct omap_hwmod omap44xx_i2c1_hwmod = { 1978static struct omap_hwmod omap44xx_i2c1_hwmod = {
2261 .name = "i2c1", 1979 .name = "i2c1",
2262 .class = &omap44xx_i2c_hwmod_class, 1980 .class = &omap44xx_i2c_hwmod_class,
@@ -2272,8 +1990,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2272 .modulemode = MODULEMODE_SWCTRL, 1990 .modulemode = MODULEMODE_SWCTRL,
2273 }, 1991 },
2274 }, 1992 },
2275 .slaves = omap44xx_i2c1_slaves,
2276 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves),
2277 .dev_attr = &i2c_dev_attr, 1993 .dev_attr = &i2c_dev_attr,
2278}; 1994};
2279 1995
@@ -2308,11 +2024,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
2308 .user = OCP_USER_MPU | OCP_USER_SDMA, 2024 .user = OCP_USER_MPU | OCP_USER_SDMA,
2309}; 2025};
2310 2026
2311/* i2c2 slave ports */
2312static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
2313 &omap44xx_l4_per__i2c2,
2314};
2315
2316static struct omap_hwmod omap44xx_i2c2_hwmod = { 2027static struct omap_hwmod omap44xx_i2c2_hwmod = {
2317 .name = "i2c2", 2028 .name = "i2c2",
2318 .class = &omap44xx_i2c_hwmod_class, 2029 .class = &omap44xx_i2c_hwmod_class,
@@ -2328,8 +2039,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2328 .modulemode = MODULEMODE_SWCTRL, 2039 .modulemode = MODULEMODE_SWCTRL,
2329 }, 2040 },
2330 }, 2041 },
2331 .slaves = omap44xx_i2c2_slaves,
2332 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves),
2333 .dev_attr = &i2c_dev_attr, 2042 .dev_attr = &i2c_dev_attr,
2334}; 2043};
2335 2044
@@ -2364,11 +2073,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
2364 .user = OCP_USER_MPU | OCP_USER_SDMA, 2073 .user = OCP_USER_MPU | OCP_USER_SDMA,
2365}; 2074};
2366 2075
2367/* i2c3 slave ports */
2368static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
2369 &omap44xx_l4_per__i2c3,
2370};
2371
2372static struct omap_hwmod omap44xx_i2c3_hwmod = { 2076static struct omap_hwmod omap44xx_i2c3_hwmod = {
2373 .name = "i2c3", 2077 .name = "i2c3",
2374 .class = &omap44xx_i2c_hwmod_class, 2078 .class = &omap44xx_i2c_hwmod_class,
@@ -2384,8 +2088,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2384 .modulemode = MODULEMODE_SWCTRL, 2088 .modulemode = MODULEMODE_SWCTRL,
2385 }, 2089 },
2386 }, 2090 },
2387 .slaves = omap44xx_i2c3_slaves,
2388 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves),
2389 .dev_attr = &i2c_dev_attr, 2091 .dev_attr = &i2c_dev_attr,
2390}; 2092};
2391 2093
@@ -2420,11 +2122,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
2420 .user = OCP_USER_MPU | OCP_USER_SDMA, 2122 .user = OCP_USER_MPU | OCP_USER_SDMA,
2421}; 2123};
2422 2124
2423/* i2c4 slave ports */
2424static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
2425 &omap44xx_l4_per__i2c4,
2426};
2427
2428static struct omap_hwmod omap44xx_i2c4_hwmod = { 2125static struct omap_hwmod omap44xx_i2c4_hwmod = {
2429 .name = "i2c4", 2126 .name = "i2c4",
2430 .class = &omap44xx_i2c_hwmod_class, 2127 .class = &omap44xx_i2c_hwmod_class,
@@ -2440,8 +2137,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2440 .modulemode = MODULEMODE_SWCTRL, 2137 .modulemode = MODULEMODE_SWCTRL,
2441 }, 2138 },
2442 }, 2139 },
2443 .slaves = omap44xx_i2c4_slaves,
2444 .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves),
2445 .dev_attr = &i2c_dev_attr, 2140 .dev_attr = &i2c_dev_attr,
2446}; 2141};
2447 2142
@@ -2466,11 +2161,6 @@ static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = {
2466 { .name = "mmu_cache", .rst_shift = 2 }, 2161 { .name = "mmu_cache", .rst_shift = 2 },
2467}; 2162};
2468 2163
2469/* ipu master ports */
2470static struct omap_hwmod_ocp_if *omap44xx_ipu_masters[] = {
2471 &omap44xx_ipu__l3_main_2,
2472};
2473
2474/* l3_main_2 -> ipu */ 2164/* l3_main_2 -> ipu */
2475static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = { 2165static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = {
2476 .master = &omap44xx_l3_main_2_hwmod, 2166 .master = &omap44xx_l3_main_2_hwmod,
@@ -2479,11 +2169,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = {
2479 .user = OCP_USER_MPU | OCP_USER_SDMA, 2169 .user = OCP_USER_MPU | OCP_USER_SDMA,
2480}; 2170};
2481 2171
2482/* ipu slave ports */
2483static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = {
2484 &omap44xx_l3_main_2__ipu,
2485};
2486
2487static struct omap_hwmod omap44xx_ipu_hwmod = { 2172static struct omap_hwmod omap44xx_ipu_hwmod = {
2488 .name = "ipu", 2173 .name = "ipu",
2489 .class = &omap44xx_ipu_hwmod_class, 2174 .class = &omap44xx_ipu_hwmod_class,
@@ -2500,10 +2185,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2500 .modulemode = MODULEMODE_HWCTRL, 2185 .modulemode = MODULEMODE_HWCTRL,
2501 }, 2186 },
2502 }, 2187 },
2503 .slaves = omap44xx_ipu_slaves,
2504 .slaves_cnt = ARRAY_SIZE(omap44xx_ipu_slaves),
2505 .masters = omap44xx_ipu_masters,
2506 .masters_cnt = ARRAY_SIZE(omap44xx_ipu_masters),
2507}; 2188};
2508 2189
2509/* 2190/*
@@ -2550,11 +2231,6 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
2550 { .dma_req = -1 } 2231 { .dma_req = -1 }
2551}; 2232};
2552 2233
2553/* iss master ports */
2554static struct omap_hwmod_ocp_if *omap44xx_iss_masters[] = {
2555 &omap44xx_iss__l3_main_2,
2556};
2557
2558static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { 2234static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = {
2559 { 2235 {
2560 .pa_start = 0x52000000, 2236 .pa_start = 0x52000000,
@@ -2573,11 +2249,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
2573 .user = OCP_USER_MPU | OCP_USER_SDMA, 2249 .user = OCP_USER_MPU | OCP_USER_SDMA,
2574}; 2250};
2575 2251
2576/* iss slave ports */
2577static struct omap_hwmod_ocp_if *omap44xx_iss_slaves[] = {
2578 &omap44xx_l3_main_2__iss,
2579};
2580
2581static struct omap_hwmod_opt_clk iss_opt_clks[] = { 2252static struct omap_hwmod_opt_clk iss_opt_clks[] = {
2582 { .role = "ctrlclk", .clk = "iss_ctrlclk" }, 2253 { .role = "ctrlclk", .clk = "iss_ctrlclk" },
2583}; 2254};
@@ -2598,10 +2269,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
2598 }, 2269 },
2599 .opt_clks = iss_opt_clks, 2270 .opt_clks = iss_opt_clks,
2600 .opt_clks_cnt = ARRAY_SIZE(iss_opt_clks), 2271 .opt_clks_cnt = ARRAY_SIZE(iss_opt_clks),
2601 .slaves = omap44xx_iss_slaves,
2602 .slaves_cnt = ARRAY_SIZE(omap44xx_iss_slaves),
2603 .masters = omap44xx_iss_masters,
2604 .masters_cnt = ARRAY_SIZE(omap44xx_iss_masters),
2605}; 2272};
2606 2273
2607/* 2274/*
@@ -2627,12 +2294,6 @@ static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
2627 { .name = "logic", .rst_shift = 2 }, 2294 { .name = "logic", .rst_shift = 2 },
2628}; 2295};
2629 2296
2630/* iva master ports */
2631static struct omap_hwmod_ocp_if *omap44xx_iva_masters[] = {
2632 &omap44xx_iva__l3_main_2,
2633 &omap44xx_iva__l3_instr,
2634};
2635
2636static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { 2297static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {
2637 { 2298 {
2638 .pa_start = 0x5a000000, 2299 .pa_start = 0x5a000000,
@@ -2651,12 +2312,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {
2651 .user = OCP_USER_MPU, 2312 .user = OCP_USER_MPU,
2652}; 2313};
2653 2314
2654/* iva slave ports */
2655static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = {
2656 &omap44xx_dsp__iva,
2657 &omap44xx_l3_main_2__iva,
2658};
2659
2660static struct omap_hwmod omap44xx_iva_hwmod = { 2315static struct omap_hwmod omap44xx_iva_hwmod = {
2661 .name = "iva", 2316 .name = "iva",
2662 .class = &omap44xx_iva_hwmod_class, 2317 .class = &omap44xx_iva_hwmod_class,
@@ -2673,10 +2328,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
2673 .modulemode = MODULEMODE_HWCTRL, 2328 .modulemode = MODULEMODE_HWCTRL,
2674 }, 2329 },
2675 }, 2330 },
2676 .slaves = omap44xx_iva_slaves,
2677 .slaves_cnt = ARRAY_SIZE(omap44xx_iva_slaves),
2678 .masters = omap44xx_iva_masters,
2679 .masters_cnt = ARRAY_SIZE(omap44xx_iva_masters),
2680}; 2331};
2681 2332
2682/* 2333/*
@@ -2726,11 +2377,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {
2726 .user = OCP_USER_MPU | OCP_USER_SDMA, 2377 .user = OCP_USER_MPU | OCP_USER_SDMA,
2727}; 2378};
2728 2379
2729/* kbd slave ports */
2730static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = {
2731 &omap44xx_l4_wkup__kbd,
2732};
2733
2734static struct omap_hwmod omap44xx_kbd_hwmod = { 2380static struct omap_hwmod omap44xx_kbd_hwmod = {
2735 .name = "kbd", 2381 .name = "kbd",
2736 .class = &omap44xx_kbd_hwmod_class, 2382 .class = &omap44xx_kbd_hwmod_class,
@@ -2744,8 +2390,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
2744 .modulemode = MODULEMODE_SWCTRL, 2390 .modulemode = MODULEMODE_SWCTRL,
2745 }, 2391 },
2746 }, 2392 },
2747 .slaves = omap44xx_kbd_slaves,
2748 .slaves_cnt = ARRAY_SIZE(omap44xx_kbd_slaves),
2749}; 2393};
2750 2394
2751/* 2395/*
@@ -2793,11 +2437,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {
2793 .user = OCP_USER_MPU | OCP_USER_SDMA, 2437 .user = OCP_USER_MPU | OCP_USER_SDMA,
2794}; 2438};
2795 2439
2796/* mailbox slave ports */
2797static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {
2798 &omap44xx_l4_cfg__mailbox,
2799};
2800
2801static struct omap_hwmod omap44xx_mailbox_hwmod = { 2440static struct omap_hwmod omap44xx_mailbox_hwmod = {
2802 .name = "mailbox", 2441 .name = "mailbox",
2803 .class = &omap44xx_mailbox_hwmod_class, 2442 .class = &omap44xx_mailbox_hwmod_class,
@@ -2809,8 +2448,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
2809 .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, 2448 .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET,
2810 }, 2449 },
2811 }, 2450 },
2812 .slaves = omap44xx_mailbox_slaves,
2813 .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves),
2814}; 2451};
2815 2452
2816/* 2453/*
@@ -2883,11 +2520,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
2883 .user = OCP_USER_SDMA, 2520 .user = OCP_USER_SDMA,
2884}; 2521};
2885 2522
2886/* mcbsp1 slave ports */
2887static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
2888 &omap44xx_l4_abe__mcbsp1,
2889 &omap44xx_l4_abe__mcbsp1_dma,
2890};
2891 2523
2892static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { 2524static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
2893 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2525 { .role = "pad_fck", .clk = "pad_clks_ck" },
@@ -2908,8 +2540,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2908 .modulemode = MODULEMODE_SWCTRL, 2540 .modulemode = MODULEMODE_SWCTRL,
2909 }, 2541 },
2910 }, 2542 },
2911 .slaves = omap44xx_mcbsp1_slaves,
2912 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
2913 .opt_clks = mcbsp1_opt_clks, 2543 .opt_clks = mcbsp1_opt_clks,
2914 .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks), 2544 .opt_clks_cnt = ARRAY_SIZE(mcbsp1_opt_clks),
2915}; 2545};
@@ -2965,12 +2595,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
2965 .user = OCP_USER_SDMA, 2595 .user = OCP_USER_SDMA,
2966}; 2596};
2967 2597
2968/* mcbsp2 slave ports */
2969static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
2970 &omap44xx_l4_abe__mcbsp2,
2971 &omap44xx_l4_abe__mcbsp2_dma,
2972};
2973
2974static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { 2598static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
2975 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2599 { .role = "pad_fck", .clk = "pad_clks_ck" },
2976 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, 2600 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
@@ -2990,8 +2614,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2990 .modulemode = MODULEMODE_SWCTRL, 2614 .modulemode = MODULEMODE_SWCTRL,
2991 }, 2615 },
2992 }, 2616 },
2993 .slaves = omap44xx_mcbsp2_slaves,
2994 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
2995 .opt_clks = mcbsp2_opt_clks, 2617 .opt_clks = mcbsp2_opt_clks,
2996 .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks), 2618 .opt_clks_cnt = ARRAY_SIZE(mcbsp2_opt_clks),
2997}; 2619};
@@ -3047,12 +2669,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
3047 .user = OCP_USER_SDMA, 2669 .user = OCP_USER_SDMA,
3048}; 2670};
3049 2671
3050/* mcbsp3 slave ports */
3051static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
3052 &omap44xx_l4_abe__mcbsp3,
3053 &omap44xx_l4_abe__mcbsp3_dma,
3054};
3055
3056static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { 2672static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
3057 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2673 { .role = "pad_fck", .clk = "pad_clks_ck" },
3058 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, 2674 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
@@ -3072,8 +2688,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3072 .modulemode = MODULEMODE_SWCTRL, 2688 .modulemode = MODULEMODE_SWCTRL,
3073 }, 2689 },
3074 }, 2690 },
3075 .slaves = omap44xx_mcbsp3_slaves,
3076 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
3077 .opt_clks = mcbsp3_opt_clks, 2691 .opt_clks = mcbsp3_opt_clks,
3078 .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks), 2692 .opt_clks_cnt = ARRAY_SIZE(mcbsp3_opt_clks),
3079}; 2693};
@@ -3109,11 +2723,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
3109 .user = OCP_USER_MPU | OCP_USER_SDMA, 2723 .user = OCP_USER_MPU | OCP_USER_SDMA,
3110}; 2724};
3111 2725
3112/* mcbsp4 slave ports */
3113static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
3114 &omap44xx_l4_per__mcbsp4,
3115};
3116
3117static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { 2726static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
3118 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2727 { .role = "pad_fck", .clk = "pad_clks_ck" },
3119 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, 2728 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
@@ -3133,8 +2742,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3133 .modulemode = MODULEMODE_SWCTRL, 2742 .modulemode = MODULEMODE_SWCTRL,
3134 }, 2743 },
3135 }, 2744 },
3136 .slaves = omap44xx_mcbsp4_slaves,
3137 .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
3138 .opt_clks = mcbsp4_opt_clks, 2745 .opt_clks = mcbsp4_opt_clks,
3139 .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks), 2746 .opt_clks_cnt = ARRAY_SIZE(mcbsp4_opt_clks),
3140}; 2747};
@@ -3209,12 +2816,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {
3209 .user = OCP_USER_SDMA, 2816 .user = OCP_USER_SDMA,
3210}; 2817};
3211 2818
3212/* mcpdm slave ports */
3213static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = {
3214 &omap44xx_l4_abe__mcpdm,
3215 &omap44xx_l4_abe__mcpdm_dma,
3216};
3217
3218static struct omap_hwmod omap44xx_mcpdm_hwmod = { 2819static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3219 .name = "mcpdm", 2820 .name = "mcpdm",
3220 .class = &omap44xx_mcpdm_hwmod_class, 2821 .class = &omap44xx_mcpdm_hwmod_class,
@@ -3229,8 +2830,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3229 .modulemode = MODULEMODE_SWCTRL, 2830 .modulemode = MODULEMODE_SWCTRL,
3230 }, 2831 },
3231 }, 2832 },
3232 .slaves = omap44xx_mcpdm_slaves,
3233 .slaves_cnt = ARRAY_SIZE(omap44xx_mcpdm_slaves),
3234}; 2833};
3235 2834
3236/* 2835/*
@@ -3292,11 +2891,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = {
3292 .user = OCP_USER_MPU | OCP_USER_SDMA, 2891 .user = OCP_USER_MPU | OCP_USER_SDMA,
3293}; 2892};
3294 2893
3295/* mcspi1 slave ports */
3296static struct omap_hwmod_ocp_if *omap44xx_mcspi1_slaves[] = {
3297 &omap44xx_l4_per__mcspi1,
3298};
3299
3300/* mcspi1 dev_attr */ 2894/* mcspi1 dev_attr */
3301static struct omap2_mcspi_dev_attr mcspi1_dev_attr = { 2895static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
3302 .num_chipselect = 4, 2896 .num_chipselect = 4,
@@ -3317,8 +2911,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3317 }, 2911 },
3318 }, 2912 },
3319 .dev_attr = &mcspi1_dev_attr, 2913 .dev_attr = &mcspi1_dev_attr,
3320 .slaves = omap44xx_mcspi1_slaves,
3321 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi1_slaves),
3322}; 2914};
3323 2915
3324/* mcspi2 */ 2916/* mcspi2 */
@@ -3354,11 +2946,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = {
3354 .user = OCP_USER_MPU | OCP_USER_SDMA, 2946 .user = OCP_USER_MPU | OCP_USER_SDMA,
3355}; 2947};
3356 2948
3357/* mcspi2 slave ports */
3358static struct omap_hwmod_ocp_if *omap44xx_mcspi2_slaves[] = {
3359 &omap44xx_l4_per__mcspi2,
3360};
3361
3362/* mcspi2 dev_attr */ 2949/* mcspi2 dev_attr */
3363static struct omap2_mcspi_dev_attr mcspi2_dev_attr = { 2950static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
3364 .num_chipselect = 2, 2951 .num_chipselect = 2,
@@ -3379,8 +2966,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3379 }, 2966 },
3380 }, 2967 },
3381 .dev_attr = &mcspi2_dev_attr, 2968 .dev_attr = &mcspi2_dev_attr,
3382 .slaves = omap44xx_mcspi2_slaves,
3383 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi2_slaves),
3384}; 2969};
3385 2970
3386/* mcspi3 */ 2971/* mcspi3 */
@@ -3416,11 +3001,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = {
3416 .user = OCP_USER_MPU | OCP_USER_SDMA, 3001 .user = OCP_USER_MPU | OCP_USER_SDMA,
3417}; 3002};
3418 3003
3419/* mcspi3 slave ports */
3420static struct omap_hwmod_ocp_if *omap44xx_mcspi3_slaves[] = {
3421 &omap44xx_l4_per__mcspi3,
3422};
3423
3424/* mcspi3 dev_attr */ 3004/* mcspi3 dev_attr */
3425static struct omap2_mcspi_dev_attr mcspi3_dev_attr = { 3005static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
3426 .num_chipselect = 2, 3006 .num_chipselect = 2,
@@ -3441,8 +3021,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3441 }, 3021 },
3442 }, 3022 },
3443 .dev_attr = &mcspi3_dev_attr, 3023 .dev_attr = &mcspi3_dev_attr,
3444 .slaves = omap44xx_mcspi3_slaves,
3445 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi3_slaves),
3446}; 3024};
3447 3025
3448/* mcspi4 */ 3026/* mcspi4 */
@@ -3476,11 +3054,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = {
3476 .user = OCP_USER_MPU | OCP_USER_SDMA, 3054 .user = OCP_USER_MPU | OCP_USER_SDMA,
3477}; 3055};
3478 3056
3479/* mcspi4 slave ports */
3480static struct omap_hwmod_ocp_if *omap44xx_mcspi4_slaves[] = {
3481 &omap44xx_l4_per__mcspi4,
3482};
3483
3484/* mcspi4 dev_attr */ 3057/* mcspi4 dev_attr */
3485static struct omap2_mcspi_dev_attr mcspi4_dev_attr = { 3058static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
3486 .num_chipselect = 1, 3059 .num_chipselect = 1,
@@ -3501,8 +3074,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3501 }, 3074 },
3502 }, 3075 },
3503 .dev_attr = &mcspi4_dev_attr, 3076 .dev_attr = &mcspi4_dev_attr,
3504 .slaves = omap44xx_mcspi4_slaves,
3505 .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi4_slaves),
3506}; 3077};
3507 3078
3508/* 3079/*
@@ -3539,11 +3110,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
3539 { .dma_req = -1 } 3110 { .dma_req = -1 }
3540}; 3111};
3541 3112
3542/* mmc1 master ports */
3543static struct omap_hwmod_ocp_if *omap44xx_mmc1_masters[] = {
3544 &omap44xx_mmc1__l3_main_1,
3545};
3546
3547static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { 3113static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {
3548 { 3114 {
3549 .pa_start = 0x4809c000, 3115 .pa_start = 0x4809c000,
@@ -3562,11 +3128,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {
3562 .user = OCP_USER_MPU | OCP_USER_SDMA, 3128 .user = OCP_USER_MPU | OCP_USER_SDMA,
3563}; 3129};
3564 3130
3565/* mmc1 slave ports */
3566static struct omap_hwmod_ocp_if *omap44xx_mmc1_slaves[] = {
3567 &omap44xx_l4_per__mmc1,
3568};
3569
3570/* mmc1 dev_attr */ 3131/* mmc1 dev_attr */
3571static struct omap_mmc_dev_attr mmc1_dev_attr = { 3132static struct omap_mmc_dev_attr mmc1_dev_attr = {
3572 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 3133 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
@@ -3587,10 +3148,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
3587 }, 3148 },
3588 }, 3149 },
3589 .dev_attr = &mmc1_dev_attr, 3150 .dev_attr = &mmc1_dev_attr,
3590 .slaves = omap44xx_mmc1_slaves,
3591 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves),
3592 .masters = omap44xx_mmc1_masters,
3593 .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters),
3594}; 3151};
3595 3152
3596/* mmc2 */ 3153/* mmc2 */
@@ -3605,11 +3162,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
3605 { .dma_req = -1 } 3162 { .dma_req = -1 }
3606}; 3163};
3607 3164
3608/* mmc2 master ports */
3609static struct omap_hwmod_ocp_if *omap44xx_mmc2_masters[] = {
3610 &omap44xx_mmc2__l3_main_1,
3611};
3612
3613static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { 3165static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {
3614 { 3166 {
3615 .pa_start = 0x480b4000, 3167 .pa_start = 0x480b4000,
@@ -3628,11 +3180,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {
3628 .user = OCP_USER_MPU | OCP_USER_SDMA, 3180 .user = OCP_USER_MPU | OCP_USER_SDMA,
3629}; 3181};
3630 3182
3631/* mmc2 slave ports */
3632static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {
3633 &omap44xx_l4_per__mmc2,
3634};
3635
3636static struct omap_hwmod omap44xx_mmc2_hwmod = { 3183static struct omap_hwmod omap44xx_mmc2_hwmod = {
3637 .name = "mmc2", 3184 .name = "mmc2",
3638 .class = &omap44xx_mmc_hwmod_class, 3185 .class = &omap44xx_mmc_hwmod_class,
@@ -3647,10 +3194,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
3647 .modulemode = MODULEMODE_SWCTRL, 3194 .modulemode = MODULEMODE_SWCTRL,
3648 }, 3195 },
3649 }, 3196 },
3650 .slaves = omap44xx_mmc2_slaves,
3651 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves),
3652 .masters = omap44xx_mmc2_masters,
3653 .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters),
3654}; 3197};
3655 3198
3656/* mmc3 */ 3199/* mmc3 */
@@ -3684,11 +3227,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {
3684 .user = OCP_USER_MPU | OCP_USER_SDMA, 3227 .user = OCP_USER_MPU | OCP_USER_SDMA,
3685}; 3228};
3686 3229
3687/* mmc3 slave ports */
3688static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {
3689 &omap44xx_l4_per__mmc3,
3690};
3691
3692static struct omap_hwmod omap44xx_mmc3_hwmod = { 3230static struct omap_hwmod omap44xx_mmc3_hwmod = {
3693 .name = "mmc3", 3231 .name = "mmc3",
3694 .class = &omap44xx_mmc_hwmod_class, 3232 .class = &omap44xx_mmc_hwmod_class,
@@ -3703,8 +3241,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
3703 .modulemode = MODULEMODE_SWCTRL, 3241 .modulemode = MODULEMODE_SWCTRL,
3704 }, 3242 },
3705 }, 3243 },
3706 .slaves = omap44xx_mmc3_slaves,
3707 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves),
3708}; 3244};
3709 3245
3710/* mmc4 */ 3246/* mmc4 */
@@ -3738,11 +3274,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {
3738 .user = OCP_USER_MPU | OCP_USER_SDMA, 3274 .user = OCP_USER_MPU | OCP_USER_SDMA,
3739}; 3275};
3740 3276
3741/* mmc4 slave ports */
3742static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {
3743 &omap44xx_l4_per__mmc4,
3744};
3745
3746static struct omap_hwmod omap44xx_mmc4_hwmod = { 3277static struct omap_hwmod omap44xx_mmc4_hwmod = {
3747 .name = "mmc4", 3278 .name = "mmc4",
3748 .class = &omap44xx_mmc_hwmod_class, 3279 .class = &omap44xx_mmc_hwmod_class,
@@ -3758,8 +3289,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
3758 .modulemode = MODULEMODE_SWCTRL, 3289 .modulemode = MODULEMODE_SWCTRL,
3759 }, 3290 },
3760 }, 3291 },
3761 .slaves = omap44xx_mmc4_slaves,
3762 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves),
3763}; 3292};
3764 3293
3765/* mmc5 */ 3294/* mmc5 */
@@ -3793,11 +3322,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
3793 .user = OCP_USER_MPU | OCP_USER_SDMA, 3322 .user = OCP_USER_MPU | OCP_USER_SDMA,
3794}; 3323};
3795 3324
3796/* mmc5 slave ports */
3797static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {
3798 &omap44xx_l4_per__mmc5,
3799};
3800
3801static struct omap_hwmod omap44xx_mmc5_hwmod = { 3325static struct omap_hwmod omap44xx_mmc5_hwmod = {
3802 .name = "mmc5", 3326 .name = "mmc5",
3803 .class = &omap44xx_mmc_hwmod_class, 3327 .class = &omap44xx_mmc_hwmod_class,
@@ -3812,8 +3336,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
3812 .modulemode = MODULEMODE_SWCTRL, 3336 .modulemode = MODULEMODE_SWCTRL,
3813 }, 3337 },
3814 }, 3338 },
3815 .slaves = omap44xx_mmc5_slaves,
3816 .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves),
3817}; 3339};
3818 3340
3819/* 3341/*
@@ -3833,13 +3355,6 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
3833 { .irq = -1 } 3355 { .irq = -1 }
3834}; 3356};
3835 3357
3836/* mpu master ports */
3837static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
3838 &omap44xx_mpu__l3_main_1,
3839 &omap44xx_mpu__l4_abe,
3840 &omap44xx_mpu__dmm,
3841};
3842
3843static struct omap_hwmod omap44xx_mpu_hwmod = { 3358static struct omap_hwmod omap44xx_mpu_hwmod = {
3844 .name = "mpu", 3359 .name = "mpu",
3845 .class = &omap44xx_mpu_hwmod_class, 3360 .class = &omap44xx_mpu_hwmod_class,
@@ -3853,8 +3368,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
3853 .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, 3368 .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,
3854 }, 3369 },
3855 }, 3370 },
3856 .masters = omap44xx_mpu_masters,
3857 .masters_cnt = ARRAY_SIZE(omap44xx_mpu_masters),
3858}; 3371};
3859 3372
3860/* 3373/*
@@ -3912,11 +3425,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {
3912 .user = OCP_USER_MPU | OCP_USER_SDMA, 3425 .user = OCP_USER_MPU | OCP_USER_SDMA,
3913}; 3426};
3914 3427
3915/* smartreflex_core slave ports */
3916static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
3917 &omap44xx_l4_cfg__smartreflex_core,
3918};
3919
3920static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { 3428static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3921 .name = "smartreflex_core", 3429 .name = "smartreflex_core",
3922 .class = &omap44xx_smartreflex_hwmod_class, 3430 .class = &omap44xx_smartreflex_hwmod_class,
@@ -3931,8 +3439,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3931 .modulemode = MODULEMODE_SWCTRL, 3439 .modulemode = MODULEMODE_SWCTRL,
3932 }, 3440 },
3933 }, 3441 },
3934 .slaves = omap44xx_smartreflex_core_slaves,
3935 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
3936 .dev_attr = &smartreflex_core_dev_attr, 3442 .dev_attr = &smartreflex_core_dev_attr,
3937}; 3443};
3938 3444
@@ -3965,11 +3471,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {
3965 .user = OCP_USER_MPU | OCP_USER_SDMA, 3471 .user = OCP_USER_MPU | OCP_USER_SDMA,
3966}; 3472};
3967 3473
3968/* smartreflex_iva slave ports */
3969static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
3970 &omap44xx_l4_cfg__smartreflex_iva,
3971};
3972
3973static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { 3474static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3974 .name = "smartreflex_iva", 3475 .name = "smartreflex_iva",
3975 .class = &omap44xx_smartreflex_hwmod_class, 3476 .class = &omap44xx_smartreflex_hwmod_class,
@@ -3983,8 +3484,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3983 .modulemode = MODULEMODE_SWCTRL, 3484 .modulemode = MODULEMODE_SWCTRL,
3984 }, 3485 },
3985 }, 3486 },
3986 .slaves = omap44xx_smartreflex_iva_slaves,
3987 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
3988 .dev_attr = &smartreflex_iva_dev_attr, 3487 .dev_attr = &smartreflex_iva_dev_attr,
3989}; 3488};
3990 3489
@@ -4017,11 +3516,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = {
4017 .user = OCP_USER_MPU | OCP_USER_SDMA, 3516 .user = OCP_USER_MPU | OCP_USER_SDMA,
4018}; 3517};
4019 3518
4020/* smartreflex_mpu slave ports */
4021static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
4022 &omap44xx_l4_cfg__smartreflex_mpu,
4023};
4024
4025static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { 3519static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
4026 .name = "smartreflex_mpu", 3520 .name = "smartreflex_mpu",
4027 .class = &omap44xx_smartreflex_hwmod_class, 3521 .class = &omap44xx_smartreflex_hwmod_class,
@@ -4035,8 +3529,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
4035 .modulemode = MODULEMODE_SWCTRL, 3529 .modulemode = MODULEMODE_SWCTRL,
4036 }, 3530 },
4037 }, 3531 },
4038 .slaves = omap44xx_smartreflex_mpu_slaves,
4039 .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
4040 .dev_attr = &smartreflex_mpu_dev_attr, 3532 .dev_attr = &smartreflex_mpu_dev_attr,
4041}; 3533};
4042 3534
@@ -4083,11 +3575,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = {
4083 .user = OCP_USER_MPU | OCP_USER_SDMA, 3575 .user = OCP_USER_MPU | OCP_USER_SDMA,
4084}; 3576};
4085 3577
4086/* spinlock slave ports */
4087static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = {
4088 &omap44xx_l4_cfg__spinlock,
4089};
4090
4091static struct omap_hwmod omap44xx_spinlock_hwmod = { 3578static struct omap_hwmod omap44xx_spinlock_hwmod = {
4092 .name = "spinlock", 3579 .name = "spinlock",
4093 .class = &omap44xx_spinlock_hwmod_class, 3580 .class = &omap44xx_spinlock_hwmod_class,
@@ -4098,8 +3585,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = {
4098 .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, 3585 .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET,
4099 }, 3586 },
4100 }, 3587 },
4101 .slaves = omap44xx_spinlock_slaves,
4102 .slaves_cnt = ARRAY_SIZE(omap44xx_spinlock_slaves),
4103}; 3588};
4104 3589
4105/* 3590/*
@@ -4175,11 +3660,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
4175 .user = OCP_USER_MPU | OCP_USER_SDMA, 3660 .user = OCP_USER_MPU | OCP_USER_SDMA,
4176}; 3661};
4177 3662
4178/* timer1 slave ports */
4179static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
4180 &omap44xx_l4_wkup__timer1,
4181};
4182
4183static struct omap_hwmod omap44xx_timer1_hwmod = { 3663static struct omap_hwmod omap44xx_timer1_hwmod = {
4184 .name = "timer1", 3664 .name = "timer1",
4185 .class = &omap44xx_timer_1ms_hwmod_class, 3665 .class = &omap44xx_timer_1ms_hwmod_class,
@@ -4194,8 +3674,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
4194 }, 3674 },
4195 }, 3675 },
4196 .dev_attr = &capability_alwon_dev_attr, 3676 .dev_attr = &capability_alwon_dev_attr,
4197 .slaves = omap44xx_timer1_slaves,
4198 .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves),
4199}; 3677};
4200 3678
4201/* timer2 */ 3679/* timer2 */
@@ -4223,11 +3701,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
4223 .user = OCP_USER_MPU | OCP_USER_SDMA, 3701 .user = OCP_USER_MPU | OCP_USER_SDMA,
4224}; 3702};
4225 3703
4226/* timer2 slave ports */
4227static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {
4228 &omap44xx_l4_per__timer2,
4229};
4230
4231static struct omap_hwmod omap44xx_timer2_hwmod = { 3704static struct omap_hwmod omap44xx_timer2_hwmod = {
4232 .name = "timer2", 3705 .name = "timer2",
4233 .class = &omap44xx_timer_1ms_hwmod_class, 3706 .class = &omap44xx_timer_1ms_hwmod_class,
@@ -4242,8 +3715,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
4242 }, 3715 },
4243 }, 3716 },
4244 .dev_attr = &capability_alwon_dev_attr, 3717 .dev_attr = &capability_alwon_dev_attr,
4245 .slaves = omap44xx_timer2_slaves,
4246 .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves),
4247}; 3718};
4248 3719
4249/* timer3 */ 3720/* timer3 */
@@ -4271,11 +3742,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {
4271 .user = OCP_USER_MPU | OCP_USER_SDMA, 3742 .user = OCP_USER_MPU | OCP_USER_SDMA,
4272}; 3743};
4273 3744
4274/* timer3 slave ports */
4275static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = {
4276 &omap44xx_l4_per__timer3,
4277};
4278
4279static struct omap_hwmod omap44xx_timer3_hwmod = { 3745static struct omap_hwmod omap44xx_timer3_hwmod = {
4280 .name = "timer3", 3746 .name = "timer3",
4281 .class = &omap44xx_timer_hwmod_class, 3747 .class = &omap44xx_timer_hwmod_class,
@@ -4290,8 +3756,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
4290 }, 3756 },
4291 }, 3757 },
4292 .dev_attr = &capability_alwon_dev_attr, 3758 .dev_attr = &capability_alwon_dev_attr,
4293 .slaves = omap44xx_timer3_slaves,
4294 .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves),
4295}; 3759};
4296 3760
4297/* timer4 */ 3761/* timer4 */
@@ -4319,11 +3783,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {
4319 .user = OCP_USER_MPU | OCP_USER_SDMA, 3783 .user = OCP_USER_MPU | OCP_USER_SDMA,
4320}; 3784};
4321 3785
4322/* timer4 slave ports */
4323static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = {
4324 &omap44xx_l4_per__timer4,
4325};
4326
4327static struct omap_hwmod omap44xx_timer4_hwmod = { 3786static struct omap_hwmod omap44xx_timer4_hwmod = {
4328 .name = "timer4", 3787 .name = "timer4",
4329 .class = &omap44xx_timer_hwmod_class, 3788 .class = &omap44xx_timer_hwmod_class,
@@ -4338,8 +3797,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
4338 }, 3797 },
4339 }, 3798 },
4340 .dev_attr = &capability_alwon_dev_attr, 3799 .dev_attr = &capability_alwon_dev_attr,
4341 .slaves = omap44xx_timer4_slaves,
4342 .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves),
4343}; 3800};
4344 3801
4345/* timer5 */ 3802/* timer5 */
@@ -4385,12 +3842,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {
4385 .user = OCP_USER_SDMA, 3842 .user = OCP_USER_SDMA,
4386}; 3843};
4387 3844
4388/* timer5 slave ports */
4389static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = {
4390 &omap44xx_l4_abe__timer5,
4391 &omap44xx_l4_abe__timer5_dma,
4392};
4393
4394static struct omap_hwmod omap44xx_timer5_hwmod = { 3845static struct omap_hwmod omap44xx_timer5_hwmod = {
4395 .name = "timer5", 3846 .name = "timer5",
4396 .class = &omap44xx_timer_hwmod_class, 3847 .class = &omap44xx_timer_hwmod_class,
@@ -4405,8 +3856,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
4405 }, 3856 },
4406 }, 3857 },
4407 .dev_attr = &capability_alwon_dev_attr, 3858 .dev_attr = &capability_alwon_dev_attr,
4408 .slaves = omap44xx_timer5_slaves,
4409 .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves),
4410}; 3859};
4411 3860
4412/* timer6 */ 3861/* timer6 */
@@ -4452,12 +3901,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {
4452 .user = OCP_USER_SDMA, 3901 .user = OCP_USER_SDMA,
4453}; 3902};
4454 3903
4455/* timer6 slave ports */
4456static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = {
4457 &omap44xx_l4_abe__timer6,
4458 &omap44xx_l4_abe__timer6_dma,
4459};
4460
4461static struct omap_hwmod omap44xx_timer6_hwmod = { 3904static struct omap_hwmod omap44xx_timer6_hwmod = {
4462 .name = "timer6", 3905 .name = "timer6",
4463 .class = &omap44xx_timer_hwmod_class, 3906 .class = &omap44xx_timer_hwmod_class,
@@ -4473,8 +3916,6 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
4473 }, 3916 },
4474 }, 3917 },
4475 .dev_attr = &capability_alwon_dev_attr, 3918 .dev_attr = &capability_alwon_dev_attr,
4476 .slaves = omap44xx_timer6_slaves,
4477 .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves),
4478}; 3919};
4479 3920
4480/* timer7 */ 3921/* timer7 */
@@ -4520,12 +3961,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {
4520 .user = OCP_USER_SDMA, 3961 .user = OCP_USER_SDMA,
4521}; 3962};
4522 3963
4523/* timer7 slave ports */
4524static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = {
4525 &omap44xx_l4_abe__timer7,
4526 &omap44xx_l4_abe__timer7_dma,
4527};
4528
4529static struct omap_hwmod omap44xx_timer7_hwmod = { 3964static struct omap_hwmod omap44xx_timer7_hwmod = {
4530 .name = "timer7", 3965 .name = "timer7",
4531 .class = &omap44xx_timer_hwmod_class, 3966 .class = &omap44xx_timer_hwmod_class,
@@ -4540,8 +3975,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
4540 }, 3975 },
4541 }, 3976 },
4542 .dev_attr = &capability_alwon_dev_attr, 3977 .dev_attr = &capability_alwon_dev_attr,
4543 .slaves = omap44xx_timer7_slaves,
4544 .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves),
4545}; 3978};
4546 3979
4547/* timer8 */ 3980/* timer8 */
@@ -4587,12 +4020,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {
4587 .user = OCP_USER_SDMA, 4020 .user = OCP_USER_SDMA,
4588}; 4021};
4589 4022
4590/* timer8 slave ports */
4591static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = {
4592 &omap44xx_l4_abe__timer8,
4593 &omap44xx_l4_abe__timer8_dma,
4594};
4595
4596static struct omap_hwmod omap44xx_timer8_hwmod = { 4023static struct omap_hwmod omap44xx_timer8_hwmod = {
4597 .name = "timer8", 4024 .name = "timer8",
4598 .class = &omap44xx_timer_hwmod_class, 4025 .class = &omap44xx_timer_hwmod_class,
@@ -4607,8 +4034,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
4607 }, 4034 },
4608 }, 4035 },
4609 .dev_attr = &capability_pwm_dev_attr, 4036 .dev_attr = &capability_pwm_dev_attr,
4610 .slaves = omap44xx_timer8_slaves,
4611 .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves),
4612}; 4037};
4613 4038
4614/* timer9 */ 4039/* timer9 */
@@ -4636,11 +4061,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {
4636 .user = OCP_USER_MPU | OCP_USER_SDMA, 4061 .user = OCP_USER_MPU | OCP_USER_SDMA,
4637}; 4062};
4638 4063
4639/* timer9 slave ports */
4640static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = {
4641 &omap44xx_l4_per__timer9,
4642};
4643
4644static struct omap_hwmod omap44xx_timer9_hwmod = { 4064static struct omap_hwmod omap44xx_timer9_hwmod = {
4645 .name = "timer9", 4065 .name = "timer9",
4646 .class = &omap44xx_timer_hwmod_class, 4066 .class = &omap44xx_timer_hwmod_class,
@@ -4655,8 +4075,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
4655 }, 4075 },
4656 }, 4076 },
4657 .dev_attr = &capability_pwm_dev_attr, 4077 .dev_attr = &capability_pwm_dev_attr,
4658 .slaves = omap44xx_timer9_slaves,
4659 .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves),
4660}; 4078};
4661 4079
4662/* timer10 */ 4080/* timer10 */
@@ -4684,11 +4102,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {
4684 .user = OCP_USER_MPU | OCP_USER_SDMA, 4102 .user = OCP_USER_MPU | OCP_USER_SDMA,
4685}; 4103};
4686 4104
4687/* timer10 slave ports */
4688static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = {
4689 &omap44xx_l4_per__timer10,
4690};
4691
4692static struct omap_hwmod omap44xx_timer10_hwmod = { 4105static struct omap_hwmod omap44xx_timer10_hwmod = {
4693 .name = "timer10", 4106 .name = "timer10",
4694 .class = &omap44xx_timer_1ms_hwmod_class, 4107 .class = &omap44xx_timer_1ms_hwmod_class,
@@ -4703,8 +4116,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
4703 }, 4116 },
4704 }, 4117 },
4705 .dev_attr = &capability_pwm_dev_attr, 4118 .dev_attr = &capability_pwm_dev_attr,
4706 .slaves = omap44xx_timer10_slaves,
4707 .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves),
4708}; 4119};
4709 4120
4710/* timer11 */ 4121/* timer11 */
@@ -4732,11 +4143,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {
4732 .user = OCP_USER_MPU | OCP_USER_SDMA, 4143 .user = OCP_USER_MPU | OCP_USER_SDMA,
4733}; 4144};
4734 4145
4735/* timer11 slave ports */
4736static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = {
4737 &omap44xx_l4_per__timer11,
4738};
4739
4740static struct omap_hwmod omap44xx_timer11_hwmod = { 4146static struct omap_hwmod omap44xx_timer11_hwmod = {
4741 .name = "timer11", 4147 .name = "timer11",
4742 .class = &omap44xx_timer_hwmod_class, 4148 .class = &omap44xx_timer_hwmod_class,
@@ -4751,8 +4157,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
4751 }, 4157 },
4752 }, 4158 },
4753 .dev_attr = &capability_pwm_dev_attr, 4159 .dev_attr = &capability_pwm_dev_attr,
4754 .slaves = omap44xx_timer11_slaves,
4755 .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves),
4756}; 4160};
4757 4161
4758/* 4162/*
@@ -4808,11 +4212,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
4808 .user = OCP_USER_MPU | OCP_USER_SDMA, 4212 .user = OCP_USER_MPU | OCP_USER_SDMA,
4809}; 4213};
4810 4214
4811/* uart1 slave ports */
4812static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
4813 &omap44xx_l4_per__uart1,
4814};
4815
4816static struct omap_hwmod omap44xx_uart1_hwmod = { 4215static struct omap_hwmod omap44xx_uart1_hwmod = {
4817 .name = "uart1", 4216 .name = "uart1",
4818 .class = &omap44xx_uart_hwmod_class, 4217 .class = &omap44xx_uart_hwmod_class,
@@ -4827,8 +4226,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
4827 .modulemode = MODULEMODE_SWCTRL, 4226 .modulemode = MODULEMODE_SWCTRL,
4828 }, 4227 },
4829 }, 4228 },
4830 .slaves = omap44xx_uart1_slaves,
4831 .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves),
4832}; 4229};
4833 4230
4834/* uart2 */ 4231/* uart2 */
@@ -4862,11 +4259,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
4862 .user = OCP_USER_MPU | OCP_USER_SDMA, 4259 .user = OCP_USER_MPU | OCP_USER_SDMA,
4863}; 4260};
4864 4261
4865/* uart2 slave ports */
4866static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
4867 &omap44xx_l4_per__uart2,
4868};
4869
4870static struct omap_hwmod omap44xx_uart2_hwmod = { 4262static struct omap_hwmod omap44xx_uart2_hwmod = {
4871 .name = "uart2", 4263 .name = "uart2",
4872 .class = &omap44xx_uart_hwmod_class, 4264 .class = &omap44xx_uart_hwmod_class,
@@ -4881,8 +4273,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
4881 .modulemode = MODULEMODE_SWCTRL, 4273 .modulemode = MODULEMODE_SWCTRL,
4882 }, 4274 },
4883 }, 4275 },
4884 .slaves = omap44xx_uart2_slaves,
4885 .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves),
4886}; 4276};
4887 4277
4888/* uart3 */ 4278/* uart3 */
@@ -4916,11 +4306,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
4916 .user = OCP_USER_MPU | OCP_USER_SDMA, 4306 .user = OCP_USER_MPU | OCP_USER_SDMA,
4917}; 4307};
4918 4308
4919/* uart3 slave ports */
4920static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
4921 &omap44xx_l4_per__uart3,
4922};
4923
4924static struct omap_hwmod omap44xx_uart3_hwmod = { 4309static struct omap_hwmod omap44xx_uart3_hwmod = {
4925 .name = "uart3", 4310 .name = "uart3",
4926 .class = &omap44xx_uart_hwmod_class, 4311 .class = &omap44xx_uart_hwmod_class,
@@ -4936,8 +4321,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
4936 .modulemode = MODULEMODE_SWCTRL, 4321 .modulemode = MODULEMODE_SWCTRL,
4937 }, 4322 },
4938 }, 4323 },
4939 .slaves = omap44xx_uart3_slaves,
4940 .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves),
4941}; 4324};
4942 4325
4943/* uart4 */ 4326/* uart4 */
@@ -4971,11 +4354,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
4971 .user = OCP_USER_MPU | OCP_USER_SDMA, 4354 .user = OCP_USER_MPU | OCP_USER_SDMA,
4972}; 4355};
4973 4356
4974/* uart4 slave ports */
4975static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
4976 &omap44xx_l4_per__uart4,
4977};
4978
4979static struct omap_hwmod omap44xx_uart4_hwmod = { 4357static struct omap_hwmod omap44xx_uart4_hwmod = {
4980 .name = "uart4", 4358 .name = "uart4",
4981 .class = &omap44xx_uart_hwmod_class, 4359 .class = &omap44xx_uart_hwmod_class,
@@ -4990,8 +4368,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
4990 .modulemode = MODULEMODE_SWCTRL, 4368 .modulemode = MODULEMODE_SWCTRL,
4991 }, 4369 },
4992 }, 4370 },
4993 .slaves = omap44xx_uart4_slaves,
4994 .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves),
4995}; 4371};
4996 4372
4997/* 4373/*
@@ -5024,11 +4400,6 @@ static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {
5024 { .irq = -1 } 4400 { .irq = -1 }
5025}; 4401};
5026 4402
5027/* usb_otg_hs master ports */
5028static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_masters[] = {
5029 &omap44xx_usb_otg_hs__l3_main_2,
5030};
5031
5032static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { 4403static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {
5033 { 4404 {
5034 .pa_start = 0x4a0ab000, 4405 .pa_start = 0x4a0ab000,
@@ -5047,11 +4418,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = {
5047 .user = OCP_USER_MPU | OCP_USER_SDMA, 4418 .user = OCP_USER_MPU | OCP_USER_SDMA,
5048}; 4419};
5049 4420
5050/* usb_otg_hs slave ports */
5051static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_slaves[] = {
5052 &omap44xx_l4_cfg__usb_otg_hs,
5053};
5054
5055static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { 4421static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {
5056 { .role = "xclk", .clk = "usb_otg_hs_xclk" }, 4422 { .role = "xclk", .clk = "usb_otg_hs_xclk" },
5057}; 4423};
@@ -5072,10 +4438,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
5072 }, 4438 },
5073 .opt_clks = usb_otg_hs_opt_clks, 4439 .opt_clks = usb_otg_hs_opt_clks,
5074 .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), 4440 .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks),
5075 .slaves = omap44xx_usb_otg_hs_slaves,
5076 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),
5077 .masters = omap44xx_usb_otg_hs_masters,
5078 .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters),
5079}; 4441};
5080 4442
5081/* 4443/*
@@ -5126,11 +4488,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
5126 .user = OCP_USER_MPU | OCP_USER_SDMA, 4488 .user = OCP_USER_MPU | OCP_USER_SDMA,
5127}; 4489};
5128 4490
5129/* wd_timer2 slave ports */
5130static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
5131 &omap44xx_l4_wkup__wd_timer2,
5132};
5133
5134static struct omap_hwmod omap44xx_wd_timer2_hwmod = { 4491static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
5135 .name = "wd_timer2", 4492 .name = "wd_timer2",
5136 .class = &omap44xx_wd_timer_hwmod_class, 4493 .class = &omap44xx_wd_timer_hwmod_class,
@@ -5144,8 +4501,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
5144 .modulemode = MODULEMODE_SWCTRL, 4501 .modulemode = MODULEMODE_SWCTRL,
5145 }, 4502 },
5146 }, 4503 },
5147 .slaves = omap44xx_wd_timer2_slaves,
5148 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
5149}; 4504};
5150 4505
5151/* wd_timer3 */ 4506/* wd_timer3 */
@@ -5191,12 +4546,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
5191 .user = OCP_USER_SDMA, 4546 .user = OCP_USER_SDMA,
5192}; 4547};
5193 4548
5194/* wd_timer3 slave ports */
5195static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
5196 &omap44xx_l4_abe__wd_timer3,
5197 &omap44xx_l4_abe__wd_timer3_dma,
5198};
5199
5200static struct omap_hwmod omap44xx_wd_timer3_hwmod = { 4549static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5201 .name = "wd_timer3", 4550 .name = "wd_timer3",
5202 .class = &omap44xx_wd_timer_hwmod_class, 4551 .class = &omap44xx_wd_timer_hwmod_class,
@@ -5210,8 +4559,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5210 .modulemode = MODULEMODE_SWCTRL, 4559 .modulemode = MODULEMODE_SWCTRL,
5211 }, 4560 },
5212 }, 4561 },
5213 .slaves = omap44xx_wd_timer3_slaves,
5214 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
5215}; 4562};
5216 4563
5217/* 4564/*
@@ -5242,10 +4589,6 @@ static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
5242 .sysc = &omap44xx_usb_host_hs_sysc, 4589 .sysc = &omap44xx_usb_host_hs_sysc,
5243}; 4590};
5244 4591
5245static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
5246 &omap44xx_usb_host_hs__l3_main_2,
5247};
5248
5249static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = { 4592static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
5250 { 4593 {
5251 .name = "uhh", 4594 .name = "uhh",
@@ -5280,10 +4623,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
5280 .user = OCP_USER_MPU | OCP_USER_SDMA, 4623 .user = OCP_USER_MPU | OCP_USER_SDMA,
5281}; 4624};
5282 4625
5283static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
5284 &omap44xx_l4_cfg__usb_host_hs,
5285};
5286
5287static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { 4626static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
5288 .name = "usb_host_hs", 4627 .name = "usb_host_hs",
5289 .class = &omap44xx_usb_host_hs_hwmod_class, 4628 .class = &omap44xx_usb_host_hs_hwmod_class,
@@ -5297,10 +4636,6 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
5297 }, 4636 },
5298 }, 4637 },
5299 .mpu_irqs = omap44xx_usb_host_hs_irqs, 4638 .mpu_irqs = omap44xx_usb_host_hs_irqs,
5300 .slaves = omap44xx_usb_host_hs_slaves,
5301 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
5302 .masters = omap44xx_usb_host_hs_masters,
5303 .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
5304 4639
5305 /* 4640 /*
5306 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock 4641 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
@@ -5394,10 +4729,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
5394 .user = OCP_USER_MPU | OCP_USER_SDMA, 4729 .user = OCP_USER_MPU | OCP_USER_SDMA,
5395}; 4730};
5396 4731
5397static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
5398 &omap44xx_l4_cfg__usb_tll_hs,
5399};
5400
5401static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { 4732static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
5402 .name = "usb_tll_hs", 4733 .name = "usb_tll_hs",
5403 .class = &omap44xx_usb_tll_hs_hwmod_class, 4734 .class = &omap44xx_usb_tll_hs_hwmod_class,
@@ -5411,156 +4742,132 @@ static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
5411 }, 4742 },
5412 }, 4743 },
5413 .mpu_irqs = omap44xx_usb_tll_hs_irqs, 4744 .mpu_irqs = omap44xx_usb_tll_hs_irqs,
5414 .slaves = omap44xx_usb_tll_hs_slaves,
5415 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
5416}; 4745};
5417 4746
5418static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 4747static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
5419 4748 &omap44xx_l3_main_1__dmm,
5420 /* dmm class */ 4749 &omap44xx_mpu__dmm,
5421 &omap44xx_dmm_hwmod, 4750 &omap44xx_dmm__emif_fw,
5422 4751 &omap44xx_l4_cfg__emif_fw,
5423 /* emif_fw class */ 4752 &omap44xx_iva__l3_instr,
5424 &omap44xx_emif_fw_hwmod, 4753 &omap44xx_l3_main_3__l3_instr,
5425 4754 &omap44xx_dsp__l3_main_1,
5426 /* l3 class */ 4755 &omap44xx_dss__l3_main_1,
5427 &omap44xx_l3_instr_hwmod, 4756 &omap44xx_l3_main_2__l3_main_1,
5428 &omap44xx_l3_main_1_hwmod, 4757 &omap44xx_l4_cfg__l3_main_1,
5429 &omap44xx_l3_main_2_hwmod, 4758 &omap44xx_mmc1__l3_main_1,
5430 &omap44xx_l3_main_3_hwmod, 4759 &omap44xx_mmc2__l3_main_1,
5431 4760 &omap44xx_mpu__l3_main_1,
5432 /* l4 class */ 4761 &omap44xx_dma_system__l3_main_2,
5433 &omap44xx_l4_abe_hwmod, 4762 &omap44xx_hsi__l3_main_2,
5434 &omap44xx_l4_cfg_hwmod, 4763 &omap44xx_ipu__l3_main_2,
5435 &omap44xx_l4_per_hwmod, 4764 &omap44xx_iss__l3_main_2,
5436 &omap44xx_l4_wkup_hwmod, 4765 &omap44xx_iva__l3_main_2,
5437 4766 &omap44xx_l3_main_1__l3_main_2,
5438 /* mpu_bus class */ 4767 &omap44xx_l4_cfg__l3_main_2,
5439 &omap44xx_mpu_private_hwmod, 4768 &omap44xx_usb_host_hs__l3_main_2,
5440 4769 &omap44xx_usb_otg_hs__l3_main_2,
5441 /* aess class */ 4770 &omap44xx_l3_main_1__l3_main_3,
5442 &omap44xx_aess_hwmod, 4771 &omap44xx_l3_main_2__l3_main_3,
5443 4772 &omap44xx_l4_cfg__l3_main_3,
5444 /* counter class */ 4773 &omap44xx_aess__l4_abe,
5445 &omap44xx_counter_32k_hwmod, 4774 &omap44xx_dsp__l4_abe,
5446 4775 &omap44xx_l3_main_1__l4_abe,
5447 /* dma class */ 4776 &omap44xx_mpu__l4_abe,
5448 &omap44xx_dma_system_hwmod, 4777 &omap44xx_l3_main_1__l4_cfg,
5449 4778 &omap44xx_l3_main_2__l4_per,
5450 /* dmic class */ 4779 &omap44xx_l4_cfg__l4_wkup,
5451 &omap44xx_dmic_hwmod, 4780 &omap44xx_mpu__mpu_private,
5452 4781 &omap44xx_l4_abe__aess,
5453 /* dsp class */ 4782 &omap44xx_l4_abe__aess_dma,
5454 &omap44xx_dsp_hwmod, 4783 &omap44xx_l4_wkup__counter_32k,
5455 4784 &omap44xx_l4_cfg__dma_system,
5456 /* dss class */ 4785 &omap44xx_l4_abe__dmic,
5457 &omap44xx_dss_hwmod, 4786 &omap44xx_l4_abe__dmic_dma,
5458 &omap44xx_dss_dispc_hwmod, 4787 &omap44xx_dsp__iva,
5459 &omap44xx_dss_dsi1_hwmod, 4788 &omap44xx_l4_cfg__dsp,
5460 &omap44xx_dss_dsi2_hwmod, 4789 &omap44xx_l3_main_2__dss,
5461 &omap44xx_dss_hdmi_hwmod, 4790 &omap44xx_l4_per__dss,
5462 &omap44xx_dss_rfbi_hwmod, 4791 &omap44xx_l3_main_2__dss_dispc,
5463 &omap44xx_dss_venc_hwmod, 4792 &omap44xx_l4_per__dss_dispc,
5464 4793 &omap44xx_l3_main_2__dss_dsi1,
5465 /* gpio class */ 4794 &omap44xx_l4_per__dss_dsi1,
5466 &omap44xx_gpio1_hwmod, 4795 &omap44xx_l3_main_2__dss_dsi2,
5467 &omap44xx_gpio2_hwmod, 4796 &omap44xx_l4_per__dss_dsi2,
5468 &omap44xx_gpio3_hwmod, 4797 &omap44xx_l3_main_2__dss_hdmi,
5469 &omap44xx_gpio4_hwmod, 4798 &omap44xx_l4_per__dss_hdmi,
5470 &omap44xx_gpio5_hwmod, 4799 &omap44xx_l3_main_2__dss_rfbi,
5471 &omap44xx_gpio6_hwmod, 4800 &omap44xx_l4_per__dss_rfbi,
5472 4801 &omap44xx_l3_main_2__dss_venc,
5473 /* hsi class */ 4802 &omap44xx_l4_per__dss_venc,
5474 &omap44xx_hsi_hwmod, 4803 &omap44xx_l4_wkup__gpio1,
5475 4804 &omap44xx_l4_per__gpio2,
5476 /* i2c class */ 4805 &omap44xx_l4_per__gpio3,
5477 &omap44xx_i2c1_hwmod, 4806 &omap44xx_l4_per__gpio4,
5478 &omap44xx_i2c2_hwmod, 4807 &omap44xx_l4_per__gpio5,
5479 &omap44xx_i2c3_hwmod, 4808 &omap44xx_l4_per__gpio6,
5480 &omap44xx_i2c4_hwmod, 4809 &omap44xx_l4_cfg__hsi,
5481 4810 &omap44xx_l4_per__i2c1,
5482 /* ipu class */ 4811 &omap44xx_l4_per__i2c2,
5483 &omap44xx_ipu_hwmod, 4812 &omap44xx_l4_per__i2c3,
5484 4813 &omap44xx_l4_per__i2c4,
5485 /* iss class */ 4814 &omap44xx_l3_main_2__ipu,
5486 &omap44xx_iss_hwmod, 4815 &omap44xx_l3_main_2__iss,
5487 4816 &omap44xx_l3_main_2__iva,
5488 /* iva class */ 4817 &omap44xx_l4_wkup__kbd,
5489 &omap44xx_iva_hwmod, 4818 &omap44xx_l4_cfg__mailbox,
5490 4819 &omap44xx_l4_abe__mcbsp1,
5491 /* kbd class */ 4820 &omap44xx_l4_abe__mcbsp1_dma,
5492 &omap44xx_kbd_hwmod, 4821 &omap44xx_l4_abe__mcbsp2,
5493 4822 &omap44xx_l4_abe__mcbsp2_dma,
5494 /* mailbox class */ 4823 &omap44xx_l4_abe__mcbsp3,
5495 &omap44xx_mailbox_hwmod, 4824 &omap44xx_l4_abe__mcbsp3_dma,
5496 4825 &omap44xx_l4_per__mcbsp4,
5497 /* mcbsp class */ 4826 &omap44xx_l4_abe__mcpdm,
5498 &omap44xx_mcbsp1_hwmod, 4827 &omap44xx_l4_abe__mcpdm_dma,
5499 &omap44xx_mcbsp2_hwmod, 4828 &omap44xx_l4_per__mcspi1,
5500 &omap44xx_mcbsp3_hwmod, 4829 &omap44xx_l4_per__mcspi2,
5501 &omap44xx_mcbsp4_hwmod, 4830 &omap44xx_l4_per__mcspi3,
5502 4831 &omap44xx_l4_per__mcspi4,
5503 /* mcpdm class */ 4832 &omap44xx_l4_per__mmc1,
5504 &omap44xx_mcpdm_hwmod, 4833 &omap44xx_l4_per__mmc2,
5505 4834 &omap44xx_l4_per__mmc3,
5506 /* mcspi class */ 4835 &omap44xx_l4_per__mmc4,
5507 &omap44xx_mcspi1_hwmod, 4836 &omap44xx_l4_per__mmc5,
5508 &omap44xx_mcspi2_hwmod, 4837 &omap44xx_l4_cfg__smartreflex_core,
5509 &omap44xx_mcspi3_hwmod, 4838 &omap44xx_l4_cfg__smartreflex_iva,
5510 &omap44xx_mcspi4_hwmod, 4839 &omap44xx_l4_cfg__smartreflex_mpu,
5511 4840 &omap44xx_l4_cfg__spinlock,
5512 /* mmc class */ 4841 &omap44xx_l4_wkup__timer1,
5513 &omap44xx_mmc1_hwmod, 4842 &omap44xx_l4_per__timer2,
5514 &omap44xx_mmc2_hwmod, 4843 &omap44xx_l4_per__timer3,
5515 &omap44xx_mmc3_hwmod, 4844 &omap44xx_l4_per__timer4,
5516 &omap44xx_mmc4_hwmod, 4845 &omap44xx_l4_abe__timer5,
5517 &omap44xx_mmc5_hwmod, 4846 &omap44xx_l4_abe__timer5_dma,
5518 4847 &omap44xx_l4_abe__timer6,
5519 /* mpu class */ 4848 &omap44xx_l4_abe__timer6_dma,
5520 &omap44xx_mpu_hwmod, 4849 &omap44xx_l4_abe__timer7,
5521 4850 &omap44xx_l4_abe__timer7_dma,
5522 /* smartreflex class */ 4851 &omap44xx_l4_abe__timer8,
5523 &omap44xx_smartreflex_core_hwmod, 4852 &omap44xx_l4_abe__timer8_dma,
5524 &omap44xx_smartreflex_iva_hwmod, 4853 &omap44xx_l4_per__timer9,
5525 &omap44xx_smartreflex_mpu_hwmod, 4854 &omap44xx_l4_per__timer10,
5526 4855 &omap44xx_l4_per__timer11,
5527 /* spinlock class */ 4856 &omap44xx_l4_per__uart1,
5528 &omap44xx_spinlock_hwmod, 4857 &omap44xx_l4_per__uart2,
5529 4858 &omap44xx_l4_per__uart3,
5530 /* timer class */ 4859 &omap44xx_l4_per__uart4,
5531 &omap44xx_timer1_hwmod, 4860 &omap44xx_l4_cfg__usb_host_hs,
5532 &omap44xx_timer2_hwmod, 4861 &omap44xx_l4_cfg__usb_otg_hs,
5533 &omap44xx_timer3_hwmod, 4862 &omap44xx_l4_cfg__usb_tll_hs,
5534 &omap44xx_timer4_hwmod, 4863 &omap44xx_l4_wkup__wd_timer2,
5535 &omap44xx_timer5_hwmod, 4864 &omap44xx_l4_abe__wd_timer3,
5536 &omap44xx_timer6_hwmod, 4865 &omap44xx_l4_abe__wd_timer3_dma,
5537 &omap44xx_timer7_hwmod,
5538 &omap44xx_timer8_hwmod,
5539 &omap44xx_timer9_hwmod,
5540 &omap44xx_timer10_hwmod,
5541 &omap44xx_timer11_hwmod,
5542
5543 /* uart class */
5544 &omap44xx_uart1_hwmod,
5545 &omap44xx_uart2_hwmod,
5546 &omap44xx_uart3_hwmod,
5547 &omap44xx_uart4_hwmod,
5548
5549 /* usb host class */
5550 &omap44xx_usb_host_hs_hwmod,
5551 &omap44xx_usb_tll_hs_hwmod,
5552
5553 /* usb_otg_hs class */
5554 &omap44xx_usb_otg_hs_hwmod,
5555
5556 /* wd_timer class */
5557 &omap44xx_wd_timer2_hwmod,
5558 &omap44xx_wd_timer3_hwmod,
5559 NULL, 4866 NULL,
5560}; 4867};
5561 4868
5562int __init omap44xx_hwmod_init(void) 4869int __init omap44xx_hwmod_init(void)
5563{ 4870{
5564 return omap_hwmod_register(omap44xx_hwmods); 4871 return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);
5565} 4872}
5566 4873
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-09 15:34:39 -0400