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authorLinus Walleij <linus.walleij@linaro.org>2012-05-07 04:34:16 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-05-11 05:14:19 -0400
commit08d98fe0e81cd9424ef2451ed13afe91a9a26f9f (patch)
treec1282125cc751a0b776f7c97802e34d6c0be53dc
parent09486cbb26f26cedbfe18b12cedd25607de550df (diff)
ARM: ux500: switch MSP to using pinctrl for pins
The MSP platform data callbacks use the old custom callbacks to set the state of the pins, switch over to using pinctrl. Cc: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.c62
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c18
2 files changed, 57 insertions, 23 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c
index aacaf80c66a1..996048038743 100644
--- a/arch/arm/mach-ux500/board-mop500-msp.c
+++ b/arch/arm/mach-ux500/board-mop500-msp.c
@@ -7,17 +7,18 @@
7#include <linux/platform_device.h> 7#include <linux/platform_device.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10#include <plat/gpio-nomadik.h> 10#include <linux/pinctrl/consumer.h>
11 11
12#include <plat/gpio-nomadik.h>
12#include <plat/pincfg.h> 13#include <plat/pincfg.h>
13#include <plat/ste_dma40.h> 14#include <plat/ste_dma40.h>
14 15
15#include <mach/devices.h> 16#include <mach/devices.h>
16#include <ste-dma40-db8500.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <mach/irqs.h> 18#include <mach/irqs.h>
19#include <mach/msp.h> 19#include <mach/msp.h>
20 20
21#include "ste-dma40-db8500.h"
21#include "board-mop500.h" 22#include "board-mop500.h"
22#include "devices-db8500.h" 23#include "devices-db8500.h"
23#include "pins-db8500.h" 24#include "pins-db8500.h"
@@ -28,19 +29,10 @@ static DEFINE_SPINLOCK(msp_rxtx_lock);
28/* Reference Count */ 29/* Reference Count */
29static int msp_rxtx_ref; 30static int msp_rxtx_ref;
30 31
31static pin_cfg_t mop500_msp1_pins_init[] = { 32/* Pin modes */
32 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_DISABLE, 33struct pinctrl *msp1_p;
33 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE, 34struct pinctrl_state *msp1_def;
34 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE, 35struct pinctrl_state *msp1_sleep;
35 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
36};
37
38static pin_cfg_t mop500_msp1_pins_exit[] = {
39 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_ENABLE,
40 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
41 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
42 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
43};
44 36
45int msp13_i2s_init(void) 37int msp13_i2s_init(void)
46{ 38{
@@ -48,9 +40,11 @@ int msp13_i2s_init(void)
48 unsigned long flags; 40 unsigned long flags;
49 41
50 spin_lock_irqsave(&msp_rxtx_lock, flags); 42 spin_lock_irqsave(&msp_rxtx_lock, flags);
51 if (msp_rxtx_ref == 0) 43 if (msp_rxtx_ref == 0 && !(IS_ERR(msp1_p) || IS_ERR(msp1_def))) {
52 retval = nmk_config_pins( 44 retval = pinctrl_select_state(msp1_p, msp1_def);
53 ARRAY_AND_SIZE(mop500_msp1_pins_init)); 45 if (retval)
46 pr_err("could not set MSP1 defstate\n");
47 }
54 if (!retval) 48 if (!retval)
55 msp_rxtx_ref++; 49 msp_rxtx_ref++;
56 spin_unlock_irqrestore(&msp_rxtx_lock, flags); 50 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
@@ -66,9 +60,11 @@ int msp13_i2s_exit(void)
66 spin_lock_irqsave(&msp_rxtx_lock, flags); 60 spin_lock_irqsave(&msp_rxtx_lock, flags);
67 WARN_ON(!msp_rxtx_ref); 61 WARN_ON(!msp_rxtx_ref);
68 msp_rxtx_ref--; 62 msp_rxtx_ref--;
69 if (msp_rxtx_ref == 0) 63 if (msp_rxtx_ref == 0 && !(IS_ERR(msp1_p) || IS_ERR(msp1_sleep))) {
70 retval = nmk_config_pins_sleep( 64 retval = pinctrl_select_state(msp1_p, msp1_sleep);
71 ARRAY_AND_SIZE(mop500_msp1_pins_exit)); 65 if (retval)
66 pr_err("could not set MSP1 sleepstate\n");
67 }
72 spin_unlock_irqrestore(&msp_rxtx_lock, flags); 68 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
73 69
74 return retval; 70 return retval;
@@ -229,19 +225,41 @@ static struct msp_i2s_platform_data msp3_platform_data = {
229 225
230int mop500_msp_init(struct device *parent) 226int mop500_msp_init(struct device *parent)
231{ 227{
228 struct platform_device *msp1;
229
232 pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__); 230 pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
233 platform_device_register(&snd_soc_u8500); 231 platform_device_register(&snd_soc_u8500);
234 232
235 pr_info("Initialize MSP I2S-devices.\n"); 233 pr_info("Initialize MSP I2S-devices.\n");
236 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, 234 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
237 &msp0_platform_data); 235 &msp0_platform_data);
238 db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, 236 msp1 = db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
239 &msp1_platform_data); 237 &msp1_platform_data);
240 db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, 238 db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
241 &msp2_platform_data); 239 &msp2_platform_data);
242 db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, 240 db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
243 &msp3_platform_data); 241 &msp3_platform_data);
244 242
243 /* Get the pinctrl handle for MSP1 */
244 if (msp1) {
245 msp1_p = pinctrl_get(&msp1->dev);
246 if (IS_ERR(msp1_p))
247 dev_err(&msp1->dev, "could not get MSP1 pinctrl\n");
248 else {
249 msp1_def = pinctrl_lookup_state(msp1_p,
250 PINCTRL_STATE_DEFAULT);
251 if (IS_ERR(msp1_def)) {
252 dev_err(&msp1->dev,
253 "could not get MSP1 defstate\n");
254 }
255 msp1_sleep = pinctrl_lookup_state(msp1_p,
256 PINCTRL_STATE_SLEEP);
257 if (IS_ERR(msp1_sleep))
258 dev_err(&msp1->dev,
259 "could not get MSP1 idlestate\n");
260 }
261 }
262
245 pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__); 263 pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
246 platform_device_register(&ux500_pcm); 264 platform_device_register(&ux500_pcm);
247 265
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index dccd29d6fff6..32fd99204464 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -32,12 +32,14 @@ static enum custom_pin_cfg_t pinsfor;
32BIAS(pd, PIN_PULL_DOWN); 32BIAS(pd, PIN_PULL_DOWN);
33BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL); 33BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
34BIAS(in_nopull, PIN_INPUT_NOPULL); 34BIAS(in_nopull, PIN_INPUT_NOPULL);
35BIAS(in_nopull_sleep_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
35BIAS(in_pu, PIN_INPUT_PULLUP); 36BIAS(in_pu, PIN_INPUT_PULLUP);
36BIAS(in_pd, PIN_INPUT_PULLDOWN); 37BIAS(in_pd, PIN_INPUT_PULLDOWN);
37BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP); 38BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
38BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW); 39BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
39BIAS(out_hi, PIN_OUTPUT_HIGH); 40BIAS(out_hi, PIN_OUTPUT_HIGH);
40BIAS(out_lo, PIN_OUTPUT_LOW); 41BIAS(out_lo, PIN_OUTPUT_LOW);
42BIAS(out_lo_sleep_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
41/* These also force them into GPIO mode */ 43/* These also force them into GPIO mode */
42BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED); 44BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
43BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED); 45BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
@@ -47,7 +49,9 @@ BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
47BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); 49BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
48/* Sleep modes */ 50/* Sleep modes */
49BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 51BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
52BIAS(sleep_in_nopull_wkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE);
50BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 53BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
54BIAS(sleep_out_lo_wkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
51BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 55BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
52 56
53/* We use these to define hog settings that are always done on boot */ 57/* We use these to define hog settings that are always done on boot */
@@ -129,11 +133,23 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
129 DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */ 133 DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
130 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */ 134 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
131 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */ 135 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
132 /* Sleep state for UART0 */ 136 /* UART0 sleep state */
133 DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"), 137 DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),
134 DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"), 138 DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),
135 DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"), 139 DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),
136 DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"), 140 DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),
141 /* MSP1 for ALSA codec */
142 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
143 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
144 DB8500_PIN("GPIO33_AF2", out_lo_sleep_nowkup, "ux500-msp-i2s.1"),
145 DB8500_PIN("GPIO34_AE1", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
146 DB8500_PIN("GPIO35_AE2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
147 DB8500_PIN("GPIO36_AG2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),
148 /* MSP1 sleep state */
149 DB8500_PIN_SLEEP("GPIO33_AF2", sleep_out_lo_wkup, "ux500-msp-i2s.1"),
150 DB8500_PIN_SLEEP("GPIO34_AE1", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
151 DB8500_PIN_SLEEP("GPIO35_AE2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
152 DB8500_PIN_SLEEP("GPIO36_AG2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),
137 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */ 153 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
138 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"), 154 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
139 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), 155 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),