diff options
author | Borislav Petkov <borislav.petkov@amd.com> | 2011-01-19 14:02:38 -0500 |
---|---|---|
committer | Borislav Petkov <borislav.petkov@amd.com> | 2011-03-17 09:46:25 -0400 |
commit | 87b3e0e6e43b7e92575b79ed05ab86d221323642 (patch) | |
tree | 21dffcdbee0b720f96351ba7cc42cd985852276d | |
parent | cb293250c71fa85de3ef378d7383ddecf248c32d (diff) |
amd64_edac: Simplify scrubrate setting
Drop per-instance variable and compute min scrubrate dynamically.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
-rw-r--r-- | drivers/edac/amd64_edac.c | 8 | ||||
-rw-r--r-- | drivers/edac/amd64_edac.h | 10 |
2 files changed, 5 insertions, 13 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index eb6b6bace683..0caf05e376cb 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -193,8 +193,12 @@ static int __amd64_set_scrub_rate(struct pci_dev *ctl, u32 new_bw, u32 min_rate) | |||
193 | static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 bw) | 193 | static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 bw) |
194 | { | 194 | { |
195 | struct amd64_pvt *pvt = mci->pvt_info; | 195 | struct amd64_pvt *pvt = mci->pvt_info; |
196 | u32 min_scrubrate = 0x5; | ||
196 | 197 | ||
197 | return __amd64_set_scrub_rate(pvt->F3, bw, pvt->min_scrubrate); | 198 | if (boot_cpu_data.x86 == 0xf) |
199 | min_scrubrate = 0x0; | ||
200 | |||
201 | return __amd64_set_scrub_rate(pvt->F3, bw, min_scrubrate); | ||
198 | } | 202 | } |
199 | 203 | ||
200 | static int amd64_get_scrub_rate(struct mem_ctl_info *mci) | 204 | static int amd64_get_scrub_rate(struct mem_ctl_info *mci) |
@@ -2399,13 +2403,11 @@ static struct amd64_family_type *amd64_per_family_init(struct amd64_pvt *pvt) | |||
2399 | fam_type = &amd64_family_types[K8_CPUS]; | 2403 | fam_type = &amd64_family_types[K8_CPUS]; |
2400 | pvt->ops = &amd64_family_types[K8_CPUS].ops; | 2404 | pvt->ops = &amd64_family_types[K8_CPUS].ops; |
2401 | pvt->ctl_name = fam_type->ctl_name; | 2405 | pvt->ctl_name = fam_type->ctl_name; |
2402 | pvt->min_scrubrate = K8_MIN_SCRUB_RATE_BITS; | ||
2403 | break; | 2406 | break; |
2404 | case 0x10: | 2407 | case 0x10: |
2405 | fam_type = &amd64_family_types[F10_CPUS]; | 2408 | fam_type = &amd64_family_types[F10_CPUS]; |
2406 | pvt->ops = &amd64_family_types[F10_CPUS].ops; | 2409 | pvt->ops = &amd64_family_types[F10_CPUS].ops; |
2407 | pvt->ctl_name = fam_type->ctl_name; | 2410 | pvt->ctl_name = fam_type->ctl_name; |
2408 | pvt->min_scrubrate = F10_MIN_SCRUB_RATE_BITS; | ||
2409 | break; | 2411 | break; |
2410 | 2412 | ||
2411 | default: | 2413 | default: |
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 8e431ab6a983..3f853ed684af 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h | |||
@@ -368,9 +368,6 @@ struct amd64_pvt { | |||
368 | /* place to store error injection parameters prior to issue */ | 368 | /* place to store error injection parameters prior to issue */ |
369 | struct error_injection injection; | 369 | struct error_injection injection; |
370 | 370 | ||
371 | /* DCT per-family scrubrate setting */ | ||
372 | u32 min_scrubrate; | ||
373 | |||
374 | /* family name this instance is running on */ | 371 | /* family name this instance is running on */ |
375 | const char *ctl_name; | 372 | const char *ctl_name; |
376 | 373 | ||
@@ -468,12 +465,5 @@ int __amd64_write_pci_cfg_dword(struct pci_dev *pdev, int offset, | |||
468 | #define amd64_read_dct_pci_cfg(pvt, offset, val) \ | 465 | #define amd64_read_dct_pci_cfg(pvt, offset, val) \ |
469 | pvt->ops->read_dct_pci_cfg(pvt, offset, val, __func__) | 466 | pvt->ops->read_dct_pci_cfg(pvt, offset, val, __func__) |
470 | 467 | ||
471 | /* | ||
472 | * For future CPU versions, verify the following as new 'slow' rates appear and | ||
473 | * modify the necessary skip values for the supported CPU. | ||
474 | */ | ||
475 | #define K8_MIN_SCRUB_RATE_BITS 0x0 | ||
476 | #define F10_MIN_SCRUB_RATE_BITS 0x5 | ||
477 | |||
478 | int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base, | 468 | int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base, |
479 | u64 *hole_offset, u64 *hole_size); | 469 | u64 *hole_offset, u64 *hole_size); |