diff options
author | Brian Niebuhr <bniebuhr@efjohnson.com> | 2010-10-06 08:43:31 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2010-11-18 08:08:36 -0500 |
commit | 3409e408ab0d7171ae81d198110a1f293852959f (patch) | |
tree | 88878684b29b727246ea2b994296231821a55666 | |
parent | 87467bd9052725283b9a9f4b1b310fed8744fb1e (diff) |
spi: davinci: remove non-useful "clk_internal" platform data
The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.
Remove this platform data.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm365.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/spi.h | 1 | ||||
-rw-r--r-- | drivers/spi/davinci_spi.c | 9 |
4 files changed, 1 insertions, 11 deletions
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 27ee870b2d27..c0c501a4c139 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -412,7 +412,6 @@ static struct resource dm355_spi0_resources[] = { | |||
412 | static struct davinci_spi_platform_data dm355_spi0_pdata = { | 412 | static struct davinci_spi_platform_data dm355_spi0_pdata = { |
413 | .version = SPI_VERSION_1, | 413 | .version = SPI_VERSION_1, |
414 | .num_chipselect = 2, | 414 | .num_chipselect = 2, |
415 | .clk_internal = 1, | ||
416 | .cshold_bug = true, | 415 | .cshold_bug = true, |
417 | }; | 416 | }; |
418 | static struct platform_device dm355_spi0_device = { | 417 | static struct platform_device dm355_spi0_device = { |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 1e5012e196ba..8b8204fa7578 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -625,7 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); | |||
625 | static struct davinci_spi_platform_data dm365_spi0_pdata = { | 625 | static struct davinci_spi_platform_data dm365_spi0_pdata = { |
626 | .version = SPI_VERSION_1, | 626 | .version = SPI_VERSION_1, |
627 | .num_chipselect = 2, | 627 | .num_chipselect = 2, |
628 | .clk_internal = 1, | ||
629 | }; | 628 | }; |
630 | 629 | ||
631 | static struct resource dm365_spi0_resources[] = { | 630 | static struct resource dm365_spi0_resources[] = { |
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index b3ab7d04943a..1f8b7866bea3 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h | |||
@@ -29,7 +29,6 @@ enum { | |||
29 | struct davinci_spi_platform_data { | 29 | struct davinci_spi_platform_data { |
30 | u8 version; | 30 | u8 version; |
31 | u8 num_chipselect; | 31 | u8 num_chipselect; |
32 | u8 clk_internal; | ||
33 | u8 intr_line; | 32 | u8 intr_line; |
34 | u8 *chip_sel; | 33 | u8 *chip_sel; |
35 | bool cshold_bug; | 34 | bool cshold_bug; |
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 5fe298099a1a..2e74fcd2f423 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
927 | } | 927 | } |
928 | } | 928 | } |
929 | 929 | ||
930 | /* Clock internal */ | ||
931 | if (davinci_spi->pdata->clk_internal) | ||
932 | set_io_bits(davinci_spi->base + SPIGCR1, | ||
933 | SPIGCR1_CLKMOD_MASK); | ||
934 | else | ||
935 | clear_io_bits(davinci_spi->base + SPIGCR1, | ||
936 | SPIGCR1_CLKMOD_MASK); | ||
937 | |||
938 | if (pdata->intr_line) | 930 | if (pdata->intr_line) |
939 | iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); | 931 | iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); |
940 | else | 932 | else |
@@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
943 | iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); | 935 | iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); |
944 | 936 | ||
945 | /* master mode default */ | 937 | /* master mode default */ |
938 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); | ||
946 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); | 939 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); |
947 | 940 | ||
948 | ret = spi_bitbang_start(&davinci_spi->bitbang); | 941 | ret = spi_bitbang_start(&davinci_spi->bitbang); |