diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-05-17 17:56:08 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-05-17 17:56:29 -0400 |
commit | dfb0ae091479240c19bef4382026671776ca204e (patch) | |
tree | 7407317991d393be5801fc45111401caff7ae3ec | |
parent | 1da7807842f7ccd9a3962dc276e489b76cd320c7 (diff) | |
parent | dfa3d039dae89e8e9a7302ebf25370caaf1b62e3 (diff) |
Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
-rw-r--r-- | arch/arm/mach-omap1/board-palmte.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap1/board-palmz71.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-2430sdp.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-apollon.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-generic.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-h4.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-34xx.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/clock.c | 10 | ||||
-rw-r--r-- | arch/arm/plat-omap/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/mailbox.c | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/common.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/mmc.h | 24 |
16 files changed, 67 insertions, 35 deletions
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index ca1a4bf78a10..a0b16a7e8a04 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -63,7 +63,7 @@ static const int palmte_keymap[] = { | |||
63 | KEY(1, 1, KEY_DOWN), | 63 | KEY(1, 1, KEY_DOWN), |
64 | KEY(1, 2, KEY_UP), | 64 | KEY(1, 2, KEY_UP), |
65 | KEY(1, 3, KEY_RIGHT), | 65 | KEY(1, 3, KEY_RIGHT), |
66 | KEY(1, 4, KEY_CENTER), | 66 | KEY(1, 4, KEY_ENTER), |
67 | 0, | 67 | 0, |
68 | }; | 68 | }; |
69 | 69 | ||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 156510777ffe..e020c2774606 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -65,7 +65,7 @@ static int palmz71_keymap[] = { | |||
65 | KEY(1, 1, KEY_DOWN), | 65 | KEY(1, 1, KEY_DOWN), |
66 | KEY(1, 2, KEY_UP), | 66 | KEY(1, 2, KEY_UP), |
67 | KEY(1, 3, KEY_RIGHT), | 67 | KEY(1, 3, KEY_RIGHT), |
68 | KEY(1, 4, KEY_CENTER), | 68 | KEY(1, 4, KEY_ENTER), |
69 | KEY(2, 0, KEY_CAMERA), | 69 | KEY(2, 0, KEY_CAMERA), |
70 | 0, | 70 | 0, |
71 | }; | 71 | }; |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 1c12d7c6c7fc..1682eb77c46d 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -208,6 +208,7 @@ static void __init omap_2430sdp_init(void) | |||
208 | 208 | ||
209 | static void __init omap_2430sdp_map_io(void) | 209 | static void __init omap_2430sdp_map_io(void) |
210 | { | 210 | { |
211 | omap2_set_globals_243x(); | ||
211 | omap2_map_common_io(); | 212 | omap2_map_common_io(); |
212 | } | 213 | } |
213 | 214 | ||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index a1e1e6765b5b..620fa0f120ee 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -394,6 +394,7 @@ static void __init omap_apollon_init(void) | |||
394 | 394 | ||
395 | static void __init omap_apollon_map_io(void) | 395 | static void __init omap_apollon_map_io(void) |
396 | { | 396 | { |
397 | omap2_set_globals_242x(); | ||
397 | omap2_map_common_io(); | 398 | omap2_map_common_io(); |
398 | } | 399 | } |
399 | 400 | ||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 90938151bcf1..df8be081e159 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
@@ -65,6 +65,7 @@ static void __init omap_generic_init(void) | |||
65 | 65 | ||
66 | static void __init omap_generic_map_io(void) | 66 | static void __init omap_generic_map_io(void) |
67 | { | 67 | { |
68 | omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */ | ||
68 | omap2_map_common_io(); | 69 | omap2_map_common_io(); |
69 | } | 70 | } |
70 | 71 | ||
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index d1915f99a5fa..0d28f6897c8e 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -420,6 +420,7 @@ static void __init omap_h4_init(void) | |||
420 | 420 | ||
421 | static void __init omap_h4_map_io(void) | 421 | static void __init omap_h4_map_io(void) |
422 | { | 422 | { |
423 | omap2_set_globals_242x(); | ||
423 | omap2_map_common_io(); | 424 | omap2_map_common_io(); |
424 | } | 425 | } |
425 | 426 | ||
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index b57ffb5a22a5..ab9fc57d25f1 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -205,7 +205,9 @@ static void omap2_clk_wait_ready(struct clk *clk) | |||
205 | /* REVISIT: What are the appropriate exclusions for 34XX? */ | 205 | /* REVISIT: What are the appropriate exclusions for 34XX? */ |
206 | /* OMAP3: ignore DSS-mod clocks */ | 206 | /* OMAP3: ignore DSS-mod clocks */ |
207 | if (cpu_is_omap34xx() && | 207 | if (cpu_is_omap34xx() && |
208 | (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0))) | 208 | (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) || |
209 | ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) && | ||
210 | clk->enable_bit == OMAP3430_EN_SSI_SHIFT))) | ||
209 | return; | 211 | return; |
210 | 212 | ||
211 | /* Check if both functional and interface clocks | 213 | /* Check if both functional and interface clocks |
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index cf4644a94b9b..c9c5972a2e25 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = { | |||
836 | .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), | 836 | .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), |
837 | .clksel_mask = OMAP3430ES2_DIV_120M_MASK, | 837 | .clksel_mask = OMAP3430ES2_DIV_120M_MASK, |
838 | .clksel = div16_dpll5_clksel, | 838 | .clksel = div16_dpll5_clksel, |
839 | .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, | 839 | .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | |
840 | PARENT_CONTROLS_CLOCK, | ||
840 | .recalc = &omap2_clksel_recalc, | 841 | .recalc = &omap2_clksel_recalc, |
841 | }; | 842 | }; |
842 | 843 | ||
@@ -1046,12 +1047,13 @@ static struct clk iva2_ck = { | |||
1046 | .name = "iva2_ck", | 1047 | .name = "iva2_ck", |
1047 | .parent = &dpll2_m2_ck, | 1048 | .parent = &dpll2_m2_ck, |
1048 | .init = &omap2_init_clksel_parent, | 1049 | .init = &omap2_init_clksel_parent, |
1050 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), | ||
1051 | .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, | ||
1049 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, | 1052 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, |
1050 | OMAP3430_CM_IDLEST_PLL), | 1053 | OMAP3430_CM_IDLEST_PLL), |
1051 | .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, | 1054 | .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, |
1052 | .clksel = iva2_clksel, | 1055 | .clksel = iva2_clksel, |
1053 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | | 1056 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, |
1054 | PARENT_CONTROLS_CLOCK, | ||
1055 | .recalc = &omap2_clksel_recalc, | 1057 | .recalc = &omap2_clksel_recalc, |
1056 | }; | 1058 | }; |
1057 | 1059 | ||
@@ -1836,7 +1838,8 @@ static struct clk omapctrl_ick = { | |||
1836 | static struct clk ssi_l4_ick = { | 1838 | static struct clk ssi_l4_ick = { |
1837 | .name = "ssi_l4_ick", | 1839 | .name = "ssi_l4_ick", |
1838 | .parent = &l4_ick, | 1840 | .parent = &l4_ick, |
1839 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, | 1841 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | |
1842 | PARENT_CONTROLS_CLOCK, | ||
1840 | .recalc = &followparent_recalc, | 1843 | .recalc = &followparent_recalc, |
1841 | }; | 1844 | }; |
1842 | 1845 | ||
@@ -2344,7 +2347,7 @@ static struct clk gpio6_fck = { | |||
2344 | .name = "gpio6_fck", | 2347 | .name = "gpio6_fck", |
2345 | .parent = &per_32k_alwon_fck, | 2348 | .parent = &per_32k_alwon_fck, |
2346 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2349 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2347 | .enable_bit = OMAP3430_EN_GPT6_SHIFT, | 2350 | .enable_bit = OMAP3430_EN_GPIO6_SHIFT, |
2348 | .flags = CLOCK_IN_OMAP343X, | 2351 | .flags = CLOCK_IN_OMAP343X, |
2349 | .recalc = &followparent_recalc, | 2352 | .recalc = &followparent_recalc, |
2350 | }; | 2353 | }; |
@@ -2353,7 +2356,7 @@ static struct clk gpio5_fck = { | |||
2353 | .name = "gpio5_fck", | 2356 | .name = "gpio5_fck", |
2354 | .parent = &per_32k_alwon_fck, | 2357 | .parent = &per_32k_alwon_fck, |
2355 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2358 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2356 | .enable_bit = OMAP3430_EN_GPT5_SHIFT, | 2359 | .enable_bit = OMAP3430_EN_GPIO5_SHIFT, |
2357 | .flags = CLOCK_IN_OMAP343X, | 2360 | .flags = CLOCK_IN_OMAP343X, |
2358 | .recalc = &followparent_recalc, | 2361 | .recalc = &followparent_recalc, |
2359 | }; | 2362 | }; |
@@ -2362,7 +2365,7 @@ static struct clk gpio4_fck = { | |||
2362 | .name = "gpio4_fck", | 2365 | .name = "gpio4_fck", |
2363 | .parent = &per_32k_alwon_fck, | 2366 | .parent = &per_32k_alwon_fck, |
2364 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2367 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2365 | .enable_bit = OMAP3430_EN_GPT4_SHIFT, | 2368 | .enable_bit = OMAP3430_EN_GPIO4_SHIFT, |
2366 | .flags = CLOCK_IN_OMAP343X, | 2369 | .flags = CLOCK_IN_OMAP343X, |
2367 | .recalc = &followparent_recalc, | 2370 | .recalc = &followparent_recalc, |
2368 | }; | 2371 | }; |
@@ -2371,7 +2374,7 @@ static struct clk gpio3_fck = { | |||
2371 | .name = "gpio3_fck", | 2374 | .name = "gpio3_fck", |
2372 | .parent = &per_32k_alwon_fck, | 2375 | .parent = &per_32k_alwon_fck, |
2373 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2376 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2374 | .enable_bit = OMAP3430_EN_GPT3_SHIFT, | 2377 | .enable_bit = OMAP3430_EN_GPIO3_SHIFT, |
2375 | .flags = CLOCK_IN_OMAP343X, | 2378 | .flags = CLOCK_IN_OMAP343X, |
2376 | .recalc = &followparent_recalc, | 2379 | .recalc = &followparent_recalc, |
2377 | }; | 2380 | }; |
@@ -2380,7 +2383,7 @@ static struct clk gpio2_fck = { | |||
2380 | .name = "gpio2_fck", | 2383 | .name = "gpio2_fck", |
2381 | .parent = &per_32k_alwon_fck, | 2384 | .parent = &per_32k_alwon_fck, |
2382 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2385 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2383 | .enable_bit = OMAP3430_EN_GPT2_SHIFT, | 2386 | .enable_bit = OMAP3430_EN_GPIO2_SHIFT, |
2384 | .flags = CLOCK_IN_OMAP343X, | 2387 | .flags = CLOCK_IN_OMAP343X, |
2385 | .recalc = &followparent_recalc, | 2388 | .recalc = &followparent_recalc, |
2386 | }; | 2389 | }; |
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index 9249129a5f46..3c38395f6442 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h | |||
@@ -56,6 +56,7 @@ | |||
56 | 56 | ||
57 | /* CM_FCLKEN_IVA2 */ | 57 | /* CM_FCLKEN_IVA2 */ |
58 | #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) | 58 | #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) |
59 | #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 | ||
59 | 60 | ||
60 | /* CM_CLKEN_PLL_IVA2 */ | 61 | /* CM_CLKEN_PLL_IVA2 */ |
61 | #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 | 62 | #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index b03cd06e055b..4799561c5a9e 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -70,6 +70,9 @@ struct omap_mbox2_priv { | |||
70 | 70 | ||
71 | static struct clk *mbox_ick_handle; | 71 | static struct clk *mbox_ick_handle; |
72 | 72 | ||
73 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, | ||
74 | omap_mbox_type_t irq); | ||
75 | |||
73 | static inline unsigned int mbox_read_reg(unsigned int reg) | 76 | static inline unsigned int mbox_read_reg(unsigned int reg) |
74 | { | 77 | { |
75 | return __raw_readl(mbox_base + reg); | 78 | return __raw_readl(mbox_base + reg); |
@@ -81,7 +84,7 @@ static inline void mbox_write_reg(unsigned int val, unsigned int reg) | |||
81 | } | 84 | } |
82 | 85 | ||
83 | /* Mailbox H/W preparations */ | 86 | /* Mailbox H/W preparations */ |
84 | static inline int omap2_mbox_startup(struct omap_mbox *mbox) | 87 | static int omap2_mbox_startup(struct omap_mbox *mbox) |
85 | { | 88 | { |
86 | unsigned int l; | 89 | unsigned int l; |
87 | 90 | ||
@@ -97,38 +100,40 @@ static inline int omap2_mbox_startup(struct omap_mbox *mbox) | |||
97 | l |= 0x00000011; | 100 | l |= 0x00000011; |
98 | mbox_write_reg(l, MAILBOX_SYSCONFIG); | 101 | mbox_write_reg(l, MAILBOX_SYSCONFIG); |
99 | 102 | ||
103 | omap2_mbox_enable_irq(mbox, IRQ_RX); | ||
104 | |||
100 | return 0; | 105 | return 0; |
101 | } | 106 | } |
102 | 107 | ||
103 | static inline void omap2_mbox_shutdown(struct omap_mbox *mbox) | 108 | static void omap2_mbox_shutdown(struct omap_mbox *mbox) |
104 | { | 109 | { |
105 | clk_disable(mbox_ick_handle); | 110 | clk_disable(mbox_ick_handle); |
106 | clk_put(mbox_ick_handle); | 111 | clk_put(mbox_ick_handle); |
107 | } | 112 | } |
108 | 113 | ||
109 | /* Mailbox FIFO handle functions */ | 114 | /* Mailbox FIFO handle functions */ |
110 | static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) | 115 | static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) |
111 | { | 116 | { |
112 | struct omap_mbox2_fifo *fifo = | 117 | struct omap_mbox2_fifo *fifo = |
113 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; | 118 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; |
114 | return (mbox_msg_t) mbox_read_reg(fifo->msg); | 119 | return (mbox_msg_t) mbox_read_reg(fifo->msg); |
115 | } | 120 | } |
116 | 121 | ||
117 | static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) | 122 | static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) |
118 | { | 123 | { |
119 | struct omap_mbox2_fifo *fifo = | 124 | struct omap_mbox2_fifo *fifo = |
120 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; | 125 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; |
121 | mbox_write_reg(msg, fifo->msg); | 126 | mbox_write_reg(msg, fifo->msg); |
122 | } | 127 | } |
123 | 128 | ||
124 | static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox) | 129 | static int omap2_mbox_fifo_empty(struct omap_mbox *mbox) |
125 | { | 130 | { |
126 | struct omap_mbox2_fifo *fifo = | 131 | struct omap_mbox2_fifo *fifo = |
127 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; | 132 | &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; |
128 | return (mbox_read_reg(fifo->msg_stat) == 0); | 133 | return (mbox_read_reg(fifo->msg_stat) == 0); |
129 | } | 134 | } |
130 | 135 | ||
131 | static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) | 136 | static int omap2_mbox_fifo_full(struct omap_mbox *mbox) |
132 | { | 137 | { |
133 | struct omap_mbox2_fifo *fifo = | 138 | struct omap_mbox2_fifo *fifo = |
134 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; | 139 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; |
@@ -136,7 +141,7 @@ static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) | |||
136 | } | 141 | } |
137 | 142 | ||
138 | /* Mailbox IRQ handle functions */ | 143 | /* Mailbox IRQ handle functions */ |
139 | static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, | 144 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, |
140 | omap_mbox_type_t irq) | 145 | omap_mbox_type_t irq) |
141 | { | 146 | { |
142 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; | 147 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; |
@@ -147,7 +152,7 @@ static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, | |||
147 | mbox_write_reg(l, p->irqenable); | 152 | mbox_write_reg(l, p->irqenable); |
148 | } | 153 | } |
149 | 154 | ||
150 | static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, | 155 | static void omap2_mbox_disable_irq(struct omap_mbox *mbox, |
151 | omap_mbox_type_t irq) | 156 | omap_mbox_type_t irq) |
152 | { | 157 | { |
153 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; | 158 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; |
@@ -158,7 +163,7 @@ static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, | |||
158 | mbox_write_reg(l, p->irqenable); | 163 | mbox_write_reg(l, p->irqenable); |
159 | } | 164 | } |
160 | 165 | ||
161 | static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, | 166 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, |
162 | omap_mbox_type_t irq) | 167 | omap_mbox_type_t irq) |
163 | { | 168 | { |
164 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; | 169 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; |
@@ -167,7 +172,7 @@ static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, | |||
167 | mbox_write_reg(bit, p->irqstatus); | 172 | mbox_write_reg(bit, p->irqstatus); |
168 | } | 173 | } |
169 | 174 | ||
170 | static inline int omap2_mbox_is_irq(struct omap_mbox *mbox, | 175 | static int omap2_mbox_is_irq(struct omap_mbox *mbox, |
171 | omap_mbox_type_t irq) | 176 | omap_mbox_type_t irq) |
172 | { | 177 | { |
173 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; | 178 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; |
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ab7649afd891..618f8111658a 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | /* | 31 | /* |
32 | * Architecture-specific global PRM registers | 32 | * Architecture-specific global PRM registers |
33 | * Use prm_{read,write}_reg() with these registers. | 33 | * Use __raw_{read,write}l() with these registers. |
34 | * | 34 | * |
35 | * With a few exceptions, these are the register names beginning with | 35 | * With a few exceptions, these are the register names beginning with |
36 | * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the | 36 | * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 72d34a23a2ec..2946c193a7d6 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -134,9 +134,17 @@ void clk_disable(struct clk *clk) | |||
134 | return; | 134 | return; |
135 | 135 | ||
136 | spin_lock_irqsave(&clockfw_lock, flags); | 136 | spin_lock_irqsave(&clockfw_lock, flags); |
137 | BUG_ON(clk->usecount == 0); | 137 | if (clk->usecount == 0) { |
138 | printk(KERN_ERR "Trying disable clock %s with 0 usecount\n", | ||
139 | clk->name); | ||
140 | WARN_ON(1); | ||
141 | goto out; | ||
142 | } | ||
143 | |||
138 | if (arch_clock->clk_disable) | 144 | if (arch_clock->clk_disable) |
139 | arch_clock->clk_disable(clk); | 145 | arch_clock->clk_disable(clk); |
146 | |||
147 | out: | ||
140 | spin_unlock_irqrestore(&clockfw_lock, flags); | 148 | spin_unlock_irqrestore(&clockfw_lock, flags); |
141 | } | 149 | } |
142 | EXPORT_SYMBOL(clk_disable); | 150 | EXPORT_SYMBOL(clk_disable); |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 793740686be2..c00eda588cd8 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -604,6 +604,7 @@ int omap_request_dma(int dev_id, const char *dev_name, | |||
604 | chan->data = data; | 604 | chan->data = data; |
605 | #ifndef CONFIG_ARCH_OMAP1 | 605 | #ifndef CONFIG_ARCH_OMAP1 |
606 | chan->chain_id = -1; | 606 | chan->chain_id = -1; |
607 | chan->next_linked_ch = -1; | ||
607 | #endif | 608 | #endif |
608 | chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; | 609 | chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; |
609 | 610 | ||
@@ -1087,7 +1088,6 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, | |||
1087 | printk(KERN_ERR "omap_dma: Request failed %d\n", err); | 1088 | printk(KERN_ERR "omap_dma: Request failed %d\n", err); |
1088 | return err; | 1089 | return err; |
1089 | } | 1090 | } |
1090 | dma_chan[channels[i]].next_linked_ch = -1; | ||
1091 | dma_chan[channels[i]].prev_linked_ch = -1; | 1091 | dma_chan[channels[i]].prev_linked_ch = -1; |
1092 | dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; | 1092 | dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; |
1093 | 1093 | ||
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 1945ddfec18d..6f33f58bca45 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
@@ -355,7 +355,6 @@ static int omap_mbox_init(struct omap_mbox *mbox) | |||
355 | "failed to register mailbox interrupt:%d\n", ret); | 355 | "failed to register mailbox interrupt:%d\n", ret); |
356 | goto fail_request_irq; | 356 | goto fail_request_irq; |
357 | } | 357 | } |
358 | enable_mbox_irq(mbox, IRQ_RX); | ||
359 | 358 | ||
360 | mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); | 359 | mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); |
361 | if (!mq) { | 360 | if (!mq) { |
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h index 224e009e5296..36a3b62d4d8d 100644 --- a/include/asm-arm/arch-omap/common.h +++ b/include/asm-arm/arch-omap/common.h | |||
@@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, | |||
47 | } | 47 | } |
48 | #endif | 48 | #endif |
49 | 49 | ||
50 | void omap2_set_globals_242x(void); | ||
51 | void omap2_set_globals_243x(void); | ||
52 | void omap2_set_globals_343x(void); | ||
53 | |||
50 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ | 54 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ |
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h index c9588f49eb52..7cfc5f258560 100644 --- a/include/asm-arm/arch-omap/mmc.h +++ b/include/asm-arm/arch-omap/mmc.h | |||
@@ -15,21 +15,16 @@ | |||
15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
16 | #include <linux/mmc/host.h> | 16 | #include <linux/mmc/host.h> |
17 | 17 | ||
18 | #include <asm/arch/board.h> | ||
19 | |||
18 | #define OMAP_MMC_MAX_SLOTS 2 | 20 | #define OMAP_MMC_MAX_SLOTS 2 |
19 | 21 | ||
20 | struct omap_mmc_platform_data { | 22 | struct omap_mmc_platform_data { |
21 | struct omap_mmc_conf conf; | 23 | struct omap_mmc_conf conf; |
22 | 24 | ||
23 | unsigned enabled:1; | ||
24 | /* number of slots on board */ | 25 | /* number of slots on board */ |
25 | unsigned nr_slots:2; | 26 | unsigned nr_slots:2; |
26 | /* nomux means "standard" muxing is wrong on this board, and that | 27 | |
27 | * board-specific code handled it before common init logic. | ||
28 | */ | ||
29 | unsigned nomux:1; | ||
30 | /* 4 wire signaling is optional, and is only used for SD/SDIO and | ||
31 | * MMCv4 */ | ||
32 | unsigned wire4:1; | ||
33 | /* set if your board has components or wiring that limits the | 28 | /* set if your board has components or wiring that limits the |
34 | * maximum frequency on the MMC bus */ | 29 | * maximum frequency on the MMC bus */ |
35 | unsigned int max_freq; | 30 | unsigned int max_freq; |
@@ -40,6 +35,11 @@ struct omap_mmc_platform_data { | |||
40 | * not supported */ | 35 | * not supported */ |
41 | int (* init)(struct device *dev); | 36 | int (* init)(struct device *dev); |
42 | void (* cleanup)(struct device *dev); | 37 | void (* cleanup)(struct device *dev); |
38 | void (* shutdown)(struct device *dev); | ||
39 | |||
40 | /* To handle board related suspend/resume functionality for MMC */ | ||
41 | int (*suspend)(struct device *dev, int slot); | ||
42 | int (*resume)(struct device *dev, int slot); | ||
43 | 43 | ||
44 | struct omap_mmc_slot_data { | 44 | struct omap_mmc_slot_data { |
45 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); | 45 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); |
@@ -56,13 +56,19 @@ struct omap_mmc_platform_data { | |||
56 | 56 | ||
57 | const char *name; | 57 | const char *name; |
58 | u32 ocr_mask; | 58 | u32 ocr_mask; |
59 | |||
60 | /* Card detection IRQs */ | ||
61 | int card_detect_irq; | ||
62 | int (* card_detect)(int irq); | ||
63 | |||
64 | unsigned int ban_openended:1; | ||
65 | |||
59 | } slots[OMAP_MMC_MAX_SLOTS]; | 66 | } slots[OMAP_MMC_MAX_SLOTS]; |
60 | }; | 67 | }; |
61 | 68 | ||
62 | extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); | 69 | extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); |
63 | 70 | ||
64 | /* called from board-specific card detection service routine */ | 71 | /* called from board-specific card detection service routine */ |
65 | extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected); | ||
66 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); | 72 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); |
67 | 73 | ||
68 | #endif | 74 | #endif |