[MTD] [NOR] AT49BV6416 has swapped erase regions

The CFI information read from AT49BV6416 lists the erase regions in the
wrong order, causing problems when trying to erase or update the first
or last 64KiB block.

Work around this by inverting the "top boot" flag, which will
effectively reverse the order of the erase regions.

This chip is obsolete, but it's used in some existing designs.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

1 files changed, 12 insertions, 4 deletions

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index db16b7b0723f..3e6f5d8609e8 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -213,10 +213,18 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
         if (atmel_pri.Features & 0x02)
                 extp->EraseSuspend = 2;
 
-        if (atmel_pri.BottomBoot)
-                extp->TopBottom = 2;
-        else
-                extp->TopBottom = 3;
+        /* Some chips got it backwards... */
+        if (cfi->id == AT49BV6416) {
+                if (atmel_pri.BottomBoot)
+                        extp->TopBottom = 3;
+                else
+                        extp->TopBottom = 2;
+        } else {
+                if (atmel_pri.BottomBoot)
+                        extp->TopBottom = 2;
+                else
+                        extp->TopBottom = 3;
+        }
 
         /* burst write mode not supported */
         cfi->cfiq->BufWriteTimeoutTyp = 0;