diff options
author | Komal Shah <komal_shah802003@yahoo.com> | 2006-09-29 04:59:18 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-29 12:18:07 -0400 |
commit | 7768a13c252a97e13a552f88f642962768de1fa4 (patch) | |
tree | 6c21fc7dcd915c676b87115ca0b769bb04954533 | |
parent | f1b7c5f459b21feba80f96415429ff2570d63e4d (diff) |
[PATCH] OMAP: Add Watchdog driver support
Add Texas Instruments (TI) OMAP1/2 (http://www.ti.com/omap) based
processors, like OMAP1610/1710/242x.
[akpm@osdl.org: cleanups]
Cc: <gdavis@mvista.com>
Cc: "Komal Shah" <komal_shah802003@yahoo.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | drivers/char/watchdog/Kconfig | 7 | ||||
-rw-r--r-- | drivers/char/watchdog/Makefile | 1 | ||||
-rw-r--r-- | drivers/char/watchdog/omap_wdt.c | 391 | ||||
-rw-r--r-- | drivers/char/watchdog/omap_wdt.h | 64 |
4 files changed, 463 insertions, 0 deletions
diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig index f114d7b5bb2a..77ab7e020da0 100644 --- a/drivers/char/watchdog/Kconfig +++ b/drivers/char/watchdog/Kconfig | |||
@@ -165,6 +165,13 @@ config EP93XX_WATCHDOG | |||
165 | To compile this driver as a module, choose M here: the | 165 | To compile this driver as a module, choose M here: the |
166 | module will be called ep93xx_wdt. | 166 | module will be called ep93xx_wdt. |
167 | 167 | ||
168 | config OMAP_WATCHDOG | ||
169 | tristate "OMAP Watchdog" | ||
170 | depends on WATCHDOG && (ARCH_OMAP16XX || ARCH_OMAP24XX) | ||
171 | help | ||
172 | Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to | ||
173 | enable the OMAP1610/OMAP1710 watchdog timer. | ||
174 | |||
168 | # X86 (i386 + ia64 + x86_64) Architecture | 175 | # X86 (i386 + ia64 + x86_64) Architecture |
169 | 176 | ||
170 | config ACQUIRE_WDT | 177 | config ACQUIRE_WDT |
diff --git a/drivers/char/watchdog/Makefile b/drivers/char/watchdog/Makefile index 6ab77b61a643..5099f8be8cc5 100644 --- a/drivers/char/watchdog/Makefile +++ b/drivers/char/watchdog/Makefile | |||
@@ -24,6 +24,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o | |||
24 | 24 | ||
25 | # ARM Architecture | 25 | # ARM Architecture |
26 | obj-$(CONFIG_AT91_WATCHDOG) += at91_wdt.o | 26 | obj-$(CONFIG_AT91_WATCHDOG) += at91_wdt.o |
27 | obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o | ||
27 | obj-$(CONFIG_21285_WATCHDOG) += wdt285.o | 28 | obj-$(CONFIG_21285_WATCHDOG) += wdt285.o |
28 | obj-$(CONFIG_977_WATCHDOG) += wdt977.o | 29 | obj-$(CONFIG_977_WATCHDOG) += wdt977.o |
29 | obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o | 30 | obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o |
diff --git a/drivers/char/watchdog/omap_wdt.c b/drivers/char/watchdog/omap_wdt.c new file mode 100644 index 000000000000..8f90b90a5021 --- /dev/null +++ b/drivers/char/watchdog/omap_wdt.c | |||
@@ -0,0 +1,391 @@ | |||
1 | /* | ||
2 | * linux/drivers/char/watchdog/omap_wdt.c | ||
3 | * | ||
4 | * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog | ||
5 | * | ||
6 | * Author: MontaVista Software, Inc. | ||
7 | * <gdavis@mvista.com> or <source@mvista.com> | ||
8 | * | ||
9 | * 2003 (c) MontaVista Software, Inc. This file is licensed under the | ||
10 | * terms of the GNU General Public License version 2. This program is | ||
11 | * licensed "as is" without any warranty of any kind, whether express | ||
12 | * or implied. | ||
13 | * | ||
14 | * History: | ||
15 | * | ||
16 | * 20030527: George G. Davis <gdavis@mvista.com> | ||
17 | * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c | ||
18 | * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> | ||
19 | * Based on SoftDog driver by Alan Cox <alan@redhat.com> | ||
20 | * | ||
21 | * Copyright (c) 2004 Texas Instruments. | ||
22 | * 1. Modified to support OMAP1610 32-KHz watchdog timer | ||
23 | * 2. Ported to 2.6 kernel | ||
24 | * | ||
25 | * Copyright (c) 2005 David Brownell | ||
26 | * Use the driver model and standard identifiers; handle bigger timeouts. | ||
27 | */ | ||
28 | |||
29 | #include <linux/module.h> | ||
30 | #include <linux/config.h> | ||
31 | #include <linux/types.h> | ||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/fs.h> | ||
34 | #include <linux/mm.h> | ||
35 | #include <linux/miscdevice.h> | ||
36 | #include <linux/watchdog.h> | ||
37 | #include <linux/reboot.h> | ||
38 | #include <linux/smp_lock.h> | ||
39 | #include <linux/init.h> | ||
40 | #include <linux/err.h> | ||
41 | #include <linux/platform_device.h> | ||
42 | #include <linux/moduleparam.h> | ||
43 | #include <linux/clk.h> | ||
44 | |||
45 | #include <asm/io.h> | ||
46 | #include <asm/uaccess.h> | ||
47 | #include <asm/hardware.h> | ||
48 | #include <asm/bitops.h> | ||
49 | |||
50 | #include <asm/arch/prcm.h> | ||
51 | |||
52 | #include "omap_wdt.h" | ||
53 | |||
54 | static unsigned timer_margin; | ||
55 | module_param(timer_margin, uint, 0); | ||
56 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); | ||
57 | |||
58 | static int omap_wdt_users; | ||
59 | static struct clk *armwdt_ck = NULL; | ||
60 | static struct clk *mpu_wdt_ick = NULL; | ||
61 | static struct clk *mpu_wdt_fck = NULL; | ||
62 | |||
63 | static unsigned int wdt_trgr_pattern = 0x1234; | ||
64 | |||
65 | static void omap_wdt_ping(void) | ||
66 | { | ||
67 | /* wait for posted write to complete */ | ||
68 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) | ||
69 | cpu_relax(); | ||
70 | wdt_trgr_pattern = ~wdt_trgr_pattern; | ||
71 | omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR)); | ||
72 | /* wait for posted write to complete */ | ||
73 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) | ||
74 | cpu_relax(); | ||
75 | /* reloaded WCRR from WLDR */ | ||
76 | } | ||
77 | |||
78 | static void omap_wdt_enable(void) | ||
79 | { | ||
80 | /* Sequence to enable the watchdog */ | ||
81 | omap_writel(0xBBBB, OMAP_WATCHDOG_SPR); | ||
82 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) | ||
83 | cpu_relax(); | ||
84 | omap_writel(0x4444, OMAP_WATCHDOG_SPR); | ||
85 | while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) | ||
86 | cpu_relax(); | ||
87 | } | ||
88 | |||
89 | static void omap_wdt_disable(void) | ||
90 | { | ||
91 | /* sequence required to disable watchdog */ | ||
92 | omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ | ||
93 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) | ||
94 | cpu_relax(); | ||
95 | omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ | ||
96 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) | ||
97 | cpu_relax(); | ||
98 | } | ||
99 | |||
100 | static void omap_wdt_adjust_timeout(unsigned new_timeout) | ||
101 | { | ||
102 | if (new_timeout < TIMER_MARGIN_MIN) | ||
103 | new_timeout = TIMER_MARGIN_DEFAULT; | ||
104 | if (new_timeout > TIMER_MARGIN_MAX) | ||
105 | new_timeout = TIMER_MARGIN_MAX; | ||
106 | timer_margin = new_timeout; | ||
107 | } | ||
108 | |||
109 | static void omap_wdt_set_timeout(void) | ||
110 | { | ||
111 | u32 pre_margin = GET_WLDR_VAL(timer_margin); | ||
112 | |||
113 | /* just count up at 32 KHz */ | ||
114 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) | ||
115 | cpu_relax(); | ||
116 | omap_writel(pre_margin, OMAP_WATCHDOG_LDR); | ||
117 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) | ||
118 | cpu_relax(); | ||
119 | } | ||
120 | |||
121 | /* | ||
122 | * Allow only one task to hold it open | ||
123 | */ | ||
124 | |||
125 | static int omap_wdt_open(struct inode *inode, struct file *file) | ||
126 | { | ||
127 | if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users)) | ||
128 | return -EBUSY; | ||
129 | |||
130 | if (cpu_is_omap16xx()) | ||
131 | clk_enable(armwdt_ck); /* Enable the clock */ | ||
132 | |||
133 | if (cpu_is_omap24xx()) { | ||
134 | clk_enable(mpu_wdt_ick); /* Enable the interface clock */ | ||
135 | clk_enable(mpu_wdt_fck); /* Enable the functional clock */ | ||
136 | } | ||
137 | |||
138 | /* initialize prescaler */ | ||
139 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) | ||
140 | cpu_relax(); | ||
141 | omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL); | ||
142 | while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) | ||
143 | cpu_relax(); | ||
144 | |||
145 | omap_wdt_set_timeout(); | ||
146 | omap_wdt_enable(); | ||
147 | return 0; | ||
148 | } | ||
149 | |||
150 | static int omap_wdt_release(struct inode *inode, struct file *file) | ||
151 | { | ||
152 | /* | ||
153 | * Shut off the timer unless NOWAYOUT is defined. | ||
154 | */ | ||
155 | #ifndef CONFIG_WATCHDOG_NOWAYOUT | ||
156 | omap_wdt_disable(); | ||
157 | |||
158 | if (cpu_is_omap16xx()) { | ||
159 | clk_disable(armwdt_ck); /* Disable the clock */ | ||
160 | clk_put(armwdt_ck); | ||
161 | armwdt_ck = NULL; | ||
162 | } | ||
163 | |||
164 | if (cpu_is_omap24xx()) { | ||
165 | clk_disable(mpu_wdt_ick); /* Disable the clock */ | ||
166 | clk_disable(mpu_wdt_fck); /* Disable the clock */ | ||
167 | clk_put(mpu_wdt_ick); | ||
168 | clk_put(mpu_wdt_fck); | ||
169 | mpu_wdt_ick = NULL; | ||
170 | mpu_wdt_fck = NULL; | ||
171 | } | ||
172 | #else | ||
173 | printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); | ||
174 | #endif | ||
175 | omap_wdt_users = 0; | ||
176 | return 0; | ||
177 | } | ||
178 | |||
179 | static ssize_t | ||
180 | omap_wdt_write(struct file *file, const char __user *data, | ||
181 | size_t len, loff_t *ppos) | ||
182 | { | ||
183 | /* Refresh LOAD_TIME. */ | ||
184 | if (len) | ||
185 | omap_wdt_ping(); | ||
186 | return len; | ||
187 | } | ||
188 | |||
189 | static int | ||
190 | omap_wdt_ioctl(struct inode *inode, struct file *file, | ||
191 | unsigned int cmd, unsigned long arg) | ||
192 | { | ||
193 | int new_margin; | ||
194 | static struct watchdog_info ident = { | ||
195 | .identity = "OMAP Watchdog", | ||
196 | .options = WDIOF_SETTIMEOUT, | ||
197 | .firmware_version = 0, | ||
198 | }; | ||
199 | |||
200 | switch (cmd) { | ||
201 | default: | ||
202 | return -ENOIOCTLCMD; | ||
203 | case WDIOC_GETSUPPORT: | ||
204 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | ||
205 | sizeof(ident)); | ||
206 | case WDIOC_GETSTATUS: | ||
207 | return put_user(0, (int __user *)arg); | ||
208 | case WDIOC_GETBOOTSTATUS: | ||
209 | if (cpu_is_omap16xx()) | ||
210 | return put_user(omap_readw(ARM_SYSST), | ||
211 | (int __user *)arg); | ||
212 | if (cpu_is_omap24xx()) | ||
213 | return put_user(omap_prcm_get_reset_sources(), | ||
214 | (int __user *)arg); | ||
215 | case WDIOC_KEEPALIVE: | ||
216 | omap_wdt_ping(); | ||
217 | return 0; | ||
218 | case WDIOC_SETTIMEOUT: | ||
219 | if (get_user(new_margin, (int __user *)arg)) | ||
220 | return -EFAULT; | ||
221 | omap_wdt_adjust_timeout(new_margin); | ||
222 | |||
223 | omap_wdt_disable(); | ||
224 | omap_wdt_set_timeout(); | ||
225 | omap_wdt_enable(); | ||
226 | |||
227 | omap_wdt_ping(); | ||
228 | /* Fall */ | ||
229 | case WDIOC_GETTIMEOUT: | ||
230 | return put_user(timer_margin, (int __user *)arg); | ||
231 | } | ||
232 | } | ||
233 | |||
234 | static struct file_operations omap_wdt_fops = { | ||
235 | .owner = THIS_MODULE, | ||
236 | .write = omap_wdt_write, | ||
237 | .ioctl = omap_wdt_ioctl, | ||
238 | .open = omap_wdt_open, | ||
239 | .release = omap_wdt_release, | ||
240 | }; | ||
241 | |||
242 | static struct miscdevice omap_wdt_miscdev = { | ||
243 | .minor = WATCHDOG_MINOR, | ||
244 | .name = "watchdog", | ||
245 | .fops = &omap_wdt_fops | ||
246 | }; | ||
247 | |||
248 | static int __init omap_wdt_probe(struct platform_device *pdev) | ||
249 | { | ||
250 | struct resource *res, *mem; | ||
251 | int ret; | ||
252 | |||
253 | /* reserve static register mappings */ | ||
254 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
255 | if (!res) | ||
256 | return -ENOENT; | ||
257 | |||
258 | mem = request_mem_region(res->start, res->end - res->start + 1, | ||
259 | pdev->name); | ||
260 | if (mem == NULL) | ||
261 | return -EBUSY; | ||
262 | |||
263 | platform_set_drvdata(pdev, mem); | ||
264 | |||
265 | omap_wdt_users = 0; | ||
266 | |||
267 | if (cpu_is_omap16xx()) { | ||
268 | armwdt_ck = clk_get(&pdev->dev, "armwdt_ck"); | ||
269 | if (IS_ERR(armwdt_ck)) { | ||
270 | ret = PTR_ERR(armwdt_ck); | ||
271 | armwdt_ck = NULL; | ||
272 | goto fail; | ||
273 | } | ||
274 | } | ||
275 | |||
276 | if (cpu_is_omap24xx()) { | ||
277 | mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick"); | ||
278 | if (IS_ERR(mpu_wdt_ick)) { | ||
279 | ret = PTR_ERR(mpu_wdt_ick); | ||
280 | mpu_wdt_ick = NULL; | ||
281 | goto fail; | ||
282 | } | ||
283 | mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck"); | ||
284 | if (IS_ERR(mpu_wdt_fck)) { | ||
285 | ret = PTR_ERR(mpu_wdt_fck); | ||
286 | mpu_wdt_fck = NULL; | ||
287 | goto fail; | ||
288 | } | ||
289 | } | ||
290 | |||
291 | omap_wdt_disable(); | ||
292 | omap_wdt_adjust_timeout(timer_margin); | ||
293 | |||
294 | omap_wdt_miscdev.dev = &pdev->dev; | ||
295 | ret = misc_register(&omap_wdt_miscdev); | ||
296 | if (ret) | ||
297 | goto fail; | ||
298 | |||
299 | pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin); | ||
300 | |||
301 | /* autogate OCP interface clock */ | ||
302 | omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG); | ||
303 | return 0; | ||
304 | |||
305 | fail: | ||
306 | if (armwdt_ck) | ||
307 | clk_put(armwdt_ck); | ||
308 | if (mpu_wdt_ick) | ||
309 | clk_put(mpu_wdt_ick); | ||
310 | if (mpu_wdt_fck) | ||
311 | clk_put(mpu_wdt_fck); | ||
312 | release_resource(mem); | ||
313 | return ret; | ||
314 | } | ||
315 | |||
316 | static void omap_wdt_shutdown(struct platform_device *pdev) | ||
317 | { | ||
318 | omap_wdt_disable(); | ||
319 | } | ||
320 | |||
321 | static int omap_wdt_remove(struct platform_device *pdev) | ||
322 | { | ||
323 | struct resource *mem = platform_get_drvdata(pdev); | ||
324 | misc_deregister(&omap_wdt_miscdev); | ||
325 | release_resource(mem); | ||
326 | if (armwdt_ck) | ||
327 | clk_put(armwdt_ck); | ||
328 | if (mpu_wdt_ick) | ||
329 | clk_put(mpu_wdt_ick); | ||
330 | if (mpu_wdt_fck) | ||
331 | clk_put(mpu_wdt_fck); | ||
332 | return 0; | ||
333 | } | ||
334 | |||
335 | #ifdef CONFIG_PM | ||
336 | |||
337 | /* REVISIT ... not clear this is the best way to handle system suspend; and | ||
338 | * it's very inappropriate for selective device suspend (e.g. suspending this | ||
339 | * through sysfs rather than by stopping the watchdog daemon). Also, this | ||
340 | * may not play well enough with NOWAYOUT... | ||
341 | */ | ||
342 | |||
343 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) | ||
344 | { | ||
345 | if (omap_wdt_users) | ||
346 | omap_wdt_disable(); | ||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | static int omap_wdt_resume(struct platform_device *pdev) | ||
351 | { | ||
352 | if (omap_wdt_users) { | ||
353 | omap_wdt_enable(); | ||
354 | omap_wdt_ping(); | ||
355 | } | ||
356 | return 0; | ||
357 | } | ||
358 | |||
359 | #else | ||
360 | #define omap_wdt_suspend NULL | ||
361 | #define omap_wdt_resume NULL | ||
362 | #endif | ||
363 | |||
364 | static struct platform_driver omap_wdt_driver = { | ||
365 | .probe = omap_wdt_probe, | ||
366 | .remove = omap_wdt_remove, | ||
367 | .shutdown = omap_wdt_shutdown, | ||
368 | .suspend = omap_wdt_suspend, | ||
369 | .resume = omap_wdt_resume, | ||
370 | .driver = { | ||
371 | .owner = THIS_MODULE, | ||
372 | .name = "omap_wdt", | ||
373 | }, | ||
374 | }; | ||
375 | |||
376 | static int __init omap_wdt_init(void) | ||
377 | { | ||
378 | return platform_driver_register(&omap_wdt_driver); | ||
379 | } | ||
380 | |||
381 | static void __exit omap_wdt_exit(void) | ||
382 | { | ||
383 | platform_driver_unregister(&omap_wdt_driver); | ||
384 | } | ||
385 | |||
386 | module_init(omap_wdt_init); | ||
387 | module_exit(omap_wdt_exit); | ||
388 | |||
389 | MODULE_AUTHOR("George G. Davis"); | ||
390 | MODULE_LICENSE("GPL"); | ||
391 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | ||
diff --git a/drivers/char/watchdog/omap_wdt.h b/drivers/char/watchdog/omap_wdt.h new file mode 100644 index 000000000000..52a532a5114a --- /dev/null +++ b/drivers/char/watchdog/omap_wdt.h | |||
@@ -0,0 +1,64 @@ | |||
1 | /* | ||
2 | * linux/drivers/char/watchdog/omap_wdt.h | ||
3 | * | ||
4 | * BRIEF MODULE DESCRIPTION | ||
5 | * OMAP Watchdog timer register definitions | ||
6 | * | ||
7 | * Copyright (C) 2004 Texas Instruments. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | * | ||
14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License along | ||
26 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
28 | */ | ||
29 | |||
30 | #ifndef _OMAP_WATCHDOG_H | ||
31 | #define _OMAP_WATCHDOG_H | ||
32 | |||
33 | #define OMAP1610_WATCHDOG_BASE 0xfffeb000 | ||
34 | #define OMAP2420_WATCHDOG_BASE 0x48022000 /*WDT Timer 2 */ | ||
35 | |||
36 | #ifdef CONFIG_ARCH_OMAP24XX | ||
37 | #define OMAP_WATCHDOG_BASE OMAP2420_WATCHDOG_BASE | ||
38 | #else | ||
39 | #define OMAP_WATCHDOG_BASE OMAP1610_WATCHDOG_BASE | ||
40 | #define RM_RSTST_WKUP 0 | ||
41 | #endif | ||
42 | |||
43 | #define OMAP_WATCHDOG_REV (OMAP_WATCHDOG_BASE + 0x00) | ||
44 | #define OMAP_WATCHDOG_SYS_CONFIG (OMAP_WATCHDOG_BASE + 0x10) | ||
45 | #define OMAP_WATCHDOG_STATUS (OMAP_WATCHDOG_BASE + 0x14) | ||
46 | #define OMAP_WATCHDOG_CNTRL (OMAP_WATCHDOG_BASE + 0x24) | ||
47 | #define OMAP_WATCHDOG_CRR (OMAP_WATCHDOG_BASE + 0x28) | ||
48 | #define OMAP_WATCHDOG_LDR (OMAP_WATCHDOG_BASE + 0x2c) | ||
49 | #define OMAP_WATCHDOG_TGR (OMAP_WATCHDOG_BASE + 0x30) | ||
50 | #define OMAP_WATCHDOG_WPS (OMAP_WATCHDOG_BASE + 0x34) | ||
51 | #define OMAP_WATCHDOG_SPR (OMAP_WATCHDOG_BASE + 0x48) | ||
52 | |||
53 | /* Using the prescaler, the OMAP watchdog could go for many | ||
54 | * months before firing. These limits work without scaling, | ||
55 | * with the 60 second default assumed by most tools and docs. | ||
56 | */ | ||
57 | #define TIMER_MARGIN_MAX (24 * 60 * 60) /* 1 day */ | ||
58 | #define TIMER_MARGIN_DEFAULT 60 /* 60 secs */ | ||
59 | #define TIMER_MARGIN_MIN 1 | ||
60 | |||
61 | #define PTV 0 /* prescale */ | ||
62 | #define GET_WLDR_VAL(secs) (0xffffffff - ((secs) * (32768/(1<<PTV))) + 1) | ||
63 | |||
64 | #endif /* _OMAP_WATCHDOG_H */ | ||