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authorJürgen Schindele <linux@schindele.name>2008-08-18 16:45:03 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-01 17:33:11 -0400
commit642aa6637e46ae788f1f8916dc9aa5a68917e12e (patch)
tree9bdcf5ecf1d2086bbb47cb4223b79b043d7188d8
parentb8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff)
[ARM] 5204/1: Trizeps4 SOM update
- use MFP-API for GPIO - support TRIZEPS4WL module - cleanups Signed-off-by: Jrgen Schindele <linux@schindele.name> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat
-rw-r--r--arch/arm/mach-pxa/Kconfig32
-rw-r--r--arch/arm/mach-pxa/include/mach/trizeps4.h84
-rw-r--r--arch/arm/mach-pxa/trizeps4.c549
3 files changed, 421 insertions, 244 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index e8ee7ec9ff6d..d1beedb4ed5a 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -170,13 +170,41 @@ config MACH_E800
170 Say Y here if you intend to run this kernel on a Toshiba 170 Say Y here if you intend to run this kernel on a Toshiba
171 e800 family PDA. 171 e800 family PDA.
172 172
173config TRIZEPS_PXA
174 bool "PXA based Keith und Koep Trizeps DIMM-Modules"
175
173config MACH_TRIZEPS4 176config MACH_TRIZEPS4
174 bool "Keith und Koep Trizeps4 DIMM-Module" 177 bool "Keith und Koep Trizeps4 DIMM-Module"
178 depends on TRIZEPS_PXA
179 select TRIZEPS_PCMCIA
180 select PXA27x
181
182config MACH_TRIZEPS4WL
183 bool "Keith und Koep Trizeps4-WL DIMM-Module"
184 depends on TRIZEPS_PXA
185 select TRIZEPS_PCMCIA
175 select PXA27x 186 select PXA27x
187 select PXA_SSP
176 188
177config MACH_TRIZEPS4_CONXS 189choice
190 prompt "Select base board for Trizeps module"
191 depends on TRIZEPS_PXA
192
193config MACH_TRIZEPS_CONXS
178 bool "ConXS Eval Board" 194 bool "ConXS Eval Board"
179 depends on MACH_TRIZEPS4 195
196config MACH_TRIZEPS_UCONXS
197 bool "uConXS Eval Board"
198
199config MACH_TRIZEPS_ANY
200 bool "another Board"
201
202endchoice
203
204config TRIZEPS_PCMCIA
205 bool
206 help
207 Enable PCMCIA support for Trizeps modules
180 208
181config MACH_EM_X270 209config MACH_EM_X270
182 bool "CompuLab EM-x270 platform" 210 bool "CompuLab EM-x270 platform"
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 641d0ec110bb..903e1a2e6641 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -17,11 +17,16 @@
17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ 17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ 18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
19 19
20#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ 20 /* Logic on ConXS-board CSFR register*/
21#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ 21#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
22#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ 22 /* Logic on ConXS-board BOCR register*/
23#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ 23#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
24#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ 24 /* Logic on ConXS-board IRCR register*/
25#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
26 /* Logic on ConXS-board UPSR register*/
27#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
28 /* Logic on ConXS-board DICR register*/
29#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
25 30
26/* virtual memory regions */ 31/* virtual memory regions */
27#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ 32#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
@@ -54,6 +59,15 @@
54#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
55#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
56 61
62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ)
66
67/* SPI interface */
68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI)
70
57/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
58#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
59#define GPIO_HEARTBEAT_LED 47 73#define GPIO_HEARTBEAT_LED 47
@@ -62,24 +76,66 @@
62#define GPIO_PIC 0 76#define GPIO_PIC 0
63#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
64 78
65#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
66#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) 80/* for CONXS base board define these registers */
81#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
82#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
67 83
68#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) 84#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
69#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) 85#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
70 86
71#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) 87#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
72#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) 88#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
89
90#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
91#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
73 92
74#ifndef __ASSEMBLY__ 93#ifndef __ASSEMBLY__
75#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) 94static inline unsigned short CFSR_readw(void)
76#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) 95{
77#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) 96 /* [Compact Flash Status Register] is read only */
97 return *((unsigned short *)CFSR_P2V(0x0C000000));
98}
99static inline void BCR_writew(unsigned short value)
100{
101 /* [Board Control Regsiter] is write only */
102 *((unsigned short *)BCR_P2V(0x0E000000)) = value;
103}
104static inline void DCR_writew(unsigned short value)
105{
106 /* [Display Control Register] is write only */
107 *((unsigned short *)DCR_P2V(0x0E000000)) = value;
108}
109static inline void IRCR_writew(unsigned short value)
110{
111 /* [InfraRed data Control Register] is write only */
112 *((unsigned short *)IRCR_P2V(0x0E000000)) = value;
113}
78#else 114#else
79#define ConXS_CFSR CFSR_P2V(0x0C000000) 115#define ConXS_CFSR CFSR_P2V(0x0C000000)
80#define ConXS_BCR BCR_P2V(0x0E000000) 116#define ConXS_BCR BCR_P2V(0x0E000000)
81#define ConXS_DCR DCR_P2V(0x0F800000) 117#define ConXS_DCR DCR_P2V(0x0F800000)
118#define ConXS_IRCR IRCR_P2V(0x0F800000)
82#endif 119#endif
120#else
121/* for whatever baseboard define function registers */
122static inline unsigned short CFSR_readw(void)
123{
124 return 0;
125}
126static inline void BCR_writew(unsigned short value)
127{
128 ;
129}
130static inline void DCR_writew(unsigned short value)
131{
132 ;
133}
134static inline void IRCR_writew(unsigned short value)
135{
136 ;
137}
138#endif /* CONFIG_MACH_TRIZEPS_CONXS */
83 139
84#define ConXS_CFSR_BVD_MASK 0x0003 140#define ConXS_CFSR_BVD_MASK 0x0003
85#define ConXS_CFSR_BVD1 (1 << 0) 141#define ConXS_CFSR_BVD1 (1 << 0)
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 3ed757e6bcc8..75ff8f4243f1 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -22,8 +22,8 @@
22#include <linux/fb.h> 22#include <linux/fb.h>
23#include <linux/ioport.h> 23#include <linux/ioport.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/serial_8250.h> 25#include <linux/gpio.h>
26#include <linux/mtd/mtd.h> 26#include <linux/dm9000.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29 29
@@ -31,7 +31,6 @@
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/memory.h> 32#include <asm/memory.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <mach/hardware.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
36#include <asm/sizes.h> 35#include <asm/sizes.h>
37 36
@@ -40,41 +39,148 @@
40#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
41#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
42 41
42#include <mach/hardware.h>
43#include <mach/pxa-regs.h> 43#include <mach/pxa-regs.h>
44#include <mach/pxa2xx-regs.h> 44#include <mach/pxa2xx-regs.h>
45#include <mach/pxa2xx-gpio.h> 45#include <mach/mfp-pxa27x.h>
46#include <mach/pxa2xx_spi.h>
46#include <mach/trizeps4.h> 47#include <mach/trizeps4.h>
47#include <mach/audio.h> 48#include <mach/audio.h>
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <mach/mmc.h> 50#include <mach/mmc.h>
50#include <mach/irda.h> 51#include <mach/irda.h>
51#include <mach/ohci.h> 52#include <mach/ohci.h>
53#include <mach/i2c.h>
52 54
53#include "generic.h" 55#include "generic.h"
54#include "devices.h" 56#include "devices.h"
55 57
56/******************************************************************************************** 58/* comment out the following line if you want to use the
59 * Standard UART from PXA for serial / irda transmission
60 * and acivate it if you have status leds connected */
61#define STATUS_LEDS_ON_STUART_PINS 1
62
63/*****************************************************************************
64 * MultiFunctionPins of CPU
65 *****************************************************************************/
66static unsigned long trizeps4_pin_config[] __initdata = {
67 /* Chip Selects */
68 GPIO15_nCS_1, /* DiskOnChip CS */
69 GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
70 GPIO94_GPIO, /* DOC lock */
71
72 GPIO78_nCS_2, /* DM9000 CS */
73 GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
74
75 GPIO79_nCS_3, /* Logic CS */
76 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
77
78 /* LCD - 16bpp Active TFT */
79 GPIO58_LCD_LDD_0,
80 GPIO59_LCD_LDD_1,
81 GPIO60_LCD_LDD_2,
82 GPIO61_LCD_LDD_3,
83 GPIO62_LCD_LDD_4,
84 GPIO63_LCD_LDD_5,
85 GPIO64_LCD_LDD_6,
86 GPIO65_LCD_LDD_7,
87 GPIO66_LCD_LDD_8,
88 GPIO67_LCD_LDD_9,
89 GPIO68_LCD_LDD_10,
90 GPIO69_LCD_LDD_11,
91 GPIO70_LCD_LDD_12,
92 GPIO71_LCD_LDD_13,
93 GPIO72_LCD_LDD_14,
94 GPIO73_LCD_LDD_15,
95 GPIO74_LCD_FCLK,
96 GPIO75_LCD_LCLK,
97 GPIO76_LCD_PCLK,
98 GPIO77_LCD_BIAS,
99
100 /* UART */
101 GPIO9_FFUART_CTS,
102 GPIO10_FFUART_DCD,
103 GPIO16_FFUART_TXD,
104 GPIO33_FFUART_DSR,
105 GPIO38_FFUART_RI,
106 GPIO82_FFUART_DTR,
107 GPIO83_FFUART_RTS,
108 GPIO96_FFUART_RXD,
109
110 GPIO42_BTUART_RXD,
111 GPIO43_BTUART_TXD,
112 GPIO44_BTUART_CTS,
113 GPIO45_BTUART_RTS,
114#ifdef STATUS_LEDS_ON_STUART_PINS
115 GPIO46_GPIO,
116 GPIO47_GPIO,
117#else
118 GPIO46_STUART_RXD,
119 GPIO47_STUART_TXD,
120#endif
121 /* PCMCIA */
122 GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
123 GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
124 GPIO48_nPOE,
125 GPIO49_nPWE,
126 GPIO50_nPIOR,
127 GPIO51_nPIOW,
128 GPIO54_nPCE_2,
129 GPIO55_nPREG,
130 GPIO56_nPWAIT,
131 GPIO57_nIOIS16,
132 GPIO102_nPCE_1,
133 GPIO104_PSKTSEL,
134
135 /* MultiMediaCard */
136 GPIO32_MMC_CLK,
137 GPIO92_MMC_DAT_0,
138 GPIO109_MMC_DAT_1,
139 GPIO110_MMC_DAT_2,
140 GPIO111_MMC_DAT_3,
141 GPIO112_MMC_CMD,
142 GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
143
144 /* USB OHCI */
145 GPIO88_USBH1_PWR, /* USBHPWR1 */
146 GPIO89_USBH1_PEN, /* USBHPEN1 */
147
148 /* I2C */
149 GPIO117_I2C_SCL,
150 GPIO118_I2C_SDA,
151};
152
153static unsigned long trizeps4wl_pin_config[] __initdata = {
154 /* SSP 2 */
155 GPIO14_SSP2_SFRM,
156 GPIO19_SSP2_SCLK,
157 GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
158 GPIO86_SSP2_RXD,
159 GPIO87_SSP2_TXD,
160};
161
162/****************************************************************************
57 * ONBOARD FLASH 163 * ONBOARD FLASH
58 ********************************************************************************************/ 164 ****************************************************************************/
59static struct mtd_partition trizeps4_partitions[] = { 165static struct mtd_partition trizeps4_partitions[] = {
60 { 166 {
61 .name = "Bootloader", 167 .name = "Bootloader",
62 .offset = 0x00000000, 168 .offset = 0x00000000,
63 .size = 0x00040000, 169 .size = 0x00040000,
64 .mask_flags = MTD_WRITEABLE /* force read-only */ 170 .mask_flags = MTD_WRITEABLE /* force read-only */
65 },{ 171 }, {
66 .name = "Backup", 172 .name = "Backup",
67 .offset = 0x00040000, 173 .offset = 0x00040000,
68 .size = 0x00040000, 174 .size = 0x00040000,
69 },{ 175 }, {
70 .name = "Image", 176 .name = "Image",
71 .offset = 0x00080000, 177 .offset = 0x00080000,
72 .size = 0x01080000, 178 .size = 0x01080000,
73 },{ 179 }, {
74 .name = "IPSM", 180 .name = "IPSM",
75 .offset = 0x01100000, 181 .offset = 0x01100000,
76 .size = 0x00e00000, 182 .size = 0x00e00000,
77 },{ 183 }, {
78 .name = "Registry", 184 .name = "Registry",
79 .offset = 0x01f00000, 185 .offset = 0x01f00000,
80 .size = MTDPART_SIZ_FULL, 186 .size = MTDPART_SIZ_FULL,
@@ -105,9 +211,9 @@ static struct platform_device flash_device = {
105 .num_resources = 1, 211 .num_resources = 1,
106}; 212};
107 213
108/******************************************************************************************** 214/****************************************************************************
109 * DAVICOM DM9000 Ethernet 215 * DAVICOM DM9000 Ethernet
110 ********************************************************************************************/ 216 ****************************************************************************/
111static struct resource dm9000_resources[] = { 217static struct resource dm9000_resources[] = {
112 [0] = { 218 [0] = {
113 .start = TRIZEPS4_ETH_PHYS+0x300, 219 .start = TRIZEPS4_ETH_PHYS+0x300,
@@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
122 [2] = { 228 [2] = {
123 .start = TRIZEPS4_ETH_IRQ, 229 .start = TRIZEPS4_ETH_IRQ,
124 .end = TRIZEPS4_ETH_IRQ, 230 .end = TRIZEPS4_ETH_IRQ,
125 .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), 231 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 }, 232 },
127}; 233};
128 234
235static struct dm9000_plat_data tri_dm9000_platdata = {
236 .flags = DM9000_PLATF_32BITONLY,
237};
238
129static struct platform_device dm9000_device = { 239static struct platform_device dm9000_device = {
130 .name = "dm9000", 240 .name = "dm9000",
131 .id = -1, 241 .id = -1,
132 .num_resources = ARRAY_SIZE(dm9000_resources), 242 .num_resources = ARRAY_SIZE(dm9000_resources),
133 .resource = dm9000_resources, 243 .resource = dm9000_resources,
244 .dev = {
245 .platform_data = &tri_dm9000_platdata,
246 }
134}; 247};
135 248
136/******************************************************************************************** 249/****************************************************************************
137 * PXA270 serial ports 250 * LED's on GPIO pins of PXA
138 ********************************************************************************************/ 251 ****************************************************************************/
139static struct plat_serial8250_port tri_serial_ports[] = { 252static struct gpio_led trizeps4_led[] = {
140#ifdef CONFIG_SERIAL_PXA 253#ifdef STATUS_LEDS_ON_STUART_PINS
141 /* this uses the own PXA driver */
142 { 254 {
143 0, 255 .name = "led0:orange:heartbeat", /* */
144 }, 256 .default_trigger = "heartbeat",
145#else 257 .gpio = GPIO_HEARTBEAT_LED,
146 /* this uses the generic 8520 driver */ 258 .active_low = 1,
147 [0] = {
148 .membase = (void *)&FFUART,
149 .irq = IRQ_FFUART,
150 .flags = UPF_BOOT_AUTOCONF,
151 .iotype = UPIO_MEM32,
152 .regshift = 2,
153 .uartclk = (921600*16),
154 },
155 [1] = {
156 .membase = (void *)&BTUART,
157 .irq = IRQ_BTUART,
158 .flags = UPF_BOOT_AUTOCONF,
159 .iotype = UPIO_MEM32,
160 .regshift = 2,
161 .uartclk = (921600*16),
162 }, 259 },
163 { 260 {
164 0, 261 .name = "led1:yellow:cpubusy", /* */
262 .default_trigger = "cpu-busy",
263 .gpio = GPIO_SYS_BUSY_LED,
264 .active_low = 1,
165 }, 265 },
166#endif 266#endif
167}; 267};
168 268
169static struct platform_device uart_devices = { 269static struct gpio_led_platform_data trizeps4_led_data = {
170 .name = "serial8250", 270 .leds = trizeps4_led,
171 .id = 0, 271 .num_leds = ARRAY_SIZE(trizeps4_led),
272};
273
274static struct platform_device leds_devices = {
275 .name = "leds-gpio",
276 .id = -1,
172 .dev = { 277 .dev = {
173 .platform_data = tri_serial_ports, 278 .platform_data = &trizeps4_led_data,
174 }, 279 },
175 .num_resources = 0,
176 .resource = NULL,
177}; 280};
178 281
179static struct platform_device * trizeps4_devices[] __initdata = { 282static struct platform_device *trizeps4_devices[] __initdata = {
180 &flash_device, 283 &flash_device,
181 &uart_devices,
182 &dm9000_device, 284 &dm9000_device,
285 &leds_devices,
286};
287
288static struct platform_device *trizeps4wl_devices[] __initdata = {
289 &flash_device,
290 &leds_devices,
183}; 291};
184 292
185#ifdef CONFIG_MACH_TRIZEPS4_CONXS
186static short trizeps_conxs_bcr; 293static short trizeps_conxs_bcr;
187 294
188/* PCCARD power switching supports only 3,3V */ 295/* PCCARD power switching supports only 3,3V */
@@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
192 /* switch power on, put in reset and enable buffers */ 299 /* switch power on, put in reset and enable buffers */
193 trizeps_conxs_bcr |= power; 300 trizeps_conxs_bcr |= power;
194 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 301 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
195 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); 302 trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
196 ConXS_BCR = trizeps_conxs_bcr; 303 BCR_writew(trizeps_conxs_bcr);
197 /* wait a little */ 304 /* wait a little */
198 udelay(2000); 305 udelay(2000);
199 /* take reset away */ 306 /* take reset away */
200 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); 307 trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
201 ConXS_BCR = trizeps_conxs_bcr; 308 BCR_writew(trizeps_conxs_bcr);
202 udelay(2000); 309 udelay(2000);
203 } else { 310 } else {
204 /* put in reset */ 311 /* put in reset */
205 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 312 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
206 ConXS_BCR = trizeps_conxs_bcr; 313 BCR_writew(trizeps_conxs_bcr);
207 udelay(1000); 314 udelay(1000);
208 /* switch power off */ 315 /* switch power off */
209 trizeps_conxs_bcr &= ~(0xf); 316 trizeps_conxs_bcr &= ~0xf;
210 ConXS_BCR = trizeps_conxs_bcr; 317 BCR_writew(trizeps_conxs_bcr);
211
212 } 318 }
213 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); 319 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
320 trizeps_conxs_bcr);
214} 321}
322EXPORT_SYMBOL(board_pcmcia_power);
215 323
216/* backlight power switching for LCD panel */ 324/* backlight power switching for LCD panel */
217static void board_backlight_power(int on) 325static void board_backlight_power(int on)
218{ 326{
219 if (on) { 327 if (on)
220 trizeps_conxs_bcr |= ConXS_BCR_L_DISP; 328 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
221 } else { 329 else
222 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; 330 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
223 }
224 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
225 ConXS_BCR = trizeps_conxs_bcr;
226}
227 331
228/* Powersupply for MMC/SD cardslot */ 332 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
229static void board_mci_power(struct device *dev, unsigned int vdd) 333 trizeps_conxs_bcr);
230{ 334 BCR_writew(trizeps_conxs_bcr);
231 struct pxamci_platform_data* p_d = dev->platform_data;
232
233 if (( 1 << vdd) & p_d->ocr_mask) {
234 pr_debug("%s: on\n", __func__);
235 /* FIXME fill in values here */
236 } else {
237 pr_debug("%s: off\n", __func__);
238 /* FIXME fill in values here */
239 }
240} 335}
241 336
242static short trizeps_conxs_ircr; 337/* a I2C based RTC is known on CONXS board */
243 338static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
244/* Switch modes and Power for IRDA receiver */ 339 { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
245static void board_irda_mode(struct device *dev, int mode) 340};
246{
247 unsigned long flags;
248
249 local_irq_save(flags);
250 if (mode & IR_SIRMODE) {
251 /* Slow mode */
252 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
253 } else if (mode & IR_FIRMODE) {
254 /* Fast mode */
255 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
256 }
257 pxa2xx_transceiver_mode(dev, mode);
258 if (mode & IR_OFF) {
259 trizeps_conxs_ircr |= ConXS_IRCR_SD;
260 } else {
261 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
262 }
263 /* FIXME write values to register */
264 local_irq_restore(flags);
265}
266
267#else
268/* for other baseboards define dummies */
269void board_pcmcia_power(int power) {;}
270#define board_backlight_power NULL
271#define board_mci_power NULL
272#define board_irda_mode NULL
273
274#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
275EXPORT_SYMBOL(board_pcmcia_power);
276 341
277static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data) 342/****************************************************************************
343 * MMC card slot external to module
344 ****************************************************************************/
345static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
346 void *data)
278{ 347{
279 int err; 348 int err;
280 /* setup GPIO for PXA27x MMC controller */
281 pxa_gpio_mode(GPIO32_MMCCLK_MD);
282 pxa_gpio_mode(GPIO112_MMCCMD_MD);
283 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
284 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
285 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
286 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
287
288 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
289 349
290 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, 350 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
291 IRQF_DISABLED | IRQF_TRIGGER_RISING, 351 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
292 "MMC card detect", data); 352 "MMC card detect", data);
293 if (err) 353 if (err) {
294 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 354 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
295 355 "MMC card detect IRQ\n");
296 return err; 356 return -1;
357 }
358 return 0;
297} 359}
298 360
299static void trizeps4_mci_exit(struct device *dev, void *data) 361static void trizeps4_mci_exit(struct device *dev, void *data)
@@ -303,22 +365,68 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
303 365
304static struct pxamci_platform_data trizeps4_mci_platform_data = { 366static struct pxamci_platform_data trizeps4_mci_platform_data = {
305 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 367 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
368 .detect_delay = 1,
306 .init = trizeps4_mci_init, 369 .init = trizeps4_mci_init,
307 .exit = trizeps4_mci_exit, 370 .exit = trizeps4_mci_exit,
308 .setpower = board_mci_power, 371 .get_ro = NULL, /* write-protection not supported */
372 .setpower = NULL, /* power-switching not supported */
309}; 373};
310 374
375/****************************************************************************
376 * IRDA mode switching on stuart
377 ****************************************************************************/
378#ifndef STATUS_LEDS_ON_STUART_PINS
379static short trizeps_conxs_ircr;
380
381static int trizeps4_irda_startup(struct device *dev)
382{
383 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
384 IRCR_writew(trizeps_conxs_ircr);
385 return 0;
386}
387
388static void trizeps4_irda_shutdown(struct device *dev)
389{
390 trizeps_conxs_ircr |= ConXS_IRCR_SD;
391 IRCR_writew(trizeps_conxs_ircr);
392}
393
394static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
395{
396 unsigned long flags;
397
398 local_irq_save(flags);
399 /* Switch mode */
400 if (mode & IR_SIRMODE)
401 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
402 else if (mode & IR_FIRMODE) {
403 trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
404
405 /* Switch power */
406 if (mode & IR_OFF)
407 trizeps_conxs_ircr |= ConXS_IRCR_SD;
408 else
409 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
410
411 IRCR_writew(trizeps_conxs_ircr);
412 local_irq_restore(flags);
413
414 pxa2xx_transceiver_mode(dev, mode);
415}
416
311static struct pxaficp_platform_data trizeps4_ficp_platform_data = { 417static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
312 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 418 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
313 .transceiver_mode = board_irda_mode, 419 .transceiver_mode = trizeps4_irda_transceiver_mode,
420 .startup = trizeps4_irda_startup,
421 .shutdown = trizeps4_irda_shutdown,
314}; 422};
423#endif
315 424
425/****************************************************************************
426 * OHCI USB port
427 ****************************************************************************/
316static int trizeps4_ohci_init(struct device *dev) 428static int trizeps4_ohci_init(struct device *dev)
317{ 429{
318 /* setup Port1 GPIO pin. */
319 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
320 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
321
322 /* Set the Power Control Polarity Low and Power Sense 430 /* Set the Power Control Polarity Low and Power Sense
323 Polarity Low to active low. */ 431 Polarity Low to active low. */
324 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & 432 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
@@ -327,15 +435,9 @@ static int trizeps4_ohci_init(struct device *dev)
327 return 0; 435 return 0;
328} 436}
329 437
330static void trizeps4_ohci_exit(struct device *dev)
331{
332 ;
333}
334
335static struct pxaohci_platform_data trizeps4_ohci_platform_data = { 438static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
336 .port_mode = PMM_PERPORT_MODE, 439 .port_mode = PMM_PERPORT_MODE,
337 .init = trizeps4_ohci_init, 440 .init = trizeps4_ohci_init,
338 .exit = trizeps4_ohci_exit,
339}; 441};
340 442
341static struct map_desc trizeps4_io_desc[] __initdata = { 443static struct map_desc trizeps4_io_desc[] __initdata = {
@@ -372,105 +474,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
372}; 474};
373 475
374static struct pxafb_mode_info sharp_lcd_mode = { 476static struct pxafb_mode_info sharp_lcd_mode = {
375 .pixclock = 78000, 477 .pixclock = 78000,
376 .xres = 640, 478 .xres = 640,
377 .yres = 480, 479 .yres = 480,
378 .bpp = 8, 480 .bpp = 8,
379 .hsync_len = 4, 481 .hsync_len = 4,
380 .left_margin = 4, 482 .left_margin = 4,
381 .right_margin = 4, 483 .right_margin = 4,
382 .vsync_len = 2, 484 .vsync_len = 2,
383 .upper_margin = 0, 485 .upper_margin = 0,
384 .lower_margin = 0, 486 .lower_margin = 0,
385 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 487 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
386 .cmap_greyscale = 0, 488 .cmap_greyscale = 0,
387}; 489};
388 490
389static struct pxafb_mach_info sharp_lcd = { 491static struct pxafb_mach_info sharp_lcd = {
390 .modes = &sharp_lcd_mode, 492 .modes = &sharp_lcd_mode,
391 .num_modes = 1, 493 .num_modes = 1,
392 .cmap_inverse = 0, 494 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
393 .cmap_static = 0, 495 .cmap_inverse = 0,
394 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, 496 .cmap_static = 0,
395 .lccr3 = 0x0340ff02, 497 .pxafb_backlight_power = board_backlight_power,
396 .pxafb_backlight_power = board_backlight_power,
397}; 498};
398 499
399static struct pxafb_mode_info toshiba_lcd_mode = { 500static struct pxafb_mode_info toshiba_lcd_mode = {
400 .pixclock = 39720, 501 .pixclock = 39720,
401 .xres = 640, 502 .xres = 640,
402 .yres = 480, 503 .yres = 480,
403 .bpp = 8, 504 .bpp = 8,
404 .hsync_len = 63, 505 .hsync_len = 63,
405 .left_margin = 12, 506 .left_margin = 12,
406 .right_margin = 12, 507 .right_margin = 12,
407 .vsync_len = 4, 508 .vsync_len = 4,
408 .upper_margin = 32, 509 .upper_margin = 32,
409 .lower_margin = 10, 510 .lower_margin = 10,
410 .sync = 0, 511 .sync = 0,
411 .cmap_greyscale = 0, 512 .cmap_greyscale = 0,
412}; 513};
413 514
414static struct pxafb_mach_info toshiba_lcd = { 515static struct pxafb_mach_info toshiba_lcd = {
415 .modes = &toshiba_lcd_mode, 516 .modes = &toshiba_lcd_mode,
416 .num_modes = 1, 517 .num_modes = 1,
417 .cmap_inverse = 0, 518 .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
418 .cmap_static = 0, 519 .cmap_inverse = 0,
419 .lccr0 = LCCR0_Color | LCCR0_Act, 520 .cmap_static = 0,
420 .lccr3 = 0x03400002, 521 .pxafb_backlight_power = board_backlight_power,
421 .pxafb_backlight_power = board_backlight_power,
422}; 522};
423 523
424static void __init trizeps4_init(void) 524static void __init trizeps4_init(void)
425{ 525{
426 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); 526 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
527 if (machine_is_trizeps4wl()) {
528 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
529 platform_add_devices(trizeps4wl_devices,
530 ARRAY_SIZE(trizeps4wl_devices));
531 } else {
532 platform_add_devices(trizeps4_devices,
533 ARRAY_SIZE(trizeps4_devices));
534 }
427 535
428/* set_pxa_fb_info(&sharp_lcd); */ 536 if (0) /* dont know how to determine LCD */
429 set_pxa_fb_info(&toshiba_lcd); 537 set_pxa_fb_info(&sharp_lcd);
538 else
539 set_pxa_fb_info(&toshiba_lcd);
430 540
431 pxa_set_mci_info(&trizeps4_mci_platform_data); 541 pxa_set_mci_info(&trizeps4_mci_platform_data);
542#ifndef STATUS_LEDS_ON_STUART_PINS
432 pxa_set_ficp_info(&trizeps4_ficp_platform_data); 543 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
544#endif
433 pxa_set_ohci_info(&trizeps4_ohci_platform_data); 545 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
434 pxa_set_ac97_info(NULL); 546 pxa_set_ac97_info(NULL);
435} 547 pxa_set_i2c_info(NULL);
548 i2c_register_board_info(0, trizeps4_i2c_devices,
549 ARRAY_SIZE(trizeps4_i2c_devices));
436 550
437static void __init trizeps4_map_io(void)
438{
439 pxa_map_io();
440 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
441
442 /* for DiskOnChip */
443 pxa_gpio_mode(GPIO15_nCS_1_MD);
444
445 /* for off-module PIC on ConXS board */
446 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
447
448 /* UCB1400 irq */
449 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
450
451 /* for DM9000 LAN */
452 pxa_gpio_mode(GPIO78_nCS_2_MD);
453 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
454
455 /* for PCMCIA device */
456 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
457 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
458
459 /* for I2C adapter */
460 pxa_gpio_mode(GPIO117_I2CSCL_MD);
461 pxa_gpio_mode(GPIO118_I2CSDA_MD);
462
463 /* MMC_DET s.o. */
464 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
465
466 /* whats that for ??? */
467 pxa_gpio_mode(GPIO79_nCS_3_MD);
468
469#ifdef CONFIG_LEDS
470 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
471 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
472#endif
473#ifdef CONFIG_MACH_TRIZEPS4_CONXS
474#ifdef CONFIG_IDE_PXA_CF 551#ifdef CONFIG_IDE_PXA_CF
475 /* if boot direct from compact flash dont disable power */ 552 /* if boot direct from compact flash dont disable power */
476 trizeps_conxs_bcr = 0x0009; 553 trizeps_conxs_bcr = 0x0009;
@@ -478,18 +555,24 @@ static void __init trizeps4_map_io(void)
478 /* this is the reset value */ 555 /* this is the reset value */
479 trizeps_conxs_bcr = 0x00A0; 556 trizeps_conxs_bcr = 0x00A0;
480#endif 557#endif
481 ConXS_BCR = trizeps_conxs_bcr; 558 BCR_writew(trizeps_conxs_bcr);
482#endif 559 board_backlight_power(1);
560}
483 561
484#warning FIXME - accessing PM registers directly is deprecated 562static void __init trizeps4_map_io(void)
485 PWER = 0x00000002; 563{
486 PFER = 0x00000000; 564 pxa_map_io();
487 PRER = 0x00000002; 565 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
488 PGSR0 = 0x0158C000; 566
489 PGSR1 = 0x00FF0080; 567 if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
490 PGSR2 = 0x0001C004; 568 /* if flash is 16 bit wide its a Trizeps4 WL */
491 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 569 __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
492 PCFR |= PCFR_OPDE; 570 trizeps4_flash_data[0].width = 2;
571 } else {
572 /* if flash is 32 bit wide its a Trizeps4 */
573 __machine_arch_type = MACH_TYPE_TRIZEPS4;
574 trizeps4_flash_data[0].width = 4;
575 }
493} 576}
494 577
495MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") 578MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
@@ -503,3 +586,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
503 .timer = &pxa_timer, 586 .timer = &pxa_timer,
504MACHINE_END 587MACHINE_END
505 588
589MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
590 /* MAINTAINER("Jürgen Schindele") */
591 .phys_io = 0x40000000,
592 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
593 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
594 .init_machine = trizeps4_init,
595 .map_io = trizeps4_map_io,
596 .init_irq = pxa27x_init_irq,
597 .timer = &pxa_timer,
598MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 02:41:32 -0500