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authorBen Hutchings <bhutchings@solarflare.com>2008-09-01 07:45:48 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-09-03 09:53:42 -0400
commit11f34e691d6b3501606a9eaf5379ec718d2fabeb (patch)
tree603a6ca2100d8f219506e4875bb59e444ccb7fb0
parenta0c2c19093bb326ecce4231e558f92e1e7985e37 (diff)
sfc: Reduce delays in SFE4001 initialisation
Currently the board initialisation includes 2 delays of 1 second each. Usually it is unnecessary to wait that long, so check before doing so. Correct some of the comments and log messages while we're here. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r--drivers/net/sfc/sfe4001.c57
1 files changed, 35 insertions, 22 deletions
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index b27849523990..f9272816437d 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -145,7 +145,7 @@ MODULE_PARM_DESC(phy_flash_cfg,
145int sfe4001_init(struct efx_nic *efx) 145int sfe4001_init(struct efx_nic *efx)
146{ 146{
147 struct i2c_client *hwmon_client, *ioexp_client; 147 struct i2c_client *hwmon_client, *ioexp_client;
148 unsigned int count; 148 unsigned int i, j;
149 int rc; 149 int rc;
150 u8 out; 150 u8 out;
151 efx_dword_t reg; 151 efx_dword_t reg;
@@ -209,17 +209,24 @@ int sfe4001_init(struct efx_nic *efx)
209 if (rc) 209 if (rc)
210 goto fail_on; 210 goto fail_on;
211 211
212 /* Turn all power off then wait 1 sec. This ensures PHY is reset */ 212 /* If PHY power is on, turn it all off and wait 1 second to
213 * ensure a full reset.
214 */
215 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
216 if (rc < 0)
217 goto fail_on;
213 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) | 218 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
214 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) | 219 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
215 (0 << P0_EN_1V0X_LBN)); 220 (0 << P0_EN_1V0X_LBN));
216 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); 221 if (rc != out) {
217 if (rc) 222 EFX_INFO(efx, "power-cycling PHY\n");
218 goto fail_on; 223 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
224 if (rc)
225 goto fail_on;
226 schedule_timeout_uninterruptible(HZ);
227 }
219 228
220 schedule_timeout_uninterruptible(HZ); 229 for (i = 0; i < 20; ++i) {
221 count = 0;
222 do {
223 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */ 230 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
224 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) | 231 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
225 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) | 232 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
@@ -238,23 +245,29 @@ int sfe4001_init(struct efx_nic *efx)
238 if (rc) 245 if (rc)
239 goto fail_on; 246 goto fail_on;
240 247
241 EFX_INFO(efx, "waiting for power (attempt %d)...\n", count); 248 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
242
243 schedule_timeout_uninterruptible(HZ);
244
245 /* Check DSP is powered */
246 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
247 if (rc < 0)
248 goto fail_on;
249 if (rc & (1 << P1_AFE_PWD_LBN))
250 goto done;
251 249
252 /* DSP doesn't look powered in flash config mode */ 250 /* In flash config mode, DSP does not turn on AFE, so
253 if (sfe4001_phy_flash_cfg) 251 * just wait 1 second.
252 */
253 if (sfe4001_phy_flash_cfg) {
254 schedule_timeout_uninterruptible(HZ);
254 goto done; 255 goto done;
255 } while (++count < 20); 256 }
257
258 for (j = 0; j < 10; ++j) {
259 msleep(100);
260
261 /* Check DSP has asserted AFE power line */
262 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
263 if (rc < 0)
264 goto fail_on;
265 if (rc & (1 << P1_AFE_PWD_LBN))
266 goto done;
267 }
268 }
256 269
257 EFX_INFO(efx, "timed out waiting for power\n"); 270 EFX_INFO(efx, "timed out waiting for DSP boot\n");
258 rc = -ETIMEDOUT; 271 rc = -ETIMEDOUT;
259 goto fail_on; 272 goto fail_on;
260 273