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authorMichael Chan <mchan@broadcom.com>2006-11-19 17:09:25 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-12-03 00:24:22 -0500
commitaf3ee519c5d6bebbda9bf0ca3b81bc50b4dd2163 (patch)
tree03c4e5e6c10210239109d8456801d1902fb06a49
parenta16dda0e67cea666fb7eb708ab1199892c4a1a13 (diff)
[BNX2]: Re-organize firmware structures.
Re-organize the firmware handling code and declarations a bit to make the code more compact. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2.c164
-rw-r--r--drivers/net/bnx2.h48
-rw-r--r--drivers/net/bnx2_fw.h193
3 files changed, 187 insertions, 218 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 0a46b45f21dd..2633579b8c43 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -2214,11 +2214,12 @@ load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len,
2214 } 2214 }
2215} 2215}
2216 2216
2217static void 2217static int
2218load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw) 2218load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
2219{ 2219{
2220 u32 offset; 2220 u32 offset;
2221 u32 val; 2221 u32 val;
2222 int rc;
2222 2223
2223 /* Halt the CPU. */ 2224 /* Halt the CPU. */
2224 val = REG_RD_IND(bp, cpu_reg->mode); 2225 val = REG_RD_IND(bp, cpu_reg->mode);
@@ -2228,7 +2229,18 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
2228 2229
2229 /* Load the Text area. */ 2230 /* Load the Text area. */
2230 offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base); 2231 offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
2231 if (fw->text) { 2232 if (fw->gz_text) {
2233 u32 text_len;
2234 void *text;
2235
2236 rc = bnx2_gunzip(bp, fw->gz_text, fw->gz_text_len, &text,
2237 &text_len);
2238 if (rc)
2239 return rc;
2240
2241 fw->text = text;
2242 }
2243 if (fw->gz_text) {
2232 int j; 2244 int j;
2233 2245
2234 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { 2246 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
@@ -2286,13 +2298,15 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
2286 val &= ~cpu_reg->mode_value_halt; 2298 val &= ~cpu_reg->mode_value_halt;
2287 REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear); 2299 REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
2288 REG_WR_IND(bp, cpu_reg->mode, val); 2300 REG_WR_IND(bp, cpu_reg->mode, val);
2301
2302 return 0;
2289} 2303}
2290 2304
2291static int 2305static int
2292bnx2_init_cpus(struct bnx2 *bp) 2306bnx2_init_cpus(struct bnx2 *bp)
2293{ 2307{
2294 struct cpu_reg cpu_reg; 2308 struct cpu_reg cpu_reg;
2295 struct fw_info fw; 2309 struct fw_info *fw;
2296 int rc = 0; 2310 int rc = 0;
2297 void *text; 2311 void *text;
2298 u32 text_len; 2312 u32 text_len;
@@ -2329,44 +2343,12 @@ bnx2_init_cpus(struct bnx2 *bp)
2329 cpu_reg.spad_base = BNX2_RXP_SCRATCH; 2343 cpu_reg.spad_base = BNX2_RXP_SCRATCH;
2330 cpu_reg.mips_view_base = 0x8000000; 2344 cpu_reg.mips_view_base = 0x8000000;
2331 2345
2332 fw.ver_major = bnx2_RXP_b06FwReleaseMajor; 2346 fw = &bnx2_rxp_fw_06;
2333 fw.ver_minor = bnx2_RXP_b06FwReleaseMinor;
2334 fw.ver_fix = bnx2_RXP_b06FwReleaseFix;
2335 fw.start_addr = bnx2_RXP_b06FwStartAddr;
2336 2347
2337 fw.text_addr = bnx2_RXP_b06FwTextAddr; 2348 rc = load_cpu_fw(bp, &cpu_reg, fw);
2338 fw.text_len = bnx2_RXP_b06FwTextLen;
2339 fw.text_index = 0;
2340
2341 rc = bnx2_gunzip(bp, bnx2_RXP_b06FwText, sizeof(bnx2_RXP_b06FwText),
2342 &text, &text_len);
2343 if (rc) 2349 if (rc)
2344 goto init_cpu_err; 2350 goto init_cpu_err;
2345 2351
2346 fw.text = text;
2347
2348 fw.data_addr = bnx2_RXP_b06FwDataAddr;
2349 fw.data_len = bnx2_RXP_b06FwDataLen;
2350 fw.data_index = 0;
2351 fw.data = bnx2_RXP_b06FwData;
2352
2353 fw.sbss_addr = bnx2_RXP_b06FwSbssAddr;
2354 fw.sbss_len = bnx2_RXP_b06FwSbssLen;
2355 fw.sbss_index = 0;
2356 fw.sbss = bnx2_RXP_b06FwSbss;
2357
2358 fw.bss_addr = bnx2_RXP_b06FwBssAddr;
2359 fw.bss_len = bnx2_RXP_b06FwBssLen;
2360 fw.bss_index = 0;
2361 fw.bss = bnx2_RXP_b06FwBss;
2362
2363 fw.rodata_addr = bnx2_RXP_b06FwRodataAddr;
2364 fw.rodata_len = bnx2_RXP_b06FwRodataLen;
2365 fw.rodata_index = 0;
2366 fw.rodata = bnx2_RXP_b06FwRodata;
2367
2368 load_cpu_fw(bp, &cpu_reg, &fw);
2369
2370 /* Initialize the TX Processor. */ 2352 /* Initialize the TX Processor. */
2371 cpu_reg.mode = BNX2_TXP_CPU_MODE; 2353 cpu_reg.mode = BNX2_TXP_CPU_MODE;
2372 cpu_reg.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT; 2354 cpu_reg.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT;
@@ -2381,44 +2363,12 @@ bnx2_init_cpus(struct bnx2 *bp)
2381 cpu_reg.spad_base = BNX2_TXP_SCRATCH; 2363 cpu_reg.spad_base = BNX2_TXP_SCRATCH;
2382 cpu_reg.mips_view_base = 0x8000000; 2364 cpu_reg.mips_view_base = 0x8000000;
2383 2365
2384 fw.ver_major = bnx2_TXP_b06FwReleaseMajor; 2366 fw = &bnx2_txp_fw_06;
2385 fw.ver_minor = bnx2_TXP_b06FwReleaseMinor;
2386 fw.ver_fix = bnx2_TXP_b06FwReleaseFix;
2387 fw.start_addr = bnx2_TXP_b06FwStartAddr;
2388 2367
2389 fw.text_addr = bnx2_TXP_b06FwTextAddr; 2368 rc = load_cpu_fw(bp, &cpu_reg, fw);
2390 fw.text_len = bnx2_TXP_b06FwTextLen;
2391 fw.text_index = 0;
2392
2393 rc = bnx2_gunzip(bp, bnx2_TXP_b06FwText, sizeof(bnx2_TXP_b06FwText),
2394 &text, &text_len);
2395 if (rc) 2369 if (rc)
2396 goto init_cpu_err; 2370 goto init_cpu_err;
2397 2371
2398 fw.text = text;
2399
2400 fw.data_addr = bnx2_TXP_b06FwDataAddr;
2401 fw.data_len = bnx2_TXP_b06FwDataLen;
2402 fw.data_index = 0;
2403 fw.data = bnx2_TXP_b06FwData;
2404
2405 fw.sbss_addr = bnx2_TXP_b06FwSbssAddr;
2406 fw.sbss_len = bnx2_TXP_b06FwSbssLen;
2407 fw.sbss_index = 0;
2408 fw.sbss = bnx2_TXP_b06FwSbss;
2409
2410 fw.bss_addr = bnx2_TXP_b06FwBssAddr;
2411 fw.bss_len = bnx2_TXP_b06FwBssLen;
2412 fw.bss_index = 0;
2413 fw.bss = bnx2_TXP_b06FwBss;
2414
2415 fw.rodata_addr = bnx2_TXP_b06FwRodataAddr;
2416 fw.rodata_len = bnx2_TXP_b06FwRodataLen;
2417 fw.rodata_index = 0;
2418 fw.rodata = bnx2_TXP_b06FwRodata;
2419
2420 load_cpu_fw(bp, &cpu_reg, &fw);
2421
2422 /* Initialize the TX Patch-up Processor. */ 2372 /* Initialize the TX Patch-up Processor. */
2423 cpu_reg.mode = BNX2_TPAT_CPU_MODE; 2373 cpu_reg.mode = BNX2_TPAT_CPU_MODE;
2424 cpu_reg.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT; 2374 cpu_reg.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT;
@@ -2433,44 +2383,12 @@ bnx2_init_cpus(struct bnx2 *bp)
2433 cpu_reg.spad_base = BNX2_TPAT_SCRATCH; 2383 cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
2434 cpu_reg.mips_view_base = 0x8000000; 2384 cpu_reg.mips_view_base = 0x8000000;
2435 2385
2436 fw.ver_major = bnx2_TPAT_b06FwReleaseMajor; 2386 fw = &bnx2_tpat_fw_06;
2437 fw.ver_minor = bnx2_TPAT_b06FwReleaseMinor;
2438 fw.ver_fix = bnx2_TPAT_b06FwReleaseFix;
2439 fw.start_addr = bnx2_TPAT_b06FwStartAddr;
2440 2387
2441 fw.text_addr = bnx2_TPAT_b06FwTextAddr; 2388 rc = load_cpu_fw(bp, &cpu_reg, fw);
2442 fw.text_len = bnx2_TPAT_b06FwTextLen;
2443 fw.text_index = 0;
2444
2445 rc = bnx2_gunzip(bp, bnx2_TPAT_b06FwText, sizeof(bnx2_TPAT_b06FwText),
2446 &text, &text_len);
2447 if (rc) 2389 if (rc)
2448 goto init_cpu_err; 2390 goto init_cpu_err;
2449 2391
2450 fw.text = text;
2451
2452 fw.data_addr = bnx2_TPAT_b06FwDataAddr;
2453 fw.data_len = bnx2_TPAT_b06FwDataLen;
2454 fw.data_index = 0;
2455 fw.data = bnx2_TPAT_b06FwData;
2456
2457 fw.sbss_addr = bnx2_TPAT_b06FwSbssAddr;
2458 fw.sbss_len = bnx2_TPAT_b06FwSbssLen;
2459 fw.sbss_index = 0;
2460 fw.sbss = bnx2_TPAT_b06FwSbss;
2461
2462 fw.bss_addr = bnx2_TPAT_b06FwBssAddr;
2463 fw.bss_len = bnx2_TPAT_b06FwBssLen;
2464 fw.bss_index = 0;
2465 fw.bss = bnx2_TPAT_b06FwBss;
2466
2467 fw.rodata_addr = bnx2_TPAT_b06FwRodataAddr;
2468 fw.rodata_len = bnx2_TPAT_b06FwRodataLen;
2469 fw.rodata_index = 0;
2470 fw.rodata = bnx2_TPAT_b06FwRodata;
2471
2472 load_cpu_fw(bp, &cpu_reg, &fw);
2473
2474 /* Initialize the Completion Processor. */ 2392 /* Initialize the Completion Processor. */
2475 cpu_reg.mode = BNX2_COM_CPU_MODE; 2393 cpu_reg.mode = BNX2_COM_CPU_MODE;
2476 cpu_reg.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT; 2394 cpu_reg.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT;
@@ -2485,44 +2403,12 @@ bnx2_init_cpus(struct bnx2 *bp)
2485 cpu_reg.spad_base = BNX2_COM_SCRATCH; 2403 cpu_reg.spad_base = BNX2_COM_SCRATCH;
2486 cpu_reg.mips_view_base = 0x8000000; 2404 cpu_reg.mips_view_base = 0x8000000;
2487 2405
2488 fw.ver_major = bnx2_COM_b06FwReleaseMajor; 2406 fw = &bnx2_com_fw_06;
2489 fw.ver_minor = bnx2_COM_b06FwReleaseMinor;
2490 fw.ver_fix = bnx2_COM_b06FwReleaseFix;
2491 fw.start_addr = bnx2_COM_b06FwStartAddr;
2492
2493 fw.text_addr = bnx2_COM_b06FwTextAddr;
2494 fw.text_len = bnx2_COM_b06FwTextLen;
2495 fw.text_index = 0;
2496 2407
2497 rc = bnx2_gunzip(bp, bnx2_COM_b06FwText, sizeof(bnx2_COM_b06FwText), 2408 rc = load_cpu_fw(bp, &cpu_reg, fw);
2498 &text, &text_len);
2499 if (rc) 2409 if (rc)
2500 goto init_cpu_err; 2410 goto init_cpu_err;
2501 2411
2502 fw.text = text;
2503
2504 fw.data_addr = bnx2_COM_b06FwDataAddr;
2505 fw.data_len = bnx2_COM_b06FwDataLen;
2506 fw.data_index = 0;
2507 fw.data = bnx2_COM_b06FwData;
2508
2509 fw.sbss_addr = bnx2_COM_b06FwSbssAddr;
2510 fw.sbss_len = bnx2_COM_b06FwSbssLen;
2511 fw.sbss_index = 0;
2512 fw.sbss = bnx2_COM_b06FwSbss;
2513
2514 fw.bss_addr = bnx2_COM_b06FwBssAddr;
2515 fw.bss_len = bnx2_COM_b06FwBssLen;
2516 fw.bss_index = 0;
2517 fw.bss = bnx2_COM_b06FwBss;
2518
2519 fw.rodata_addr = bnx2_COM_b06FwRodataAddr;
2520 fw.rodata_len = bnx2_COM_b06FwRodataLen;
2521 fw.rodata_index = 0;
2522 fw.rodata = bnx2_COM_b06FwRodata;
2523
2524 load_cpu_fw(bp, &cpu_reg, &fw);
2525
2526init_cpu_err: 2412init_cpu_err:
2527 bnx2_gunzip_end(bp); 2413 bnx2_gunzip_end(bp);
2528 return rc; 2414 return rc;
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 7fa7008f402a..11e9c55d1dd0 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -4107,41 +4107,43 @@ struct cpu_reg {
4107}; 4107};
4108 4108
4109struct fw_info { 4109struct fw_info {
4110 u32 ver_major; 4110 const u32 ver_major;
4111 u32 ver_minor; 4111 const u32 ver_minor;
4112 u32 ver_fix; 4112 const u32 ver_fix;
4113 4113
4114 u32 start_addr; 4114 const u32 start_addr;
4115 4115
4116 /* Text section. */ 4116 /* Text section. */
4117 u32 text_addr; 4117 const u32 text_addr;
4118 u32 text_len; 4118 const u32 text_len;
4119 u32 text_index; 4119 const u32 text_index;
4120 u32 *text; 4120 u32 *text;
4121 u8 *gz_text;
4122 const u32 gz_text_len;
4121 4123
4122 /* Data section. */ 4124 /* Data section. */
4123 u32 data_addr; 4125 const u32 data_addr;
4124 u32 data_len; 4126 const u32 data_len;
4125 u32 data_index; 4127 const u32 data_index;
4126 u32 *data; 4128 const u32 *data;
4127 4129
4128 /* SBSS section. */ 4130 /* SBSS section. */
4129 u32 sbss_addr; 4131 const u32 sbss_addr;
4130 u32 sbss_len; 4132 const u32 sbss_len;
4131 u32 sbss_index; 4133 const u32 sbss_index;
4132 u32 *sbss; 4134 const u32 *sbss;
4133 4135
4134 /* BSS section. */ 4136 /* BSS section. */
4135 u32 bss_addr; 4137 const u32 bss_addr;
4136 u32 bss_len; 4138 const u32 bss_len;
4137 u32 bss_index; 4139 const u32 bss_index;
4138 u32 *bss; 4140 const u32 *bss;
4139 4141
4140 /* Read-only section. */ 4142 /* Read-only section. */
4141 u32 rodata_addr; 4143 const u32 rodata_addr;
4142 u32 rodata_len; 4144 const u32 rodata_len;
4143 u32 rodata_index; 4145 const u32 rodata_index;
4144 u32 *rodata; 4146 const u32 *rodata;
4145}; 4147};
4146 4148
4147#define RV2P_PROC1 0 4149#define RV2P_PROC1 0
diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h
index 4adc8de30631..21d368ff424d 100644
--- a/drivers/net/bnx2_fw.h
+++ b/drivers/net/bnx2_fw.h
@@ -14,20 +14,6 @@
14 * accompanying it. 14 * accompanying it.
15 */ 15 */
16 16
17static const int bnx2_COM_b06FwReleaseMajor = 0x1;
18static const int bnx2_COM_b06FwReleaseMinor = 0x0;
19static const int bnx2_COM_b06FwReleaseFix = 0x0;
20static const u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
21static const u32 bnx2_COM_b06FwTextAddr = 0x08000000;
22static const int bnx2_COM_b06FwTextLen = 0x57bc;
23static const u32 bnx2_COM_b06FwDataAddr = 0x08005840;
24static const int bnx2_COM_b06FwDataLen = 0x0;
25static const u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
26static const int bnx2_COM_b06FwRodataLen = 0x58;
27static const u32 bnx2_COM_b06FwBssAddr = 0x08005860;
28static const int bnx2_COM_b06FwBssLen = 0x88;
29static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
30static const int bnx2_COM_b06FwSbssLen = 0x1c;
31static u8 bnx2_COM_b06FwText[] = { 17static u8 bnx2_COM_b06FwText[] = {
32 0x1f, 0x8b, 0x08, 0x08, 0x09, 0x83, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, 18 0x1f, 0x8b, 0x08, 0x08, 0x09, 0x83, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65,
33 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xec, 0x5b, 0x7d, 0x6c, 19 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xec, 0x5b, 0x7d, 0x6c,
@@ -673,20 +659,40 @@ static u32 bnx2_COM_b06FwRodata[(0x58/4) + 1] = {
673static u32 bnx2_COM_b06FwBss[(0x88/4) + 1] = { 0x0 }; 659static u32 bnx2_COM_b06FwBss[(0x88/4) + 1] = { 0x0 };
674static u32 bnx2_COM_b06FwSbss[(0x1c/4) + 1] = { 0x0 }; 660static u32 bnx2_COM_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
675 661
676static const int bnx2_RXP_b06FwReleaseMajor = 0x2; 662static struct fw_info bnx2_com_fw_06 = {
677static const int bnx2_RXP_b06FwReleaseMinor = 0x8; 663 .ver_major = 0x1,
678static const int bnx2_RXP_b06FwReleaseFix = 0x17; 664 .ver_minor = 0x0,
679static const u32 bnx2_RXP_b06FwStartAddr = 0x08003184; 665 .ver_fix = 0x0,
680static const u32 bnx2_RXP_b06FwTextAddr = 0x08000000; 666
681static const int bnx2_RXP_b06FwTextLen = 0x6728; 667 .start_addr = 0x080008b4,
682static const u32 bnx2_RXP_b06FwDataAddr = 0x080069c0; 668
683static const int bnx2_RXP_b06FwDataLen = 0x0; 669 .text_addr = 0x08000000,
684static const u32 bnx2_RXP_b06FwRodataAddr = 0x08006728; 670 .text_len = 0x57bc,
685static const int bnx2_RXP_b06FwRodataLen = 0x278; 671 .text_index = 0x0,
686static const u32 bnx2_RXP_b06FwBssAddr = 0x080069f0; 672 .gz_text = bnx2_COM_b06FwText,
687static const int bnx2_RXP_b06FwBssLen = 0x13dc; 673 .gz_text_len = sizeof(bnx2_COM_b06FwText),
688static const u32 bnx2_RXP_b06FwSbssAddr = 0x080069c0; 674
689static const int bnx2_RXP_b06FwSbssLen = 0x2c; 675 .data_addr = 0x08005840,
676 .data_len = 0x0,
677 .data_index = 0x0,
678 .data = bnx2_COM_b06FwData,
679
680 .sbss_addr = 0x08005840,
681 .sbss_len = 0x1c,
682 .sbss_index = 0x0,
683 .sbss = bnx2_COM_b06FwSbss,
684
685 .bss_addr = 0x08005860,
686 .bss_len = 0x88,
687 .bss_index = 0x0,
688 .bss = bnx2_COM_b06FwBss,
689
690 .rodata_addr = 0x080057c0,
691 .rodata_len = 0x58,
692 .rodata_index = 0x0,
693 .rodata = bnx2_COM_b06FwRodata,
694};
695
690static u8 bnx2_RXP_b06FwText[] = { 696static u8 bnx2_RXP_b06FwText[] = {
691 0x1f, 0x8b, 0x08, 0x08, 0xcb, 0xa3, 0x46, 0x45, 0x00, 0x03, 0x74, 0x65, 697 0x1f, 0x8b, 0x08, 0x08, 0xcb, 0xa3, 0x46, 0x45, 0x00, 0x03, 0x74, 0x65,
692 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xec, 0x5c, 0x6f, 0x6c, 698 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xec, 0x5c, 0x6f, 0x6c,
@@ -1366,6 +1372,40 @@ static u32 bnx2_RXP_b06FwRodata[(0x278/4) + 1] = {
1366static u32 bnx2_RXP_b06FwBss[(0x13dc/4) + 1] = { 0x0 }; 1372static u32 bnx2_RXP_b06FwBss[(0x13dc/4) + 1] = { 0x0 };
1367static u32 bnx2_RXP_b06FwSbss[(0x2c/4) + 1] = { 0x0 }; 1373static u32 bnx2_RXP_b06FwSbss[(0x2c/4) + 1] = { 0x0 };
1368 1374
1375static struct fw_info bnx2_rxp_fw_06 = {
1376 .ver_major = 0x2,
1377 .ver_minor = 0x8,
1378 .ver_fix = 0x17,
1379
1380 .start_addr = 0x08003184,
1381
1382 .text_addr = 0x08000000,
1383 .text_len = 0x6728,
1384 .text_index = 0x0,
1385 .gz_text = bnx2_RXP_b06FwText,
1386 .gz_text_len = sizeof(bnx2_RXP_b06FwText),
1387
1388 .data_addr = 0x080069c0,
1389 .data_len = 0x0,
1390 .data_index = 0x0,
1391 .data = bnx2_RXP_b06FwData,
1392
1393 .sbss_addr = 0x080069c0,
1394 .sbss_len = 0x2c,
1395 .sbss_index = 0x0,
1396 .sbss = bnx2_RXP_b06FwSbss,
1397
1398 .bss_addr = 0x080069f0,
1399 .bss_len = 0x13dc,
1400 .bss_index = 0x0,
1401 .bss = bnx2_RXP_b06FwBss,
1402
1403 .rodata_addr = 0x08006728,
1404 .rodata_len = 0x278,
1405 .rodata_index = 0x0,
1406 .rodata = bnx2_RXP_b06FwRodata,
1407};
1408
1369static u8 bnx2_rv2p_proc1[] = { 1409static u8 bnx2_rv2p_proc1[] = {
1370 0x1f, 0x8b, 0x08, 0x08, 0x5e, 0xd0, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, 1410 0x1f, 0x8b, 0x08, 0x08, 0x5e, 0xd0, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65,
1371 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x56, 0xcf, 0x6b, 1411 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x56, 0xcf, 0x6b,
@@ -1625,20 +1665,6 @@ static u8 bnx2_rv2p_proc2[] = {
1625 0x63, 0xd6, 0x11, 0x8f, 0x47, 0xd5, 0x5f, 0x3f, 0x97, 0x8f, 0x31, 0xd8, 1665 0x63, 0xd6, 0x11, 0x8f, 0x47, 0xd5, 0x5f, 0x3f, 0x97, 0x8f, 0x31, 0xd8,
1626 0x17, 0x00, 0x00, 0x00 }; 1666 0x17, 0x00, 0x00, 0x00 };
1627 1667
1628static const int bnx2_TPAT_b06FwReleaseMajor = 0x1;
1629static const int bnx2_TPAT_b06FwReleaseMinor = 0x0;
1630static const int bnx2_TPAT_b06FwReleaseFix = 0x0;
1631static const u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
1632static const u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
1633static const int bnx2_TPAT_b06FwTextLen = 0x122c;
1634static const u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
1635static const int bnx2_TPAT_b06FwDataLen = 0x0;
1636static const u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
1637static const int bnx2_TPAT_b06FwRodataLen = 0x0;
1638static const u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
1639static const int bnx2_TPAT_b06FwBssLen = 0x250;
1640static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
1641static const int bnx2_TPAT_b06FwSbssLen = 0x34;
1642static u8 bnx2_TPAT_b06FwText[] = { 1668static u8 bnx2_TPAT_b06FwText[] = {
1643 0x1f, 0x8b, 0x08, 0x08, 0x47, 0xd2, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, 1669 0x1f, 0x8b, 0x08, 0x08, 0x47, 0xd2, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65,
1644 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x57, 0x4d, 0x68, 1670 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x57, 0x4d, 0x68,
@@ -1838,20 +1864,40 @@ static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
1838static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 }; 1864static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
1839static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 }; 1865static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
1840 1866
1841static const int bnx2_TXP_b06FwReleaseMajor = 0x1; 1867static struct fw_info bnx2_tpat_fw_06 = {
1842static const int bnx2_TXP_b06FwReleaseMinor = 0x0; 1868 .ver_major = 0x1,
1843static const int bnx2_TXP_b06FwReleaseFix = 0x0; 1869 .ver_minor = 0x0,
1844static const u32 bnx2_TXP_b06FwStartAddr = 0x080034b0; 1870 .ver_fix = 0x0,
1845static const u32 bnx2_TXP_b06FwTextAddr = 0x08000000; 1871
1846static const int bnx2_TXP_b06FwTextLen = 0x5748; 1872 .start_addr = 0x08000860,
1847static const u32 bnx2_TXP_b06FwDataAddr = 0x08005760; 1873
1848static const int bnx2_TXP_b06FwDataLen = 0x0; 1874 .text_addr = 0x08000800,
1849static const u32 bnx2_TXP_b06FwRodataAddr = 0x00000000; 1875 .text_len = 0x122c,
1850static const int bnx2_TXP_b06FwRodataLen = 0x0; 1876 .text_index = 0x0,
1851static const u32 bnx2_TXP_b06FwBssAddr = 0x080057a0; 1877 .gz_text = bnx2_TPAT_b06FwText,
1852static const int bnx2_TXP_b06FwBssLen = 0x1c4; 1878 .gz_text_len = sizeof(bnx2_TPAT_b06FwText),
1853static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760; 1879
1854static const int bnx2_TXP_b06FwSbssLen = 0x38; 1880 .data_addr = 0x08001a60,
1881 .data_len = 0x0,
1882 .data_index = 0x0,
1883 .data = bnx2_TPAT_b06FwData,
1884
1885 .sbss_addr = 0x08001a60,
1886 .sbss_len = 0x34,
1887 .sbss_index = 0x0,
1888 .sbss = bnx2_TPAT_b06FwSbss,
1889
1890 .bss_addr = 0x08001aa0,
1891 .bss_len = 0x250,
1892 .bss_index = 0x0,
1893 .bss = bnx2_TPAT_b06FwBss,
1894
1895 .rodata_addr = 0x00000000,
1896 .rodata_len = 0x0,
1897 .rodata_index = 0x0,
1898 .rodata = bnx2_TPAT_b06FwRodata,
1899};
1900
1855static u8 bnx2_TXP_b06FwText[] = { 1901static u8 bnx2_TXP_b06FwText[] = {
1856 0x1f, 0x8b, 0x08, 0x08, 0x21, 0xd3, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, 1902 0x1f, 0x8b, 0x08, 0x08, 0x21, 0xd3, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65,
1857 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xed, 0x5c, 0x6d, 0x6c, 1903 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xed, 0x5c, 0x6d, 0x6c,
@@ -2273,3 +2319,38 @@ static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
2273static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; 2319static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
2274static u32 bnx2_TXP_b06FwBss[(0x1c4/4) + 1] = { 0x0 }; 2320static u32 bnx2_TXP_b06FwBss[(0x1c4/4) + 1] = { 0x0 };
2275static u32 bnx2_TXP_b06FwSbss[(0x38/4) + 1] = { 0x0 }; 2321static u32 bnx2_TXP_b06FwSbss[(0x38/4) + 1] = { 0x0 };
2322
2323static struct fw_info bnx2_txp_fw_06 = {
2324 .ver_major = 0x1,
2325 .ver_minor = 0x0,
2326 .ver_fix = 0x0,
2327
2328 .start_addr = 0x080034b0,
2329
2330 .text_addr = 0x08000000,
2331 .text_len = 0x5748,
2332 .text_index = 0x0,
2333 .gz_text = bnx2_TXP_b06FwText,
2334 .gz_text_len = sizeof(bnx2_TXP_b06FwText),
2335
2336 .data_addr = 0x08005760,
2337 .data_len = 0x0,
2338 .data_index = 0x0,
2339 .data = bnx2_TXP_b06FwData,
2340
2341 .sbss_addr = 0x08005760,
2342 .sbss_len = 0x38,
2343 .sbss_index = 0x0,
2344 .sbss = bnx2_TXP_b06FwSbss,
2345
2346 .bss_addr = 0x080057a0,
2347 .bss_len = 0x1c4,
2348 .bss_index = 0x0,
2349 .bss = bnx2_TXP_b06FwBss,
2350
2351 .rodata_addr = 0x00000000,
2352 .rodata_len = 0x0,
2353 .rodata_index = 0x0,
2354 .rodata = bnx2_TXP_b06FwRodata,
2355};
2356