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authorJeremy Fitzhardinge <jeremy@goop.org>2008-02-04 10:48:02 -0500
committerIngo Molnar <mingo@elte.hu>2008-02-04 10:48:02 -0500
commita67ad9c9f82342a9b320fdad204a490727ef4a18 (patch)
tree47117746d64a3255e35fda69e8127d64e35fe122
parente618c9579c745742c422b7c3de1f802aa67e6110 (diff)
x86: revert "defer cr3 reload when doing pud_clear()"
Revert "defer cr3 reload when doing pud_clear()" since I'm going to replace it. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/mm/pgtable_32.c7
-rw-r--r--include/asm-x86/pgtable-3level.h21
2 files changed, 6 insertions, 22 deletions
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index f34e33d18443..c7db504be1ea 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -373,13 +373,6 @@ void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
373 373
374void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) 374void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
375{ 375{
376 /* This is called just after the pmd has been detached from
377 the pgd, which requires a full tlb flush to be recognized
378 by the CPU. Rather than incurring multiple tlb flushes
379 while the address space is being pulled down, make the tlb
380 gathering machinery do a full flush when we're done. */
381 tlb->fullmm = 1;
382
383 paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT); 376 paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT);
384 tlb_remove_page(tlb, virt_to_page(pmd)); 377 tlb_remove_page(tlb, virt_to_page(pmd));
385} 378}
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index a195c3e757b9..ed4c6f0e57ec 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -96,23 +96,14 @@ static inline void pud_clear(pud_t *pudp)
96 set_pud(pudp, __pud(0)); 96 set_pud(pudp, __pud(0));
97 97
98 /* 98 /*
99 * In principle we need to do a cr3 reload here to make sure 99 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
100 * the processor recognizes the changed pgd. In practice, all 100 * the TLB via cr3 if the top-level pgd is changed...
101 * the places where pud_clear() gets called are followed by
102 * full tlb flushes anyway, so we can defer the cost here.
103 * 101 *
104 * Specifically: 102 * XXX I don't think we need to worry about this here, since
105 * 103 * when clearing the pud, the calling code needs to flush the
106 * mm/memory.c:free_pmd_range() - immediately after the 104 * tlb anyway. But do it now for safety's sake. - jsgf
107 * pud_clear() it does a pmd_free_tlb(). We change the
108 * mmu_gather structure to do a full tlb flush (which has the
109 * effect of reloading cr3) when the pagetable free is
110 * complete.
111 *
112 * arch/x86/mm/hugetlbpage.c:huge_pmd_unshare() - the call to
113 * this is followed by a flush_tlb_range, which on x86 does a
114 * full tlb flush.
115 */ 105 */
106 write_cr3(read_cr3());
116} 107}
117 108
118#define pud_page(pud) \ 109#define pud_page(pud) \