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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-25 06:23:45 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-25 06:23:45 -0400
commit1b93a71755f2b15450b3e3045dab58a633e37b18 (patch)
tree0d19367dbea9d083f9e374a21a8e82595392de98
parent7999d8d7a611bee902446939952859caf1367c25 (diff)
[ARM] Remove LOADREGS macro
As for RETINSTR, LOADREGS is a left-over from the 26-bit days. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/boot/compressed/ll_char_wr.S6
-rw-r--r--arch/arm/lib/backtrace.S8
-rw-r--r--arch/arm/lib/clear_user.S4
-rw-r--r--arch/arm/lib/copy_page.S2
-rw-r--r--arch/arm/lib/csumipv6.S2
-rw-r--r--arch/arm/lib/ecard.S4
-rw-r--r--arch/arm/lib/io-readsb.S6
-rw-r--r--arch/arm/lib/io-readsw-armv3.S4
-rw-r--r--arch/arm/lib/io-writesb.S6
-rw-r--r--arch/arm/lib/io-writesw-armv3.S4
-rw-r--r--arch/arm/lib/memset.S2
-rw-r--r--arch/arm/lib/memzero.S2
-rw-r--r--arch/arm/lib/uaccess.S8
-rw-r--r--arch/arm/mm/copypage-v3.S2
-rw-r--r--include/asm-arm/assembler.h11
15 files changed, 30 insertions, 41 deletions
diff --git a/arch/arm/boot/compressed/ll_char_wr.S b/arch/arm/boot/compressed/ll_char_wr.S
index d7bbd9da2fca..8517c8606b4a 100644
--- a/arch/arm/boot/compressed/ll_char_wr.S
+++ b/arch/arm/boot/compressed/ll_char_wr.S
@@ -77,7 +77,7 @@ Lrow4bpplp:
77 subne r1, r1, #1 77 subne r1, r1, #1
78 ldrneb r7, [r6, r1] 78 ldrneb r7, [r6, r1]
79 bne Lrow4bpplp 79 bne Lrow4bpplp
80 LOADREGS(fd, sp!, {r4 - r7, pc}) 80 ldmfd sp!, {r4 - r7, pc}
81 81
82@ 82@
83@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) 83@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
@@ -105,7 +105,7 @@ Lrow8bpplp:
105 subne r1, r1, #1 105 subne r1, r1, #1
106 ldrneb r7, [r6, r1] 106 ldrneb r7, [r6, r1]
107 bne Lrow8bpplp 107 bne Lrow8bpplp
108 LOADREGS(fd, sp!, {r4 - r7, pc}) 108 ldmfd sp!, {r4 - r7, pc}
109 109
110@ 110@
111@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc) 111@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
@@ -127,7 +127,7 @@ Lrow1bpp:
127 strb r7, [r0], r5 127 strb r7, [r0], r5
128 mov r7, r7, lsr #8 128 mov r7, r7, lsr #8
129 strb r7, [r0], r5 129 strb r7, [r0], r5
130 LOADREGS(fd, sp!, {r4 - r7, pc}) 130 ldmfd sp!, {r4 - r7, pc}
131 131
132 .bss 132 .bss
133ENTRY(con_charconvtable) 133ENTRY(con_charconvtable)
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 16153c86c3f8..058b80d72aa1 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -41,7 +41,7 @@ ENTRY(c_backtrace)
41 movne r0, #0 41 movne r0, #0
42 movs frame, r0 42 movs frame, r0
431: moveq r0, #-2 431: moveq r0, #-2
44 LOADREGS(eqfd, sp!, {r4 - r8, pc}) 44 ldmeqfd sp!, {r4 - r8, pc}
45 45
462: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction 462: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
47 ldr r0, [sp], #4 47 ldr r0, [sp], #4
@@ -85,7 +85,7 @@ ENTRY(c_backtrace)
85 * A zero next framepointer means we're done. 85 * A zero next framepointer means we're done.
86 */ 86 */
87 teq next, #0 87 teq next, #0
88 LOADREGS(eqfd, sp!, {r4 - r8, pc}) 88 ldmeqfd sp!, {r4 - r8, pc}
89 89
90 /* 90 /*
91 * The next framepointer must be above the 91 * The next framepointer must be above the
@@ -104,7 +104,7 @@ ENTRY(c_backtrace)
1041007: ldr r0, =.Lbad 1041007: ldr r0, =.Lbad
105 mov r1, frame 105 mov r1, frame
106 bl printk 106 bl printk
107 LOADREGS(fd, sp!, {r4 - r8, pc}) 107 ldmfd sp!, {r4 - r8, pc}
108 .ltorg 108 .ltorg
109 .previous 109 .previous
110 110
@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
145 adrne r0, .Lcr 145 adrne r0, .Lcr
146 blne printk 146 blne printk
147 mov r0, stack 147 mov r0, stack
148 LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc}) 148 ldmfd sp!, {instr, reg, stack, r7, r8, pc}
149 149
150.Lfp: .asciz " r%d = %08X%c" 150.Lfp: .asciz " r%d = %08X%c"
151.Lcr: .asciz "\n" 151.Lcr: .asciz "\n"
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index 7ff9f831b3f9..ea435ae2e4a5 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -43,10 +43,10 @@ USER( strnebt r2, [r0], #1)
43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1 43 tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
44USER( strnebt r2, [r0], #1) 44USER( strnebt r2, [r0], #1)
45 mov r0, #0 45 mov r0, #0
46 LOADREGS(fd,sp!, {r1, pc}) 46 ldmfd sp!, {r1, pc}
47 47
48 .section .fixup,"ax" 48 .section .fixup,"ax"
49 .align 0 49 .align 0
509001: LOADREGS(fd,sp!, {r0, pc}) 509001: ldmfd sp!, {r0, pc}
51 .previous 51 .previous
52 52
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
index 68117968482b..666c99cc0744 100644
--- a/arch/arm/lib/copy_page.S
+++ b/arch/arm/lib/copy_page.S
@@ -43,4 +43,4 @@ ENTRY(copy_page)
43 bgt 1b @ 1 43 bgt 1b @ 1
44 PLD( ldmeqia r1!, {r3, r4, ip, lr} ) 44 PLD( ldmeqia r1!, {r3, r4, ip, lr} )
45 PLD( beq 2b ) 45 PLD( beq 2b )
46 LOADREGS(fd, sp!, {r4, pc}) @ 3 46 ldmfd sp!, {r4, pc} @ 3
diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S
index 7065a20ee8ad..9621469beec1 100644
--- a/arch/arm/lib/csumipv6.S
+++ b/arch/arm/lib/csumipv6.S
@@ -28,5 +28,5 @@ ENTRY(__csum_ipv6_magic)
28 adcs r0, r0, r3 28 adcs r0, r0, r3
29 adcs r0, r0, r2 29 adcs r0, r0, r2
30 adcs r0, r0, #0 30 adcs r0, r0, #0
31 LOADREGS(fd, sp!, {pc}) 31 ldmfd sp!, {pc}
32 32
diff --git a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S
index fb7b602a6f76..c55aaa2a2088 100644
--- a/arch/arm/lib/ecard.S
+++ b/arch/arm/lib/ecard.S
@@ -29,7 +29,7 @@ ENTRY(ecard_loader_read)
29 CPSR2SPSR(r0) 29 CPSR2SPSR(r0)
30 mov lr, pc 30 mov lr, pc
31 mov pc, r2 31 mov pc, r2
32 LOADREGS(fd, sp!, {r4 - r12, pc}) 32 ldmfd sp!, {r4 - r12, pc}
33 33
34@ Purpose: call an expansion card loader to reset the card 34@ Purpose: call an expansion card loader to reset the card
35@ Proto : void read_loader(int card_base, char *loader); 35@ Proto : void read_loader(int card_base, char *loader);
@@ -41,5 +41,5 @@ ENTRY(ecard_loader_reset)
41 CPSR2SPSR(r0) 41 CPSR2SPSR(r0)
42 mov lr, pc 42 mov lr, pc
43 add pc, r1, #8 43 add pc, r1, #8
44 LOADREGS(fd, sp!, {r4 - r12, pc}) 44 ldmfd sp!, {r4 - r12, pc}
45 45
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index d3d8de71a2c8..fb966ad0276f 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -72,7 +72,7 @@ ENTRY(__raw_readsb)
72 bpl .Linsb_16_lp 72 bpl .Linsb_16_lp
73 73
74 tst r2, #15 74 tst r2, #15
75 LOADREGS(eqfd, sp!, {r4 - r6, pc}) 75 ldmeqfd sp!, {r4 - r6, pc}
76 76
77.Linsb_no_16: tst r2, #8 77.Linsb_no_16: tst r2, #8
78 beq .Linsb_no_8 78 beq .Linsb_no_8
@@ -109,7 +109,7 @@ ENTRY(__raw_readsb)
109 str r3, [r1], #4 109 str r3, [r1], #4
110 110
111.Linsb_no_4: ands r2, r2, #3 111.Linsb_no_4: ands r2, r2, #3
112 LOADREGS(eqfd, sp!, {r4 - r6, pc}) 112 ldmeqfd sp!, {r4 - r6, pc}
113 113
114 cmp r2, #2 114 cmp r2, #2
115 ldrb r3, [r0] 115 ldrb r3, [r0]
@@ -119,4 +119,4 @@ ENTRY(__raw_readsb)
119 ldrgtb r3, [r0] 119 ldrgtb r3, [r0]
120 strgtb r3, [r1] 120 strgtb r3, [r1]
121 121
122 LOADREGS(fd, sp!, {r4 - r6, pc}) 122 ldmfd sp!, {r4 - r6, pc}
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 2639983219b9..4ef904185142 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -69,7 +69,7 @@ ENTRY(__raw_readsw)
69 bpl .Linsw_8_lp 69 bpl .Linsw_8_lp
70 70
71 tst r2, #7 71 tst r2, #7
72 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) 72 ldmeqfd sp!, {r4, r5, r6, pc}
73 73
74.Lno_insw_8: tst r2, #4 74.Lno_insw_8: tst r2, #4
75 beq .Lno_insw_4 75 beq .Lno_insw_4
@@ -102,6 +102,6 @@ ENTRY(__raw_readsw)
102 movne r3, r3, lsr #8 102 movne r3, r3, lsr #8
103 strneb r3, [r1] 103 strneb r3, [r1]
104 104
105 LOADREGS(fd, sp!, {r4, r5, r6, pc}) 105 ldmfd sp!, {r4, r5, r6, pc}
106 106
107 107
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 08209fc640ea..7eba2b6cc69f 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -64,7 +64,7 @@ ENTRY(__raw_writesb)
64 bpl .Loutsb_16_lp 64 bpl .Loutsb_16_lp
65 65
66 tst r2, #15 66 tst r2, #15
67 LOADREGS(eqfd, sp!, {r4, r5, pc}) 67 ldmeqfd sp!, {r4, r5, pc}
68 68
69.Loutsb_no_16: tst r2, #8 69.Loutsb_no_16: tst r2, #8
70 beq .Loutsb_no_8 70 beq .Loutsb_no_8
@@ -80,7 +80,7 @@ ENTRY(__raw_writesb)
80 outword r3 80 outword r3
81 81
82.Loutsb_no_4: ands r2, r2, #3 82.Loutsb_no_4: ands r2, r2, #3
83 LOADREGS(eqfd, sp!, {r4, r5, pc}) 83 ldmeqfd sp!, {r4, r5, pc}
84 84
85 cmp r2, #2 85 cmp r2, #2
86 ldrb r3, [r1], #1 86 ldrb r3, [r1], #1
@@ -90,4 +90,4 @@ ENTRY(__raw_writesb)
90 ldrgtb r3, [r1] 90 ldrgtb r3, [r1]
91 strgtb r3, [r0] 91 strgtb r3, [r0]
92 92
93 LOADREGS(fd, sp!, {r4, r5, pc}) 93 ldmfd sp!, {r4, r5, pc}
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index c421f92eeb27..1607a29f49b7 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -80,7 +80,7 @@ ENTRY(__raw_writesw)
80 bpl .Loutsw_8_lp 80 bpl .Loutsw_8_lp
81 81
82 tst r2, #7 82 tst r2, #7
83 LOADREGS(eqfd, sp!, {r4, r5, r6, pc}) 83 ldmeqfd sp!, {r4, r5, r6, pc}
84 84
85.Lno_outsw_8: tst r2, #4 85.Lno_outsw_8: tst r2, #4
86 beq .Lno_outsw_4 86 beq .Lno_outsw_4
@@ -124,4 +124,4 @@ ENTRY(__raw_writesw)
124 orrne ip, ip, ip, lsr #16 124 orrne ip, ip, ip, lsr #16
125 strne ip, [r0] 125 strne ip, [r0]
126 126
127 LOADREGS(fd, sp!, {r4, r5, r6, pc}) 127 ldmfd sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 69e7c31f3381..95b110b07a89 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -53,7 +53,7 @@ ENTRY(memset)
53 stmgeia r0!, {r1, r3, ip, lr} 53 stmgeia r0!, {r1, r3, ip, lr}
54 stmgeia r0!, {r1, r3, ip, lr} 54 stmgeia r0!, {r1, r3, ip, lr}
55 bgt 2b 55 bgt 2b
56 LOADREGS(eqfd, sp!, {pc}) @ Now <64 bytes to go. 56 ldmeqfd sp!, {pc} @ Now <64 bytes to go.
57/* 57/*
58 * No need to correct the count; we're only testing bits from now on 58 * No need to correct the count; we're only testing bits from now on
59 */ 59 */
diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
index 764e7de8bbab..abf2508e8221 100644
--- a/arch/arm/lib/memzero.S
+++ b/arch/arm/lib/memzero.S
@@ -53,7 +53,7 @@ ENTRY(__memzero)
53 stmgeia r0!, {r2, r3, ip, lr} @ 4 53 stmgeia r0!, {r2, r3, ip, lr} @ 4
54 stmgeia r0!, {r2, r3, ip, lr} @ 4 54 stmgeia r0!, {r2, r3, ip, lr} @ 4
55 bgt 3b @ 1 55 bgt 3b @ 1
56 LOADREGS(eqfd, sp!, {pc}) @ 1/2 quick exit 56 ldmeqfd sp!, {pc} @ 1/2 quick exit
57/* 57/*
58 * No need to correct the count; we're only testing bits from now on 58 * No need to correct the count; we're only testing bits from now on
59 */ 59 */
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index 0cc450f863b6..1f1545d737be 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -105,7 +105,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
105 movs ip, r2 105 movs ip, r2
106 bne .Lc2u_nowords 106 bne .Lc2u_nowords
107.Lc2u_finished: mov r0, #0 107.Lc2u_finished: mov r0, #0
108 LOADREGS(fd,sp!,{r2, r4 - r7, pc}) 108 ldmfd sp!, {r2, r4 - r7, pc}
109 109
110.Lc2u_src_not_aligned: 110.Lc2u_src_not_aligned:
111 bic r1, r1, #3 111 bic r1, r1, #3
@@ -280,7 +280,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
280 280
281 .section .fixup,"ax" 281 .section .fixup,"ax"
282 .align 0 282 .align 0
2839001: LOADREGS(fd,sp!, {r0, r4 - r7, pc}) 2839001: ldmfd sp!, {r0, r4 - r7, pc}
284 .previous 284 .previous
285 285
286/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); 286/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
@@ -369,7 +369,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
369 bne .Lcfu_nowords 369 bne .Lcfu_nowords
370.Lcfu_finished: mov r0, #0 370.Lcfu_finished: mov r0, #0
371 add sp, sp, #8 371 add sp, sp, #8
372 LOADREGS(fd,sp!,{r4 - r7, pc}) 372 ldmfd sp!, {r4 - r7, pc}
373 373
374.Lcfu_src_not_aligned: 374.Lcfu_src_not_aligned:
375 bic r1, r1, #3 375 bic r1, r1, #3
@@ -556,6 +556,6 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
556 movne r1, r4 556 movne r1, r4
557 blne __memzero 557 blne __memzero
558 mov r0, r4 558 mov r0, r4
559 LOADREGS(fd,sp!, {r4 - r7, pc}) 559 ldmfd sp!, {r4 - r7, pc}
560 .previous 560 .previous
561 561
diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S
index 3c58ebbf0359..2ee394b11bcb 100644
--- a/arch/arm/mm/copypage-v3.S
+++ b/arch/arm/mm/copypage-v3.S
@@ -35,7 +35,7 @@ ENTRY(v3_copy_user_page)
35 stmia r0!, {r3, r4, ip, lr} @ 4 35 stmia r0!, {r3, r4, ip, lr} @ 4
36 ldmneia r1!, {r3, r4, ip, lr} @ 4 36 ldmneia r1!, {r3, r4, ip, lr} @ 4
37 bne 1b @ 1 37 bne 1b @ 1
38 LOADREGS(fd, sp!, {r4, pc}) @ 3 38 ldmfd sp!, {r4, pc} @ 3
39 39
40 .align 5 40 .align 5
41/* 41/*
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index 930dd905f1eb..add451ab8947 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -63,17 +63,6 @@
63#define DEFAULT_FIQ MODE_FIQ 63#define DEFAULT_FIQ MODE_FIQ
64 64
65/* 65/*
66 * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
67 */
68#ifdef __STDC__
69#define LOADREGS(cond, base, reglist...)\
70 ldm##cond base,reglist
71#else
72#define LOADREGS(cond, base, reglist...)\
73 ldm/**/cond base,reglist
74#endif
75
76/*
77 * Enable and disable interrupts 66 * Enable and disable interrupts
78 */ 67 */
79#if __LINUX_ARM_ARCH__ >= 6 68#if __LINUX_ARM_ARCH__ >= 6