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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-03-14 08:23:44 -0400
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-04-27 07:44:13 -0400
commit188ff65d49dadf7b0e9b6718abc3fe98a5098711 (patch)
tree29c930e7609d441f543baade2ddac70665d7bf54
parent19b7ce8bad718a2850ea19aeb7383f1728596c24 (diff)
[AVR32] Don't enable clocks with no users
Bring the code that sets the initial PM clock masks in line with the comment preceding it by only enabling clocks that have users != 0. Fix SM clock definition and avr32_hpt_init() so that the SM and TC0 clocks keep ticking. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c14
-rw-r--r--arch/avr32/mach-at32ap/time-tc.c1
2 files changed, 14 insertions, 1 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 6eeda60b8288..56db45b99a0f 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -417,7 +417,15 @@ struct platform_device at32_sm_device = {
417 .resource = sm_resource, 417 .resource = sm_resource,
418 .num_resources = ARRAY_SIZE(sm_resource), 418 .num_resources = ARRAY_SIZE(sm_resource),
419}; 419};
420DEV_CLK(pclk, at32_sm, pbb, 0); 420static struct clk at32_sm_pclk = {
421 .name = "pclk",
422 .dev = &at32_sm_device.dev,
423 .parent = &pbb_clk,
424 .mode = pbb_clk_mode,
425 .get_rate = pbb_clk_get_rate,
426 .users = 1,
427 .index = 0,
428};
421 429
422static struct resource intc0_resource[] = { 430static struct resource intc0_resource[] = {
423 PBMEM(0xfff00400), 431 PBMEM(0xfff00400),
@@ -443,6 +451,7 @@ static struct clk hramc_clk = {
443 .mode = hsb_clk_mode, 451 .mode = hsb_clk_mode,
444 .get_rate = hsb_clk_get_rate, 452 .get_rate = hsb_clk_get_rate,
445 .users = 1, 453 .users = 1,
454 .index = 3,
446}; 455};
447 456
448static struct resource smc0_resource[] = { 457static struct resource smc0_resource[] = {
@@ -1080,6 +1089,9 @@ void __init at32_clock_init(void)
1080 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { 1089 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
1081 struct clk *clk = at32_clock_list[i]; 1090 struct clk *clk = at32_clock_list[i];
1082 1091
1092 if (clk->users == 0)
1093 continue;
1094
1083 if (clk->mode == &cpu_clk_mode) 1095 if (clk->mode == &cpu_clk_mode)
1084 cpu_mask |= 1 << clk->index; 1096 cpu_mask |= 1 << clk->index;
1085 else if (clk->mode == &hsb_clk_mode) 1097 else if (clk->mode == &hsb_clk_mode)
diff --git a/arch/avr32/mach-at32ap/time-tc.c b/arch/avr32/mach-at32ap/time-tc.c
index 7ac0e94d8ed5..e3070bdd4bb9 100644
--- a/arch/avr32/mach-at32ap/time-tc.c
+++ b/arch/avr32/mach-at32ap/time-tc.c
@@ -135,6 +135,7 @@ int avr32_hpt_init(unsigned int count)
135 pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk)); 135 pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
136 goto out_error; 136 goto out_error;
137 } 137 }
138 clk_enable(pclk);
138 139
139 regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0); 140 regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
140 if (!regs) { 141 if (!regs) {