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authorBellido Nicolas <nb-ml@be.rmk.(none)>2005-06-20 13:51:05 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-20 13:51:05 -0400
commit038c5b602524b33447008492e932cdd0a1e806c9 (patch)
treea2a474e180e370dfbc966bfd7f0050469aff4b98
parent09f0551d20ddf6d22c333adcc59f2b1148734273 (diff)
[PATCH] ARM: 2686/2: AAEC-2000 Core support
Patch from Bellido Nicolas Core support for AAEC-2000 based platforms. This is an updated version of the previous patch, and takes into account Russell's comments. AAED-2000 default configuration will follow as soon as some problems with the bootloader are sorted out... Signed-off-by: Nicolas Bellido Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/Kconfig7
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-aaec2000/Kconfig11
-rw-r--r--arch/arm/mach-aaec2000/Makefile9
-rw-r--r--arch/arm/mach-aaec2000/aaed2000.c48
-rw-r--r--arch/arm/mach-aaec2000/core.c157
-rw-r--r--arch/arm/mach-aaec2000/core.h16
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--include/asm-arm/arch-aaec2000/aaec2000.h151
-rw-r--r--include/asm-arm/arch-aaec2000/debug-macro.S36
-rw-r--r--include/asm-arm/arch-aaec2000/dma.h17
-rw-r--r--include/asm-arm/arch-aaec2000/entry-macro.S33
-rw-r--r--include/asm-arm/arch-aaec2000/hardware.h49
-rw-r--r--include/asm-arm/arch-aaec2000/io.h19
-rw-r--r--include/asm-arm/arch-aaec2000/irqs.h46
-rw-r--r--include/asm-arm/arch-aaec2000/memory.h73
-rw-r--r--include/asm-arm/arch-aaec2000/param.h15
-rw-r--r--include/asm-arm/arch-aaec2000/system.h24
-rw-r--r--include/asm-arm/arch-aaec2000/timex.h18
-rw-r--r--include/asm-arm/arch-aaec2000/uncompress.h47
-rw-r--r--include/asm-arm/arch-aaec2000/vmalloc.h16
21 files changed, 794 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1a1773f81393..efdb12d73566 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -198,6 +198,11 @@ config ARCH_H720X
198 help 198 help
199 This enables support for systems based on the Hynix HMS720x 199 This enables support for systems based on the Hynix HMS720x
200 200
201config ARCH_AAEC2000
202 bool "Agilent AAEC-2000 based"
203 help
204 This enables support for systems based on the Agilent AAEC-2000
205
201endchoice 206endchoice
202 207
203source "arch/arm/mach-clps711x/Kconfig" 208source "arch/arm/mach-clps711x/Kconfig"
@@ -230,6 +235,8 @@ source "arch/arm/mach-h720x/Kconfig"
230 235
231source "arch/arm/mach-versatile/Kconfig" 236source "arch/arm/mach-versatile/Kconfig"
232 237
238source "arch/arm/mach-aaec2000/Kconfig"
239
233# Definitions to make life easier 240# Definitions to make life easier
234config ARCH_ACORN 241config ARCH_ACORN
235 bool 242 bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 2277e3d179cc..8330495e2448 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -97,6 +97,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000
97 machine-$(CONFIG_ARCH_VERSATILE) := versatile 97 machine-$(CONFIG_ARCH_VERSATILE) := versatile
98 machine-$(CONFIG_ARCH_IMX) := imx 98 machine-$(CONFIG_ARCH_IMX) := imx
99 machine-$(CONFIG_ARCH_H720X) := h720x 99 machine-$(CONFIG_ARCH_H720X) := h720x
100 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
100 101
101ifeq ($(CONFIG_ARCH_EBSA110),y) 102ifeq ($(CONFIG_ARCH_EBSA110),y)
102# This is what happens if you forget the IOCS16 line. 103# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-aaec2000/Kconfig b/arch/arm/mach-aaec2000/Kconfig
new file mode 100644
index 000000000000..5e4bef93754c
--- /dev/null
+++ b/arch/arm/mach-aaec2000/Kconfig
@@ -0,0 +1,11 @@
1if ARCH_AAEC2000
2
3menu "Agilent AAEC-2000 Implementations"
4
5config MACH_AAED2000
6 bool "Agilent AAED-2000 Development Platform"
7 select CPU_ARM920T
8
9endmenu
10
11endif
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
new file mode 100644
index 000000000000..20ec83896c37
--- /dev/null
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Common support (must be linked before board specific support)
6obj-y += core.o
7
8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
new file mode 100644
index 000000000000..5417ca3f4621
--- /dev/null
+++ b/arch/arm/mach-aaec2000/aaed2000.c
@@ -0,0 +1,48 @@
1/*
2 * linux/arch/arm/mach-aaec2000/aaed2000.c
3 *
4 * Support for the Agilent AAED-2000 Development Platform.
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/major.h>
18#include <linux/interrupt.h>
19
20#include <asm/setup.h>
21#include <asm/memory.h>
22#include <asm/mach-types.h>
23#include <asm/hardware.h>
24#include <asm/irq.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include "core.h"
31
32static void __init aaed2000_init_irq(void)
33{
34 aaec2000_init_irq();
35}
36
37static void __init aaed2000_map_io(void)
38{
39 aaec2000_map_io();
40}
41
42MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
43 MAINTAINER("Nicolas Bellido Y Ortega")
44 BOOT_MEM(0xf0000000, PIO_BASE, VIO_BASE)
45 MAPIO(aaed2000_map_io)
46 INITIRQ(aaed2000_init_irq)
47 .timer = &aaec2000_timer,
48MACHINE_END
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
new file mode 100644
index 000000000000..fc145b3768fa
--- /dev/null
+++ b/arch/arm/mach-aaec2000/core.c
@@ -0,0 +1,157 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.c
3 *
4 * Code common to all AAEC-2000 machines
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/interrupt.h>
19#include <linux/timex.h>
20#include <linux/signal.h>
21
22#include <asm/hardware.h>
23#include <asm/irq.h>
24
25#include <asm/mach/irq.h>
26#include <asm/mach/time.h>
27#include <asm/mach/map.h>
28
29/*
30 * Common I/O mapping:
31 *
32 * Static virtual address mappings are as follow:
33 *
34 * 0xf8000000-0xf8001ffff: Devices connected to APB bus
35 * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
36 *
37 * Below 0xe8000000 is reserved for vm allocation.
38 *
39 * The machine specific code must provide the extra mapping beside the
40 * default mapping provided here.
41 */
42static struct map_desc standard_io_desc[] __initdata = {
43 /* virtual physical length type */
44 { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE },
45 { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE }
46};
47
48void __init aaec2000_map_io(void)
49{
50 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
51}
52
53/*
54 * Interrupt handling routines
55 */
56static void aaec2000_int_ack(unsigned int irq)
57{
58 IRQ_INTSR = 1 << irq;
59}
60
61static void aaec2000_int_mask(unsigned int irq)
62{
63 IRQ_INTENC |= (1 << irq);
64}
65
66static void aaec2000_int_unmask(unsigned int irq)
67{
68 IRQ_INTENS |= (1 << irq);
69}
70
71static struct irqchip aaec2000_irq_chip = {
72 .ack = aaec2000_int_ack,
73 .mask = aaec2000_int_mask,
74 .unmask = aaec2000_int_unmask,
75};
76
77void __init aaec2000_init_irq(void)
78{
79 unsigned int i;
80
81 for (i = 0; i < NR_IRQS; i++) {
82 set_irq_handler(i, do_level_IRQ);
83 set_irq_chip(i, &aaec2000_irq_chip);
84 set_irq_flags(i, IRQF_VALID);
85 }
86
87 /* Disable all interrupts */
88 IRQ_INTENC = 0xffffffff;
89
90 /* Clear any pending interrupts */
91 IRQ_INTSR = IRQ_INTSR;
92}
93
94/*
95 * Time keeping
96 */
97/* IRQs are disabled before entering here from do_gettimeofday() */
98static unsigned long aaec2000_gettimeoffset(void)
99{
100 unsigned long ticks_to_match, elapsed, usec;
101
102 /* Get ticks before next timer match */
103 ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
104
105 /* We need elapsed ticks since last match */
106 elapsed = LATCH - ticks_to_match;
107
108 /* Now, convert them to usec */
109 usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
110
111 return usec;
112}
113
114/* We enter here with IRQs enabled */
115static irqreturn_t
116aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
117{
118 /* TODO: Check timer accuracy */
119 write_seqlock(&xtime_lock);
120
121 timer_tick(regs);
122 TIMER1_CLEAR = 1;
123
124 write_sequnlock(&xtime_lock);
125
126 return IRQ_HANDLED;
127}
128
129static struct irqaction aaec2000_timer_irq = {
130 .name = "AAEC-2000 Timer Tick",
131 .flags = SA_INTERRUPT,
132 .handler = aaec2000_timer_interrupt
133};
134
135static void __init aaec2000_timer_init(void)
136{
137 /* Disable timer 1 */
138 TIMER1_CTRL = 0;
139
140 /* We have somehow to generate a 100Hz clock.
141 * We then use the 508KHz timer in periodic mode.
142 */
143 TIMER1_LOAD = LATCH;
144 TIMER1_CLEAR = 1; /* Clear interrupt */
145
146 setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
147
148 TIMER1_CTRL = TIMER_CTRL_ENABLE |
149 TIMER_CTRL_PERIODIC |
150 TIMER_CTRL_CLKSEL_508K;
151}
152
153struct sys_timer aaec2000_timer = {
154 .init = aaec2000_timer_init,
155 .offset = aaec2000_gettimeoffset,
156};
157
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
new file mode 100644
index 000000000000..91893d848c16
--- /dev/null
+++ b/arch/arm/mach-aaec2000/core.h
@@ -0,0 +1,16 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12struct sys_timer;
13
14extern struct sys_timer aaec2000_timer;
15extern void __init aaec2000_map_io(void);
16extern void __init aaec2000_init_irq(void);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3fefb43c67f7..95606b4a3ba6 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -62,7 +62,7 @@ config CPU_ARM720T
62# ARM920T 62# ARM920T
63config CPU_ARM920T 63config CPU_ARM920T
64 bool "Support ARM920T processor" if !ARCH_S3C2410 64 bool "Support ARM920T processor" if !ARCH_S3C2410
65 depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX 65 depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000
66 default y if ARCH_S3C2410 66 default y if ARCH_S3C2410
67 select CPU_32v4 67 select CPU_32v4
68 select CPU_ABRT_EV4T 68 select CPU_ABRT_EV4T
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h
new file mode 100644
index 000000000000..0e9b7e18af05
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/aaec2000.h
@@ -0,0 +1,151 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/aaec2000.h
3 *
4 * AAEC-2000 registers definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAEC2000_H
14#define __ASM_ARCH_AAEC2000_H
15
16#ifndef __ASM_ARCH_HARDWARE_H
17#error You must include hardware.h not this file
18#endif /* __ASM_ARCH_HARDWARE_H */
19
20/* Interrupt controller */
21#define IRQ_BASE __REG(0x80000500)
22#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
23#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
24#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
25#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
26
27/* UART 1 */
28#define UART1_BASE __REG(0x80000600)
29#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
30#define UART1_LCR __REG(0x80000604) /* Link Control Register */
31#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
32#define UART1_CR __REG(0x8000060c) /* Control Register */
33#define UART1_SR __REG(0x80000610) /* Status Register */
34#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
35#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
36#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
37
38/* UART 2 */
39#define UART2_BASE __REG(0x80000700)
40#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
41#define UART2_LCR __REG(0x80000704) /* Link Control Register */
42#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
43#define UART2_CR __REG(0x8000070c) /* Control Register */
44#define UART2_SR __REG(0x80000710) /* Status Register */
45#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
46#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
47#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
48
49/* UART 3 */
50#define UART3_BASE __REG(0x80000800)
51#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
52#define UART3_LCR __REG(0x80000804) /* Link Control Register */
53#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
54#define UART3_CR __REG(0x8000080c) /* Control Register */
55#define UART3_SR __REG(0x80000810) /* Status Register */
56#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
57#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
58#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
59
60/* These are used in some places */
61#define _UART1_BASE __PREG(UART1_BASE)
62#define _UART2_BASE __PREG(UART2_BASE)
63#define _UART3_BASE __PREG(UART3_BASE)
64
65/* UART Registers Offsets */
66#define UART_DR 0x00
67#define UART_LCR 0x04
68#define UART_BRCR 0x08
69#define UART_CR 0x0c
70#define UART_SR 0x10
71#define UART_INT 0x14
72#define UART_INTM 0x18
73#define UART_INTRES 0x1c
74
75/* UART_LCR Bitmask */
76#define UART_LCR_BRK (1 << 0) /* Send Break */
77#define UART_LCR_PEN (1 << 1) /* Parity Enable */
78#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
79#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
80#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
81#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
82#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
83#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
84#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
85
86/* UART_CR Bitmask */
87#define UART_CR_EN (1 << 0) /* UART Enable */
88#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
89#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
90#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
91#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
92#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
93#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
94
95/* UART_SR Bitmask */
96#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
97#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
98#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
99#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
100#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
101#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
102#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
103#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
104
105/* UART_INT Bitmask */
106#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
107#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
108#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
109#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
110
111/* Timer 1 */
112#define TIMER1_BASE __REG(0x80000c00)
113#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
114#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
115#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
116#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
117
118/* Timer 2 */
119#define TIMER2_BASE __REG(0x80000d00)
120#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
121#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
122#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
123#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
124
125/* Timer 3 */
126#define TIMER3_BASE __REG(0x80000e00)
127#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
128#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
129#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
130#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
131
132/* Timer Control register bits */
133#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */
134#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
135#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
136#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
137#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/
138
139/* Power and State Control */
140#define POWER_BASE __REG(0x80000400)
141#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
142#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
143#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
144#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
145#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
146#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
147#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
148#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
149#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
150
151#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/include/asm-arm/arch-aaec2000/debug-macro.S b/include/asm-arm/arch-aaec2000/debug-macro.S
new file mode 100644
index 000000000000..e4f1fa539a74
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/include/asm-arm/arch-aaec2000/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (c) 2005 Nicolas Bellido Y Ortega
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro addruart,rx
13 mrc p15, 0, \rx, c1, c0
14 tst \rx, #1 @ MMU enabled?
15 moveq \rx, #0x80000000 @ physical
16 movne \rx, #io_p2v(0x80000000) @ virtual
17 orr \rx, \rx, #0x00000800
18 .endm
19
20 .macro senduart,rd,rx
21 str \rd, [\rx, #0]
22 .endm
23
24 .macro busyuart,rd,rx
251002: ldr \rd, [\rx, #0x10]
26 tst \rd, #(1 << 7)
27 beq 1002b
28 .endm
29
30 .macro waituart,rd,rx
31#if 0
321001: ldr \rd, [\rx, #0x10]
33 tst \rd, #(1 << 5)
34 beq 1001b
35#endif
36 .endm
diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h
new file mode 100644
index 000000000000..28c890b4a1d3
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/dma.h
@@ -0,0 +1,17 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/dma.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#define MAX_DMA_ADDRESS 0xffffffff
15#define MAX_DMA_CHANNELS 0
16
17#endif
diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S
new file mode 100644
index 000000000000..df31313ab07e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/entry-macro.S
@@ -0,0 +1,33 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/entry-macro.S
3 *
4 * Low-level IRQ helper for aaec-2000 based platforms
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 mov r4, #0xf8000000
19 add r4, r4, #0x00000500
20 mov \base, r4
21 ldr \irqstat, [\base, #0]
22 cmp \irqstat, #0
23 bne 1001f
24 ldr \irqnr, =NR_IRQS+1
25 b 1003f
261001: mov \irqnr, #0
271002: ands \tmp, \irqstat, #1
28 mov \irqstat, \irqstat, LSR #1
29 add \irqnr, \irqnr, #1
30 beq 1002b
31 sub \irqnr, \irqnr, #1
321003:
33 .endm
diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h
new file mode 100644
index 000000000000..4c37219e030e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/hardware.h
@@ -0,0 +1,49 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/hardware.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#include <linux/config.h>
15
16/* The kernel is loaded at physical address 0xf8000000.
17 * We map the IO space a bit after
18 */
19#define PIO_APB_BASE 0x80000000
20#define VIO_APB_BASE 0xf8000000
21#define IO_APB_LENGTH 0x2000
22#define PIO_AHB_BASE 0x80002000
23#define VIO_AHB_BASE 0xf8002000
24#define IO_AHB_LENGTH 0x2000
25
26#define VIO_BASE VIO_APB_BASE
27#define PIO_BASE PIO_APB_BASE
28
29#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
30#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
31
32#ifndef __ASSEMBLY__
33
34#include <asm/types.h>
35
36/* FIXME: Is it needed to optimize this a la pxa ?? */
37#define __REG(x) (*((volatile u32 *)io_p2v(x)))
38#define __PREG(x) (io_v2p((u32)&(x)))
39
40#else /* __ASSEMBLY__ */
41
42#define __REG(x) io_p2v(x)
43#define __PREG(x) io_v2p(x)
44
45#endif
46
47#include "aaec2000.h"
48
49#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h
new file mode 100644
index 000000000000..c58a8d10425a
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/io.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) ((void __iomem *)(a))
16#define __mem_pci(a) (a)
17#define __mem_isa(a) (a)
18
19#endif
diff --git a/include/asm-arm/arch-aaec2000/irqs.h b/include/asm-arm/arch-aaec2000/irqs.h
new file mode 100644
index 000000000000..de252220e806
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/irqs.h
@@ -0,0 +1,46 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/irqs.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14
15#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
16#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
17#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
18#define INT_MV_FIQ 3 /* Media Changed Interrupt */
19#define INT_SC 4 /* Sound Codec Interrupt */
20#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
21#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
22#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
23#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
24#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
25#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
26#define INT_TICK 11 /* 64Hz Tick Interrupt */
27#define INT_UART1 12 /* UART1 Interrupt */
28#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
29#define INT_LCD 14 /* LCD Interrupt */
30#define INT_SSI 15 /* SSI End of Transfer Interrupt */
31#define INT_UART3 16 /* UART3 Interrupt */
32#define INT_SCI 17 /* SCI Interrupt */
33#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
34#define INT_MMC 19 /* MMC Interrupt */
35#define INT_USB 20 /* USB Interrupt */
36#define INT_DMA 21 /* DMA Interrupt */
37#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
38#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
39#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
40#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
41#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
42#define INT_BMI 27 /* BMI Interrupt */
43
44#define NR_IRQS (INT_BMI + 1)
45
46#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h
new file mode 100644
index 000000000000..681b6a6171a1
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/memory.h
@@ -0,0 +1,73 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/memory.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14#include <linux/config.h>
15
16#define PHYS_OFFSET (0xf0000000UL)
17
18#define __virt_to_bus(x) __virt_to_phys(x)
19#define __bus_to_virt(x) __phys_to_virt(x)
20
21#ifdef CONFIG_DISCONTIGMEM
22
23/*
24 * The nodes are the followings:
25 *
26 * node 0: 0xf000.0000 - 0xf3ff.ffff
27 * node 1: 0xf400.0000 - 0xf7ff.ffff
28 * node 2: 0xf800.0000 - 0xfbff.ffff
29 * node 3: 0xfc00.0000 - 0xffff.ffff
30 */
31
32/*
33 * Given a kernel address, find the home node of the underlying memory.
34 */
35#define KVADDR_TO_NID(addr) \
36 (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
37
38/*
39 * Given a page frame number, convert it to a node id.
40 */
41#define PFN_TO_NID(pfn) \
42 (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
43
44/*
45 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
46 * and return the mem_map of that node.
47 */
48#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
49
50/*
51 * Given a page frame number, find the owning node of the memory
52 * and return the mem_map of that node.
53 */
54#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
55
56/*
57 * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
58 * and returns the index corresponding to the appropriate page in the
59 * node's mem_map.
60 */
61#define LOCAL_MAP_NR(addr) \
62 (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
63
64#define NODE_MAX_MEM_SHIFT 26
65#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT)
66
67#else
68
69#define PFN_TO_NID(addr) (0)
70
71#endif /* CONFIG_DISCONTIGMEM */
72
73#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/include/asm-arm/arch-aaec2000/param.h b/include/asm-arm/arch-aaec2000/param.h
new file mode 100644
index 000000000000..139936c2faf2
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/param.h
@@ -0,0 +1,15 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/param.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_PARAM_H
12#define __ASM_ARCH_PARAM_H
13
14#endif /* __ASM_ARCH_PARAM_H */
15
diff --git a/include/asm-arm/arch-aaec2000/system.h b/include/asm-arm/arch-aaec2000/system.h
new file mode 100644
index 000000000000..08de97b407a8
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/system.h
@@ -0,0 +1,24 @@
1/*
2 * linux/include/asm-arm/arch-aaed2000/system.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14static inline void arch_idle(void)
15{
16 cpu_do_idle();
17}
18
19static inline void arch_reset(char mode)
20{
21 cpu_reset(0);
22}
23
24#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-aaec2000/timex.h b/include/asm-arm/arch-aaec2000/timex.h
new file mode 100644
index 000000000000..f5708b38fb7f
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/timex.h
@@ -0,0 +1,18 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/timex.h
3 *
4 * AAEC-2000 Architecture timex specification
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16#define CLOCK_TICK_RATE 508000
17
18#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h
new file mode 100644
index 000000000000..fff0c94b75c4
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/uncompress.h
@@ -0,0 +1,47 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/uncompress.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14#include "hardware.h"
15
16#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
17
18static void putstr( const char *s )
19{
20 unsigned long serial_port;
21 do {
22 serial_port = _UART3_BASE;
23 if (UART(UART_CR) & UART_CR_EN) break;
24 serial_port = _UART1_BASE;
25 if (UART(UART_CR) & UART_CR_EN) break;
26 serial_port = _UART2_BASE;
27 if (UART(UART_CR) & UART_CR_EN) break;
28 return;
29 } while (0);
30
31 for (; *s; s++) {
32 /* wait for space in the UART's transmitter */
33 while ((UART(UART_SR) & UART_SR_TxFF));
34 /* send the character out. */
35 UART(UART_DR) = *s;
36 /* if a LF, also do CR... */
37 if (*s == 10) {
38 while ((UART(UART_SR) & UART_SR_TxFF));
39 UART(UART_DR) = 13;
40 }
41 }
42}
43
44#define arch_decomp_setup()
45#define arch_decomp_wdog()
46
47#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/include/asm-arm/arch-aaec2000/vmalloc.h b/include/asm-arm/arch-aaec2000/vmalloc.h
new file mode 100644
index 000000000000..ecb991e2e4ff
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/vmalloc.h
@@ -0,0 +1,16 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/vmalloc.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
15
16#endif /* __ASM_ARCH_VMALLOC_H */