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authorTony Lindgren <tony@atomide.com>2012-11-09 17:54:17 -0500
committerTony Lindgren <tony@atomide.com>2012-11-09 17:54:17 -0500
commitf56f52e02a9c3da4bc2cc6eb9ddcf5602ea44b37 (patch)
treea9ce4f46ea3b2e516698b2c3817e40414a8bbf51
parent84fbd2b8c8da49b4e53fcb484a1564a9b5da61b3 (diff)
parent6ba54ab4a49bbad736b0254aa6bdf0cb83013815 (diff)
Merge branch 'omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3' into omap-for-v3.8/dt
Conflicts: arch/arm/plat-omap/dmtimer.c Resolved as suggested by Jon Hunter.
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-omap1/Makefile3
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c1
-rw-r--r--arch/arm/mach-omap1/board-fsample.c9
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-rw-r--r--arch/arm/mach-omap1/board-nokia770.c5
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-rw-r--r--arch/arm/mach-omap1/board-palmte.c6
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-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c3
-rw-r--r--arch/arm/mach-omap1/clock.c507
-rw-r--r--arch/arm/mach-omap1/clock.h178
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-rw-r--r--arch/arm/mach-omap1/dma.h83
-rw-r--r--arch/arm/mach-omap1/flash.c2
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-rw-r--r--arch/arm/mach-omap1/gpio15xx.c2
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-rw-r--r--arch/arm/mach-omap1/include/mach/omap1510.h113
-rw-r--r--arch/arm/mach-omap1/include/mach/serial.h53
-rw-r--r--arch/arm/mach-omap1/include/mach/soc.h229
-rw-r--r--arch/arm/mach-omap1/include/mach/tc.h (renamed from arch/arm/plat-omap/include/plat/tc.h)0
-rw-r--r--arch/arm/mach-omap1/include/mach/uncompress.h121
-rw-r--r--arch/arm/mach-omap1/io.c5
-rw-r--r--arch/arm/mach-omap1/iomap.h3
-rw-r--r--arch/arm/mach-omap1/irq.c2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c4
-rw-r--r--arch/arm/mach-omap1/mcbsp.c5
-rw-r--r--arch/arm/mach-omap1/mmc.h18
-rw-r--r--arch/arm/mach-omap1/opp_data.c2
-rw-r--r--arch/arm/mach-omap1/pm.c10
-rw-r--r--arch/arm/mach-omap1/pm_bus.c3
-rw-r--r--arch/arm/mach-omap1/serial.c1
-rw-r--r--arch/arm/mach-omap1/sleep.S2
-rw-r--r--arch/arm/mach-omap1/soc.h4
-rw-r--r--arch/arm/mach-omap1/sram-init.c76
-rw-r--r--arch/arm/mach-omap1/sram.h7
-rw-r--r--arch/arm/mach-omap1/timer32k.c1
-rw-r--r--arch/arm/mach-omap1/usb.c6
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.c2
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c3
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c2
-rw-r--r--arch/arm/mach-omap2/board-apollon.c4
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c10
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c6
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c11
-rw-r--r--arch/arm/mach-omap2/board-flash.c52
-rw-r--r--arch/arm/mach-omap2/board-flash.h8
-rw-r--r--arch/arm/mach-omap2/board-h4.c8
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c9
-rw-r--r--arch/arm/mach-omap2/board-ldp.c9
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c16
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c11
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c11
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c6
-rw-r--r--arch/arm/mach-omap2/board-overo.c11
-rw-r--r--arch/arm/mach-omap2/board-rm680.c9
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c7
-rw-r--r--arch/arm/mach-omap2/board-rx51.c8
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c3
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c4
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c3
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c3
-rw-r--r--arch/arm/mach-omap2/board-zoom.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom.h (renamed from arch/arm/mach-omap2/include/mach/board-zoom.h)0
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_apll.c1
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpllcore.c6
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_osc.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_sys.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c6
-rw-r--r--arch/arm/mach-omap2/clkt34xx_dpll3m2.c5
-rw-r--r--arch/arm/mach-omap2/clkt_clksel.c2
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clkt_iclk.c1
-rw-r--r--arch/arm/mach-omap2/clock.c518
-rw-r--r--arch/arm/mach-omap2/clock.h317
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c4
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c4
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c2
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c5
-rw-r--r--arch/arm/mach-omap2/clock34xx.c2
-rw-r--r--arch/arm/mach-omap2/clock3517.c2
-rw-r--r--arch/arm/mach-omap2/clock36xx.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c4
-rw-r--r--arch/arm/mach-omap2/clockdomain.c3
-rw-r--r--arch/arm/mach-omap2/clockdomain.h5
-rw-r--r--arch/arm/mach-omap2/clockdomain2xxx_3xxx.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains2420_data.c1
-rw-r--r--arch/arm/mach-omap2/clockdomains2430_data.c1
-rw-r--r--arch/arm/mach-omap2/clockdomains3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/cm33xx.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c46
-rw-r--r--arch/arm/mach-omap2/common-board-devices.h1
-rw-r--r--arch/arm/mach-omap2/common.c22
-rw-r--r--arch/arm/mach-omap2/common.h13
-rw-r--r--arch/arm/mach-omap2/control.c4
-rw-r--r--arch/arm/mach-omap2/devices.c8
-rw-r--r--arch/arm/mach-omap2/display.c45
-rw-r--r--arch/arm/mach-omap2/dma.c11
-rw-r--r--arch/arm/mach-omap2/dma.h131
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c2
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c2
-rw-r--r--arch/arm/mach-omap2/drm.c4
-rw-r--r--arch/arm/mach-omap2/dsp.c2
-rw-r--r--arch/arm/mach-omap2/gpio.c6
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c85
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.h27
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c214
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.h24
-rw-r--r--arch/arm/mach-omap2/gpmc-smc91x.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c464
-rw-r--r--arch/arm/mach-omap2/gpmc.h (renamed from arch/arm/plat-omap/include/plat/gpmc.h)61
-rw-r--r--arch/arm/mach-omap2/hdq1w.c4
-rw-r--r--arch/arm/mach-omap2/hdq1w.h2
-rw-r--r--arch/arm/mach-omap2/hsmmc.c8
-rw-r--r--arch/arm/mach-omap2/hwspinlock.c4
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-rw-r--r--arch/arm/mach-omap2/i2c.h42
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-omap2/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-omap2/include/mach/serial.h (renamed from arch/arm/plat-omap/include/plat/serial.h)29
-rw-r--r--arch/arm/mach-omap2/include/mach/uncompress.h175
-rw-r--r--arch/arm/mach-omap2/io.c25
-rw-r--r--arch/arm/mach-omap2/mcbsp.c7
-rw-r--r--arch/arm/mach-omap2/mmc.h23
-rw-r--r--arch/arm/mach-omap2/msdi.c7
-rw-r--r--arch/arm/mach-omap2/mux.c3
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c1
-rw-r--r--arch/arm/mach-omap2/omap-pm-noop.c (renamed from arch/arm/plat-omap/omap-pm-noop.c)5
-rw-r--r--arch/arm/mach-omap2/omap-pm.h (renamed from arch/arm/plat-omap/include/plat/omap-pm.h)0
-rw-r--r--arch/arm/mach-omap2/omap-secure.c1
-rw-r--r--arch/arm/mach-omap2/omap-secure.h7
-rw-r--r--arch/arm/mach-omap2/omap4-common.c8
-rw-r--r--arch/arm/mach-omap2/omap_device.c (renamed from arch/arm/plat-omap/omap_device.c)5
-rw-r--r--arch/arm/mach-omap2/omap_device.h (renamed from arch/arm/plat-omap/include/plat/omap_device.h)2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h (renamed from arch/arm/plat-omap/include/plat/omap_hwmod.h)1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c12
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c11
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.c2
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-rw-r--r--arch/arm/mach-omap2/omap_opp_data.h2
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c4
-rw-r--r--arch/arm/mach-omap2/omap_twl.c1
-rw-r--r--arch/arm/mach-omap2/opp.c2
-rw-r--r--arch/arm/mach-omap2/opp3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/pm-debug.c5
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-rw-r--r--arch/arm/mach-omap2/pm24xx.c9
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-rw-r--r--arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h2
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-rw-r--r--drivers/bluetooth/hci_ldisc.c7
-rw-r--r--drivers/char/hw_random/omap-rng.c2
-rw-r--r--drivers/crypto/omap-aes.c8
-rw-r--r--drivers/crypto/omap-sham.c10
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-rw-r--r--drivers/tty/serial/8250/8250_early.c2
-rw-r--r--drivers/tty/serial/samsung.c16
-rw-r--r--drivers/tty/tty_audit.c15
-rw-r--r--drivers/tty/tty_buffer.c228
-rw-r--r--drivers/tty/tty_io.c15
-rw-r--r--drivers/tty/tty_ldisc.c15
-rw-r--r--drivers/tty/tty_port.c2
-rw-r--r--drivers/tty/vt/selection.c9
-rw-r--r--drivers/usb/gadget/omap_udc.c4
-rw-r--r--drivers/usb/host/ehci-omap.c3
-rw-r--r--drivers/usb/host/ohci-omap.c5
-rw-r--r--drivers/usb/host/ohci-omap3.c1
-rw-r--r--drivers/usb/musb/am35x.c3
-rw-r--r--drivers/usb/musb/musb_dsps.c3
-rw-r--r--drivers/usb/musb/omap2430.h2
-rw-r--r--drivers/usb/musb/tusb6010_omap.c9
-rw-r--r--drivers/video/omap/lcd_inn1510.c7
-rw-r--r--drivers/video/omap/lcdc.c2
-rw-r--r--drivers/video/omap/omapfb_main.c2
-rw-r--r--drivers/video/omap/sossi.c2
-rw-r--r--drivers/video/omap2/dss/core.c2
-rw-r--r--drivers/video/omap2/dss/dispc.c43
-rw-r--r--drivers/video/omap2/dss/dss.c39
-rw-r--r--drivers/video/omap2/dss/dss_features.c64
-rw-r--r--drivers/video/omap2/dss/dss_features.h5
-rw-r--r--drivers/video/omap2/dss/hdmi.c3
-rw-r--r--drivers/video/omap2/omapfb/omapfb-ioctl.c2
-rw-r--r--drivers/video/omap2/omapfb/omapfb-main.c8
-rw-r--r--drivers/video/omap2/omapfb/omapfb-sysfs.c2
-rw-r--r--drivers/video/omap2/vrfb.c142
-rw-r--r--fs/devpts/inode.c61
-rw-r--r--include/linux/devpts_fs.h20
-rw-r--r--include/linux/mfd/menelaus.h (renamed from arch/arm/plat-omap/include/plat/menelaus.h)2
-rw-r--r--include/linux/platform_data/gpio-omap.h1
-rw-r--r--include/linux/platform_data/leds-omap.h (renamed from arch/arm/plat-omap/include/plat/led.h)2
-rw-r--r--include/linux/platform_data/mmc-omap.h (renamed from arch/arm/plat-omap/include/plat/mmc.h)48
-rw-r--r--include/linux/platform_data/mtd-nand-omap2.h46
-rw-r--r--include/linux/platform_data/mtd-onenand-omap2.h28
-rw-r--r--include/linux/platform_data/usb-omap.h80
-rw-r--r--include/linux/tty.h44
-rw-r--r--include/linux/tty_flip.h2
-rw-r--r--include/video/omapdss.h14
-rw-r--r--include/video/omapvrfb.h (renamed from arch/arm/plat-omap/include/plat/vrfb.h)2
-rw-r--r--kernel/printk.c12
-rw-r--r--sound/soc/omap/am3517evm.c2
-rw-r--r--sound/soc/omap/n810.c1
-rw-r--r--sound/soc/omap/omap-pcm.c9
-rw-r--r--sound/soc/omap/osk5912.c1
-rw-r--r--sound/soc/omap/sdp3430.c2
328 files changed, 6114 insertions, 5463 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..041cf0774776 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -937,7 +937,6 @@ config ARCH_OMAP
937 select CLKSRC_MMIO 937 select CLKSRC_MMIO
938 select GENERIC_CLOCKEVENTS 938 select GENERIC_CLOCKEVENTS
939 select HAVE_CLK 939 select HAVE_CLK
940 select NEED_MACH_GPIO_H
941 help 940 help
942 Support for TI's OMAP platform (OMAP1/2/3/4). 941 Support for TI's OMAP platform (OMAP1/2/3/4).
943 942
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c386161..f0e69cbc5baa 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o 6obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
7 serial.o devices.o dma.o
7obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o 8obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
8 9
9ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) 10ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index e255164ff087..a8fce3ccc707 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -625,7 +625,6 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
625 .atag_offset = 0x100, 625 .atag_offset = 0x100,
626 .map_io = ams_delta_map_io, 626 .map_io = ams_delta_map_io,
627 .init_early = omap1_init_early, 627 .init_early = omap1_init_early,
628 .reserve = omap_reserve,
629 .init_irq = omap1_init_irq, 628 .init_irq = omap1_init_irq,
630 .init_machine = ams_delta_init, 629 .init_machine = ams_delta_init,
631 .init_late = ams_delta_init_late, 630 .init_late = ams_delta_init_late,
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 4b6de70c47a6..e067f221f0f9 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -27,16 +27,16 @@
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29 29
30#include <plat/tc.h> 30#include <mach/tc.h>
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <mach/flash.h> 32#include <mach/flash.h>
33#include <plat/fpga.h>
34#include <linux/platform_data/keypad-omap.h> 33#include <linux/platform_data/keypad-omap.h>
35 34
36#include <mach/hardware.h> 35#include <mach/hardware.h>
37 36
38#include "iomap.h" 37#include "iomap.h"
39#include "common.h" 38#include "common.h"
39#include "fpga.h"
40 40
41/* fsample is pretty close to p2-sample */ 41/* fsample is pretty close to p2-sample */
42 42
@@ -123,9 +123,9 @@ static struct resource smc91x_resources[] = {
123 123
124static void __init fsample_init_smc91x(void) 124static void __init fsample_init_smc91x(void)
125{ 125{
126 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); 126 __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
127 mdelay(50); 127 mdelay(50);
128 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, 128 __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
129 H2P2_DBG_FPGA_LAN_RESET); 129 H2P2_DBG_FPGA_LAN_RESET);
130 mdelay(50); 130 mdelay(50);
131} 131}
@@ -362,7 +362,6 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
362 .atag_offset = 0x100, 362 .atag_offset = 0x100,
363 .map_io = omap_fsample_map_io, 363 .map_io = omap_fsample_map_io,
364 .init_early = omap1_init_early, 364 .init_early = omap1_init_early,
365 .reserve = omap_reserve,
366 .init_irq = omap1_init_irq, 365 .init_irq = omap1_init_irq,
367 .init_machine = omap_fsample_init, 366 .init_machine = omap_fsample_init,
368 .init_late = omap1_init_late, 367 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 4ec579fdd366..608e7d2a2778 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -81,7 +81,6 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
81 .atag_offset = 0x100, 81 .atag_offset = 0x100,
82 .map_io = omap16xx_map_io, 82 .map_io = omap16xx_map_io,
83 .init_early = omap1_init_early, 83 .init_early = omap1_init_early,
84 .reserve = omap_reserve,
85 .init_irq = omap1_init_irq, 84 .init_irq = omap1_init_irq,
86 .init_machine = omap_generic_init, 85 .init_machine = omap_generic_init,
87 .init_late = omap1_init_late, 86 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index e1362ce48497..7119ef28e0ad 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -13,12 +13,11 @@
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16 16#include <linux/platform_data/gpio-omap.h>
17#include <linux/i2c/tps65010.h> 17#include <linux/i2c/tps65010.h>
18 18
19#include <plat/mmc.h>
20
21#include "board-h2.h" 19#include "board-h2.h"
20#include "mmc.h"
22 21
23#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
24 23
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 376f7f29ef77..9134b646f01b 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -39,8 +39,8 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40 40
41#include <mach/mux.h> 41#include <mach/mux.h>
42#include <plat/dma.h> 42#include <plat-omap/dma-omap.h>
43#include <plat/tc.h> 43#include <mach/tc.h>
44#include <mach/irda.h> 44#include <mach/irda.h>
45#include <linux/platform_data/keypad-omap.h> 45#include <linux/platform_data/keypad-omap.h>
46#include <mach/flash.h> 46#include <mach/flash.h>
@@ -50,6 +50,7 @@
50 50
51#include "common.h" 51#include "common.h"
52#include "board-h2.h" 52#include "board-h2.h"
53#include "dma.h"
53 54
54/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 55/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
55#define OMAP1610_ETHR_START 0x04000300 56#define OMAP1610_ETHR_START 0x04000300
@@ -458,7 +459,6 @@ MACHINE_START(OMAP_H2, "TI-H2")
458 .atag_offset = 0x100, 459 .atag_offset = 0x100,
459 .map_io = omap16xx_map_io, 460 .map_io = omap16xx_map_io,
460 .init_early = omap1_init_early, 461 .init_early = omap1_init_early,
461 .reserve = omap_reserve,
462 .init_irq = omap1_init_irq, 462 .init_irq = omap1_init_irq,
463 .init_machine = h2_init, 463 .init_machine = h2_init,
464 .init_late = omap1_init_late, 464 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index c74daace8cd6..17d77914d769 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -16,9 +16,8 @@
16 16
17#include <linux/i2c/tps65010.h> 17#include <linux/i2c/tps65010.h>
18 18
19#include <plat/mmc.h>
20
21#include "board-h3.h" 19#include "board-h3.h"
20#include "mmc.h"
22 21
23#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
24 23
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ededdb7ef28c..bf213d1d8075 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -41,9 +41,9 @@
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42 42
43#include <mach/mux.h> 43#include <mach/mux.h>
44#include <plat/tc.h> 44#include <mach/tc.h>
45#include <linux/platform_data/keypad-omap.h> 45#include <linux/platform_data/keypad-omap.h>
46#include <plat/dma.h> 46#include <plat-omap/dma-omap.h>
47#include <mach/flash.h> 47#include <mach/flash.h>
48 48
49#include <mach/hardware.h> 49#include <mach/hardware.h>
@@ -452,7 +452,6 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
452 .atag_offset = 0x100, 452 .atag_offset = 0x100,
453 .map_io = omap16xx_map_io, 453 .map_io = omap16xx_map_io,
454 .init_early = omap1_init_early, 454 .init_early = omap1_init_early,
455 .reserve = omap_reserve,
456 .init_irq = omap1_init_irq, 455 .init_irq = omap1_init_irq,
457 .init_machine = h3_init, 456 .init_machine = h3_init,
458 .init_late = omap1_init_late, 457 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 87ab2086ef96..356f816c84a6 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -43,7 +43,7 @@
43#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
44 44
45#include <mach/omap7xx.h> 45#include <mach/omap7xx.h>
46#include <plat/mmc.h> 46#include "mmc.h"
47 47
48#include <mach/irqs.h> 48#include <mach/irqs.h>
49#include <mach/usb.h> 49#include <mach/usb.h>
@@ -600,7 +600,6 @@ MACHINE_START(HERALD, "HTC Herald")
600 .atag_offset = 0x100, 600 .atag_offset = 0x100,
601 .map_io = htcherald_map_io, 601 .map_io = htcherald_map_io,
602 .init_early = omap1_init_early, 602 .init_early = omap1_init_early,
603 .reserve = omap_reserve,
604 .init_irq = omap1_init_irq, 603 .init_irq = omap1_init_irq,
605 .init_machine = htcherald_init, 604 .init_machine = htcherald_init,
606 .init_late = omap1_init_late, 605 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index db5f7d2976e7..f8033fab0f82 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -33,16 +33,15 @@
33 33
34#include <mach/mux.h> 34#include <mach/mux.h>
35#include <mach/flash.h> 35#include <mach/flash.h>
36#include <plat/fpga.h> 36#include <mach/tc.h>
37#include <plat/tc.h>
38#include <linux/platform_data/keypad-omap.h> 37#include <linux/platform_data/keypad-omap.h>
39#include <plat/mmc.h>
40 38
41#include <mach/hardware.h> 39#include <mach/hardware.h>
42#include <mach/usb.h> 40#include <mach/usb.h>
43 41
44#include "iomap.h" 42#include "iomap.h"
45#include "common.h" 43#include "common.h"
44#include "mmc.h"
46 45
47/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 46/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
48#define INNOVATOR1610_ETHR_START 0x04000300 47#define INNOVATOR1610_ETHR_START 0x04000300
@@ -215,7 +214,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
215 214
216static int innovator_get_pendown_state(void) 215static int innovator_get_pendown_state(void)
217{ 216{
218 return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); 217 return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
219} 218}
220 219
221static const struct ads7846_platform_data innovator1510_ts_info = { 220static const struct ads7846_platform_data innovator1510_ts_info = {
@@ -279,7 +278,7 @@ static struct platform_device *innovator1610_devices[] __initdata = {
279static void __init innovator_init_smc91x(void) 278static void __init innovator_init_smc91x(void)
280{ 279{
281 if (cpu_is_omap1510()) { 280 if (cpu_is_omap1510()) {
282 fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1, 281 __raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1,
283 OMAP1510_FPGA_RST); 282 OMAP1510_FPGA_RST);
284 udelay(750); 283 udelay(750);
285 } else { 284 } else {
@@ -335,10 +334,10 @@ static int mmc_set_power(struct device *dev, int slot, int power_on,
335 int vdd) 334 int vdd)
336{ 335{
337 if (power_on) 336 if (power_on)
338 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), 337 __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3),
339 OMAP1510_FPGA_POWER); 338 OMAP1510_FPGA_POWER);
340 else 339 else
341 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3), 340 __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3),
342 OMAP1510_FPGA_POWER); 341 OMAP1510_FPGA_POWER);
343 342
344 return 0; 343 return 0;
@@ -390,14 +389,14 @@ static void __init innovator_init(void)
390 omap_cfg_reg(UART3_TX); 389 omap_cfg_reg(UART3_TX);
391 omap_cfg_reg(UART3_RX); 390 omap_cfg_reg(UART3_RX);
392 391
393 reg = fpga_read(OMAP1510_FPGA_POWER); 392 reg = __raw_readb(OMAP1510_FPGA_POWER);
394 reg |= OMAP1510_FPGA_PCR_COM1_EN; 393 reg |= OMAP1510_FPGA_PCR_COM1_EN;
395 fpga_write(reg, OMAP1510_FPGA_POWER); 394 __raw_writeb(reg, OMAP1510_FPGA_POWER);
396 udelay(10); 395 udelay(10);
397 396
398 reg = fpga_read(OMAP1510_FPGA_POWER); 397 reg = __raw_readb(OMAP1510_FPGA_POWER);
399 reg |= OMAP1510_FPGA_PCR_COM2_EN; 398 reg |= OMAP1510_FPGA_PCR_COM2_EN;
400 fpga_write(reg, OMAP1510_FPGA_POWER); 399 __raw_writeb(reg, OMAP1510_FPGA_POWER);
401 udelay(10); 400 udelay(10);
402 401
403 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); 402 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
@@ -437,6 +436,7 @@ static void __init innovator_init(void)
437 */ 436 */
438static void __init innovator_map_io(void) 437static void __init innovator_map_io(void)
439{ 438{
439#ifdef CONFIG_ARCH_OMAP15XX
440 omap15xx_map_io(); 440 omap15xx_map_io();
441 441
442 iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); 442 iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
@@ -444,9 +444,10 @@ static void __init innovator_map_io(void)
444 444
445 /* Dump the Innovator FPGA rev early - useful info for support. */ 445 /* Dump the Innovator FPGA rev early - useful info for support. */
446 pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n", 446 pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n",
447 fpga_read(OMAP1510_FPGA_REV_HIGH), 447 __raw_readb(OMAP1510_FPGA_REV_HIGH),
448 fpga_read(OMAP1510_FPGA_REV_LOW), 448 __raw_readb(OMAP1510_FPGA_REV_LOW),
449 fpga_read(OMAP1510_FPGA_BOARD_REV)); 449 __raw_readb(OMAP1510_FPGA_BOARD_REV));
450#endif
450} 451}
451 452
452MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") 453MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
@@ -454,7 +455,6 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
454 .atag_offset = 0x100, 455 .atag_offset = 0x100,
455 .map_io = innovator_map_io, 456 .map_io = innovator_map_io,
456 .init_early = omap1_init_early, 457 .init_early = omap1_init_early,
457 .reserve = omap_reserve,
458 .init_irq = omap1_init_irq, 458 .init_irq = omap1_init_irq,
459 .init_machine = innovator_init, 459 .init_machine = innovator_init,
460 .init_late = omap1_init_late, 460 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 7d5c06d6a52a..3e8ead67e459 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,13 +29,13 @@
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
30 30
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <plat/mmc.h>
33#include <plat/clock.h>
34 32
35#include <mach/hardware.h> 33#include <mach/hardware.h>
36#include <mach/usb.h> 34#include <mach/usb.h>
37 35
38#include "common.h" 36#include "common.h"
37#include "clock.h"
38#include "mmc.h"
39 39
40#define ADS7846_PENDOWN_GPIO 15 40#define ADS7846_PENDOWN_GPIO 15
41 41
@@ -251,7 +251,6 @@ MACHINE_START(NOKIA770, "Nokia 770")
251 .atag_offset = 0x100, 251 .atag_offset = 0x100,
252 .map_io = omap16xx_map_io, 252 .map_io = omap16xx_map_io,
253 .init_early = omap1_init_early, 253 .init_early = omap1_init_early,
254 .reserve = omap_reserve,
255 .init_irq = omap1_init_irq, 254 .init_irq = omap1_init_irq,
256 .init_machine = omap_nokia770_init, 255 .init_machine = omap_nokia770_init,
257 .init_late = omap1_init_late, 256 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 5973945a8741..872ea47cd28a 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -48,7 +48,7 @@
48 48
49#include <mach/flash.h> 49#include <mach/flash.h>
50#include <mach/mux.h> 50#include <mach/mux.h>
51#include <plat/tc.h> 51#include <mach/tc.h>
52 52
53#include <mach/hardware.h> 53#include <mach/hardware.h>
54#include <mach/usb.h> 54#include <mach/usb.h>
@@ -606,7 +606,6 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
606 .atag_offset = 0x100, 606 .atag_offset = 0x100,
607 .map_io = omap16xx_map_io, 607 .map_io = omap16xx_map_io,
608 .init_early = omap1_init_early, 608 .init_early = omap1_init_early,
609 .reserve = omap_reserve,
610 .init_irq = omap1_init_irq, 609 .init_irq = omap1_init_irq,
611 .init_machine = osk_init, 610 .init_machine = osk_init,
612 .init_late = omap1_init_late, 611 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 1c578d58923a..584b6fab894b 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -36,8 +36,8 @@
36 36
37#include <mach/flash.h> 37#include <mach/flash.h>
38#include <mach/mux.h> 38#include <mach/mux.h>
39#include <plat/tc.h> 39#include <mach/tc.h>
40#include <plat/dma.h> 40#include <plat-omap/dma-omap.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <linux/platform_data/keypad-omap.h> 42#include <linux/platform_data/keypad-omap.h>
43 43
@@ -45,6 +45,7 @@
45#include <mach/usb.h> 45#include <mach/usb.h>
46 46
47#include "common.h" 47#include "common.h"
48#include "dma.h"
48 49
49#define PALMTE_USBDETECT_GPIO 0 50#define PALMTE_USBDETECT_GPIO 0
50#define PALMTE_USB_OR_DC_GPIO 1 51#define PALMTE_USB_OR_DC_GPIO 1
@@ -264,7 +265,6 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
264 .atag_offset = 0x100, 265 .atag_offset = 0x100,
265 .map_io = omap15xx_map_io, 266 .map_io = omap15xx_map_io,
266 .init_early = omap1_init_early, 267 .init_early = omap1_init_early,
267 .reserve = omap_reserve,
268 .init_irq = omap1_init_irq, 268 .init_irq = omap1_init_irq,
269 .init_machine = omap_palmte_init, 269 .init_machine = omap_palmte_init,
270 .init_late = omap1_init_late, 270 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 97158095083c..fbc986bfe69e 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -28,16 +28,16 @@
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h> 29#include <linux/spi/ads7846.h>
30#include <linux/platform_data/omap1_bl.h> 30#include <linux/platform_data/omap1_bl.h>
31#include <linux/platform_data/leds-omap.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35 36
36#include <plat/led.h>
37#include <mach/flash.h> 37#include <mach/flash.h>
38#include <mach/mux.h> 38#include <mach/mux.h>
39#include <plat/dma.h> 39#include <plat-omap/dma-omap.h>
40#include <plat/tc.h> 40#include <mach/tc.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <linux/platform_data/keypad-omap.h> 42#include <linux/platform_data/keypad-omap.h>
43 43
@@ -45,6 +45,7 @@
45#include <mach/usb.h> 45#include <mach/usb.h>
46 46
47#include "common.h" 47#include "common.h"
48#include "dma.h"
48 49
49#define PALMTT_USBDETECT_GPIO 0 50#define PALMTT_USBDETECT_GPIO 0
50#define PALMTT_CABLE_GPIO 1 51#define PALMTT_CABLE_GPIO 1
@@ -310,7 +311,6 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
310 .atag_offset = 0x100, 311 .atag_offset = 0x100,
311 .map_io = omap15xx_map_io, 312 .map_io = omap15xx_map_io,
312 .init_early = omap1_init_early, 313 .init_early = omap1_init_early,
313 .reserve = omap_reserve,
314 .init_irq = omap1_init_irq, 314 .init_irq = omap1_init_irq,
315 .init_machine = omap_palmtt_init, 315 .init_machine = omap_palmtt_init,
316 .init_late = omap1_init_late, 316 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e311032e7eeb..60d917a93763 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -38,8 +38,8 @@
38 38
39#include <mach/flash.h> 39#include <mach/flash.h>
40#include <mach/mux.h> 40#include <mach/mux.h>
41#include <plat/dma.h> 41#include <plat-omap/dma-omap.h>
42#include <plat/tc.h> 42#include <mach/tc.h>
43#include <mach/irda.h> 43#include <mach/irda.h>
44#include <linux/platform_data/keypad-omap.h> 44#include <linux/platform_data/keypad-omap.h>
45 45
@@ -47,6 +47,7 @@
47#include <mach/usb.h> 47#include <mach/usb.h>
48 48
49#include "common.h" 49#include "common.h"
50#include "dma.h"
50 51
51#define PALMZ71_USBDETECT_GPIO 0 52#define PALMZ71_USBDETECT_GPIO 0
52#define PALMZ71_PENIRQ_GPIO 6 53#define PALMZ71_PENIRQ_GPIO 6
@@ -326,7 +327,6 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
326 .atag_offset = 0x100, 327 .atag_offset = 0x100,
327 .map_io = omap15xx_map_io, 328 .map_io = omap15xx_map_io,
328 .init_early = omap1_init_early, 329 .init_early = omap1_init_early,
329 .reserve = omap_reserve,
330 .init_irq = omap1_init_irq, 330 .init_irq = omap1_init_irq,
331 .init_machine = omap_palmz71_init, 331 .init_machine = omap_palmz71_init,
332 .init_late = omap1_init_late, 332 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 198b05417bfc..9a7e483ed6fd 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -28,15 +28,15 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
30 30
31#include <plat/tc.h> 31#include <mach/tc.h>
32#include <mach/mux.h> 32#include <mach/mux.h>
33#include <plat/fpga.h>
34#include <mach/flash.h> 33#include <mach/flash.h>
35 34
36#include <mach/hardware.h> 35#include <mach/hardware.h>
37 36
38#include "iomap.h" 37#include "iomap.h"
39#include "common.h" 38#include "common.h"
39#include "fpga.h"
40 40
41static const unsigned int p2_keymap[] = { 41static const unsigned int p2_keymap[] = {
42 KEY(0, 0, KEY_UP), 42 KEY(0, 0, KEY_UP),
@@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = {
231 231
232static void __init perseus2_init_smc91x(void) 232static void __init perseus2_init_smc91x(void)
233{ 233{
234 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); 234 __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
235 mdelay(50); 235 mdelay(50);
236 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, 236 __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
237 H2P2_DBG_FPGA_LAN_RESET); 237 H2P2_DBG_FPGA_LAN_RESET);
238 mdelay(50); 238 mdelay(50);
239} 239}
@@ -324,7 +324,6 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
324 .atag_offset = 0x100, 324 .atag_offset = 0x100,
325 .map_io = omap_perseus2_map_io, 325 .map_io = omap_perseus2_map_io,
326 .init_early = omap1_init_early, 326 .init_early = omap1_init_early,
327 .reserve = omap_reserve,
328 .init_irq = omap1_init_irq, 327 .init_irq = omap1_init_irq,
329 .init_machine = omap_perseus2_init, 328 .init_machine = omap_perseus2_init,
330 .init_late = omap1_init_late, 329 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 5932d56e17bf..4fcf19c78a08 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -16,9 +16,10 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19#include <plat/mmc.h>
20#include <mach/board-sx1.h> 19#include <mach/board-sx1.h>
21 20
21#include "mmc.h"
22
22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 23#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
23 24
24static int mmc_set_power(struct device *dev, int slot, int power_on, 25static int mmc_set_power(struct device *dev, int slot, int power_on,
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 13bf2cc56814..1ebc7e08d6e5 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -36,15 +36,16 @@
36 36
37#include <mach/flash.h> 37#include <mach/flash.h>
38#include <mach/mux.h> 38#include <mach/mux.h>
39#include <plat/dma.h> 39#include <plat-omap/dma-omap.h>
40#include <mach/irda.h> 40#include <mach/irda.h>
41#include <plat/tc.h> 41#include <mach/tc.h>
42#include <mach/board-sx1.h> 42#include <mach/board-sx1.h>
43 43
44#include <mach/hardware.h> 44#include <mach/hardware.h>
45#include <mach/usb.h> 45#include <mach/usb.h>
46 46
47#include "common.h" 47#include "common.h"
48#include "dma.h"
48 49
49/* Write to I2C device */ 50/* Write to I2C device */
50int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) 51int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@@ -403,7 +404,6 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
403 .atag_offset = 0x100, 404 .atag_offset = 0x100,
404 .map_io = omap15xx_map_io, 405 .map_io = omap15xx_map_io,
405 .init_early = omap1_init_early, 406 .init_early = omap1_init_early,
406 .reserve = omap_reserve,
407 .init_irq = omap1_init_irq, 407 .init_irq = omap1_init_irq,
408 .init_machine = omap_sx1_init, 408 .init_machine = omap_sx1_init,
409 .init_late = omap1_init_late, 409 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index ad75e3411d46..abf705f49b19 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -34,7 +34,7 @@
34#include <mach/board-voiceblue.h> 34#include <mach/board-voiceblue.h>
35#include <mach/flash.h> 35#include <mach/flash.h>
36#include <mach/mux.h> 36#include <mach/mux.h>
37#include <plat/tc.h> 37#include <mach/tc.h>
38 38
39#include <mach/hardware.h> 39#include <mach/hardware.h>
40#include <mach/usb.h> 40#include <mach/usb.h>
@@ -286,7 +286,6 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
286 .atag_offset = 0x100, 286 .atag_offset = 0x100,
287 .map_io = omap15xx_map_io, 287 .map_io = omap15xx_map_io,
288 .init_early = omap1_init_early, 288 .init_early = omap1_init_early,
289 .reserve = omap_reserve,
290 .init_irq = omap1_init_irq, 289 .init_irq = omap1_init_irq,
291 .init_machine = voiceblue_init, 290 .init_machine = voiceblue_init,
292 .init_late = omap1_init_late, 291 .init_late = omap1_init_late,
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 638f4070fc70..4f5fd4a084c0 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/export.h>
15#include <linux/list.h> 16#include <linux/list.h>
16#include <linux/errno.h> 17#include <linux/errno.h>
17#include <linux/err.h> 18#include <linux/err.h>
@@ -21,21 +22,21 @@
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23 24
24#include <plat/cpu.h>
25#include <plat/usb.h>
26#include <plat/clock.h>
27#include <plat/sram.h>
28#include <plat/clkdev_omap.h>
29
30#include <mach/hardware.h> 25#include <mach/hardware.h>
31 26
27#include "soc.h"
32#include "iomap.h" 28#include "iomap.h"
33#include "clock.h" 29#include "clock.h"
34#include "opp.h" 30#include "opp.h"
31#include "sram.h"
35 32
36__u32 arm_idlect1_mask; 33__u32 arm_idlect1_mask;
37struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; 34struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
38 35
36static LIST_HEAD(clocks);
37static DEFINE_MUTEX(clocks_mutex);
38static DEFINE_SPINLOCK(clockfw_lock);
39
39/* 40/*
40 * Omap1 specific clock functions 41 * Omap1 specific clock functions
41 */ 42 */
@@ -607,3 +608,497 @@ void omap1_clk_disable_unused(struct clk *clk)
607} 608}
608 609
609#endif 610#endif
611
612
613int clk_enable(struct clk *clk)
614{
615 unsigned long flags;
616 int ret;
617
618 if (clk == NULL || IS_ERR(clk))
619 return -EINVAL;
620
621 spin_lock_irqsave(&clockfw_lock, flags);
622 ret = omap1_clk_enable(clk);
623 spin_unlock_irqrestore(&clockfw_lock, flags);
624
625 return ret;
626}
627EXPORT_SYMBOL(clk_enable);
628
629void clk_disable(struct clk *clk)
630{
631 unsigned long flags;
632
633 if (clk == NULL || IS_ERR(clk))
634 return;
635
636 spin_lock_irqsave(&clockfw_lock, flags);
637 if (clk->usecount == 0) {
638 pr_err("Trying disable clock %s with 0 usecount\n",
639 clk->name);
640 WARN_ON(1);
641 goto out;
642 }
643
644 omap1_clk_disable(clk);
645
646out:
647 spin_unlock_irqrestore(&clockfw_lock, flags);
648}
649EXPORT_SYMBOL(clk_disable);
650
651unsigned long clk_get_rate(struct clk *clk)
652{
653 unsigned long flags;
654 unsigned long ret;
655
656 if (clk == NULL || IS_ERR(clk))
657 return 0;
658
659 spin_lock_irqsave(&clockfw_lock, flags);
660 ret = clk->rate;
661 spin_unlock_irqrestore(&clockfw_lock, flags);
662
663 return ret;
664}
665EXPORT_SYMBOL(clk_get_rate);
666
667/*
668 * Optional clock functions defined in include/linux/clk.h
669 */
670
671long clk_round_rate(struct clk *clk, unsigned long rate)
672{
673 unsigned long flags;
674 long ret;
675
676 if (clk == NULL || IS_ERR(clk))
677 return 0;
678
679 spin_lock_irqsave(&clockfw_lock, flags);
680 ret = omap1_clk_round_rate(clk, rate);
681 spin_unlock_irqrestore(&clockfw_lock, flags);
682
683 return ret;
684}
685EXPORT_SYMBOL(clk_round_rate);
686
687int clk_set_rate(struct clk *clk, unsigned long rate)
688{
689 unsigned long flags;
690 int ret = -EINVAL;
691
692 if (clk == NULL || IS_ERR(clk))
693 return ret;
694
695 spin_lock_irqsave(&clockfw_lock, flags);
696 ret = omap1_clk_set_rate(clk, rate);
697 if (ret == 0)
698 propagate_rate(clk);
699 spin_unlock_irqrestore(&clockfw_lock, flags);
700
701 return ret;
702}
703EXPORT_SYMBOL(clk_set_rate);
704
705int clk_set_parent(struct clk *clk, struct clk *parent)
706{
707 WARN_ONCE(1, "clk_set_parent() not implemented for OMAP1\n");
708
709 return -EINVAL;
710}
711EXPORT_SYMBOL(clk_set_parent);
712
713struct clk *clk_get_parent(struct clk *clk)
714{
715 return clk->parent;
716}
717EXPORT_SYMBOL(clk_get_parent);
718
719/*
720 * OMAP specific clock functions shared between omap1 and omap2
721 */
722
723int __initdata mpurate;
724
725/*
726 * By default we use the rate set by the bootloader.
727 * You can override this with mpurate= cmdline option.
728 */
729static int __init omap_clk_setup(char *str)
730{
731 get_option(&str, &mpurate);
732
733 if (!mpurate)
734 return 1;
735
736 if (mpurate < 1000)
737 mpurate *= 1000000;
738
739 return 1;
740}
741__setup("mpurate=", omap_clk_setup);
742
743/* Used for clocks that always have same value as the parent clock */
744unsigned long followparent_recalc(struct clk *clk)
745{
746 return clk->parent->rate;
747}
748
749/*
750 * Used for clocks that have the same value as the parent clock,
751 * divided by some factor
752 */
753unsigned long omap_fixed_divisor_recalc(struct clk *clk)
754{
755 WARN_ON(!clk->fixed_div);
756
757 return clk->parent->rate / clk->fixed_div;
758}
759
760void clk_reparent(struct clk *child, struct clk *parent)
761{
762 list_del_init(&child->sibling);
763 if (parent)
764 list_add(&child->sibling, &parent->children);
765 child->parent = parent;
766
767 /* now do the debugfs renaming to reattach the child
768 to the proper parent */
769}
770
771/* Propagate rate to children */
772void propagate_rate(struct clk *tclk)
773{
774 struct clk *clkp;
775
776 list_for_each_entry(clkp, &tclk->children, sibling) {
777 if (clkp->recalc)
778 clkp->rate = clkp->recalc(clkp);
779 propagate_rate(clkp);
780 }
781}
782
783static LIST_HEAD(root_clks);
784
785/**
786 * recalculate_root_clocks - recalculate and propagate all root clocks
787 *
788 * Recalculates all root clocks (clocks with no parent), which if the
789 * clock's .recalc is set correctly, should also propagate their rates.
790 * Called at init.
791 */
792void recalculate_root_clocks(void)
793{
794 struct clk *clkp;
795
796 list_for_each_entry(clkp, &root_clks, sibling) {
797 if (clkp->recalc)
798 clkp->rate = clkp->recalc(clkp);
799 propagate_rate(clkp);
800 }
801}
802
803/**
804 * clk_preinit - initialize any fields in the struct clk before clk init
805 * @clk: struct clk * to initialize
806 *
807 * Initialize any struct clk fields needed before normal clk initialization
808 * can run. No return value.
809 */
810void clk_preinit(struct clk *clk)
811{
812 INIT_LIST_HEAD(&clk->children);
813}
814
815int clk_register(struct clk *clk)
816{
817 if (clk == NULL || IS_ERR(clk))
818 return -EINVAL;
819
820 /*
821 * trap out already registered clocks
822 */
823 if (clk->node.next || clk->node.prev)
824 return 0;
825
826 mutex_lock(&clocks_mutex);
827 if (clk->parent)
828 list_add(&clk->sibling, &clk->parent->children);
829 else
830 list_add(&clk->sibling, &root_clks);
831
832 list_add(&clk->node, &clocks);
833 if (clk->init)
834 clk->init(clk);
835 mutex_unlock(&clocks_mutex);
836
837 return 0;
838}
839EXPORT_SYMBOL(clk_register);
840
841void clk_unregister(struct clk *clk)
842{
843 if (clk == NULL || IS_ERR(clk))
844 return;
845
846 mutex_lock(&clocks_mutex);
847 list_del(&clk->sibling);
848 list_del(&clk->node);
849 mutex_unlock(&clocks_mutex);
850}
851EXPORT_SYMBOL(clk_unregister);
852
853void clk_enable_init_clocks(void)
854{
855 struct clk *clkp;
856
857 list_for_each_entry(clkp, &clocks, node)
858 if (clkp->flags & ENABLE_ON_INIT)
859 clk_enable(clkp);
860}
861
862/**
863 * omap_clk_get_by_name - locate OMAP struct clk by its name
864 * @name: name of the struct clk to locate
865 *
866 * Locate an OMAP struct clk by its name. Assumes that struct clk
867 * names are unique. Returns NULL if not found or a pointer to the
868 * struct clk if found.
869 */
870struct clk *omap_clk_get_by_name(const char *name)
871{
872 struct clk *c;
873 struct clk *ret = NULL;
874
875 mutex_lock(&clocks_mutex);
876
877 list_for_each_entry(c, &clocks, node) {
878 if (!strcmp(c->name, name)) {
879 ret = c;
880 break;
881 }
882 }
883
884 mutex_unlock(&clocks_mutex);
885
886 return ret;
887}
888
889int omap_clk_enable_autoidle_all(void)
890{
891 struct clk *c;
892 unsigned long flags;
893
894 spin_lock_irqsave(&clockfw_lock, flags);
895
896 list_for_each_entry(c, &clocks, node)
897 if (c->ops->allow_idle)
898 c->ops->allow_idle(c);
899
900 spin_unlock_irqrestore(&clockfw_lock, flags);
901
902 return 0;
903}
904
905int omap_clk_disable_autoidle_all(void)
906{
907 struct clk *c;
908 unsigned long flags;
909
910 spin_lock_irqsave(&clockfw_lock, flags);
911
912 list_for_each_entry(c, &clocks, node)
913 if (c->ops->deny_idle)
914 c->ops->deny_idle(c);
915
916 spin_unlock_irqrestore(&clockfw_lock, flags);
917
918 return 0;
919}
920
921/*
922 * Low level helpers
923 */
924static int clkll_enable_null(struct clk *clk)
925{
926 return 0;
927}
928
929static void clkll_disable_null(struct clk *clk)
930{
931}
932
933const struct clkops clkops_null = {
934 .enable = clkll_enable_null,
935 .disable = clkll_disable_null,
936};
937
938/*
939 * Dummy clock
940 *
941 * Used for clock aliases that are needed on some OMAPs, but not others
942 */
943struct clk dummy_ck = {
944 .name = "dummy",
945 .ops = &clkops_null,
946};
947
948/*
949 *
950 */
951
952#ifdef CONFIG_OMAP_RESET_CLOCKS
953/*
954 * Disable any unused clocks left on by the bootloader
955 */
956static int __init clk_disable_unused(void)
957{
958 struct clk *ck;
959 unsigned long flags;
960
961 pr_info("clock: disabling unused clocks to save power\n");
962
963 spin_lock_irqsave(&clockfw_lock, flags);
964 list_for_each_entry(ck, &clocks, node) {
965 if (ck->ops == &clkops_null)
966 continue;
967
968 if (ck->usecount > 0 || !ck->enable_reg)
969 continue;
970
971 omap1_clk_disable_unused(ck);
972 }
973 spin_unlock_irqrestore(&clockfw_lock, flags);
974
975 return 0;
976}
977late_initcall(clk_disable_unused);
978late_initcall(omap_clk_enable_autoidle_all);
979#endif
980
981#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
982/*
983 * debugfs support to trace clock tree hierarchy and attributes
984 */
985
986#include <linux/debugfs.h>
987#include <linux/seq_file.h>
988
989static struct dentry *clk_debugfs_root;
990
991static int clk_dbg_show_summary(struct seq_file *s, void *unused)
992{
993 struct clk *c;
994 struct clk *pa;
995
996 mutex_lock(&clocks_mutex);
997 seq_printf(s, "%-30s %-30s %-10s %s\n",
998 "clock-name", "parent-name", "rate", "use-count");
999
1000 list_for_each_entry(c, &clocks, node) {
1001 pa = c->parent;
1002 seq_printf(s, "%-30s %-30s %-10lu %d\n",
1003 c->name, pa ? pa->name : "none", c->rate,
1004 c->usecount);
1005 }
1006 mutex_unlock(&clocks_mutex);
1007
1008 return 0;
1009}
1010
1011static int clk_dbg_open(struct inode *inode, struct file *file)
1012{
1013 return single_open(file, clk_dbg_show_summary, inode->i_private);
1014}
1015
1016static const struct file_operations debug_clock_fops = {
1017 .open = clk_dbg_open,
1018 .read = seq_read,
1019 .llseek = seq_lseek,
1020 .release = single_release,
1021};
1022
1023static int clk_debugfs_register_one(struct clk *c)
1024{
1025 int err;
1026 struct dentry *d;
1027 struct clk *pa = c->parent;
1028
1029 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
1030 if (!d)
1031 return -ENOMEM;
1032 c->dent = d;
1033
1034 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
1035 if (!d) {
1036 err = -ENOMEM;
1037 goto err_out;
1038 }
1039 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
1040 if (!d) {
1041 err = -ENOMEM;
1042 goto err_out;
1043 }
1044 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
1045 if (!d) {
1046 err = -ENOMEM;
1047 goto err_out;
1048 }
1049 return 0;
1050
1051err_out:
1052 debugfs_remove_recursive(c->dent);
1053 return err;
1054}
1055
1056static int clk_debugfs_register(struct clk *c)
1057{
1058 int err;
1059 struct clk *pa = c->parent;
1060
1061 if (pa && !pa->dent) {
1062 err = clk_debugfs_register(pa);
1063 if (err)
1064 return err;
1065 }
1066
1067 if (!c->dent) {
1068 err = clk_debugfs_register_one(c);
1069 if (err)
1070 return err;
1071 }
1072 return 0;
1073}
1074
1075static int __init clk_debugfs_init(void)
1076{
1077 struct clk *c;
1078 struct dentry *d;
1079 int err;
1080
1081 d = debugfs_create_dir("clock", NULL);
1082 if (!d)
1083 return -ENOMEM;
1084 clk_debugfs_root = d;
1085
1086 list_for_each_entry(c, &clocks, node) {
1087 err = clk_debugfs_register(c);
1088 if (err)
1089 goto err_out;
1090 }
1091
1092 d = debugfs_create_file("summary", S_IRUGO,
1093 d, NULL, &debug_clock_fops);
1094 if (!d)
1095 return -ENOMEM;
1096
1097 return 0;
1098err_out:
1099 debugfs_remove_recursive(clk_debugfs_root);
1100 return err;
1101}
1102late_initcall(clk_debugfs_init);
1103
1104#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f67676..1e4918a3a5ee 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,184 @@
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H 14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15 15
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/list.h>
17 18
18#include <plat/clock.h> 19#include <linux/clkdev.h>
20
21struct module;
22struct clk;
23
24struct omap_clk {
25 u16 cpu;
26 struct clk_lookup lk;
27};
28
29#define CLK(dev, con, ck, cp) \
30 { \
31 .cpu = cp, \
32 .lk = { \
33 .dev_id = dev, \
34 .con_id = con, \
35 .clk = ck, \
36 }, \
37 }
38
39/* Platform flags for the clkdev-OMAP integration code */
40#define CK_310 (1 << 0)
41#define CK_7XX (1 << 1) /* 7xx, 850 */
42#define CK_1510 (1 << 2)
43#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
44#define CK_1710 (1 << 4) /* 1710 extra for rate selection */
45
46
47/* Temporary, needed during the common clock framework conversion */
48#define __clk_get_name(clk) (clk->name)
49#define __clk_get_parent(clk) (clk->parent)
50#define __clk_get_rate(clk) (clk->rate)
51
52/**
53 * struct clkops - some clock function pointers
54 * @enable: fn ptr that enables the current clock in hardware
55 * @disable: fn ptr that enables the current clock in hardware
56 * @find_idlest: function returning the IDLEST register for the clock's IP blk
57 * @find_companion: function returning the "companion" clk reg for the clock
58 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
59 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
60 *
61 * A "companion" clk is an accompanying clock to the one being queried
62 * that must be enabled for the IP module connected to the clock to
63 * become accessible by the hardware. Neither @find_idlest nor
64 * @find_companion should be needed; that information is IP
65 * block-specific; the hwmod code has been created to handle this, but
66 * until hwmod data is ready and drivers have been converted to use PM
67 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
68 * @find_companion must, unfortunately, remain.
69 */
70struct clkops {
71 int (*enable)(struct clk *);
72 void (*disable)(struct clk *);
73 void (*find_idlest)(struct clk *, void __iomem **,
74 u8 *, u8 *);
75 void (*find_companion)(struct clk *, void __iomem **,
76 u8 *);
77 void (*allow_idle)(struct clk *);
78 void (*deny_idle)(struct clk *);
79};
80
81/*
82 * struct clk.flags possibilities
83 *
84 * XXX document the rest of the clock flags here
85 *
86 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
87 * bits share the same register. This flag allows the
88 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
89 * should be used. This is a temporary solution - a better approach
90 * would be to associate clock type-specific data with the clock,
91 * similar to the struct dpll_data approach.
92 */
93#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
94#define CLOCK_IDLE_CONTROL (1 << 1)
95#define CLOCK_NO_IDLE_PARENT (1 << 2)
96#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
97#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
98#define CLOCK_CLKOUTX2 (1 << 5)
99
100/**
101 * struct clk - OMAP struct clk
102 * @node: list_head connecting this clock into the full clock list
103 * @ops: struct clkops * for this clock
104 * @name: the name of the clock in the hardware (used in hwmod data and debug)
105 * @parent: pointer to this clock's parent struct clk
106 * @children: list_head connecting to the child clks' @sibling list_heads
107 * @sibling: list_head connecting this clk to its parent clk's @children
108 * @rate: current clock rate
109 * @enable_reg: register to write to enable the clock (see @enable_bit)
110 * @recalc: fn ptr that returns the clock's current rate
111 * @set_rate: fn ptr that can change the clock's current rate
112 * @round_rate: fn ptr that can round the clock's current rate
113 * @init: fn ptr to do clock-specific initialization
114 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
115 * @usecount: number of users that have requested this clock to be enabled
116 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
117 * @flags: see "struct clk.flags possibilities" above
118 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
119 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
120 *
121 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
122 * clock code converted to use clksel.
123 *
124 * XXX @usecount is poorly named. It should be "enable_count" or
125 * something similar. "users" in the description refers to kernel
126 * code (core code or drivers) that have called clk_enable() and not
127 * yet called clk_disable(); the usecount of parent clocks is also
128 * incremented by the clock code when clk_enable() is called on child
129 * clocks and decremented by the clock code when clk_disable() is
130 * called on child clocks.
131 *
132 * XXX @clkdm, @usecount, @children, @sibling should be marked for
133 * internal use only.
134 *
135 * @children and @sibling are used to optimize parent-to-child clock
136 * tree traversals. (child-to-parent traversals use @parent.)
137 *
138 * XXX The notion of the clock's current rate probably needs to be
139 * separated from the clock's target rate.
140 */
141struct clk {
142 struct list_head node;
143 const struct clkops *ops;
144 const char *name;
145 struct clk *parent;
146 struct list_head children;
147 struct list_head sibling; /* node for children */
148 unsigned long rate;
149 void __iomem *enable_reg;
150 unsigned long (*recalc)(struct clk *);
151 int (*set_rate)(struct clk *, unsigned long);
152 long (*round_rate)(struct clk *, unsigned long);
153 void (*init)(struct clk *);
154 u8 enable_bit;
155 s8 usecount;
156 u8 fixed_div;
157 u8 flags;
158 u8 rate_offset;
159 u8 src_offset;
160#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
161 struct dentry *dent; /* For visible tree hierarchy */
162#endif
163};
164
165struct clk_functions {
166 int (*clk_enable)(struct clk *clk);
167 void (*clk_disable)(struct clk *clk);
168 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
169 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
170 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
171 void (*clk_allow_idle)(struct clk *clk);
172 void (*clk_deny_idle)(struct clk *clk);
173 void (*clk_disable_unused)(struct clk *clk);
174};
175
176extern int mpurate;
177
178extern int clk_init(struct clk_functions *custom_clocks);
179extern void clk_preinit(struct clk *clk);
180extern int clk_register(struct clk *clk);
181extern void clk_reparent(struct clk *child, struct clk *parent);
182extern void clk_unregister(struct clk *clk);
183extern void propagate_rate(struct clk *clk);
184extern void recalculate_root_clocks(void);
185extern unsigned long followparent_recalc(struct clk *clk);
186extern void clk_enable_init_clocks(void);
187unsigned long omap_fixed_divisor_recalc(struct clk *clk);
188extern struct clk *omap_clk_get_by_name(const char *name);
189extern int omap_clk_enable_autoidle_all(void);
190extern int omap_clk_disable_autoidle_all(void);
191
192extern const struct clkops clkops_null;
193
194extern struct clk dummy_ck;
19 195
20int omap1_clk_init(void); 196int omap1_clk_init(void);
21void omap1_clk_late_init(void); 197void omap1_clk_late_init(void);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 9b45f4b0ee22..cb7c6ae2e3fc 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,16 +22,14 @@
22 22
23#include <asm/mach-types.h> /* for machine_is_* */ 23#include <asm/mach-types.h> /* for machine_is_* */
24 24
25#include <plat/clock.h> 25#include "soc.h"
26#include <plat/cpu.h>
27#include <plat/clkdev_omap.h>
28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
29 26
30#include <mach/hardware.h> 27#include <mach/hardware.h>
31#include <mach/usb.h> /* for OTG_BASE */ 28#include <mach/usb.h> /* for OTG_BASE */
32 29
33#include "iomap.h" 30#include "iomap.h"
34#include "clock.h" 31#include "clock.h"
32#include "sram.h"
35 33
36/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ 34/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
37#define IDL_CLKOUT_ARM_SHIFT 12 35#define IDL_CLKOUT_ARM_SHIFT 12
@@ -765,14 +763,6 @@ static struct omap_clk omap_clks[] = {
765 * init 763 * init
766 */ 764 */
767 765
768static struct clk_functions omap1_clk_functions = {
769 .clk_enable = omap1_clk_enable,
770 .clk_disable = omap1_clk_disable,
771 .clk_round_rate = omap1_clk_round_rate,
772 .clk_set_rate = omap1_clk_set_rate,
773 .clk_disable_unused = omap1_clk_disable_unused,
774};
775
776static void __init omap1_show_rates(void) 766static void __init omap1_show_rates(void)
777{ 767{
778 pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", 768 pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
@@ -803,8 +793,6 @@ int __init omap1_clk_init(void)
803 if (!cpu_is_omap15xx()) 793 if (!cpu_is_omap15xx())
804 omap_writew(0, SOFT_REQ_REG2); 794 omap_writew(0, SOFT_REQ_REG2);
805 795
806 clk_init(&omap1_clk_functions);
807
808 /* By default all idlect1 clocks are allowed to idle */ 796 /* By default all idlect1 clocks are allowed to idle */
809 arm_idlect1_mask = ~0; 797 arm_idlect1_mask = ~0;
810 798
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index c2552b24f9f2..fc8c9449eba8 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -26,8 +26,10 @@
26#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H 26#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
27#define __ARCH_ARM_MACH_OMAP1_COMMON_H 27#define __ARCH_ARM_MACH_OMAP1_COMMON_H
28 28
29#include <plat/common.h>
30#include <linux/mtd/mtd.h> 29#include <linux/mtd/mtd.h>
30#include <linux/i2c-omap.h>
31
32#include <plat/i2c.h>
31 33
32#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 34#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
33void omap7xx_map_io(void); 35void omap7xx_map_io(void);
@@ -38,6 +40,7 @@ static inline void omap7xx_map_io(void)
38#endif 40#endif
39 41
40#ifdef CONFIG_ARCH_OMAP15XX 42#ifdef CONFIG_ARCH_OMAP15XX
43void omap1510_fpga_init_irq(void);
41void omap15xx_map_io(void); 44void omap15xx_map_io(void);
42#else 45#else
43static inline void omap15xx_map_io(void) 46static inline void omap15xx_map_io(void)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index d3fec92c54cb..7155ed8b97f8 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -19,10 +19,8 @@
19 19
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21 21
22#include <plat/tc.h> 22#include <mach/tc.h>
23#include <mach/mux.h> 23#include <mach/mux.h>
24#include <plat/dma.h>
25#include <plat/mmc.h>
26 24
27#include <mach/omap7xx.h> 25#include <mach/omap7xx.h>
28#include <mach/camera.h> 26#include <mach/camera.h>
@@ -30,6 +28,9 @@
30 28
31#include "common.h" 29#include "common.h"
32#include "clock.h" 30#include "clock.h"
31#include "dma.h"
32#include "mmc.h"
33#include "sram.h"
33 34
34#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) 35#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
35 36
@@ -175,6 +176,13 @@ static int __init omap_mmc_add(const char *name, int id, unsigned long base,
175 res[3].name = "tx"; 176 res[3].name = "tx";
176 res[3].flags = IORESOURCE_DMA; 177 res[3].flags = IORESOURCE_DMA;
177 178
179 if (cpu_is_omap7xx())
180 data->slots[0].features = MMC_OMAP7XX;
181 if (cpu_is_omap15xx())
182 data->slots[0].features = MMC_OMAP15XX;
183 if (cpu_is_omap16xx())
184 data->slots[0].features = MMC_OMAP16XX;
185
178 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); 186 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
179 if (ret == 0) 187 if (ret == 0)
180 ret = platform_device_add_data(pdev, data, sizeof(*data)); 188 ret = platform_device_add_data(pdev, data, sizeof(*data));
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 29007fef84cd..978aed85d328 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -25,11 +25,13 @@
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/io.h> 26#include <linux/io.h>
27 27
28#include <plat/dma.h> 28#include <plat-omap/dma-omap.h>
29#include <plat/tc.h> 29#include <mach/tc.h>
30 30
31#include <mach/irqs.h> 31#include <mach/irqs.h>
32 32
33#include "dma.h"
34
33#define OMAP1_DMA_BASE (0xfffed800) 35#define OMAP1_DMA_BASE (0xfffed800)
34#define OMAP1_LOGICAL_DMA_CH_COUNT 17 36#define OMAP1_LOGICAL_DMA_CH_COUNT 17
35#define OMAP1_DMA_STRIDE 0x40 37#define OMAP1_DMA_STRIDE 0x40
@@ -319,6 +321,9 @@ static int __init omap1_system_dma_init(void)
319 d->dev_caps = ENABLE_1510_MODE; 321 d->dev_caps = ENABLE_1510_MODE;
320 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; 322 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
321 323
324 if (cpu_is_omap16xx())
325 d->dev_caps = ENABLE_16XX_MODE;
326
322 d->dev_caps |= SRC_PORT; 327 d->dev_caps |= SRC_PORT;
323 d->dev_caps |= DST_PORT; 328 d->dev_caps |= DST_PORT;
324 d->dev_caps |= SRC_INDEX; 329 d->dev_caps |= SRC_INDEX;
diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h
new file mode 100644
index 000000000000..da6345dab03f
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.h
@@ -0,0 +1,83 @@
1/*
2 * OMAP1 DMA channel definitions
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __OMAP1_DMA_CHANNEL_H
20#define __OMAP1_DMA_CHANNEL_H
21
22/* DMA channels for omap1 */
23#define OMAP_DMA_NO_DEVICE 0
24#define OMAP_DMA_MCSI1_TX 1
25#define OMAP_DMA_MCSI1_RX 2
26#define OMAP_DMA_I2C_RX 3
27#define OMAP_DMA_I2C_TX 4
28#define OMAP_DMA_EXT_NDMA_REQ 5
29#define OMAP_DMA_EXT_NDMA_REQ2 6
30#define OMAP_DMA_UWIRE_TX 7
31#define OMAP_DMA_MCBSP1_TX 8
32#define OMAP_DMA_MCBSP1_RX 9
33#define OMAP_DMA_MCBSP3_TX 10
34#define OMAP_DMA_MCBSP3_RX 11
35#define OMAP_DMA_UART1_TX 12
36#define OMAP_DMA_UART1_RX 13
37#define OMAP_DMA_UART2_TX 14
38#define OMAP_DMA_UART2_RX 15
39#define OMAP_DMA_MCBSP2_TX 16
40#define OMAP_DMA_MCBSP2_RX 17
41#define OMAP_DMA_UART3_TX 18
42#define OMAP_DMA_UART3_RX 19
43#define OMAP_DMA_CAMERA_IF_RX 20
44#define OMAP_DMA_MMC_TX 21
45#define OMAP_DMA_MMC_RX 22
46#define OMAP_DMA_NAND 23
47#define OMAP_DMA_IRQ_LCD_LINE 24
48#define OMAP_DMA_MEMORY_STICK 25
49#define OMAP_DMA_USB_W2FC_RX0 26
50#define OMAP_DMA_USB_W2FC_RX1 27
51#define OMAP_DMA_USB_W2FC_RX2 28
52#define OMAP_DMA_USB_W2FC_TX0 29
53#define OMAP_DMA_USB_W2FC_TX1 30
54#define OMAP_DMA_USB_W2FC_TX2 31
55
56/* These are only for 1610 */
57#define OMAP_DMA_CRYPTO_DES_IN 32
58#define OMAP_DMA_SPI_TX 33
59#define OMAP_DMA_SPI_RX 34
60#define OMAP_DMA_CRYPTO_HASH 35
61#define OMAP_DMA_CCP_ATTN 36
62#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
63#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
64#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
65#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
66#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
67#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
68#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
69#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
70#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
71#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
72#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
73#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
74#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
75#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
76#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
77#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
78#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
79#define OMAP_DMA_MMC2_TX 54
80#define OMAP_DMA_MMC2_RX 55
81#define OMAP_DMA_CRYPTO_DES_OUT 56
82
83#endif /* __OMAP1_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
index 73ae6169aa4a..b3fb531af94e 100644
--- a/arch/arm/mach-omap1/flash.c
+++ b/arch/arm/mach-omap1/flash.c
@@ -10,7 +10,7 @@
10#include <linux/mtd/mtd.h> 10#include <linux/mtd/mtd.h>
11#include <linux/mtd/map.h> 11#include <linux/mtd/map.h>
12 12
13#include <plat/tc.h> 13#include <mach/tc.h>
14#include <mach/flash.h> 14#include <mach/flash.h>
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 29ec50fc688d..8bd71b2d0967 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,11 +27,11 @@
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
30#include <plat/fpga.h>
31
32#include <mach/hardware.h> 30#include <mach/hardware.h>
33 31
34#include "iomap.h" 32#include "iomap.h"
33#include "common.h"
34#include "fpga.h"
35 35
36static void fpga_mask_irq(struct irq_data *d) 36static void fpga_mask_irq(struct irq_data *d)
37{ 37{
diff --git a/arch/arm/mach-omap1/fpga.h b/arch/arm/mach-omap1/fpga.h
new file mode 100644
index 000000000000..4b4307a80e48
--- /dev/null
+++ b/arch/arm/mach-omap1/fpga.h
@@ -0,0 +1,52 @@
1/*
2 * Interrupt handler for OMAP-1510 FPGA
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 * Author: Greg Lonnon <glonnon@ridgerun.com>
6 *
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 *
9 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
10 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef __ASM_ARCH_OMAP_FPGA_H
18#define __ASM_ARCH_OMAP_FPGA_H
19
20/*
21 * ---------------------------------------------------------------------------
22 * H2/P2 Debug board FPGA
23 * ---------------------------------------------------------------------------
24 */
25/* maps in the FPGA registers and the ETHR registers */
26#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
27#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
28#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
29
30#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
31#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
32#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
33#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
34#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
35#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
36#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
37#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
38
39/* LEDs definition on debug board (16 LEDs, all physically green) */
40#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
41#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
42#define H2P2_DBG_FPGA_LED_RED (1 << 13)
43#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
44/* cpu0 load-meter LEDs */
45#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
46#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
47#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
48
49#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
50#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
51
52#endif
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 98e6f39224a4..02b3eb2e201c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -19,6 +19,8 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
21 21
22#include <mach/irqs.h>
23
22#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE 24#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
23#define OMAP1510_GPIO_BASE 0xFFFCE000 25#define OMAP1510_GPIO_BASE 0xFFFCE000
24 26
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 33f419236b17..b9952a258d82 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -19,6 +19,8 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
21 21
22#include <mach/irqs.h>
23
22#define OMAP1610_GPIO1_BASE 0xfffbe400 24#define OMAP1610_GPIO1_BASE 0xfffbe400
23#define OMAP1610_GPIO2_BASE 0xfffbec00 25#define OMAP1610_GPIO2_BASE 0xfffbec00
24#define OMAP1610_GPIO3_BASE 0xfffbb400 26#define OMAP1610_GPIO3_BASE 0xfffbb400
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 958ce9acee95..f5819b2b7cbe 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -19,6 +19,8 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
21 21
22#include <mach/irqs.h>
23
22#define OMAP7XX_GPIO1_BASE 0xfffbc000 24#define OMAP7XX_GPIO1_BASE 0xfffbc000
23#define OMAP7XX_GPIO2_BASE 0xfffbc800 25#define OMAP7XX_GPIO2_BASE 0xfffbc800
24#define OMAP7XX_GPIO3_BASE 0xfffbd000 26#define OMAP7XX_GPIO3_BASE 0xfffbd000
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index a0551a6d7451..faca808cb3d9 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -19,11 +19,25 @@
19 * 19 *
20 */ 20 */
21 21
22#include <plat/i2c.h> 22#include <linux/i2c-omap.h>
23#include <mach/mux.h> 23#include <mach/mux.h>
24#include <plat/cpu.h> 24#include "soc.h"
25
26#include <plat/i2c.h>
27
28#define OMAP_I2C_SIZE 0x3f
29#define OMAP1_I2C_BASE 0xfffb3800
30#define OMAP1_INT_I2C (32 + 4)
31
32static const char name[] = "omap_i2c";
25 33
26void __init omap1_i2c_mux_pins(int bus_id) 34static struct resource i2c_resources[2] = {
35};
36
37static struct platform_device omap_i2c_devices[1] = {
38};
39
40static void __init omap1_i2c_mux_pins(int bus_id)
27{ 41{
28 if (cpu_is_omap7xx()) { 42 if (cpu_is_omap7xx()) {
29 omap_cfg_reg(I2C_7XX_SDA); 43 omap_cfg_reg(I2C_7XX_SDA);
@@ -33,3 +47,47 @@ void __init omap1_i2c_mux_pins(int bus_id)
33 omap_cfg_reg(I2C_SCL); 47 omap_cfg_reg(I2C_SCL);
34 } 48 }
35} 49}
50
51int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
52 int bus_id)
53{
54 struct platform_device *pdev;
55 struct resource *res;
56
57 if (bus_id > 1)
58 return -EINVAL;
59
60 omap1_i2c_mux_pins(bus_id);
61
62 pdev = &omap_i2c_devices[bus_id - 1];
63 pdev->id = bus_id;
64 pdev->name = name;
65 pdev->num_resources = ARRAY_SIZE(i2c_resources);
66 res = i2c_resources;
67 res[0].start = OMAP1_I2C_BASE;
68 res[0].end = res[0].start + OMAP_I2C_SIZE;
69 res[0].flags = IORESOURCE_MEM;
70 res[1].start = OMAP1_INT_I2C;
71 res[1].flags = IORESOURCE_IRQ;
72 pdev->resource = res;
73
74 /* all OMAP1 have IP version 1 register set */
75 pdata->rev = OMAP_I2C_IP_VERSION_1;
76
77 /* all OMAP1 I2C are implemented like this */
78 pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
79 OMAP_I2C_FLAG_SIMPLE_CLOCK |
80 OMAP_I2C_FLAG_16BIT_DATA_REG |
81 OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
82
83 /* how the cpu bus is wired up differs for 7xx only */
84
85 if (cpu_is_omap7xx())
86 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
87 else
88 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
89
90 pdev->dev.platform_data = pdata;
91
92 return platform_device_register(pdev);
93}
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index a1b846aacdaf..52de382fc804 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -17,7 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <asm/system_info.h> 18#include <asm/system_info.h>
19 19
20#include <plat/cpu.h> 20#include "soc.h"
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23 23
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index 2b36a281dc84..5c1a26c9f490 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
13 13
14#include <linux/serial_reg.h> 14#include <linux/serial_reg.h>
15 15
16#include <plat/serial.h> 16#include "serial.h"
17 17
18 .pushsection .data 18 .pushsection .data
19omap_uart_phys: .word 0x0 19omap_uart_phys: .word 0x0
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index 88f08cab1717..78a8c6c24764 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -13,8 +13,6 @@
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <mach/irqs.h> 14#include <mach/irqs.h>
15 15
16#include "../../iomap.h"
17
18 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
19 .endm 17 .endm
20 18
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
deleted file mode 100644
index ebf86c0f4f46..000000000000
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/*
2 * arch/arm/mach-omap1/include/mach/gpio.h
3 */
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index 84248d250adb..5875a5098d35 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -39,7 +39,7 @@
39#include <asm/sizes.h> 39#include <asm/sizes.h>
40#ifndef __ASSEMBLER__ 40#ifndef __ASSEMBLER__
41#include <asm/types.h> 41#include <asm/types.h>
42#include <plat/cpu.h> 42#include <mach/soc.h>
43 43
44/* 44/*
45 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 45 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
@@ -51,7 +51,7 @@ extern void omap_writeb(u8 v, u32 pa);
51extern void omap_writew(u16 v, u32 pa); 51extern void omap_writew(u16 v, u32 pa);
52extern void omap_writel(u32 v, u32 pa); 52extern void omap_writel(u32 v, u32 pa);
53 53
54#include <plat/tc.h> 54#include <mach/tc.h>
55 55
56/* Almost all documentation for chip and board memory maps assumes 56/* Almost all documentation for chip and board memory maps assumes
57 * BM is clear. Most devel boards have a switch to control booting 57 * BM is clear. Most devel boards have a switch to control booting
@@ -72,7 +72,10 @@ static inline u32 omap_cs3_phys(void)
72 72
73#endif /* ifndef __ASSEMBLER__ */ 73#endif /* ifndef __ASSEMBLER__ */
74 74
75#include <plat/serial.h> 75#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
76#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
77
78#include <mach/serial.h>
76 79
77/* 80/*
78 * --------------------------------------------------------------------------- 81 * ---------------------------------------------------------------------------
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index 901082def9bd..3c2530523111 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -19,7 +19,7 @@
19 * because of the strncmp(). 19 * because of the strncmp().
20 */ 20 */
21#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) 21#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
22#include <plat/cpu.h> 22#include <mach/soc.h>
23 23
24/* 24/*
25 * OMAP-1510 Local Bus address offset 25 * OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h
index 8fe05d6137c0..3d235244bf5c 100644
--- a/arch/arm/mach-omap1/include/mach/omap1510.h
+++ b/arch/arm/mach-omap1/include/mach/omap1510.h
@@ -45,5 +45,118 @@
45 45
46#define OMAP1510_DSP_MMU_BASE (0xfffed200) 46#define OMAP1510_DSP_MMU_BASE (0xfffed200)
47 47
48/*
49 * ---------------------------------------------------------------------------
50 * OMAP-1510 FPGA
51 * ---------------------------------------------------------------------------
52 */
53#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
54#define OMAP1510_FPGA_SIZE SZ_4K
55#define OMAP1510_FPGA_START 0x08000000 /* PA */
56
57/* Revision */
58#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
59#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
60#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
61#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
62#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
63#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
64
65/* Interrupt status */
66#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
67#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
68
69/* Interrupt mask */
70#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
71#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
72
73/* Reset registers */
74#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
75#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
76
77#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
78#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
79#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
80#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
81#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
82#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
83#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
84#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
85#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
86#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
87#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
88
89#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
90
91#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
92#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
93#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
94#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
95#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
96#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
97#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
98#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
99#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
100#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
101
102#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
103
104/*
105 * Power up Giga UART driver, turn on HID clock.
106 * Turn off BT power, since we're not using it and it
107 * draws power.
108 */
109#define OMAP1510_FPGA_RESET_VALUE 0x42
110
111#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
112#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
113#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
114#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
115#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
116#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
117#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
118#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
119
120/*
121 * Innovator/OMAP1510 FPGA HID register bit definitions
122 */
123#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
124#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
125#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
126#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
127#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
128#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
129#define OMAP1510_FPGA_HID_rsrvd (1<<6)
130#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
131
132/* The FPGA IRQ is cascaded through GPIO_13 */
133#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
134
135/* IRQ Numbers for interrupts muxed through the FPGA */
136#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
137#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
138#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
139#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
140#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
141#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
142#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
143#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
144#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
145#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
146#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
147#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
148#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
149#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
150#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
151#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
152#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
153#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
154#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
155#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
156#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
157#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
158#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
159#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
160
48#endif /* __ASM_ARCH_OMAP15XX_H */ 161#endif /* __ASM_ARCH_OMAP15XX_H */
49 162
diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/include/mach/serial.h
new file mode 100644
index 000000000000..2ce6a2db470b
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/serial.h
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2009 Texas Instruments
3 * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
4 *
5 * This program is distributed in the hope that it will be useful,
6 * but WITHOUT ANY WARRANTY; without even the implied warranty of
7 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8 * GNU General Public License for more details.
9 */
10
11#ifndef __ASM_ARCH_SERIAL_H
12#define __ASM_ARCH_SERIAL_H
13
14#include <linux/init.h>
15
16/*
17 * Memory entry used for the DEBUG_LL UART configuration, relative to
18 * start of RAM. See also uncompress.h and debug-macro.S.
19 *
20 * Note that using a memory location for storing the UART configuration
21 * has at least two limitations:
22 *
23 * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
24 * uncompress code could then partially overwrite itself
25 * 2. We assume printascii is called at least once before paging_init,
26 * and addruart has a chance to read OMAP_UART_INFO
27 */
28#define OMAP_UART_INFO_OFS 0x3ffc
29
30/* OMAP1 serial ports */
31#define OMAP1_UART1_BASE 0xfffb0000
32#define OMAP1_UART2_BASE 0xfffb0800
33#define OMAP1_UART3_BASE 0xfffb9800
34
35#define OMAP_PORT_SHIFT 2
36#define OMAP7XX_PORT_SHIFT 0
37
38#define OMAP1510_BASE_BAUD (12000000/16)
39#define OMAP16XX_BASE_BAUD (48000000/16)
40
41/*
42 * DEBUG_LL port encoding stored into the UART1 scratchpad register by
43 * decomp_setup in uncompress.h
44 */
45#define OMAP1UART1 11
46#define OMAP1UART2 12
47#define OMAP1UART3 13
48
49#ifndef __ASSEMBLER__
50extern void omap_serial_init(void);
51#endif
52
53#endif
diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h
new file mode 100644
index 000000000000..6cf9c1cc2bef
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/soc.h
@@ -0,0 +1,229 @@
1/*
2 * OMAP cpu type detection
3 *
4 * Copyright (C) 2004, 2008 Nokia Corporation
5 *
6 * Copyright (C) 2009-11 Texas Instruments.
7 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 *
10 * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#ifndef __ASM_ARCH_OMAP_CPU_H
29#define __ASM_ARCH_OMAP_CPU_H
30
31#ifndef __ASSEMBLY__
32
33#include <linux/bitops.h>
34
35/*
36 * Test if multicore OMAP support is needed
37 */
38#undef MULTI_OMAP1
39#undef OMAP_NAME
40
41#ifdef CONFIG_ARCH_OMAP730
42# ifdef OMAP_NAME
43# undef MULTI_OMAP1
44# define MULTI_OMAP1
45# else
46# define OMAP_NAME omap730
47# endif
48#endif
49#ifdef CONFIG_ARCH_OMAP850
50# ifdef OMAP_NAME
51# undef MULTI_OMAP1
52# define MULTI_OMAP1
53# else
54# define OMAP_NAME omap850
55# endif
56#endif
57#ifdef CONFIG_ARCH_OMAP15XX
58# ifdef OMAP_NAME
59# undef MULTI_OMAP1
60# define MULTI_OMAP1
61# else
62# define OMAP_NAME omap1510
63# endif
64#endif
65#ifdef CONFIG_ARCH_OMAP16XX
66# ifdef OMAP_NAME
67# undef MULTI_OMAP1
68# define MULTI_OMAP1
69# else
70# define OMAP_NAME omap16xx
71# endif
72#endif
73
74/*
75 * omap_rev bits:
76 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
77 * CPU revision (See _REV_ defined in cpu.h) [15:08]
78 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
79 */
80unsigned int omap_rev(void);
81
82/*
83 * Get the CPU revision for OMAP devices
84 */
85#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
86
87/*
88 * Macros to group OMAP into cpu classes.
89 * These can be used in most places.
90 * cpu_is_omap7xx(): True for OMAP730, OMAP850
91 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
92 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
93 */
94#define GET_OMAP_CLASS (omap_rev() & 0xff)
95
96#define IS_OMAP_CLASS(class, id) \
97static inline int is_omap ##class (void) \
98{ \
99 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
100}
101
102#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
103
104#define IS_OMAP_SUBCLASS(subclass, id) \
105static inline int is_omap ##subclass (void) \
106{ \
107 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
108}
109
110IS_OMAP_CLASS(7xx, 0x07)
111IS_OMAP_CLASS(15xx, 0x15)
112IS_OMAP_CLASS(16xx, 0x16)
113
114#define cpu_is_omap7xx() 0
115#define cpu_is_omap15xx() 0
116#define cpu_is_omap16xx() 0
117
118#if defined(MULTI_OMAP1)
119# if defined(CONFIG_ARCH_OMAP730)
120# undef cpu_is_omap7xx
121# define cpu_is_omap7xx() is_omap7xx()
122# endif
123# if defined(CONFIG_ARCH_OMAP850)
124# undef cpu_is_omap7xx
125# define cpu_is_omap7xx() is_omap7xx()
126# endif
127# if defined(CONFIG_ARCH_OMAP15XX)
128# undef cpu_is_omap15xx
129# define cpu_is_omap15xx() is_omap15xx()
130# endif
131# if defined(CONFIG_ARCH_OMAP16XX)
132# undef cpu_is_omap16xx
133# define cpu_is_omap16xx() is_omap16xx()
134# endif
135#else
136# if defined(CONFIG_ARCH_OMAP730)
137# undef cpu_is_omap7xx
138# define cpu_is_omap7xx() 1
139# endif
140# if defined(CONFIG_ARCH_OMAP850)
141# undef cpu_is_omap7xx
142# define cpu_is_omap7xx() 1
143# endif
144# if defined(CONFIG_ARCH_OMAP15XX)
145# undef cpu_is_omap15xx
146# define cpu_is_omap15xx() 1
147# endif
148# if defined(CONFIG_ARCH_OMAP16XX)
149# undef cpu_is_omap16xx
150# define cpu_is_omap16xx() 1
151# endif
152#endif
153
154/*
155 * Macros to detect individual cpu types.
156 * These are only rarely needed.
157 * cpu_is_omap310(): True for OMAP310
158 * cpu_is_omap1510(): True for OMAP1510
159 * cpu_is_omap1610(): True for OMAP1610
160 * cpu_is_omap1611(): True for OMAP1611
161 * cpu_is_omap5912(): True for OMAP5912
162 * cpu_is_omap1621(): True for OMAP1621
163 * cpu_is_omap1710(): True for OMAP1710
164 */
165#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
166
167#define IS_OMAP_TYPE(type, id) \
168static inline int is_omap ##type (void) \
169{ \
170 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
171}
172
173IS_OMAP_TYPE(310, 0x0310)
174IS_OMAP_TYPE(1510, 0x1510)
175IS_OMAP_TYPE(1610, 0x1610)
176IS_OMAP_TYPE(1611, 0x1611)
177IS_OMAP_TYPE(5912, 0x1611)
178IS_OMAP_TYPE(1621, 0x1621)
179IS_OMAP_TYPE(1710, 0x1710)
180
181#define cpu_is_omap310() 0
182#define cpu_is_omap1510() 0
183#define cpu_is_omap1610() 0
184#define cpu_is_omap5912() 0
185#define cpu_is_omap1611() 0
186#define cpu_is_omap1621() 0
187#define cpu_is_omap1710() 0
188
189/* These are needed to compile common code */
190#ifdef CONFIG_ARCH_OMAP1
191#define cpu_is_omap242x() 0
192#define cpu_is_omap2430() 0
193#define cpu_is_omap243x() 0
194#define cpu_is_omap24xx() 0
195#define cpu_is_omap34xx() 0
196#define cpu_is_omap44xx() 0
197#define soc_is_omap54xx() 0
198#define soc_is_am33xx() 0
199#define cpu_class_is_omap1() 1
200#define cpu_class_is_omap2() 0
201#endif
202
203/*
204 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
205 * between 310 vs. 1510 and 1611B/5912 vs. 1710.
206 */
207
208#if defined(CONFIG_ARCH_OMAP15XX)
209# undef cpu_is_omap310
210# undef cpu_is_omap1510
211# define cpu_is_omap310() is_omap310()
212# define cpu_is_omap1510() is_omap1510()
213#endif
214
215#if defined(CONFIG_ARCH_OMAP16XX)
216# undef cpu_is_omap1610
217# undef cpu_is_omap1611
218# undef cpu_is_omap5912
219# undef cpu_is_omap1621
220# undef cpu_is_omap1710
221# define cpu_is_omap1610() is_omap1610()
222# define cpu_is_omap1611() is_omap1611()
223# define cpu_is_omap5912() is_omap5912()
224# define cpu_is_omap1621() is_omap1621()
225# define cpu_is_omap1710() is_omap1710()
226#endif
227
228#endif /* __ASSEMBLY__ */
229#endif
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/mach-omap1/include/mach/tc.h
index 1b4b2da86203..1b4b2da86203 100644
--- a/arch/arm/plat-omap/include/plat/tc.h
+++ b/arch/arm/mach-omap1/include/mach/tc.h
diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h
index 0ff22dc075c7..ad6fbe7d83f2 100644
--- a/arch/arm/mach-omap1/include/mach/uncompress.h
+++ b/arch/arm/mach-omap1/include/mach/uncompress.h
@@ -1,5 +1,122 @@
1/* 1/*
2 * arch/arm/mach-omap1/include/mach/uncompress.h 2 * arch/arm/plat-omap/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Initially based on:
7 * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
8 * Copyright (C) 2000 RidgeRun, Inc.
9 * Author: Greg Lonnon <glonnon@ridgerun.com>
10 *
11 * Rewritten by:
12 * Author: <source@mvista.com>
13 * 2004 (c) MontaVista Software, Inc.
14 *
15 * This file is licensed under the terms of the GNU General Public License
16 * version 2. This program is licensed "as is" without any warranty of any
17 * kind, whether express or implied.
3 */ 18 */
4 19
5#include <plat/uncompress.h> 20#include <linux/types.h>
21#include <linux/serial_reg.h>
22
23#include <asm/memory.h>
24#include <asm/mach-types.h>
25
26#include "serial.h"
27
28#define MDR1_MODE_MASK 0x07
29
30volatile u8 *uart_base;
31int uart_shift;
32
33/*
34 * Store the DEBUG_LL uart number into memory.
35 * See also debug-macro.S, and serial.c for related code.
36 */
37static void set_omap_uart_info(unsigned char port)
38{
39 /*
40 * Get address of some.bss variable and round it down
41 * a la CONFIG_AUTO_ZRELADDR.
42 */
43 u32 ram_start = (u32)&uart_shift & 0xf8000000;
44 u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
45 *uart_info = port;
46}
47
48static void putc(int c)
49{
50 if (!uart_base)
51 return;
52
53 /* Check for UART 16x mode */
54 if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
55 return;
56
57 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
58 barrier();
59 uart_base[UART_TX << uart_shift] = c;
60}
61
62static inline void flush(void)
63{
64}
65
66/*
67 * Macros to configure UART1 and debug UART
68 */
69#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \
70 if (machine_is_##mach()) { \
71 uart_base = (volatile u8 *)(dbg_uart); \
72 uart_shift = (dbg_shft); \
73 port = (dbg_id); \
74 set_omap_uart_info(port); \
75 break; \
76 }
77
78#define DEBUG_LL_OMAP7XX(p, mach) \
79 _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \
80 OMAP1UART##p)
81
82#define DEBUG_LL_OMAP1(p, mach) \
83 _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \
84 OMAP1UART##p)
85
86static inline void arch_decomp_setup(void)
87{
88 int port = 0;
89
90 /*
91 * Initialize the port based on the machine ID from the bootloader.
92 * Note that we're using macros here instead of switch statement
93 * as machine_is functions are optimized out for the boards that
94 * are not selected.
95 */
96 do {
97 /* omap7xx/8xx based boards using UART1 with shift 0 */
98 DEBUG_LL_OMAP7XX(1, herald);
99 DEBUG_LL_OMAP7XX(1, omap_perseus2);
100
101 /* omap15xx/16xx based boards using UART1 */
102 DEBUG_LL_OMAP1(1, ams_delta);
103 DEBUG_LL_OMAP1(1, nokia770);
104 DEBUG_LL_OMAP1(1, omap_h2);
105 DEBUG_LL_OMAP1(1, omap_h3);
106 DEBUG_LL_OMAP1(1, omap_innovator);
107 DEBUG_LL_OMAP1(1, omap_osk);
108 DEBUG_LL_OMAP1(1, omap_palmte);
109 DEBUG_LL_OMAP1(1, omap_palmz71);
110
111 /* omap15xx/16xx based boards using UART2 */
112 DEBUG_LL_OMAP1(2, omap_palmtt);
113
114 /* omap15xx/16xx based boards using UART3 */
115 DEBUG_LL_OMAP1(3, sx1);
116 } while (0);
117}
118
119/*
120 * nothing to do
121 */
122#define arch_decomp_wdog()
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 6a5baab1f4cb..5a3b80617a11 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -17,8 +17,8 @@
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18 18
19#include <mach/mux.h> 19#include <mach/mux.h>
20#include <plat/tc.h> 20#include <mach/tc.h>
21#include <plat/dma.h> 21#include <plat-omap/dma-omap.h>
22 22
23#include "iomap.h" 23#include "iomap.h"
24#include "common.h" 24#include "common.h"
@@ -134,7 +134,6 @@ void __init omap1_init_early(void)
134 */ 134 */
135 omap1_clk_init(); 135 omap1_clk_init();
136 omap1_mux_init(); 136 omap1_mux_init();
137 omap_init_consistent_dma_size();
138} 137}
139 138
140void __init omap1_init_late(void) 139void __init omap1_init_late(void)
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index 330c4716b028..f4e2d7a21365 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,9 +22,6 @@
22 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 24
25#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
26#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
27
28/* 25/*
29 * ---------------------------------------------------------------------------- 26 * ----------------------------------------------------------------------------
30 * Omap1 specific IO mapping 27 * Omap1 specific IO mapping
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 6995fb6a3345..122ef67939a2 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -45,7 +45,7 @@
45#include <asm/irq.h> 45#include <asm/irq.h>
46#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
47 47
48#include <plat/cpu.h> 48#include "soc.h"
49 49
50#include <mach/hardware.h> 50#include <mach/hardware.h>
51 51
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index ed42628611bc..7ed8c1857d56 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -27,11 +27,13 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <plat/dma.h> 30#include <plat-omap/dma-omap.h>
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/lcdc.h> 33#include <mach/lcdc.h>
34 34
35#include "dma.h"
36
35int omap_lcd_dma_running(void) 37int omap_lcd_dma_running(void)
36{ 38{
37 /* 39 /*
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index bdc2e7541adb..c6d8fdf92e9c 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -19,14 +19,15 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21 21
22#include <plat/dma.h> 22#include <plat-omap/dma-omap.h>
23#include <mach/mux.h> 23#include <mach/mux.h>
24#include <plat/cpu.h> 24#include "soc.h"
25#include <linux/platform_data/asoc-ti-mcbsp.h> 25#include <linux/platform_data/asoc-ti-mcbsp.h>
26 26
27#include <mach/irqs.h> 27#include <mach/irqs.h>
28 28
29#include "iomap.h" 29#include "iomap.h"
30#include "dma.h"
30 31
31#define DPS_RSTCT2_PER_EN (1 << 0) 32#define DPS_RSTCT2_PER_EN (1 << 0)
32#define DSP_RSTCT2_WD_PER_EN (1 << 1) 33#define DSP_RSTCT2_WD_PER_EN (1 << 1)
diff --git a/arch/arm/mach-omap1/mmc.h b/arch/arm/mach-omap1/mmc.h
new file mode 100644
index 000000000000..39c2b13de884
--- /dev/null
+++ b/arch/arm/mach-omap1/mmc.h
@@ -0,0 +1,18 @@
1#include <linux/mmc/host.h>
2#include <linux/platform_data/mmc-omap.h>
3
4#define OMAP15XX_NR_MMC 1
5#define OMAP16XX_NR_MMC 2
6#define OMAP1_MMC_SIZE 0x080
7#define OMAP1_MMC1_BASE 0xfffb7800
8#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
9
10#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
11void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
12 int nr_controllers);
13#else
14static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
15 int nr_controllers)
16{
17}
18#endif
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
index 9cd4ddb51397..8dcebe6d8882 100644
--- a/arch/arm/mach-omap1/opp_data.c
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -10,7 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#include <plat/clkdev_omap.h> 13#include "clock.h"
14#include "opp.h" 14#include "opp.h"
15 15
16/*------------------------------------------------------------------------- 16/*-------------------------------------------------------------------------
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 47ec16155483..66d663a6ef3a 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,23 +44,23 @@
44#include <linux/io.h> 44#include <linux/io.h>
45#include <linux/atomic.h> 45#include <linux/atomic.h>
46 46
47#include <asm/fncpy.h>
47#include <asm/system_misc.h> 48#include <asm/system_misc.h>
48#include <asm/irq.h> 49#include <asm/irq.h>
49#include <asm/mach/time.h> 50#include <asm/mach/time.h>
50#include <asm/mach/irq.h> 51#include <asm/mach/irq.h>
51 52
52#include <plat/cpu.h> 53#include <mach/tc.h>
53#include <plat/clock.h>
54#include <plat/sram.h>
55#include <plat/tc.h>
56#include <mach/mux.h> 54#include <mach/mux.h>
57#include <plat/dma.h> 55#include <plat-omap/dma-omap.h>
58#include <plat/dmtimer.h> 56#include <plat/dmtimer.h>
59 57
60#include <mach/irqs.h> 58#include <mach/irqs.h>
61 59
62#include "iomap.h" 60#include "iomap.h"
61#include "clock.h"
63#include "pm.h" 62#include "pm.h"
63#include "sram.h"
64 64
65static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; 65static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
66static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; 66static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 7868e75ad077..3f2d39672393 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -19,8 +19,7 @@
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/err.h> 20#include <linux/err.h>
21 21
22#include <plat/omap_device.h> 22#include "soc.h"
23#include <plat/omap-pm.h>
24 23
25#ifdef CONFIG_PM_RUNTIME 24#ifdef CONFIG_PM_RUNTIME
26static int omap1_pm_runtime_suspend(struct device *dev) 25static int omap1_pm_runtime_suspend(struct device *dev)
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index b9d6834af835..d1ac08016f0b 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -23,7 +23,6 @@
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/mux.h> 25#include <mach/mux.h>
26#include <plat/fpga.h>
27 26
28#include "pm.h" 27#include "pm.h"
29 28
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0e628743bd03..a908c51839a4 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,6 +36,8 @@
36 36
37#include <asm/assembler.h> 37#include <asm/assembler.h>
38 38
39#include <mach/hardware.h>
40
39#include "iomap.h" 41#include "iomap.h"
40#include "pm.h" 42#include "pm.h"
41 43
diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h
new file mode 100644
index 000000000000..69daf0187b1d
--- /dev/null
+++ b/arch/arm/mach-omap1/soc.h
@@ -0,0 +1,4 @@
1/*
2 * We can move mach/soc.h here once the drivers are fixed
3 */
4#include <mach/soc.h>
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 000000000000..6431b0f862ce
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
1/*
2 * OMAP SRAM detection and management
3 *
4 * Copyright (C) 2005 Nokia Corporation
5 * Written by Tony Lindgren <tony@atomide.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/io.h>
16
17#include <asm/fncpy.h>
18#include <asm/tlb.h>
19#include <asm/cacheflush.h>
20
21#include <asm/mach/map.h>
22
23#include "soc.h"
24#include "sram.h"
25
26#define OMAP1_SRAM_PA 0x20000000
27#define SRAM_BOOTLOADER_SZ 0x80
28
29/*
30 * The amount of SRAM depends on the core type.
31 * Note that we cannot try to test for SRAM here because writes
32 * to secure SRAM will hang the system. Also the SRAM is not
33 * yet mapped at this point.
34 */
35static void __init omap_detect_and_map_sram(void)
36{
37 unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
38 unsigned long omap_sram_start = OMAP1_SRAM_PA;
39 unsigned long omap_sram_size;
40
41 if (cpu_is_omap7xx())
42 omap_sram_size = 0x32000; /* 200K */
43 else if (cpu_is_omap15xx())
44 omap_sram_size = 0x30000; /* 192K */
45 else if (cpu_is_omap1610() || cpu_is_omap1611() ||
46 cpu_is_omap1621() || cpu_is_omap1710())
47 omap_sram_size = 0x4000; /* 16K */
48 else {
49 pr_err("Could not detect SRAM size\n");
50 omap_sram_size = 0x4000;
51 }
52
53 omap_map_sram(omap_sram_start, omap_sram_size,
54 omap_sram_skip, 1);
55}
56
57static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
58
59void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
60{
61 BUG_ON(!_omap_sram_reprogram_clock);
62 /* On 730, bit 13 must always be 1 */
63 if (cpu_is_omap7xx())
64 ckctl |= 0x2000;
65 _omap_sram_reprogram_clock(dpllctl, ckctl);
66}
67
68int __init omap_sram_init(void)
69{
70 omap_detect_and_map_sram();
71 _omap_sram_reprogram_clock =
72 omap_sram_push(omap1_sram_reprogram_clock,
73 omap1_sram_reprogram_clock_sz);
74
75 return 0;
76}
diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h
new file mode 100644
index 000000000000..d5a6c8362301
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.h
@@ -0,0 +1,7 @@
1#include <plat/sram.h>
2
3extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
4
5/* Do not use these */
6extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
7extern unsigned long omap1_sram_reprogram_clock_sz;
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 74529549130c..89368195bf08 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -50,6 +50,7 @@
50#include <asm/mach/irq.h> 50#include <asm/mach/irq.h>
51#include <asm/mach/time.h> 51#include <asm/mach/time.h>
52 52
53#include <plat/counter-32k.h>
53#include <plat/dmtimer.h> 54#include <plat/dmtimer.h>
54 55
55#include <mach/hardware.h> 56#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 84267edd9421..104fed366b8f 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -301,7 +301,7 @@ static inline void otg_device_init(struct omap_usb_config *pdata)
301 301
302#endif 302#endif
303 303
304u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) 304static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
305{ 305{
306 u32 syscon1 = 0; 306 u32 syscon1 = 0;
307 307
@@ -409,7 +409,7 @@ u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
409 return syscon1 << 16; 409 return syscon1 << 16;
410} 410}
411 411
412u32 __init omap1_usb1_init(unsigned nwires) 412static u32 __init omap1_usb1_init(unsigned nwires)
413{ 413{
414 u32 syscon1 = 0; 414 u32 syscon1 = 0;
415 415
@@ -475,7 +475,7 @@ bad:
475 return syscon1 << 20; 475 return syscon1 << 20;
476} 476}
477 477
478u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) 478static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
479{ 479{
480 u32 syscon1 = 0; 480 u32 syscon1 = 0;
481 481
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e488c9..b118ed5f61a9 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,8 @@
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o 7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
8 omap_device.o sram.o
8 9
9# INTCPS IP block support - XXX should be moved to drivers/ 10# INTCPS IP block support - XXX should be moved to drivers/
10obj-$(CONFIG_ARCH_OMAP2) += irq.o 11obj-$(CONFIG_ARCH_OMAP2) += irq.o
@@ -69,6 +70,7 @@ obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o
69obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o 70obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o
70obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o sleep44xx.o 71obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o sleep44xx.o
71obj-$(CONFIG_PM_DEBUG) += pm-debug.o 72obj-$(CONFIG_PM_DEBUG) += pm-debug.o
73obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
72 74
73obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o 75obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o
74obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o 76obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index d0c54c573d34..af11dcdb7e2c 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -18,7 +18,7 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/davinci_emac.h> 19#include <linux/davinci_emac.h>
20#include <asm/system.h> 20#include <asm/system.h>
21#include <plat/omap_device.h> 21#include "omap_device.h"
22#include "am35xx.h" 22#include "am35xx.h"
23#include "control.h" 23#include "control.h"
24#include "am35xx-emac.h" 24#include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 95b384d54f8a..d1c01625fe5a 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -28,14 +28,12 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30 30
31#include <mach/hardware.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35 34
36#include "common.h" 35#include "common.h"
37#include <plat/gpmc.h> 36#include "gpmc.h"
38#include <plat/usb.h>
39#include "gpmc-smc91x.h" 37#include "gpmc-smc91x.h"
40 38
41#include <video/omapdss.h> 39#include <video/omapdss.h>
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 96cd3693e1ae..79fd9048fd79 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -30,15 +30,15 @@
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 31#include <asm/mach/map.h>
32 32
33#include <plat/usb.h>
34#include "common.h" 33#include "common.h"
35#include <plat/dma.h> 34#include <plat-omap/dma-omap.h>
36#include <plat/gpmc.h>
37#include <video/omapdss.h> 35#include <video/omapdss.h>
38#include <video/omap-panel-tfp410.h> 36#include <video/omap-panel-tfp410.h>
39 37
38#include "gpmc.h"
40#include "gpmc-smc91x.h" 39#include "gpmc-smc91x.h"
41 40
41#include "soc.h"
42#include "board-flash.h" 42#include "board-flash.h"
43#include "mux.h" 43#include "mux.h"
44#include "sdram-qimonda-hyb18m512160af-6.h" 44#include "sdram-qimonda-hyb18m512160af-6.h"
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index fc224ad86747..81871b1c735c 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -18,9 +18,8 @@
18 18
19#include "common.h" 19#include "common.h"
20#include "gpmc-smc91x.h" 20#include "gpmc-smc91x.h"
21#include <plat/usb.h>
22 21
23#include <mach/board-zoom.h> 22#include "board-zoom.h"
24 23
25#include "board-flash.h" 24#include "board-flash.h"
26#include "mux.h" 25#include "mux.h"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 3669c120c7e8..fd80d976872d 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,6 +27,7 @@
27#include <linux/leds.h> 27#include <linux/leds.h>
28#include <linux/leds_pwm.h> 28#include <linux/leds_pwm.h>
29#include <linux/platform_data/omap4-keypad.h> 29#include <linux/platform_data/omap4-keypad.h>
30#include <linux/usb/musb.h>
30 31
31#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
@@ -34,8 +35,6 @@
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35 36
36#include "common.h" 37#include "common.h"
37#include <plat/usb.h>
38#include <plat/mmc.h>
39#include "omap4-keypad.h" 38#include "omap4-keypad.h"
40#include <video/omapdss.h> 39#include <video/omapdss.h>
41#include <video/omap-panel-nokia-dsi.h> 40#include <video/omap-panel-nokia-dsi.h>
@@ -45,6 +44,7 @@
45 44
46#include "soc.h" 45#include "soc.h"
47#include "mux.h" 46#include "mux.h"
47#include "mmc.h"
48#include "hsmmc.h" 48#include "hsmmc.h"
49#include "control.h" 49#include "control.h"
50#include "common-board-devices.h" 50#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 318feadb1d6e..603503c587b7 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -26,7 +26,6 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include "common.h" 28#include "common.h"
29#include <plat/usb.h>
30 29
31#include "am35xx-emac.h" 30#include "am35xx-emac.h"
32#include "mux.h" 31#include "mux.h"
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index e16289755f2e..96d6c5ab5d4c 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -25,6 +25,7 @@
25#include <linux/can/platform/ti_hecc.h> 25#include <linux/can/platform/ti_hecc.h>
26#include <linux/davinci_emac.h> 26#include <linux/davinci_emac.h>
27#include <linux/mmc/host.h> 27#include <linux/mmc/host.h>
28#include <linux/usb/musb.h>
28#include <linux/platform_data/gpio-omap.h> 29#include <linux/platform_data/gpio-omap.h>
29 30
30#include "am35xx.h" 31#include "am35xx.h"
@@ -33,7 +34,6 @@
33#include <asm/mach/map.h> 34#include <asm/mach/map.h>
34 35
35#include "common.h" 36#include "common.h"
36#include <plat/usb.h>
37#include <video/omapdss.h> 37#include <video/omapdss.h>
38#include <video/omap-panel-generic-dpi.h> 38#include <video/omap-panel-generic-dpi.h>
39#include <video/omap-panel-tfp410.h> 39#include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index cea3abace815..64cf1bde0f3b 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -28,14 +28,14 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/smc91x.h> 29#include <linux/smc91x.h>
30#include <linux/gpio.h> 30#include <linux/gpio.h>
31#include <linux/platform_data/leds-omap.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/flash.h> 35#include <asm/mach/flash.h>
35 36
36#include <plat/led.h>
37#include "common.h" 37#include "common.h"
38#include <plat/gpmc.h> 38#include "gpmc.h"
39 39
40#include <video/omapdss.h> 40#include <video/omapdss.h>
41#include <video/omap-panel-generic-dpi.h> 41#include <video/omap-panel-generic-dpi.h>
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26eb601c..a8cad2237a2a 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -38,21 +38,19 @@
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40 40
41#include "common.h"
42#include <linux/platform_data/mtd-nand-omap2.h> 41#include <linux/platform_data/mtd-nand-omap2.h>
43#include <plat/gpmc.h>
44#include <plat/usb.h>
45#include <video/omapdss.h> 42#include <video/omapdss.h>
46#include <video/omap-panel-generic-dpi.h> 43#include <video/omap-panel-generic-dpi.h>
47#include <video/omap-panel-tfp410.h> 44#include <video/omap-panel-tfp410.h>
48#include <linux/platform_data/spi-omap2-mcspi.h> 45#include <linux/platform_data/spi-omap2-mcspi.h>
49 46
50#include <mach/hardware.h> 47#include "common.h"
51
52#include "mux.h" 48#include "mux.h"
53#include "sdram-micron-mt46h32m32lf-6.h" 49#include "sdram-micron-mt46h32m32lf-6.h"
54#include "hsmmc.h" 50#include "hsmmc.h"
55#include "common-board-devices.h" 51#include "common-board-devices.h"
52#include "gpmc.h"
53#include "gpmc-nand.h"
56 54
57#define CM_T35_GPIO_PENDOWN 57 55#define CM_T35_GPIO_PENDOWN 57
58#define SB_T35_USB_HUB_RESET_GPIO 167 56#define SB_T35_USB_HUB_RESET_GPIO 167
@@ -181,7 +179,7 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
181 179
182static void __init cm_t35_init_nand(void) 180static void __init cm_t35_init_nand(void)
183{ 181{
184 if (gpmc_nand_init(&cm_t35_nand_data) < 0) 182 if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
185 pr_err("CM-T35: Unable to register NAND device\n"); 183 pr_err("CM-T35: Unable to register NAND device\n");
186} 184}
187#else 185#else
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45f75b0..278664731d2c 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -39,9 +39,8 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40 40
41#include "common.h" 41#include "common.h"
42#include <plat/usb.h>
43#include <linux/platform_data/mtd-nand-omap2.h> 42#include <linux/platform_data/mtd-nand-omap2.h>
44#include <plat/gpmc.h> 43#include "gpmc.h"
45 44
46#include "am35xx.h" 45#include "am35xx.h"
47 46
@@ -49,6 +48,7 @@
49#include "control.h" 48#include "control.h"
50#include "common-board-devices.h" 49#include "common-board-devices.h"
51#include "am35xx-emac.h" 50#include "am35xx-emac.h"
51#include "gpmc-nand.h"
52 52
53#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 53#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
54static struct gpio_led cm_t3517_leds[] = { 54static struct gpio_led cm_t3517_leds[] = {
@@ -240,7 +240,7 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
240 240
241static void __init cm_t3517_init_nand(void) 241static void __init cm_t3517_init_nand(void)
242{ 242{
243 if (gpmc_nand_init(&cm_t3517_nand_data) < 0) 243 if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
244 pr_err("CM-T3517: NAND initialization failed\n"); 244 pr_err("CM-T3517: NAND initialization failed\n");
245} 245}
246#else 246#else
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 1fd161e934c7..933479e36737 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -39,9 +39,8 @@
39#include <asm/mach/flash.h> 39#include <asm/mach/flash.h>
40 40
41#include "common.h" 41#include "common.h"
42#include <plat/gpmc.h> 42#include "gpmc.h"
43#include <linux/platform_data/mtd-nand-omap2.h> 43#include <linux/platform_data/mtd-nand-omap2.h>
44#include <plat/usb.h>
45#include <video/omapdss.h> 44#include <video/omapdss.h>
46#include <video/omap-panel-generic-dpi.h> 45#include <video/omap-panel-generic-dpi.h>
47#include <video/omap-panel-tfp410.h> 46#include <video/omap-panel-tfp410.h>
@@ -55,8 +54,11 @@
55#include "sdram-micron-mt46h32m32lf-6.h" 54#include "sdram-micron-mt46h32m32lf-6.h"
56#include "mux.h" 55#include "mux.h"
57#include "hsmmc.h" 56#include "hsmmc.h"
57#include "board-flash.h"
58#include "common-board-devices.h" 58#include "common-board-devices.h"
59 59
60#define NAND_CS 0
61
60#define OMAP_DM9000_GPIO_IRQ 25 62#define OMAP_DM9000_GPIO_IRQ 25
61#define OMAP3_DEVKIT_TS_GPIO 27 63#define OMAP3_DEVKIT_TS_GPIO 27
62 64
@@ -621,8 +623,9 @@ static void __init devkit8000_init(void)
621 623
622 usb_musb_init(NULL); 624 usb_musb_init(NULL);
623 usbhs_init(&usbhs_bdata); 625 usbhs_init(&usbhs_bdata);
624 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions, 626 board_nand_init(devkit8000_nand_partitions,
625 ARRAY_SIZE(devkit8000_nand_partitions)); 627 ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
628 NAND_BUSWIDTH_16, NULL);
626 omap_twl4030_audio_init("omap3beagle"); 629 omap_twl4030_audio_init("omap3beagle");
627 630
628 /* Ensure SDRC pins are mux'd for self-refresh */ 631 /* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e642acf9cad0..c33adea0247c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -17,14 +17,14 @@
17#include <linux/mtd/physmap.h> 17#include <linux/mtd/physmap.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/cpu.h>
21#include <plat/gpmc.h>
22#include <linux/platform_data/mtd-nand-omap2.h> 20#include <linux/platform_data/mtd-nand-omap2.h>
23#include <linux/platform_data/mtd-onenand-omap2.h> 21#include <linux/platform_data/mtd-onenand-omap2.h>
24#include <plat/tc.h>
25 22
23#include "soc.h"
26#include "common.h" 24#include "common.h"
27#include "board-flash.h" 25#include "board-flash.h"
26#include "gpmc-onenand.h"
27#include "gpmc-nand.h"
28 28
29#define REG_FPGA_REV 0x10 29#define REG_FPGA_REV 0x10
30#define REG_FPGA_DIP_SWITCH_INPUT2 0x60 30#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
@@ -104,36 +104,35 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
104 defined(CONFIG_MTD_NAND_OMAP2_MODULE) 104 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
105 105
106/* Note that all values in this struct are in nanoseconds */ 106/* Note that all values in this struct are in nanoseconds */
107static struct gpmc_timings nand_timings = { 107struct gpmc_timings nand_default_timings[1] = {
108 {
109 .sync_clk = 0,
108 110
109 .sync_clk = 0, 111 .cs_on = 0,
112 .cs_rd_off = 36,
113 .cs_wr_off = 36,
110 114
111 .cs_on = 0, 115 .adv_on = 6,
112 .cs_rd_off = 36, 116 .adv_rd_off = 24,
113 .cs_wr_off = 36, 117 .adv_wr_off = 36,
114 118
115 .adv_on = 6, 119 .we_off = 30,
116 .adv_rd_off = 24, 120 .oe_off = 48,
117 .adv_wr_off = 36,
118 121
119 .we_off = 30, 122 .access = 54,
120 .oe_off = 48, 123 .rd_cycle = 72,
124 .wr_cycle = 72,
121 125
122 .access = 54, 126 .wr_access = 30,
123 .rd_cycle = 72, 127 .wr_data_mux_bus = 0,
124 .wr_cycle = 72, 128 },
125
126 .wr_access = 30,
127 .wr_data_mux_bus = 0,
128}; 129};
129 130
130static struct omap_nand_platform_data board_nand_data = { 131static struct omap_nand_platform_data board_nand_data;
131 .gpmc_t = &nand_timings,
132};
133 132
134void 133void
135__init board_nand_init(struct mtd_partition *nand_parts, 134__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
136 u8 nr_parts, u8 cs, int nand_type) 135 int nand_type, struct gpmc_timings *gpmc_t)
137{ 136{
138 board_nand_data.cs = cs; 137 board_nand_data.cs = cs;
139 board_nand_data.parts = nand_parts; 138 board_nand_data.parts = nand_parts;
@@ -141,7 +140,7 @@ __init board_nand_init(struct mtd_partition *nand_parts,
141 board_nand_data.devsize = nand_type; 140 board_nand_data.devsize = nand_type;
142 141
143 board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT; 142 board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
144 gpmc_nand_init(&board_nand_data); 143 gpmc_nand_init(&board_nand_data, gpmc_t);
145} 144}
146#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 145#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
147 146
@@ -238,5 +237,6 @@ void __init board_flash_init(struct flash_partitions partition_info[],
238 pr_err("NAND: Unable to find configuration in GPMC\n"); 237 pr_err("NAND: Unable to find configuration in GPMC\n");
239 else 238 else
240 board_nand_init(partition_info[2].parts, 239 board_nand_init(partition_info[2].parts,
241 partition_info[2].nr_parts, nandcs, nand_type); 240 partition_info[2].nr_parts, nandcs,
241 nand_type, nand_default_timings);
242} 242}
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index c44b70d52021..2fb5d41a9fae 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -12,7 +12,7 @@
12 */ 12 */
13#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
15#include <plat/gpmc.h> 15#include "gpmc.h"
16 16
17#define PDC_NOR 1 17#define PDC_NOR 1
18#define PDC_NAND 2 18#define PDC_NAND 2
@@ -40,12 +40,14 @@ static inline void board_flash_init(struct flash_partitions part[],
40#if defined(CONFIG_MTD_NAND_OMAP2) || \ 40#if defined(CONFIG_MTD_NAND_OMAP2) || \
41 defined(CONFIG_MTD_NAND_OMAP2_MODULE) 41 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
42extern void board_nand_init(struct mtd_partition *nand_parts, 42extern void board_nand_init(struct mtd_partition *nand_parts,
43 u8 nr_parts, u8 cs, int nand_type); 43 u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t);
44extern struct gpmc_timings nand_default_timings[];
44#else 45#else
45static inline void board_nand_init(struct mtd_partition *nand_parts, 46static inline void board_nand_init(struct mtd_partition *nand_parts,
46 u8 nr_parts, u8 cs, int nand_type) 47 u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t)
47{ 48{
48} 49}
50#define nand_default_timings NULL
49#endif 51#endif
50 52
51#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ 53#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8d04bf851af4..8668c72ee810 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -26,15 +26,14 @@
26#include <linux/clk.h> 26#include <linux/clk.h>
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/input/matrix_keypad.h> 28#include <linux/input/matrix_keypad.h>
29#include <linux/mfd/menelaus.h>
29 30
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 33#include <asm/mach/map.h>
33 34
34#include <plat/menelaus.h> 35#include <plat-omap/dma-omap.h>
35#include <plat/dma.h> 36#include <plat/debug-devices.h>
36#include <plat/gpmc.h>
37#include "debug-devices.h"
38 37
39#include <video/omapdss.h> 38#include <video/omapdss.h>
40#include <video/omap-panel-generic-dpi.h> 39#include <video/omap-panel-generic-dpi.h>
@@ -42,6 +41,7 @@
42#include "common.h" 41#include "common.h"
43#include "mux.h" 42#include "mux.h"
44#include "control.h" 43#include "control.h"
44#include "gpmc.h"
45 45
46#define H4_FLASH_CS 0 46#define H4_FLASH_CS 0
47#define H4_SMC91X_CS 1 47#define H4_SMC91X_CS 1
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..dbc705ac4334 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -29,20 +29,19 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
32#include "common.h"
33#include <plat/gpmc.h>
34#include <plat/usb.h>
35
36#include <video/omapdss.h> 32#include <video/omapdss.h>
37#include <video/omap-panel-tfp410.h> 33#include <video/omap-panel-tfp410.h>
38#include <linux/platform_data/mtd-onenand-omap2.h> 34#include <linux/platform_data/mtd-onenand-omap2.h>
39 35
36#include "common.h"
37#include "gpmc.h"
40#include "mux.h" 38#include "mux.h"
41#include "hsmmc.h" 39#include "hsmmc.h"
42#include "sdram-numonyx-m65kxxxxam.h" 40#include "sdram-numonyx-m65kxxxxam.h"
43#include "common-board-devices.h" 41#include "common-board-devices.h"
44#include "board-flash.h" 42#include "board-flash.h"
45#include "control.h" 43#include "control.h"
44#include "gpmc-onenand.h"
46 45
47#define IGEP2_SMSC911X_CS 5 46#define IGEP2_SMSC911X_CS 5
48#define IGEP2_SMSC911X_GPIO 176 47#define IGEP2_SMSC911X_GPIO 176
@@ -175,7 +174,7 @@ static void __init igep_flash_init(void)
175 pr_info("IGEP: initializing NAND memory device\n"); 174 pr_info("IGEP: initializing NAND memory device\n");
176 board_nand_init(igep_flash_partitions, 175 board_nand_init(igep_flash_partitions,
177 ARRAY_SIZE(igep_flash_partitions), 176 ARRAY_SIZE(igep_flash_partitions),
178 0, NAND_BUSWIDTH_16); 177 0, NAND_BUSWIDTH_16, nand_default_timings);
179 } else if (mux == IGEP_SYSBOOT_ONENAND) { 178 } else if (mux == IGEP_SYSBOOT_ONENAND) {
180 pr_info("IGEP: initializing OneNAND memory device\n"); 179 pr_info("IGEP: initializing OneNAND memory device\n");
181 board_onenand_init(igep_flash_partitions, 180 board_onenand_init(igep_flash_partitions,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ee8c3cfb95b3..1164b1061038 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -35,9 +35,8 @@
35#include <asm/mach/map.h> 35#include <asm/mach/map.h>
36 36
37#include "common.h" 37#include "common.h"
38#include <plat/gpmc.h> 38#include "board-zoom.h"
39#include <mach/board-zoom.h> 39#include "gpmc.h"
40#include <plat/usb.h>
41#include "gpmc-smsc911x.h" 40#include "gpmc-smsc911x.h"
42 41
43#include <video/omapdss.h> 42#include <video/omapdss.h>
@@ -420,8 +419,8 @@ static void __init omap_ldp_init(void)
420 omap_serial_init(); 419 omap_serial_init();
421 omap_sdrc_init(NULL, NULL); 420 omap_sdrc_init(NULL, NULL);
422 usb_musb_init(NULL); 421 usb_musb_init(NULL);
423 board_nand_init(ldp_nand_partitions, 422 board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
424 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); 423 ZOOM_NAND_CS, 0, nand_default_timings);
425 424
426 omap_hsmmc_init(mmc); 425 omap_hsmmc_init(mmc);
427 ldp_display_init(); 426 ldp_display_init();
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index d95f727ca39a..e3efcb88cb3b 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -22,16 +22,17 @@
22#include <linux/usb/musb.h> 22#include <linux/usb/musb.h>
23#include <linux/platform_data/spi-omap2-mcspi.h> 23#include <linux/platform_data/spi-omap2-mcspi.h>
24#include <linux/platform_data/mtd-onenand-omap2.h> 24#include <linux/platform_data/mtd-onenand-omap2.h>
25#include <linux/mfd/menelaus.h>
25#include <sound/tlv320aic3x.h> 26#include <sound/tlv320aic3x.h>
26 27
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29 30
30#include "common.h" 31#include "common.h"
31#include <plat/menelaus.h> 32#include "mmc.h"
32#include <plat/mmc.h>
33 33
34#include "mux.h" 34#include "mux.h"
35#include "gpmc-onenand.h"
35 36
36#define TUSB6010_ASYNC_CS 1 37#define TUSB6010_ASYNC_CS 1
37#define TUSB6010_SYNC_CS 4 38#define TUSB6010_SYNC_CS 4
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index d41ab98890ff..5a3800da903f 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -39,19 +39,22 @@
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41 41
42#include "common.h"
43#include <video/omapdss.h> 42#include <video/omapdss.h>
44#include <video/omap-panel-tfp410.h> 43#include <video/omap-panel-tfp410.h>
45#include <plat/gpmc.h>
46#include <linux/platform_data/mtd-nand-omap2.h> 44#include <linux/platform_data/mtd-nand-omap2.h>
47#include <plat/usb.h>
48#include <plat/omap_device.h>
49 45
46#include "common.h"
47#include "omap_device.h"
48#include "gpmc.h"
49#include "soc.h"
50#include "mux.h" 50#include "mux.h"
51#include "hsmmc.h" 51#include "hsmmc.h"
52#include "pm.h" 52#include "pm.h"
53#include "board-flash.h"
53#include "common-board-devices.h" 54#include "common-board-devices.h"
54 55
56#define NAND_CS 0
57
55/* 58/*
56 * OMAP3 Beagle revision 59 * OMAP3 Beagle revision
57 * Run time detection of Beagle revision is done by reading GPIO. 60 * Run time detection of Beagle revision is done by reading GPIO.
@@ -518,8 +521,9 @@ static void __init omap3_beagle_init(void)
518 521
519 usb_musb_init(NULL); 522 usb_musb_init(NULL);
520 usbhs_init(&usbhs_bdata); 523 usbhs_init(&usbhs_bdata);
521 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, 524 board_nand_init(omap3beagle_nand_partitions,
522 ARRAY_SIZE(omap3beagle_nand_partitions)); 525 ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,
526 NAND_BUSWIDTH_16, NULL);
523 omap_twl4030_audio_init("omap3beagle"); 527 omap_twl4030_audio_init("omap3beagle");
524 528
525 /* Ensure msecure is mux'd to be able to set the RTC. */ 529 /* Ensure msecure is mux'd to be able to set the RTC. */
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b9b776b6c954..3c0b9a90f3b3 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -32,6 +32,7 @@
32#include <linux/spi/ads7846.h> 32#include <linux/spi/ads7846.h>
33#include <linux/i2c/twl.h> 33#include <linux/i2c/twl.h>
34#include <linux/usb/otg.h> 34#include <linux/usb/otg.h>
35#include <linux/usb/musb.h>
35#include <linux/usb/nop-usb-xceiv.h> 36#include <linux/usb/nop-usb-xceiv.h>
36#include <linux/smsc911x.h> 37#include <linux/smsc911x.h>
37 38
@@ -45,17 +46,20 @@
45#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
46#include <asm/mach/map.h> 47#include <asm/mach/map.h>
47 48
48#include <plat/usb.h>
49#include <linux/platform_data/mtd-nand-omap2.h> 49#include <linux/platform_data/mtd-nand-omap2.h>
50#include "common.h" 50#include "common.h"
51#include <linux/platform_data/spi-omap2-mcspi.h> 51#include <linux/platform_data/spi-omap2-mcspi.h>
52#include <video/omapdss.h> 52#include <video/omapdss.h>
53#include <video/omap-panel-tfp410.h> 53#include <video/omap-panel-tfp410.h>
54 54
55#include "soc.h"
55#include "mux.h" 56#include "mux.h"
56#include "sdram-micron-mt46h32m32lf-6.h" 57#include "sdram-micron-mt46h32m32lf-6.h"
57#include "hsmmc.h" 58#include "hsmmc.h"
58#include "common-board-devices.h" 59#include "common-board-devices.h"
60#include "board-flash.h"
61
62#define NAND_CS 0
59 63
60#define OMAP3_EVM_TS_GPIO 175 64#define OMAP3_EVM_TS_GPIO 175
61#define OMAP3_EVM_EHCI_VBUS 22 65#define OMAP3_EVM_EHCI_VBUS 22
@@ -731,8 +735,9 @@ static void __init omap3_evm_init(void)
731 } 735 }
732 usb_musb_init(&musb_board_data); 736 usb_musb_init(&musb_board_data);
733 usbhs_init(&usbhs_bdata); 737 usbhs_init(&usbhs_bdata);
734 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions, 738 board_nand_init(omap3evm_nand_partitions,
735 ARRAY_SIZE(omap3evm_nand_partitions)); 739 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
740 NAND_BUSWIDTH_16, NULL);
736 741
737 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); 742 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
738 omap3evm_init_smsc911x(); 743 omap3evm_init_smsc911x();
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7bd8253b5d1d..e84e2a875378 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -34,16 +34,13 @@
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/map.h> 35#include <asm/mach/map.h>
36 36
37#include "gpmc-smsc911x.h"
38#include <plat/gpmc.h>
39#include <plat/sdrc.h>
40#include <plat/usb.h>
41
42#include "common.h" 37#include "common.h"
43#include "mux.h" 38#include "mux.h"
44#include "hsmmc.h" 39#include "hsmmc.h"
45#include "control.h" 40#include "control.h"
46#include "common-board-devices.h" 41#include "common-board-devices.h"
42#include "gpmc.h"
43#include "gpmc-smsc911x.h"
47 44
48#define OMAP3LOGIC_SMSC911X_CS 1 45#define OMAP3LOGIC_SMSC911X_CS 1
49 46
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4ae6e44..ce31bd329f38 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -42,7 +42,6 @@
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
43 43
44#include "common.h" 44#include "common.h"
45#include <plat/usb.h>
46#include <video/omapdss.h> 45#include <video/omapdss.h>
47#include <linux/platform_data/mtd-nand-omap2.h> 46#include <linux/platform_data/mtd-nand-omap2.h>
48 47
@@ -50,6 +49,7 @@
50#include "sdram-micron-mt46h32m32lf-6.h" 49#include "sdram-micron-mt46h32m32lf-6.h"
51#include "hsmmc.h" 50#include "hsmmc.h"
52#include "common-board-devices.h" 51#include "common-board-devices.h"
52#include "gpmc-nand.h"
53 53
54#define PANDORA_WIFI_IRQ_GPIO 21 54#define PANDORA_WIFI_IRQ_GPIO 21
55#define PANDORA_WIFI_NRESET_GPIO 23 55#define PANDORA_WIFI_NRESET_GPIO 23
@@ -602,7 +602,7 @@ static void __init omap3pandora_init(void)
602 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); 602 omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
603 usbhs_init(&usbhs_bdata); 603 usbhs_init(&usbhs_bdata);
604 usb_musb_init(NULL); 604 usb_musb_init(NULL);
605 gpmc_nand_init(&pandora_nand_data); 605 gpmc_nand_init(&pandora_nand_data, NULL);
606 606
607 /* Ensure SDRC pins are mux'd for self-refresh */ 607 /* Ensure SDRC pins are mux'd for self-refresh */
608 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 608 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 731235eb319e..ba1124538b9c 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -40,9 +40,8 @@
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41 41
42#include "common.h" 42#include "common.h"
43#include <plat/gpmc.h> 43#include "gpmc.h"
44#include <linux/platform_data/mtd-nand-omap2.h> 44#include <linux/platform_data/mtd-nand-omap2.h>
45#include <plat/usb.h>
46#include <video/omapdss.h> 45#include <video/omapdss.h>
47#include <video/omap-panel-generic-dpi.h> 46#include <video/omap-panel-generic-dpi.h>
48#include <video/omap-panel-tfp410.h> 47#include <video/omap-panel-tfp410.h>
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 944ffc436577..a225d819633f 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,12 +44,12 @@
44#include <asm/system_info.h> 44#include <asm/system_info.h>
45 45
46#include "common.h" 46#include "common.h"
47#include <plat/gpmc.h> 47#include "gpmc.h"
48#include <linux/platform_data/mtd-nand-omap2.h> 48#include <linux/platform_data/mtd-nand-omap2.h>
49#include <plat/usb.h>
50 49
51#include "mux.h" 50#include "mux.h"
52#include "hsmmc.h" 51#include "hsmmc.h"
52#include "board-flash.h"
53#include "common-board-devices.h" 53#include "common-board-devices.h"
54 54
55#include <asm/setup.h> 55#include <asm/setup.h>
@@ -59,6 +59,8 @@
59#define TB_BL_PWM_TIMER 9 59#define TB_BL_PWM_TIMER 9
60#define TB_KILL_POWER_GPIO 168 60#define TB_KILL_POWER_GPIO 168
61 61
62#define NAND_CS 0
63
62static unsigned long touchbook_revision; 64static unsigned long touchbook_revision;
63 65
64static struct mtd_partition omap3touchbook_nand_partitions[] = { 66static struct mtd_partition omap3touchbook_nand_partitions[] = {
@@ -365,8 +367,9 @@ static void __init omap3_touchbook_init(void)
365 omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); 367 omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata);
366 usb_musb_init(NULL); 368 usb_musb_init(NULL);
367 usbhs_init(&usbhs_bdata); 369 usbhs_init(&usbhs_bdata);
368 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions, 370 board_nand_init(omap3touchbook_nand_partitions,
369 ARRAY_SIZE(omap3touchbook_nand_partitions)); 371 ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS,
372 NAND_BUSWIDTH_16, NULL);
370 373
371 /* Ensure SDRC pins are mux'd for self-refresh */ 374 /* Ensure SDRC pins are mux'd for self-refresh */
372 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 375 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397e233c..8c00b99cd2a3 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -29,6 +29,7 @@
29#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
30#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
31#include <linux/ti_wilink_st.h> 31#include <linux/ti_wilink_st.h>
32#include <linux/usb/musb.h>
32#include <linux/wl12xx.h> 33#include <linux/wl12xx.h>
33#include <linux/platform_data/omap-abe-twl6040.h> 34#include <linux/platform_data/omap-abe-twl6040.h>
34 35
@@ -38,12 +39,11 @@
38#include <asm/mach/map.h> 39#include <asm/mach/map.h>
39#include <video/omapdss.h> 40#include <video/omapdss.h>
40 41
41#include "common.h"
42#include <plat/usb.h>
43#include <plat/mmc.h>
44#include <video/omap-panel-tfp410.h> 42#include <video/omap-panel-tfp410.h>
45 43
44#include "common.h"
46#include "soc.h" 45#include "soc.h"
46#include "mmc.h"
47#include "hsmmc.h" 47#include "hsmmc.h"
48#include "control.h" 48#include "control.h"
49#include "mux.h" 49#include "mux.h"
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index b700685762b5..1cfb0374f5e2 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -49,14 +49,17 @@
49#include <video/omapdss.h> 49#include <video/omapdss.h>
50#include <video/omap-panel-generic-dpi.h> 50#include <video/omap-panel-generic-dpi.h>
51#include <video/omap-panel-tfp410.h> 51#include <video/omap-panel-tfp410.h>
52#include <plat/gpmc.h>
53#include <plat/usb.h>
54 52
53#include "common.h"
55#include "mux.h" 54#include "mux.h"
56#include "sdram-micron-mt46h32m32lf-6.h" 55#include "sdram-micron-mt46h32m32lf-6.h"
56#include "gpmc.h"
57#include "hsmmc.h" 57#include "hsmmc.h"
58#include "board-flash.h"
58#include "common-board-devices.h" 59#include "common-board-devices.h"
59 60
61#define NAND_CS 0
62
60#define OVERO_GPIO_BT_XGATE 15 63#define OVERO_GPIO_BT_XGATE 15
61#define OVERO_GPIO_W2W_NRESET 16 64#define OVERO_GPIO_W2W_NRESET 16
62#define OVERO_GPIO_PENDOWN 114 65#define OVERO_GPIO_PENDOWN 114
@@ -495,8 +498,8 @@ static void __init overo_init(void)
495 omap_serial_init(); 498 omap_serial_init();
496 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 499 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
497 mt46h32m32lf6_sdrc_params); 500 mt46h32m32lf6_sdrc_params);
498 omap_nand_flash_init(0, overo_nand_partitions, 501 board_nand_init(overo_nand_partitions,
499 ARRAY_SIZE(overo_nand_partitions)); 502 ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);
500 usb_musb_init(NULL); 503 usb_musb_init(NULL);
501 usbhs_init(&usbhs_bdata); 504 usbhs_init(&usbhs_bdata);
502 overo_spi_init(); 505 overo_spi_init();
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 45997bfbcbd2..1997e0e722a1 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -22,17 +22,14 @@
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <plat/i2c.h>
26#include <plat/mmc.h>
27#include <plat/usb.h>
28#include <plat/gpmc.h>
29#include "common.h" 25#include "common.h"
30#include <plat/serial.h>
31
32#include "mux.h" 26#include "mux.h"
27#include "gpmc.h"
28#include "mmc.h"
33#include "hsmmc.h" 29#include "hsmmc.h"
34#include "sdram-nokia.h" 30#include "sdram-nokia.h"
35#include "common-board-devices.h" 31#include "common-board-devices.h"
32#include "gpmc-onenand.h"
36 33
37static struct regulator_consumer_supply rm680_vemmc_consumers[] = { 34static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
38 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), 35 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 020e03c95bfe..07005fe40a2a 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -31,9 +31,7 @@
31#include <asm/system_info.h> 31#include <asm/system_info.h>
32 32
33#include "common.h" 33#include "common.h"
34#include <plat/dma.h> 34#include <plat-omap/dma-omap.h>
35#include <plat/gpmc.h>
36#include <plat/omap-pm.h>
37#include "gpmc-smc91x.h" 35#include "gpmc-smc91x.h"
38 36
39#include "board-rx51.h" 37#include "board-rx51.h"
@@ -52,8 +50,11 @@
52#endif 50#endif
53 51
54#include "mux.h" 52#include "mux.h"
53#include "omap-pm.h"
55#include "hsmmc.h" 54#include "hsmmc.h"
56#include "common-board-devices.h" 55#include "common-board-devices.h"
56#include "gpmc.h"
57#include "gpmc-onenand.h"
57 58
58#define SYSTEM_REV_B_USES_VAUX3 0x1699 59#define SYSTEM_REV_B_USES_VAUX3 0x1699
59#define SYSTEM_REV_S_USES_VAUX3 0x8 60#define SYSTEM_REV_S_USES_VAUX3 0x8
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 7bbb05d9689b..c388aec14799 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -17,18 +17,18 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/leds.h> 19#include <linux/leds.h>
20#include <linux/usb/musb.h>
20#include <linux/platform_data/spi-omap2-mcspi.h> 21#include <linux/platform_data/spi-omap2-mcspi.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25 26
26#include "common.h" 27#include <plat-omap/dma-omap.h>
27#include <plat/dma.h>
28#include <plat/gpmc.h>
29#include <plat/usb.h>
30 28
29#include "common.h"
31#include "mux.h" 30#include "mux.h"
31#include "gpmc.h"
32#include "pm.h" 32#include "pm.h"
33#include "sdram-nokia.h" 33#include "sdram-nokia.h"
34 34
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index c4f8833b4c3c..5e672c2b6a43 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -14,13 +14,14 @@
14 */ 14 */
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/usb/musb.h>
17 19
18#include <asm/mach-types.h> 20#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 22#include <asm/mach/map.h>
21 23
22#include "common.h" 24#include "common.h"
23#include <plat/usb.h>
24 25
25static struct omap_musb_board_data musb_board_data = { 26static struct omap_musb_board_data musb_board_data = {
26 .set_phy_power = ti81xx_musb_phy_power, 27 .set_phy_power = ti81xx_musb_phy_power,
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index afb2278a29f6..42e5f231a799 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -17,10 +17,10 @@
17#include <linux/regulator/fixed.h> 17#include <linux/regulator/fixed.h>
18#include <linux/regulator/machine.h> 18#include <linux/regulator/machine.h>
19 19
20#include <plat/gpmc.h> 20#include "gpmc.h"
21#include "gpmc-smsc911x.h" 21#include "gpmc-smsc911x.h"
22 22
23#include <mach/board-zoom.h> 23#include "board-zoom.h"
24 24
25#include "soc.h" 25#include "soc.h"
26#include "common.h" 26#include "common.h"
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index b940ab2259fb..1c7c834a5b5f 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -16,8 +16,9 @@
16#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
17#include <linux/platform_data/spi-omap2-mcspi.h> 17#include <linux/platform_data/spi-omap2-mcspi.h>
18#include <video/omapdss.h> 18#include <video/omapdss.h>
19#include <mach/board-zoom.h> 19#include "board-zoom.h"
20 20
21#include "soc.h"
21#include "common.h" 22#include "common.h"
22 23
23#define LCD_PANEL_RESET_GPIO_PROD 96 24#define LCD_PANEL_RESET_GPIO_PROD 96
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index c166fe1fdff9..26e07addc9d7 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -26,9 +26,8 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include "common.h" 28#include "common.h"
29#include <plat/usb.h>
30 29
31#include <mach/board-zoom.h> 30#include "board-zoom.h"
32 31
33#include "mux.h" 32#include "mux.h"
34#include "hsmmc.h" 33#include "hsmmc.h"
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4994438e1f46..8feb4d99b96d 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -22,9 +22,8 @@
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23 23
24#include "common.h" 24#include "common.h"
25#include <plat/usb.h>
26 25
27#include <mach/board-zoom.h> 26#include "board-zoom.h"
28 27
29#include "board-flash.h" 28#include "board-flash.h"
30#include "mux.h" 29#include "mux.h"
@@ -113,8 +112,9 @@ static void __init omap_zoom_init(void)
113 usbhs_init(&usbhs_bdata); 112 usbhs_init(&usbhs_bdata);
114 } 113 }
115 114
116 board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions), 115 board_nand_init(zoom_nand_partitions,
117 ZOOM_NAND_CS, NAND_BUSWIDTH_16); 116 ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
117 NAND_BUSWIDTH_16, nand_default_timings);
118 zoom_debugboard_init(); 118 zoom_debugboard_init();
119 zoom_peripherals_init(); 119 zoom_peripherals_init();
120 120
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/board-zoom.h
index 2e9486940ead..2e9486940ead 100644
--- a/arch/arm/mach-omap2/include/mach/board-zoom.h
+++ b/arch/arm/mach-omap2/board-zoom.h
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index c2d15212d64d..73a1414b89b0 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -21,7 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25#include <plat/prcm.h> 24#include <plat/prcm.h>
26 25
27#include "clock.h" 26#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 1502a7bc20bb..0890ba94a282 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -14,8 +14,6 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#include <plat/clock.h>
18
19#include "clock.h" 17#include "clock.h"
20#include "cm2xxx_3xxx.h" 18#include "cm2xxx_3xxx.h"
21#include "cm-regbits-24xx.h" 19#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 4ae439222085..0d2f14c2dcce 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,15 +25,13 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27 27
28#include <plat/clock.h>
29#include <plat/sram.h>
30#include <plat/sdrc.h>
31
32#include "clock.h" 28#include "clock.h"
33#include "clock2xxx.h" 29#include "clock2xxx.h"
34#include "opp2xxx.h" 30#include "opp2xxx.h"
35#include "cm2xxx_3xxx.h" 31#include "cm2xxx_3xxx.h"
36#include "cm-regbits-24xx.h" 32#include "cm-regbits-24xx.h"
33#include "sdrc.h"
34#include "sram.h"
37 35
38/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ 36/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */
39 37
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index c3460928b5e0..e1777371bb5e 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -23,8 +23,6 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/clock.h>
27
28#include "clock.h" 26#include "clock.h"
29#include "clock2xxx.h" 27#include "clock2xxx.h"
30#include "prm2xxx_3xxx.h" 28#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 8693cfdac49a..46683b3c2461 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "clock.h" 25#include "clock.h"
28#include "clock2xxx.h" 26#include "clock2xxx.h"
29#include "prm2xxx_3xxx.h" 27#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3524f0e7b6d5..a38ebb209721 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,16 +33,14 @@
33#include <linux/cpufreq.h> 33#include <linux/cpufreq.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35 35
36#include <plat/clock.h>
37#include <plat/sram.h>
38#include <plat/sdrc.h>
39
40#include "soc.h" 36#include "soc.h"
41#include "clock.h" 37#include "clock.h"
42#include "clock2xxx.h" 38#include "clock2xxx.h"
43#include "opp2xxx.h" 39#include "opp2xxx.h"
44#include "cm2xxx_3xxx.h" 40#include "cm2xxx_3xxx.h"
45#include "cm-regbits-24xx.h" 41#include "cm-regbits-24xx.h"
42#include "sdrc.h"
43#include "sram.h"
46 44
47const struct prcm_config *curr_prcm_set; 45const struct prcm_config *curr_prcm_set;
48const struct prcm_config *rate_table; 46const struct prcm_config *rate_table;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 7c6da2f731dc..6cf298e262f6 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,14 +21,11 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25#include <plat/sram.h>
26#include <plat/sdrc.h>
27
28#include "clock.h" 24#include "clock.h"
29#include "clock3xxx.h" 25#include "clock3xxx.h"
30#include "clock34xx.h" 26#include "clock34xx.h"
31#include "sdrc.h" 27#include "sdrc.h"
28#include "sram.h"
32 29
33#define CYCLES_PER_MHZ 1000000 30#define CYCLES_PER_MHZ 1000000
34 31
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 3ff22114d702..53646facda45 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -45,8 +45,6 @@
45#include <linux/io.h> 45#include <linux/io.h>
46#include <linux/bug.h> 46#include <linux/bug.h>
47 47
48#include <plat/clock.h>
49
50#include "clock.h" 48#include "clock.h"
51 49
52/* Private functions */ 50/* Private functions */
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 80411142f482..8463cc356245 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -21,8 +21,6 @@
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "clock.h" 25#include "clock.h"
28#include "cm-regbits-24xx.h" 26#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba2542f..7c8d41e49834 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -14,7 +14,6 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#include <plat/clock.h>
18#include <plat/prcm.h> 17#include <plat/prcm.h>
19 18
20#include "clock.h" 19#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 961ac8f7e13d..8b30759f8f9e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -15,6 +15,7 @@
15#undef DEBUG 15#undef DEBUG
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/export.h>
18#include <linux/list.h> 19#include <linux/list.h>
19#include <linux/errno.h> 20#include <linux/errno.h>
20#include <linux/err.h> 21#include <linux/err.h>
@@ -25,7 +26,6 @@
25 26
26#include <asm/cpu.h> 27#include <asm/cpu.h>
27 28
28#include <plat/clock.h>
29#include <plat/prcm.h> 29#include <plat/prcm.h>
30 30
31#include <trace/events/power.h> 31#include <trace/events/power.h>
@@ -47,6 +47,10 @@ u16 cpu_mask;
47 */ 47 */
48static bool clkdm_control = true; 48static bool clkdm_control = true;
49 49
50static LIST_HEAD(clocks);
51static DEFINE_MUTEX(clocks_mutex);
52static DEFINE_SPINLOCK(clockfw_lock);
53
50/* 54/*
51 * OMAP2+ specific clock functions 55 * OMAP2+ specific clock functions
52 */ 56 */
@@ -512,12 +516,510 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
512 516
513/* Common data */ 517/* Common data */
514 518
515struct clk_functions omap2_clk_functions = { 519int clk_enable(struct clk *clk)
516 .clk_enable = omap2_clk_enable, 520{
517 .clk_disable = omap2_clk_disable, 521 unsigned long flags;
518 .clk_round_rate = omap2_clk_round_rate, 522 int ret;
519 .clk_set_rate = omap2_clk_set_rate, 523
520 .clk_set_parent = omap2_clk_set_parent, 524 if (clk == NULL || IS_ERR(clk))
521 .clk_disable_unused = omap2_clk_disable_unused, 525 return -EINVAL;
526
527 spin_lock_irqsave(&clockfw_lock, flags);
528 ret = omap2_clk_enable(clk);
529 spin_unlock_irqrestore(&clockfw_lock, flags);
530
531 return ret;
532}
533EXPORT_SYMBOL(clk_enable);
534
535void clk_disable(struct clk *clk)
536{
537 unsigned long flags;
538
539 if (clk == NULL || IS_ERR(clk))
540 return;
541
542 spin_lock_irqsave(&clockfw_lock, flags);
543 if (clk->usecount == 0) {
544 pr_err("Trying disable clock %s with 0 usecount\n",
545 clk->name);
546 WARN_ON(1);
547 goto out;
548 }
549
550 omap2_clk_disable(clk);
551
552out:
553 spin_unlock_irqrestore(&clockfw_lock, flags);
554}
555EXPORT_SYMBOL(clk_disable);
556
557unsigned long clk_get_rate(struct clk *clk)
558{
559 unsigned long flags;
560 unsigned long ret;
561
562 if (clk == NULL || IS_ERR(clk))
563 return 0;
564
565 spin_lock_irqsave(&clockfw_lock, flags);
566 ret = clk->rate;
567 spin_unlock_irqrestore(&clockfw_lock, flags);
568
569 return ret;
570}
571EXPORT_SYMBOL(clk_get_rate);
572
573/*
574 * Optional clock functions defined in include/linux/clk.h
575 */
576
577long clk_round_rate(struct clk *clk, unsigned long rate)
578{
579 unsigned long flags;
580 long ret;
581
582 if (clk == NULL || IS_ERR(clk))
583 return 0;
584
585 spin_lock_irqsave(&clockfw_lock, flags);
586 ret = omap2_clk_round_rate(clk, rate);
587 spin_unlock_irqrestore(&clockfw_lock, flags);
588
589 return ret;
590}
591EXPORT_SYMBOL(clk_round_rate);
592
593int clk_set_rate(struct clk *clk, unsigned long rate)
594{
595 unsigned long flags;
596 int ret = -EINVAL;
597
598 if (clk == NULL || IS_ERR(clk))
599 return ret;
600
601 spin_lock_irqsave(&clockfw_lock, flags);
602 ret = omap2_clk_set_rate(clk, rate);
603 if (ret == 0)
604 propagate_rate(clk);
605 spin_unlock_irqrestore(&clockfw_lock, flags);
606
607 return ret;
608}
609EXPORT_SYMBOL(clk_set_rate);
610
611int clk_set_parent(struct clk *clk, struct clk *parent)
612{
613 unsigned long flags;
614 int ret = -EINVAL;
615
616 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
617 return ret;
618
619 spin_lock_irqsave(&clockfw_lock, flags);
620 if (clk->usecount == 0) {
621 ret = omap2_clk_set_parent(clk, parent);
622 if (ret == 0)
623 propagate_rate(clk);
624 } else {
625 ret = -EBUSY;
626 }
627 spin_unlock_irqrestore(&clockfw_lock, flags);
628
629 return ret;
630}
631EXPORT_SYMBOL(clk_set_parent);
632
633struct clk *clk_get_parent(struct clk *clk)
634{
635 return clk->parent;
636}
637EXPORT_SYMBOL(clk_get_parent);
638
639/*
640 * OMAP specific clock functions shared between omap1 and omap2
641 */
642
643int __initdata mpurate;
644
645/*
646 * By default we use the rate set by the bootloader.
647 * You can override this with mpurate= cmdline option.
648 */
649static int __init omap_clk_setup(char *str)
650{
651 get_option(&str, &mpurate);
652
653 if (!mpurate)
654 return 1;
655
656 if (mpurate < 1000)
657 mpurate *= 1000000;
658
659 return 1;
660}
661__setup("mpurate=", omap_clk_setup);
662
663/* Used for clocks that always have same value as the parent clock */
664unsigned long followparent_recalc(struct clk *clk)
665{
666 return clk->parent->rate;
667}
668
669/*
670 * Used for clocks that have the same value as the parent clock,
671 * divided by some factor
672 */
673unsigned long omap_fixed_divisor_recalc(struct clk *clk)
674{
675 WARN_ON(!clk->fixed_div);
676
677 return clk->parent->rate / clk->fixed_div;
678}
679
680void clk_reparent(struct clk *child, struct clk *parent)
681{
682 list_del_init(&child->sibling);
683 if (parent)
684 list_add(&child->sibling, &parent->children);
685 child->parent = parent;
686
687 /* now do the debugfs renaming to reattach the child
688 to the proper parent */
689}
690
691/* Propagate rate to children */
692void propagate_rate(struct clk *tclk)
693{
694 struct clk *clkp;
695
696 list_for_each_entry(clkp, &tclk->children, sibling) {
697 if (clkp->recalc)
698 clkp->rate = clkp->recalc(clkp);
699 propagate_rate(clkp);
700 }
701}
702
703static LIST_HEAD(root_clks);
704
705/**
706 * recalculate_root_clocks - recalculate and propagate all root clocks
707 *
708 * Recalculates all root clocks (clocks with no parent), which if the
709 * clock's .recalc is set correctly, should also propagate their rates.
710 * Called at init.
711 */
712void recalculate_root_clocks(void)
713{
714 struct clk *clkp;
715
716 list_for_each_entry(clkp, &root_clks, sibling) {
717 if (clkp->recalc)
718 clkp->rate = clkp->recalc(clkp);
719 propagate_rate(clkp);
720 }
721}
722
723/**
724 * clk_preinit - initialize any fields in the struct clk before clk init
725 * @clk: struct clk * to initialize
726 *
727 * Initialize any struct clk fields needed before normal clk initialization
728 * can run. No return value.
729 */
730void clk_preinit(struct clk *clk)
731{
732 INIT_LIST_HEAD(&clk->children);
733}
734
735int clk_register(struct clk *clk)
736{
737 if (clk == NULL || IS_ERR(clk))
738 return -EINVAL;
739
740 /*
741 * trap out already registered clocks
742 */
743 if (clk->node.next || clk->node.prev)
744 return 0;
745
746 mutex_lock(&clocks_mutex);
747 if (clk->parent)
748 list_add(&clk->sibling, &clk->parent->children);
749 else
750 list_add(&clk->sibling, &root_clks);
751
752 list_add(&clk->node, &clocks);
753 if (clk->init)
754 clk->init(clk);
755 mutex_unlock(&clocks_mutex);
756
757 return 0;
758}
759EXPORT_SYMBOL(clk_register);
760
761void clk_unregister(struct clk *clk)
762{
763 if (clk == NULL || IS_ERR(clk))
764 return;
765
766 mutex_lock(&clocks_mutex);
767 list_del(&clk->sibling);
768 list_del(&clk->node);
769 mutex_unlock(&clocks_mutex);
770}
771EXPORT_SYMBOL(clk_unregister);
772
773void clk_enable_init_clocks(void)
774{
775 struct clk *clkp;
776
777 list_for_each_entry(clkp, &clocks, node)
778 if (clkp->flags & ENABLE_ON_INIT)
779 clk_enable(clkp);
780}
781
782/**
783 * omap_clk_get_by_name - locate OMAP struct clk by its name
784 * @name: name of the struct clk to locate
785 *
786 * Locate an OMAP struct clk by its name. Assumes that struct clk
787 * names are unique. Returns NULL if not found or a pointer to the
788 * struct clk if found.
789 */
790struct clk *omap_clk_get_by_name(const char *name)
791{
792 struct clk *c;
793 struct clk *ret = NULL;
794
795 mutex_lock(&clocks_mutex);
796
797 list_for_each_entry(c, &clocks, node) {
798 if (!strcmp(c->name, name)) {
799 ret = c;
800 break;
801 }
802 }
803
804 mutex_unlock(&clocks_mutex);
805
806 return ret;
807}
808
809int omap_clk_enable_autoidle_all(void)
810{
811 struct clk *c;
812 unsigned long flags;
813
814 spin_lock_irqsave(&clockfw_lock, flags);
815
816 list_for_each_entry(c, &clocks, node)
817 if (c->ops->allow_idle)
818 c->ops->allow_idle(c);
819
820 spin_unlock_irqrestore(&clockfw_lock, flags);
821
822 return 0;
823}
824
825int omap_clk_disable_autoidle_all(void)
826{
827 struct clk *c;
828 unsigned long flags;
829
830 spin_lock_irqsave(&clockfw_lock, flags);
831
832 list_for_each_entry(c, &clocks, node)
833 if (c->ops->deny_idle)
834 c->ops->deny_idle(c);
835
836 spin_unlock_irqrestore(&clockfw_lock, flags);
837
838 return 0;
839}
840
841/*
842 * Low level helpers
843 */
844static int clkll_enable_null(struct clk *clk)
845{
846 return 0;
847}
848
849static void clkll_disable_null(struct clk *clk)
850{
851}
852
853const struct clkops clkops_null = {
854 .enable = clkll_enable_null,
855 .disable = clkll_disable_null,
856};
857
858/*
859 * Dummy clock
860 *
861 * Used for clock aliases that are needed on some OMAPs, but not others
862 */
863struct clk dummy_ck = {
864 .name = "dummy",
865 .ops = &clkops_null,
866};
867
868/*
869 *
870 */
871
872#ifdef CONFIG_OMAP_RESET_CLOCKS
873/*
874 * Disable any unused clocks left on by the bootloader
875 */
876static int __init clk_disable_unused(void)
877{
878 struct clk *ck;
879 unsigned long flags;
880
881 pr_info("clock: disabling unused clocks to save power\n");
882
883 spin_lock_irqsave(&clockfw_lock, flags);
884 list_for_each_entry(ck, &clocks, node) {
885 if (ck->ops == &clkops_null)
886 continue;
887
888 if (ck->usecount > 0 || !ck->enable_reg)
889 continue;
890
891 omap2_clk_disable_unused(ck);
892 }
893 spin_unlock_irqrestore(&clockfw_lock, flags);
894
895 return 0;
896}
897late_initcall(clk_disable_unused);
898late_initcall(omap_clk_enable_autoidle_all);
899#endif
900
901#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
902/*
903 * debugfs support to trace clock tree hierarchy and attributes
904 */
905
906#include <linux/debugfs.h>
907#include <linux/seq_file.h>
908
909static struct dentry *clk_debugfs_root;
910
911static int clk_dbg_show_summary(struct seq_file *s, void *unused)
912{
913 struct clk *c;
914 struct clk *pa;
915
916 mutex_lock(&clocks_mutex);
917 seq_printf(s, "%-30s %-30s %-10s %s\n",
918 "clock-name", "parent-name", "rate", "use-count");
919
920 list_for_each_entry(c, &clocks, node) {
921 pa = c->parent;
922 seq_printf(s, "%-30s %-30s %-10lu %d\n",
923 c->name, pa ? pa->name : "none", c->rate,
924 c->usecount);
925 }
926 mutex_unlock(&clocks_mutex);
927
928 return 0;
929}
930
931static int clk_dbg_open(struct inode *inode, struct file *file)
932{
933 return single_open(file, clk_dbg_show_summary, inode->i_private);
934}
935
936static const struct file_operations debug_clock_fops = {
937 .open = clk_dbg_open,
938 .read = seq_read,
939 .llseek = seq_lseek,
940 .release = single_release,
522}; 941};
523 942
943static int clk_debugfs_register_one(struct clk *c)
944{
945 int err;
946 struct dentry *d;
947 struct clk *pa = c->parent;
948
949 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
950 if (!d)
951 return -ENOMEM;
952 c->dent = d;
953
954 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
955 if (!d) {
956 err = -ENOMEM;
957 goto err_out;
958 }
959 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
960 if (!d) {
961 err = -ENOMEM;
962 goto err_out;
963 }
964 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
965 if (!d) {
966 err = -ENOMEM;
967 goto err_out;
968 }
969 return 0;
970
971err_out:
972 debugfs_remove_recursive(c->dent);
973 return err;
974}
975
976static int clk_debugfs_register(struct clk *c)
977{
978 int err;
979 struct clk *pa = c->parent;
980
981 if (pa && !pa->dent) {
982 err = clk_debugfs_register(pa);
983 if (err)
984 return err;
985 }
986
987 if (!c->dent) {
988 err = clk_debugfs_register_one(c);
989 if (err)
990 return err;
991 }
992 return 0;
993}
994
995static int __init clk_debugfs_init(void)
996{
997 struct clk *c;
998 struct dentry *d;
999 int err;
1000
1001 d = debugfs_create_dir("clock", NULL);
1002 if (!d)
1003 return -ENOMEM;
1004 clk_debugfs_root = d;
1005
1006 list_for_each_entry(c, &clocks, node) {
1007 err = clk_debugfs_register(c);
1008 if (err)
1009 goto err_out;
1010 }
1011
1012 d = debugfs_create_file("summary", S_IRUGO,
1013 d, NULL, &debug_clock_fops);
1014 if (!d)
1015 return -ENOMEM;
1016
1017 return 0;
1018err_out:
1019 debugfs_remove_recursive(clk_debugfs_root);
1020 return err;
1021}
1022late_initcall(clk_debugfs_init);
1023
1024#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
1025
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3d9a73..cfba1ffe5cc2 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -17,8 +17,323 @@
17#define __ARCH_ARM_MACH_OMAP2_CLOCK_H 17#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/list.h>
21
22#include <linux/clkdev.h>
23
24struct omap_clk {
25 u16 cpu;
26 struct clk_lookup lk;
27};
28
29#define CLK(dev, con, ck, cp) \
30 { \
31 .cpu = cp, \
32 .lk = { \
33 .dev_id = dev, \
34 .con_id = con, \
35 .clk = ck, \
36 }, \
37 }
38
39/* Platform flags for the clkdev-OMAP integration code */
40#define CK_242X (1 << 0)
41#define CK_243X (1 << 1) /* 243x, 253x */
42#define CK_3430ES1 (1 << 2) /* 34xxES1 only */
43#define CK_3430ES2PLUS (1 << 3) /* 34xxES2, ES3, non-Sitara 35xx only */
44#define CK_AM35XX (1 << 4) /* Sitara AM35xx */
45#define CK_36XX (1 << 5) /* 36xx/37xx-specific clocks */
46#define CK_443X (1 << 6)
47#define CK_TI816X (1 << 7)
48#define CK_446X (1 << 8)
49#define CK_AM33XX (1 << 9) /* AM33xx specific clocks */
50
51
52#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
53#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX)
54
55struct module;
56struct clk;
57struct clockdomain;
58
59/* Temporary, needed during the common clock framework conversion */
60#define __clk_get_name(clk) (clk->name)
61#define __clk_get_parent(clk) (clk->parent)
62#define __clk_get_rate(clk) (clk->rate)
63
64/**
65 * struct clkops - some clock function pointers
66 * @enable: fn ptr that enables the current clock in hardware
67 * @disable: fn ptr that enables the current clock in hardware
68 * @find_idlest: function returning the IDLEST register for the clock's IP blk
69 * @find_companion: function returning the "companion" clk reg for the clock
70 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
71 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
72 *
73 * A "companion" clk is an accompanying clock to the one being queried
74 * that must be enabled for the IP module connected to the clock to
75 * become accessible by the hardware. Neither @find_idlest nor
76 * @find_companion should be needed; that information is IP
77 * block-specific; the hwmod code has been created to handle this, but
78 * until hwmod data is ready and drivers have been converted to use PM
79 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
80 * @find_companion must, unfortunately, remain.
81 */
82struct clkops {
83 int (*enable)(struct clk *);
84 void (*disable)(struct clk *);
85 void (*find_idlest)(struct clk *, void __iomem **,
86 u8 *, u8 *);
87 void (*find_companion)(struct clk *, void __iomem **,
88 u8 *);
89 void (*allow_idle)(struct clk *);
90 void (*deny_idle)(struct clk *);
91};
92
93/* struct clksel_rate.flags possibilities */
94#define RATE_IN_242X (1 << 0)
95#define RATE_IN_243X (1 << 1)
96#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
97#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
98#define RATE_IN_36XX (1 << 4)
99#define RATE_IN_4430 (1 << 5)
100#define RATE_IN_TI816X (1 << 6)
101#define RATE_IN_4460 (1 << 7)
102#define RATE_IN_AM33XX (1 << 8)
103#define RATE_IN_TI814X (1 << 9)
104
105#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
106#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
107#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
108#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
109
110/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
111#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
112
113
114/**
115 * struct clksel_rate - register bitfield values corresponding to clk divisors
116 * @val: register bitfield value (shifted to bit 0)
117 * @div: clock divisor corresponding to @val
118 * @flags: (see "struct clksel_rate.flags possibilities" above)
119 *
120 * @val should match the value of a read from struct clk.clksel_reg
121 * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
122 *
123 * @div is the divisor that should be applied to the parent clock's rate
124 * to produce the current clock's rate.
125 */
126struct clksel_rate {
127 u32 val;
128 u8 div;
129 u16 flags;
130};
131
132/**
133 * struct clksel - available parent clocks, and a pointer to their divisors
134 * @parent: struct clk * to a possible parent clock
135 * @rates: available divisors for this parent clock
136 *
137 * A struct clksel is always associated with one or more struct clks
138 * and one or more struct clksel_rates.
139 */
140struct clksel {
141 struct clk *parent;
142 const struct clksel_rate *rates;
143};
144
145/**
146 * struct dpll_data - DPLL registers and integration data
147 * @mult_div1_reg: register containing the DPLL M and N bitfields
148 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
149 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
150 * @clk_bypass: struct clk pointer to the clock's bypass clock input
151 * @clk_ref: struct clk pointer to the clock's reference clock input
152 * @control_reg: register containing the DPLL mode bitfield
153 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
154 * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
155 * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
156 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
157 * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
158 * @min_divider: minimum valid non-bypass divider value (actual)
159 * @max_divider: maximum valid non-bypass divider value (actual)
160 * @modes: possible values of @enable_mask
161 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
162 * @idlest_reg: register containing the DPLL idle status bitfield
163 * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
164 * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
165 * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
166 * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
167 * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
168 * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
169 * @flags: DPLL type/features (see below)
170 *
171 * Possible values for @flags:
172 * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
173 *
174 * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
175 *
176 * XXX Some DPLLs have multiple bypass inputs, so it's not technically
177 * correct to only have one @clk_bypass pointer.
178 *
179 * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
180 * @last_rounded_n) should be separated from the runtime-fixed fields
181 * and placed into a different structure, so that the runtime-fixed data
182 * can be placed into read-only space.
183 */
184struct dpll_data {
185 void __iomem *mult_div1_reg;
186 u32 mult_mask;
187 u32 div1_mask;
188 struct clk *clk_bypass;
189 struct clk *clk_ref;
190 void __iomem *control_reg;
191 u32 enable_mask;
192 unsigned long last_rounded_rate;
193 u16 last_rounded_m;
194 u16 max_multiplier;
195 u8 last_rounded_n;
196 u8 min_divider;
197 u16 max_divider;
198 u8 modes;
199 void __iomem *autoidle_reg;
200 void __iomem *idlest_reg;
201 u32 autoidle_mask;
202 u32 freqsel_mask;
203 u32 idlest_mask;
204 u32 dco_mask;
205 u32 sddiv_mask;
206 u8 auto_recal_bit;
207 u8 recal_en_bit;
208 u8 recal_st_bit;
209 u8 flags;
210};
211
212/*
213 * struct clk.flags possibilities
214 *
215 * XXX document the rest of the clock flags here
216 *
217 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
218 * bits share the same register. This flag allows the
219 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
220 * should be used. This is a temporary solution - a better approach
221 * would be to associate clock type-specific data with the clock,
222 * similar to the struct dpll_data approach.
223 */
224#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
225#define CLOCK_IDLE_CONTROL (1 << 1)
226#define CLOCK_NO_IDLE_PARENT (1 << 2)
227#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
228#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
229#define CLOCK_CLKOUTX2 (1 << 5)
230
231/**
232 * struct clk - OMAP struct clk
233 * @node: list_head connecting this clock into the full clock list
234 * @ops: struct clkops * for this clock
235 * @name: the name of the clock in the hardware (used in hwmod data and debug)
236 * @parent: pointer to this clock's parent struct clk
237 * @children: list_head connecting to the child clks' @sibling list_heads
238 * @sibling: list_head connecting this clk to its parent clk's @children
239 * @rate: current clock rate
240 * @enable_reg: register to write to enable the clock (see @enable_bit)
241 * @recalc: fn ptr that returns the clock's current rate
242 * @set_rate: fn ptr that can change the clock's current rate
243 * @round_rate: fn ptr that can round the clock's current rate
244 * @init: fn ptr to do clock-specific initialization
245 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
246 * @usecount: number of users that have requested this clock to be enabled
247 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
248 * @flags: see "struct clk.flags possibilities" above
249 * @clksel_reg: for clksel clks, register va containing src/divisor select
250 * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
251 * @clksel: for clksel clks, pointer to struct clksel for this clock
252 * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
253 * @clkdm_name: clockdomain name that this clock is contained in
254 * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
255 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
256 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
257 *
258 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
259 * clock code converted to use clksel.
260 *
261 * XXX @usecount is poorly named. It should be "enable_count" or
262 * something similar. "users" in the description refers to kernel
263 * code (core code or drivers) that have called clk_enable() and not
264 * yet called clk_disable(); the usecount of parent clocks is also
265 * incremented by the clock code when clk_enable() is called on child
266 * clocks and decremented by the clock code when clk_disable() is
267 * called on child clocks.
268 *
269 * XXX @clkdm, @usecount, @children, @sibling should be marked for
270 * internal use only.
271 *
272 * @children and @sibling are used to optimize parent-to-child clock
273 * tree traversals. (child-to-parent traversals use @parent.)
274 *
275 * XXX The notion of the clock's current rate probably needs to be
276 * separated from the clock's target rate.
277 */
278struct clk {
279 struct list_head node;
280 const struct clkops *ops;
281 const char *name;
282 struct clk *parent;
283 struct list_head children;
284 struct list_head sibling; /* node for children */
285 unsigned long rate;
286 void __iomem *enable_reg;
287 unsigned long (*recalc)(struct clk *);
288 int (*set_rate)(struct clk *, unsigned long);
289 long (*round_rate)(struct clk *, unsigned long);
290 void (*init)(struct clk *);
291 u8 enable_bit;
292 s8 usecount;
293 u8 fixed_div;
294 u8 flags;
295 void __iomem *clksel_reg;
296 u32 clksel_mask;
297 const struct clksel *clksel;
298 struct dpll_data *dpll_data;
299 const char *clkdm_name;
300 struct clockdomain *clkdm;
301#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
302 struct dentry *dent; /* For visible tree hierarchy */
303#endif
304};
305
306struct clk_functions {
307 int (*clk_enable)(struct clk *clk);
308 void (*clk_disable)(struct clk *clk);
309 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
310 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
311 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
312 void (*clk_allow_idle)(struct clk *clk);
313 void (*clk_deny_idle)(struct clk *clk);
314 void (*clk_disable_unused)(struct clk *clk);
315};
316
317extern int mpurate;
318
319extern int clk_init(struct clk_functions *custom_clocks);
320extern void clk_preinit(struct clk *clk);
321extern int clk_register(struct clk *clk);
322extern void clk_reparent(struct clk *child, struct clk *parent);
323extern void clk_unregister(struct clk *clk);
324extern void propagate_rate(struct clk *clk);
325extern void recalculate_root_clocks(void);
326extern unsigned long followparent_recalc(struct clk *clk);
327extern void clk_enable_init_clocks(void);
328unsigned long omap_fixed_divisor_recalc(struct clk *clk);
329extern struct clk *omap_clk_get_by_name(const char *name);
330extern int omap_clk_enable_autoidle_all(void);
331extern int omap_clk_disable_autoidle_all(void);
332
333extern const struct clkops clkops_null;
334
335extern struct clk dummy_ck;
20 336
21#include <plat/clock.h>
22 337
23/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ 338/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
24#define CORE_CLK_SRC_32K 0x0 339#define CORE_CLK_SRC_32K 0x0
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index c3cde1a2b6de..ff47a6c2611d 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -18,8 +18,6 @@
18#include <linux/clk.h> 18#include <linux/clk.h>
19#include <linux/list.h> 19#include <linux/list.h>
20 20
21#include <plat/clkdev_omap.h>
22
23#include "soc.h" 21#include "soc.h"
24#include "iomap.h" 22#include "iomap.h"
25#include "clock.h" 23#include "clock.h"
@@ -1935,8 +1933,6 @@ int __init omap2420_clk_init(void)
1935 cpu_mask = RATE_IN_242X; 1933 cpu_mask = RATE_IN_242X;
1936 rate_table = omap2420_rate_table; 1934 rate_table = omap2420_rate_table;
1937 1935
1938 clk_init(&omap2_clk_functions);
1939
1940 for (c = omap2420_clks; c < omap2420_clks + ARRAY_SIZE(omap2420_clks); 1936 for (c = omap2420_clks; c < omap2420_clks + ARRAY_SIZE(omap2420_clks);
1941 c++) 1937 c++)
1942 clk_preinit(c->lk.clk); 1938 clk_preinit(c->lk.clk);
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index a8e326177466..850f83e8954f 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "iomap.h" 25#include "iomap.h"
28#include "clock.h" 26#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 22404fe435e7..cab8e9c52d6e 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -17,8 +17,6 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/list.h> 18#include <linux/list.h>
19 19
20#include <plat/clkdev_omap.h>
21
22#include "soc.h" 20#include "soc.h"
23#include "iomap.h" 21#include "iomap.h"
24#include "clock.h" 22#include "clock.h"
@@ -2034,8 +2032,6 @@ int __init omap2430_clk_init(void)
2034 cpu_mask = RATE_IN_243X; 2032 cpu_mask = RATE_IN_243X;
2035 rate_table = omap2430_rate_table; 2033 rate_table = omap2430_rate_table;
2036 2034
2037 clk_init(&omap2_clk_functions);
2038
2039 for (c = omap2430_clks; c < omap2430_clks + ARRAY_SIZE(omap2430_clks); 2035 for (c = omap2430_clks; c < omap2430_clks + ARRAY_SIZE(omap2430_clks);
2040 c++) 2036 c++)
2041 clk_preinit(c->lk.clk); 2037 clk_preinit(c->lk.clk);
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1fc1a00..5feee16fee0e 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "soc.h" 25#include "soc.h"
28#include "clock.h" 26#include "clock.h"
29#include "clock2xxx.h" 27#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 1a45d6bd2539..17e3de51bcba 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -17,9 +17,8 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/list.h> 18#include <linux/list.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <plat/clkdev_omap.h>
21 20
22#include "am33xx.h" 21#include "soc.h"
23#include "iomap.h" 22#include "iomap.h"
24#include "control.h" 23#include "control.h"
25#include "clock.h" 24#include "clock.h"
@@ -1087,8 +1086,6 @@ int __init am33xx_clk_init(void)
1087 cpu_clkflg = CK_AM33XX; 1086 cpu_clkflg = CK_AM33XX;
1088 } 1087 }
1089 1088
1090 clk_init(&omap2_clk_functions);
1091
1092 for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++) 1089 for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++)
1093 clk_preinit(c->lk.clk); 1090 clk_preinit(c->lk.clk);
1094 1091
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1fc96b9ee330..baaaa4258708 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "clock.h" 24#include "clock.h"
27#include "clock34xx.h" 25#include "clock34xx.h"
28#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 2e97d08f0e56..80209050cd7a 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "clock.h" 24#include "clock.h"
27#include "clock3517.h" 25#include "clock3517.h"
28#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25ed8879..0e1e9e4e2fa4 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "clock.h" 25#include "clock.h"
28#include "clock36xx.h" 26#include "clock36xx.h"
29 27
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 83bb01427d40..3e8aca2b1b61 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "clock.h" 25#include "clock.h"
28#include "clock3xxx.h" 26#include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 1f42c9d5ecf3..a02d158568e8 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -21,8 +21,6 @@
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clkdev_omap.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "iomap.h" 25#include "iomap.h"
28#include "clock.h" 26#include "clock.h"
@@ -3573,8 +3571,6 @@ int __init omap3xxx_clk_init(void)
3573 else 3571 else
3574 dpll4_dd = dpll4_dd_34xx; 3572 dpll4_dd = dpll4_dd_34xx;
3575 3573
3576 clk_init(&omap2_clk_functions);
3577
3578 for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks); 3574 for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks);
3579 c++) 3575 c++)
3580 clk_preinit(c->lk.clk); 3576 clk_preinit(c->lk.clk);
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c961a5..2a450c9b9a7b 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -28,8 +28,6 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h> 29#include <linux/io.h>
30 30
31#include <plat/clkdev_omap.h>
32
33#include "soc.h" 31#include "soc.h"
34#include "iomap.h" 32#include "iomap.h"
35#include "clock.h" 33#include "clock.h"
@@ -3366,8 +3364,6 @@ int __init omap4xxx_clk_init(void)
3366 return 0; 3364 return 0;
3367 } 3365 }
3368 3366
3369 clk_init(&omap2_clk_functions);
3370
3371 /* 3367 /*
3372 * Must stay commented until all OMAP SoC drivers are 3368 * Must stay commented until all OMAP SoC drivers are
3373 * converted to runtime PM, or drivers may start crashing 3369 * converted to runtime PM, or drivers may start crashing
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 512e79a842cb..64e50465a4b5 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,7 +27,8 @@
27 27
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29 29
30#include <plat/clock.h> 30#include "soc.h"
31#include "clock.h"
31#include "clockdomain.h" 32#include "clockdomain.h"
32 33
33/* clkdm_list contains all registered struct clockdomains */ 34/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 629576be7444..bc42446e23ab 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,9 +18,8 @@
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19 19
20#include "powerdomain.h" 20#include "powerdomain.h"
21#include <plat/clock.h> 21#include "clock.h"
22#include <plat/omap_hwmod.h> 22#include "omap_hwmod.h"
23#include <plat/cpu.h>
24 23
25/* 24/*
26 * Clockdomain flags 25 * Clockdomain flags
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index 70294f54e35a..3e4e9209b2df 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -14,6 +14,8 @@
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16#include <plat/prcm.h> 16#include <plat/prcm.h>
17
18#include "soc.h"
17#include "prm.h" 19#include "prm.h"
18#include "prm2xxx_3xxx.h" 20#include "prm2xxx_3xxx.h"
19#include "cm.h" 21#include "cm.h"
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 5c741852fac0..7e76becf3a4a 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -35,6 +35,7 @@
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/io.h> 36#include <linux/io.h>
37 37
38#include "soc.h"
38#include "clockdomain.h" 39#include "clockdomain.h"
39#include "prm2xxx_3xxx.h" 40#include "prm2xxx_3xxx.h"
40#include "cm2xxx_3xxx.h" 41#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index f09617555e15..b923007e45d0 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -35,6 +35,7 @@
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/io.h> 36#include <linux/io.h>
37 37
38#include "soc.h"
38#include "clockdomain.h" 39#include "clockdomain.h"
39#include "prm2xxx_3xxx.h" 40#include "prm2xxx_3xxx.h"
40#include "cm2xxx_3xxx.h" 41#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 933a35cd124a..e6b91e552d3d 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -33,6 +33,7 @@
33#include <linux/kernel.h> 33#include <linux/kernel.h>
34#include <linux/io.h> 34#include <linux/io.h>
35 35
36#include "soc.h"
36#include "clockdomain.h" 37#include "clockdomain.h"
37#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
38#include "cm2xxx_3xxx.h" 39#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 13f56eafef03..ed8dcaf4c849 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -22,8 +22,6 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/common.h>
26
27#include "cm.h" 25#include "cm.h"
28#include "cm33xx.h" 26#include "cm33xx.h"
29#include "cm-regbits-34xx.h" 27#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..ad856092c06a 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -25,7 +25,6 @@
25#include <linux/spi/ads7846.h> 25#include <linux/spi/ads7846.h>
26 26
27#include <linux/platform_data/spi-omap2-mcspi.h> 27#include <linux/platform_data/spi-omap2-mcspi.h>
28#include <linux/platform_data/mtd-nand-omap2.h>
29 28
30#include "common.h" 29#include "common.h"
31#include "common-board-devices.h" 30#include "common-board-devices.h"
@@ -96,48 +95,3 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
96{ 95{
97} 96}
98#endif 97#endif
99
100#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
101static struct omap_nand_platform_data nand_data;
102
103void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
104 int nr_parts)
105{
106 u8 cs = 0;
107 u8 nandcs = GPMC_CS_NUM + 1;
108
109 /* find out the chip-select on which NAND exists */
110 while (cs < GPMC_CS_NUM) {
111 u32 ret = 0;
112 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
113
114 if ((ret & 0xC00) == 0x800) {
115 printk(KERN_INFO "Found NAND on CS%d\n", cs);
116 if (nandcs > GPMC_CS_NUM)
117 nandcs = cs;
118 }
119 cs++;
120 }
121
122 if (nandcs > GPMC_CS_NUM) {
123 pr_info("NAND: Unable to find configuration in GPMC\n");
124 return;
125 }
126
127 if (nandcs < GPMC_CS_NUM) {
128 nand_data.cs = nandcs;
129 nand_data.parts = parts;
130 nand_data.nr_parts = nr_parts;
131 nand_data.devsize = options;
132
133 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
134 if (gpmc_nand_init(&nand_data) < 0)
135 printk(KERN_ERR "Unable to register NAND device\n");
136 }
137}
138#else
139void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
140 int nr_parts)
141{
142}
143#endif
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index a0b4a42836ab..72bb41b3fd25 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -10,6 +10,5 @@ struct ads7846_platform_data;
10 10
11void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, 11void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
12 struct ads7846_platform_data *board_pdata); 12 struct ads7846_platform_data *board_pdata);
13void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
14 13
15#endif /* __OMAP_COMMON_BOARD_DEVICES__ */ 14#endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 17950c6e130b..34fb5b95859b 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -16,14 +16,17 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/platform_data/dsp-omap.h>
19 20
20#include <plat/clock.h> 21#include <plat/vram.h>
21 22
22#include "soc.h" 23#include "soc.h"
23#include "iomap.h" 24#include "iomap.h"
24#include "common.h" 25#include "common.h"
26#include "clock.h"
25#include "sdrc.h" 27#include "sdrc.h"
26#include "control.h" 28#include "control.h"
29#include "omap-secure.h"
27 30
28/* Global address base setup code */ 31/* Global address base setup code */
29 32
@@ -200,3 +203,20 @@ void __init omap5_map_io(void)
200 omap5_map_common_io(); 203 omap5_map_common_io();
201} 204}
202#endif 205#endif
206
207/*
208 * Stub function for OMAP2 so that common files
209 * continue to build when custom builds are used
210 */
211int __weak omap_secure_ram_reserve_memblock(void)
212{
213 return 0;
214}
215
216void __init omap_reserve(void)
217{
218 omap_vram_reserve_sdram_memblock();
219 omap_dsp_reserve_sdram_memblock();
220 omap_secure_ram_reserve_memblock();
221 omap_barrier_reserve_memblock();
222}
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 7045e4d61ac3..426fcfcfd821 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -28,13 +28,16 @@
28 28
29#include <linux/irq.h> 29#include <linux/irq.h>
30#include <linux/delay.h> 30#include <linux/delay.h>
31#include <linux/i2c.h>
31#include <linux/i2c/twl.h> 32#include <linux/i2c/twl.h>
33#include <linux/i2c-omap.h>
32 34
33#include <asm/proc-fns.h> 35#include <asm/proc-fns.h>
34 36
35#include <plat/cpu.h> 37#include "i2c.h"
36#include <plat/serial.h> 38#include "serial.h"
37#include <plat/common.h> 39
40#include "usb.h"
38 41
39#define OMAP_INTC_START NR_IRQS 42#define OMAP_INTC_START NR_IRQS
40 43
@@ -338,6 +341,10 @@ extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
338 struct omap_sdrc_params *sdrc_cs1); 341 struct omap_sdrc_params *sdrc_cs1);
339struct omap2_hsmmc_info; 342struct omap2_hsmmc_info;
340extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); 343extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
344extern void omap_reserve(void);
345
346struct omap_hwmod;
347extern int omap_dss_reset(struct omap_hwmod *);
341 348
342#endif /* __ASSEMBLER__ */ 349#endif /* __ASSEMBLER__ */
343#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 350#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index d1ff8399a222..bf2be5c5468d 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2/3 System Control Module register access 2 * OMAP2/3 System Control Module register access
3 * 3 *
4 * Copyright (C) 2007 Texas Instruments, Inc. 4 * Copyright (C) 2007, 2012 Texas Instruments, Inc.
5 * Copyright (C) 2007 Nokia Corporation 5 * Copyright (C) 2007 Nokia Corporation
6 * 6 *
7 * Written by Paul Walmsley 7 * Written by Paul Walmsley
@@ -15,8 +15,6 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <plat/sdrc.h>
19
20#include "soc.h" 18#include "soc.h"
21#include "iomap.h" 19#include "iomap.h"
22#include "common.h" 20#include "common.h"
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cba60e05e32e..2ad491d6910b 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -23,10 +23,11 @@
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <plat-omap/dma-omap.h>
27
26#include "iomap.h" 28#include "iomap.h"
27#include <plat/dma.h> 29#include "omap_hwmod.h"
28#include <plat/omap_hwmod.h> 30#include "omap_device.h"
29#include <plat/omap_device.h>
30#include "omap4-keypad.h" 31#include "omap4-keypad.h"
31 32
32#include "soc.h" 33#include "soc.h"
@@ -34,6 +35,7 @@
34#include "mux.h" 35#include "mux.h"
35#include "control.h" 36#include "control.h"
36#include "devices.h" 37#include "devices.h"
38#include "dma.h"
37 39
38#define L3_MODULES_MAX_LEN 12 40#define L3_MODULES_MAX_LEN 12
39#define L3_MODULES 3 41#define L3_MODULES 3
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 1011995f150a..89c57129357a 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -25,11 +25,12 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26 26
27#include <video/omapdss.h> 27#include <video/omapdss.h>
28#include <plat/omap_hwmod.h> 28#include "omap_hwmod.h"
29#include <plat/omap_device.h> 29#include "omap_device.h"
30#include <plat/omap-pm.h> 30#include "omap-pm.h"
31#include "common.h" 31#include "common.h"
32 32
33#include "soc.h"
33#include "iomap.h" 34#include "iomap.h"
34#include "mux.h" 35#include "mux.h"
35#include "control.h" 36#include "control.h"
@@ -284,6 +285,35 @@ err:
284 return ERR_PTR(r); 285 return ERR_PTR(r);
285} 286}
286 287
288static enum omapdss_version __init omap_display_get_version(void)
289{
290 if (cpu_is_omap24xx())
291 return OMAPDSS_VER_OMAP24xx;
292 else if (cpu_is_omap3630())
293 return OMAPDSS_VER_OMAP3630;
294 else if (cpu_is_omap34xx()) {
295 if (soc_is_am35xx()) {
296 return OMAPDSS_VER_AM35xx;
297 } else {
298 if (omap_rev() < OMAP3430_REV_ES3_0)
299 return OMAPDSS_VER_OMAP34xx_ES1;
300 else
301 return OMAPDSS_VER_OMAP34xx_ES3;
302 }
303 } else if (omap_rev() == OMAP4430_REV_ES1_0)
304 return OMAPDSS_VER_OMAP4430_ES1;
305 else if (omap_rev() == OMAP4430_REV_ES2_0 ||
306 omap_rev() == OMAP4430_REV_ES2_1 ||
307 omap_rev() == OMAP4430_REV_ES2_2)
308 return OMAPDSS_VER_OMAP4430_ES2;
309 else if (cpu_is_omap44xx())
310 return OMAPDSS_VER_OMAP4;
311 else if (soc_is_omap54xx())
312 return OMAPDSS_VER_OMAP5;
313 else
314 return OMAPDSS_VER_UNKNOWN;
315}
316
287int __init omap_display_init(struct omap_dss_board_info *board_data) 317int __init omap_display_init(struct omap_dss_board_info *board_data)
288{ 318{
289 int r = 0; 319 int r = 0;
@@ -291,9 +321,18 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
291 int i, oh_count; 321 int i, oh_count;
292 const struct omap_dss_hwmod_data *curr_dss_hwmod; 322 const struct omap_dss_hwmod_data *curr_dss_hwmod;
293 struct platform_device *dss_pdev; 323 struct platform_device *dss_pdev;
324 enum omapdss_version ver;
294 325
295 /* create omapdss device */ 326 /* create omapdss device */
296 327
328 ver = omap_display_get_version();
329
330 if (ver == OMAPDSS_VER_UNKNOWN) {
331 pr_err("DSS not supported on this SoC\n");
332 return -ENODEV;
333 }
334
335 board_data->version = ver;
297 board_data->dsi_enable_pads = omap_dsi_enable_pads; 336 board_data->dsi_enable_pads = omap_dsi_enable_pads;
298 board_data->dsi_disable_pads = omap_dsi_disable_pads; 337 board_data->dsi_disable_pads = omap_dsi_disable_pads;
299 board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count; 338 board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count;
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index ff75abe60af2..e5aba58da5d2 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -28,9 +28,11 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/device.h> 29#include <linux/device.h>
30 30
31#include <plat/omap_hwmod.h> 31#include <plat-omap/dma-omap.h>
32#include <plat/omap_device.h> 32
33#include <plat/dma.h> 33#include "soc.h"
34#include "omap_hwmod.h"
35#include "omap_device.h"
34 36
35#define OMAP2_DMA_STRIDE 0x60 37#define OMAP2_DMA_STRIDE 0x60
36 38
@@ -274,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
274 return -ENOMEM; 276 return -ENOMEM;
275 } 277 }
276 278
279 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
280 d->dev_caps |= HS_CHANNELS_RESERVED;
281
277 /* Check the capabilities register for descriptor loading feature */ 282 /* Check the capabilities register for descriptor loading feature */
278 if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS) 283 if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
279 dma_common_ch_end = CCDN; 284 dma_common_ch_end = CCDN;
diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h
new file mode 100644
index 000000000000..eba80dbc5218
--- /dev/null
+++ b/arch/arm/mach-omap2/dma.h
@@ -0,0 +1,131 @@
1/*
2 * OMAP2PLUS DMA channel definitions
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef __OMAP2PLUS_DMA_CHANNEL_H
20#define __OMAP2PLUS_DMA_CHANNEL_H
21
22
23/* DMA channels for 24xx */
24#define OMAP24XX_DMA_NO_DEVICE 0
25#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
26#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
27#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
28#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
29#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
30#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
31#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
32#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
33#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
34#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
35#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
36#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
37#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
38#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
39#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
40#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
41#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
42#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
43#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
44#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
45#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
46#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
47#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
48#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
49#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
50#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
51#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
52#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
53#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
54#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
55#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
56#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
57#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
58#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
59#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
60#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
61#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
62#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
63#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
64#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
65#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
66#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
67#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
68#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
69#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
70#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
71#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
72#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
73#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
74#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
75#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
76#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
77#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
78#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
79#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
80#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
81#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
82#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
83#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
84#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
85#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
86#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
87#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
88#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
89#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
90#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
91#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
92#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
93#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
94#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
95#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
96#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
97#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
98#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
99#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
100#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
101#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
102#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
103#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
104#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
105#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
106#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
107#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
108#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
109#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
110#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
111#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
112#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
113#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
114#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
115#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
116#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
117#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
118#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
119#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
120#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
121#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
122#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
123
124#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
125#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
126
127/* Only for AM35xx */
128#define AM35XX_DMA_UART4_TX 54
129#define AM35XX_DMA_UART4_RX 55
130
131#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 814e1808e158..eacf51f2bc27 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,8 +28,6 @@
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29#include <linux/clkdev.h> 29#include <linux/clkdev.h>
30 30
31#include <plat/clock.h>
32
33#include "soc.h" 31#include "soc.h"
34#include "clock.h" 32#include "clock.h"
35#include "cm2xxx_3xxx.h" 33#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 09d0ccccb861..5854da168a9c 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,8 +15,6 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/bitops.h> 16#include <linux/bitops.h>
17 17
18#include <plat/clock.h>
19
20#include "soc.h" 18#include "soc.h"
21#include "clock.h" 19#include "clock.h"
22#include "clock44xx.h" 20#include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 72e0f01b715c..6282cc826613 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -24,8 +24,8 @@
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26 26
27#include <plat/omap_device.h> 27#include "omap_device.h"
28#include <plat/omap_hwmod.h> 28#include "omap_hwmod.h"
29 29
30#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) 30#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE)
31 31
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 98388109f22a..b155500e84a8 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -27,7 +27,7 @@
27#include "cm2xxx_3xxx.h" 27#include "cm2xxx_3xxx.h"
28#include "prm2xxx_3xxx.h" 28#include "prm2xxx_3xxx.h"
29#ifdef CONFIG_BRIDGE_DVFS 29#ifdef CONFIG_BRIDGE_DVFS
30#include <plat/omap-pm.h> 30#include "omap-pm.h"
31#endif 31#endif
32 32
33#include <linux/platform_data/dsp-omap.h> 33#include <linux/platform_data/dsp-omap.h>
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index d1058f16fb40..399acabc3d0b 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,9 +23,9 @@
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/platform_data/gpio-omap.h> 24#include <linux/platform_data/gpio-omap.h>
25 25
26#include <plat/omap_hwmod.h> 26#include "omap_hwmod.h"
27#include <plat/omap_device.h> 27#include "omap_device.h"
28#include <plat/omap-pm.h> 28#include "omap-pm.h"
29 29
30#include "powerdomain.h" 30#include "powerdomain.h"
31 31
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4acf497faeb3..8607735b3ab3 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -17,9 +17,12 @@
17 17
18#include <asm/mach/flash.h> 18#include <asm/mach/flash.h>
19 19
20#include <plat/gpmc.h> 20#include "gpmc.h"
21
22#include "soc.h" 21#include "soc.h"
22#include "gpmc-nand.h"
23
24/* minimum size for IO mapping */
25#define NAND_IO_SIZE 4
23 26
24static struct resource gpmc_nand_resource[] = { 27static struct resource gpmc_nand_resource[] = {
25 { 28 {
@@ -40,41 +43,36 @@ static struct platform_device gpmc_nand_device = {
40 .resource = gpmc_nand_resource, 43 .resource = gpmc_nand_resource,
41}; 44};
42 45
43static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) 46static int omap2_nand_gpmc_retime(
47 struct omap_nand_platform_data *gpmc_nand_data,
48 struct gpmc_timings *gpmc_t)
44{ 49{
45 struct gpmc_timings t; 50 struct gpmc_timings t;
46 int err; 51 int err;
47 52
48 if (!gpmc_nand_data->gpmc_t)
49 return 0;
50
51 memset(&t, 0, sizeof(t)); 53 memset(&t, 0, sizeof(t));
52 t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk; 54 t.sync_clk = gpmc_t->sync_clk;
53 t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on); 55 t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on);
54 t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on); 56 t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on);
55 57
56 /* Read */ 58 /* Read */
57 t.adv_rd_off = gpmc_round_ns_to_ticks( 59 t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off);
58 gpmc_nand_data->gpmc_t->adv_rd_off);
59 t.oe_on = t.adv_on; 60 t.oe_on = t.adv_on;
60 t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access); 61 t.access = gpmc_round_ns_to_ticks(gpmc_t->access);
61 t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off); 62 t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off);
62 t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off); 63 t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off);
63 t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle); 64 t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle);
64 65
65 /* Write */ 66 /* Write */
66 t.adv_wr_off = gpmc_round_ns_to_ticks( 67 t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off);
67 gpmc_nand_data->gpmc_t->adv_wr_off);
68 t.we_on = t.oe_on; 68 t.we_on = t.oe_on;
69 if (cpu_is_omap34xx()) { 69 if (cpu_is_omap34xx()) {
70 t.wr_data_mux_bus = gpmc_round_ns_to_ticks( 70 t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus);
71 gpmc_nand_data->gpmc_t->wr_data_mux_bus); 71 t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access);
72 t.wr_access = gpmc_round_ns_to_ticks(
73 gpmc_nand_data->gpmc_t->wr_access);
74 } 72 }
75 t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off); 73 t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off);
76 t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off); 74 t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off);
77 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); 75 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle);
78 76
79 /* Configure GPMC */ 77 /* Configure GPMC */
80 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) 78 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
@@ -91,7 +89,29 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
91 return 0; 89 return 0;
92} 90}
93 91
94int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) 92static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
93{
94 /* support only OMAP3 class */
95 if (!cpu_is_omap34xx()) {
96 pr_err("BCH ecc is not supported on this CPU\n");
97 return 0;
98 }
99
100 /*
101 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
102 * Other chips may be added if confirmed to work.
103 */
104 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
105 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
106 pr_err("BCH 4-bit mode is not supported on this CPU\n");
107 return 0;
108 }
109
110 return 1;
111}
112
113int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
114 struct gpmc_timings *gpmc_t)
95{ 115{
96 int err = 0; 116 int err = 0;
97 struct device *dev = &gpmc_nand_device.dev; 117 struct device *dev = &gpmc_nand_device.dev;
@@ -112,11 +132,13 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
112 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); 132 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
113 gpmc_nand_resource[2].start = 133 gpmc_nand_resource[2].start =
114 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); 134 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
115 /* Set timings in GPMC */ 135
116 err = omap2_nand_gpmc_retime(gpmc_nand_data); 136 if (gpmc_t) {
117 if (err < 0) { 137 err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t);
118 dev_err(dev, "Unable to set gpmc timings: %d\n", err); 138 if (err < 0) {
119 return err; 139 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
140 return err;
141 }
120 } 142 }
121 143
122 /* Enable RD PIN Monitoring Reg */ 144 /* Enable RD PIN Monitoring Reg */
@@ -126,6 +148,9 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
126 148
127 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); 149 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
128 150
151 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
152 return -EINVAL;
153
129 err = platform_device_register(&gpmc_nand_device); 154 err = platform_device_register(&gpmc_nand_device);
130 if (err < 0) { 155 if (err < 0) {
131 dev_err(dev, "Unable to register NAND device\n"); 156 dev_err(dev, "Unable to register NAND device\n");
diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h
new file mode 100644
index 000000000000..d59e1281e851
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-nand.h
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/mach-omap2/gpmc-nand.h
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __OMAP2_GPMC_NAND_H
11#define __OMAP2_GPMC_NAND_H
12
13#include "gpmc.h"
14#include <linux/platform_data/mtd-nand-omap2.h>
15
16#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
17extern int gpmc_nand_init(struct omap_nand_platform_data *d,
18 struct gpmc_timings *gpmc_t);
19#else
20static inline int gpmc_nand_init(struct omap_nand_platform_data *d,
21 struct gpmc_timings *gpmc_t)
22{
23 return 0;
24}
25#endif
26
27#endif
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 916716e1da3b..d102183ed9a5 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -16,15 +16,25 @@
16#include <linux/mtd/onenand_regs.h> 16#include <linux/mtd/onenand_regs.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/platform_data/mtd-onenand-omap2.h> 18#include <linux/platform_data/mtd-onenand-omap2.h>
19#include <linux/err.h>
19 20
20#include <asm/mach/flash.h> 21#include <asm/mach/flash.h>
21 22
22#include <plat/gpmc.h> 23#include "gpmc.h"
23
24#include "soc.h" 24#include "soc.h"
25#include "gpmc-onenand.h"
25 26
26#define ONENAND_IO_SIZE SZ_128K 27#define ONENAND_IO_SIZE SZ_128K
27 28
29#define ONENAND_FLAG_SYNCREAD (1 << 0)
30#define ONENAND_FLAG_SYNCWRITE (1 << 1)
31#define ONENAND_FLAG_HF (1 << 2)
32#define ONENAND_FLAG_VHF (1 << 3)
33
34static unsigned onenand_flags;
35static unsigned latency;
36static int fclk_offset;
37
28static struct omap_onenand_platform_data *gpmc_onenand_data; 38static struct omap_onenand_platform_data *gpmc_onenand_data;
29 39
30static struct resource gpmc_onenand_resource = { 40static struct resource gpmc_onenand_resource = {
@@ -38,11 +48,9 @@ static struct platform_device gpmc_onenand_device = {
38 .resource = &gpmc_onenand_resource, 48 .resource = &gpmc_onenand_resource,
39}; 49};
40 50
41static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) 51static struct gpmc_timings omap2_onenand_calc_async_timings(void)
42{ 52{
43 struct gpmc_timings t; 53 struct gpmc_timings t;
44 u32 reg;
45 int err;
46 54
47 const int t_cer = 15; 55 const int t_cer = 15;
48 const int t_avdp = 12; 56 const int t_avdp = 12;
@@ -55,11 +63,6 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
55 const int t_wpl = 40; 63 const int t_wpl = 40;
56 const int t_wph = 30; 64 const int t_wph = 30;
57 65
58 /* Ensure sync read and sync write are disabled */
59 reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
60 reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
61 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
62
63 memset(&t, 0, sizeof(t)); 66 memset(&t, 0, sizeof(t));
64 t.sync_clk = 0; 67 t.sync_clk = 0;
65 t.cs_on = 0; 68 t.cs_on = 0;
@@ -86,25 +89,30 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
86 t.cs_wr_off = t.we_off + gpmc_round_ns_to_ticks(t_wph); 89 t.cs_wr_off = t.we_off + gpmc_round_ns_to_ticks(t_wph);
87 t.wr_cycle = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez); 90 t.wr_cycle = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez);
88 91
92 return t;
93}
94
95static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
96{
89 /* Configure GPMC for asynchronous read */ 97 /* Configure GPMC for asynchronous read */
90 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, 98 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
91 GPMC_CONFIG1_DEVICESIZE_16 | 99 GPMC_CONFIG1_DEVICESIZE_16 |
92 GPMC_CONFIG1_MUXADDDATA); 100 GPMC_CONFIG1_MUXADDDATA);
93 101
94 err = gpmc_cs_set_timings(cs, &t); 102 return gpmc_cs_set_timings(cs, t);
95 if (err) 103}
96 return err; 104
105static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
106{
107 u32 reg;
97 108
98 /* Ensure sync read and sync write are disabled */ 109 /* Ensure sync read and sync write are disabled */
99 reg = readw(onenand_base + ONENAND_REG_SYS_CFG1); 110 reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
100 reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE; 111 reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
101 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); 112 writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
102
103 return 0;
104} 113}
105 114
106static void set_onenand_cfg(void __iomem *onenand_base, int latency, 115static void set_onenand_cfg(void __iomem *onenand_base)
107 int sync_read, int sync_write, int hf, int vhf)
108{ 116{
109 u32 reg; 117 u32 reg;
110 118
@@ -112,19 +120,19 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
112 reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9)); 120 reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
113 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | 121 reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
114 ONENAND_SYS_CFG1_BL_16; 122 ONENAND_SYS_CFG1_BL_16;
115 if (sync_read) 123 if (onenand_flags & ONENAND_FLAG_SYNCREAD)
116 reg |= ONENAND_SYS_CFG1_SYNC_READ; 124 reg |= ONENAND_SYS_CFG1_SYNC_READ;
117 else 125 else
118 reg &= ~ONENAND_SYS_CFG1_SYNC_READ; 126 reg &= ~ONENAND_SYS_CFG1_SYNC_READ;
119 if (sync_write) 127 if (onenand_flags & ONENAND_FLAG_SYNCWRITE)
120 reg |= ONENAND_SYS_CFG1_SYNC_WRITE; 128 reg |= ONENAND_SYS_CFG1_SYNC_WRITE;
121 else 129 else
122 reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE; 130 reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE;
123 if (hf) 131 if (onenand_flags & ONENAND_FLAG_HF)
124 reg |= ONENAND_SYS_CFG1_HF; 132 reg |= ONENAND_SYS_CFG1_HF;
125 else 133 else
126 reg &= ~ONENAND_SYS_CFG1_HF; 134 reg &= ~ONENAND_SYS_CFG1_HF;
127 if (vhf) 135 if (onenand_flags & ONENAND_FLAG_VHF)
128 reg |= ONENAND_SYS_CFG1_VHF; 136 reg |= ONENAND_SYS_CFG1_VHF;
129 else 137 else
130 reg &= ~ONENAND_SYS_CFG1_VHF; 138 reg &= ~ONENAND_SYS_CFG1_VHF;
@@ -132,21 +140,10 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
132} 140}
133 141
134static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg, 142static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
135 void __iomem *onenand_base, bool *clk_dep) 143 void __iomem *onenand_base)
136{ 144{
137 u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID); 145 u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID);
138 int freq = 0; 146 int freq;
139
140 if (cfg->get_freq) {
141 struct onenand_freq_info fi;
142
143 fi.maf_id = readw(onenand_base + ONENAND_REG_MANUFACTURER_ID);
144 fi.dev_id = readw(onenand_base + ONENAND_REG_DEVICE_ID);
145 fi.ver_id = ver;
146 freq = cfg->get_freq(&fi, clk_dep);
147 if (freq)
148 return freq;
149 }
150 147
151 switch ((ver >> 4) & 0xf) { 148 switch ((ver >> 4) & 0xf) {
152 case 0: 149 case 0:
@@ -172,9 +169,9 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
172 return freq; 169 return freq;
173} 170}
174 171
175static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, 172static struct gpmc_timings
176 void __iomem *onenand_base, 173omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
177 int *freq_ptr) 174 int freq)
178{ 175{
179 struct gpmc_timings t; 176 struct gpmc_timings t;
180 const int t_cer = 15; 177 const int t_cer = 15;
@@ -184,29 +181,15 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
184 const int t_wpl = 40; 181 const int t_wpl = 40;
185 const int t_wph = 30; 182 const int t_wph = 30;
186 int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; 183 int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;
187 int div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;
188 int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
189 int err, ticks_cez;
190 int cs = cfg->cs, freq = *freq_ptr;
191 u32 reg; 184 u32 reg;
192 bool clk_dep = false; 185 int div, fclk_offset_ns, gpmc_clk_ns;
186 int ticks_cez;
187 int cs = cfg->cs;
193 188
194 if (cfg->flags & ONENAND_SYNC_READ) { 189 if (cfg->flags & ONENAND_SYNC_READ)
195 sync_read = 1; 190 onenand_flags = ONENAND_FLAG_SYNCREAD;
196 } else if (cfg->flags & ONENAND_SYNC_READWRITE) { 191 else if (cfg->flags & ONENAND_SYNC_READWRITE)
197 sync_read = 1; 192 onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
198 sync_write = 1;
199 } else
200 return omap2_onenand_set_async_mode(cs, onenand_base);
201
202 if (!freq) {
203 /* Very first call freq is not known */
204 err = omap2_onenand_set_async_mode(cs, onenand_base);
205 if (err)
206 return err;
207 freq = omap2_onenand_get_freq(cfg, onenand_base, &clk_dep);
208 first_time = 1;
209 }
210 193
211 switch (freq) { 194 switch (freq) {
212 case 104: 195 case 104:
@@ -244,44 +227,31 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
244 t_ach = 9; 227 t_ach = 9;
245 t_aavdh = 7; 228 t_aavdh = 7;
246 t_rdyo = 15; 229 t_rdyo = 15;
247 sync_write = 0; 230 onenand_flags &= ~ONENAND_FLAG_SYNCWRITE;
248 break; 231 break;
249 } 232 }
250 233
251 div = gpmc_cs_calc_divider(cs, min_gpmc_clk_period); 234 div = gpmc_calc_divider(min_gpmc_clk_period);
252 gpmc_clk_ns = gpmc_ticks_to_ns(div); 235 gpmc_clk_ns = gpmc_ticks_to_ns(div);
253 if (gpmc_clk_ns < 15) /* >66Mhz */ 236 if (gpmc_clk_ns < 15) /* >66Mhz */
254 hf = 1; 237 onenand_flags |= ONENAND_FLAG_HF;
238 else
239 onenand_flags &= ~ONENAND_FLAG_HF;
255 if (gpmc_clk_ns < 12) /* >83Mhz */ 240 if (gpmc_clk_ns < 12) /* >83Mhz */
256 vhf = 1; 241 onenand_flags |= ONENAND_FLAG_VHF;
257 if (vhf) 242 else
243 onenand_flags &= ~ONENAND_FLAG_VHF;
244 if (onenand_flags & ONENAND_FLAG_VHF)
258 latency = 8; 245 latency = 8;
259 else if (hf) 246 else if (onenand_flags & ONENAND_FLAG_HF)
260 latency = 6; 247 latency = 6;
261 else if (gpmc_clk_ns >= 25) /* 40 MHz*/ 248 else if (gpmc_clk_ns >= 25) /* 40 MHz*/
262 latency = 3; 249 latency = 3;
263 else 250 else
264 latency = 4; 251 latency = 4;
265 252
266 if (clk_dep) { 253 /* Set synchronous read timings */
267 if (gpmc_clk_ns < 12) { /* >83Mhz */ 254 memset(&t, 0, sizeof(t));
268 t_ces = 3;
269 t_avds = 4;
270 } else if (gpmc_clk_ns < 15) { /* >66Mhz */
271 t_ces = 5;
272 t_avds = 4;
273 } else if (gpmc_clk_ns < 25) { /* >40Mhz */
274 t_ces = 6;
275 t_avds = 5;
276 } else {
277 t_ces = 7;
278 t_avds = 7;
279 }
280 }
281
282 if (first_time)
283 set_onenand_cfg(onenand_base, latency,
284 sync_read, sync_write, hf, vhf);
285 255
286 if (div == 1) { 256 if (div == 1) {
287 reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2); 257 reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
@@ -307,8 +277,6 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
307 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg); 277 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
308 } 278 }
309 279
310 /* Set synchronous read timings */
311 memset(&t, 0, sizeof(t));
312 t.sync_clk = min_gpmc_clk_period; 280 t.sync_clk = min_gpmc_clk_period;
313 t.cs_on = 0; 281 t.cs_on = 0;
314 t.adv_on = 0; 282 t.adv_on = 0;
@@ -330,7 +298,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
330 ticks_cez); 298 ticks_cez);
331 299
332 /* Write */ 300 /* Write */
333 if (sync_write) { 301 if (onenand_flags & ONENAND_FLAG_SYNCWRITE) {
334 t.adv_wr_off = t.adv_rd_off; 302 t.adv_wr_off = t.adv_rd_off;
335 t.we_on = 0; 303 t.we_on = 0;
336 t.we_off = t.cs_rd_off; 304 t.we_off = t.cs_rd_off;
@@ -355,6 +323,14 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
355 } 323 }
356 } 324 }
357 325
326 return t;
327}
328
329static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t)
330{
331 unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD;
332 unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE;
333
358 /* Configure GPMC for synchronous read */ 334 /* Configure GPMC for synchronous read */
359 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, 335 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
360 GPMC_CONFIG1_WRAPBURST_SUPP | 336 GPMC_CONFIG1_WRAPBURST_SUPP |
@@ -371,11 +347,45 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
371 GPMC_CONFIG1_DEVICETYPE_NOR | 347 GPMC_CONFIG1_DEVICETYPE_NOR |
372 GPMC_CONFIG1_MUXADDDATA); 348 GPMC_CONFIG1_MUXADDDATA);
373 349
374 err = gpmc_cs_set_timings(cs, &t); 350 return gpmc_cs_set_timings(cs, t);
375 if (err) 351}
376 return err; 352
353static int omap2_onenand_setup_async(void __iomem *onenand_base)
354{
355 struct gpmc_timings t;
356 int ret;
357
358 omap2_onenand_set_async_mode(onenand_base);
377 359
378 set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf); 360 t = omap2_onenand_calc_async_timings();
361
362 ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
363 if (IS_ERR_VALUE(ret))
364 return ret;
365
366 omap2_onenand_set_async_mode(onenand_base);
367
368 return 0;
369}
370
371static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
372{
373 int ret, freq = *freq_ptr;
374 struct gpmc_timings t;
375
376 if (!freq) {
377 /* Very first call freq is not known */
378 freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
379 set_onenand_cfg(onenand_base);
380 }
381
382 t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq);
383
384 ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
385 if (IS_ERR_VALUE(ret))
386 return ret;
387
388 set_onenand_cfg(onenand_base);
379 389
380 *freq_ptr = freq; 390 *freq_ptr = freq;
381 391
@@ -385,15 +395,22 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
385static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) 395static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
386{ 396{
387 struct device *dev = &gpmc_onenand_device.dev; 397 struct device *dev = &gpmc_onenand_device.dev;
398 unsigned l = ONENAND_SYNC_READ | ONENAND_SYNC_READWRITE;
399 int ret;
388 400
389 /* Set sync timings in GPMC */ 401 ret = omap2_onenand_setup_async(onenand_base);
390 if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base, 402 if (ret) {
391 freq_ptr) < 0) { 403 dev_err(dev, "unable to set to async mode\n");
392 dev_err(dev, "Unable to set synchronous mode\n"); 404 return ret;
393 return -EINVAL;
394 } 405 }
395 406
396 return 0; 407 if (!(gpmc_onenand_data->flags & l))
408 return 0;
409
410 ret = omap2_onenand_setup_sync(onenand_base, freq_ptr);
411 if (ret)
412 dev_err(dev, "unable to set to sync mode\n");
413 return ret;
397} 414}
398 415
399void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) 416void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
@@ -411,6 +428,11 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
411 gpmc_onenand_data->flags |= ONENAND_SYNC_READ; 428 gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
412 } 429 }
413 430
431 if (cpu_is_omap34xx())
432 gpmc_onenand_data->flags |= ONENAND_IN_OMAP34XX;
433 else
434 gpmc_onenand_data->flags &= ~ONENAND_IN_OMAP34XX;
435
414 err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE, 436 err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
415 (unsigned long *)&gpmc_onenand_resource.start); 437 (unsigned long *)&gpmc_onenand_resource.start);
416 if (err < 0) { 438 if (err < 0) {
diff --git a/arch/arm/mach-omap2/gpmc-onenand.h b/arch/arm/mach-omap2/gpmc-onenand.h
new file mode 100644
index 000000000000..216f23a8b45c
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-onenand.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/mach-omap2/gpmc-onenand.h
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __OMAP2_GPMC_ONENAND_H
11#define __OMAP2_GPMC_ONENAND_H
12
13#include <linux/platform_data/mtd-onenand-omap2.h>
14
15#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
16extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
17#else
18#define board_onenand_data NULL
19static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
20{
21}
22#endif
23
24#endif
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index 565475310374..6eed907d594c 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -17,7 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/smc91x.h> 18#include <linux/smc91x.h>
19 19
20#include <plat/gpmc.h> 20#include "gpmc.h"
21#include "gpmc-smc91x.h" 21#include "gpmc-smc91x.h"
22 22
23#include "soc.h" 23#include "soc.h"
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 249a0b440cd6..ef990118d32b 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -20,7 +20,7 @@
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22 22
23#include <plat/gpmc.h> 23#include "gpmc.h"
24#include "gpmc-smsc911x.h" 24#include "gpmc-smsc911x.h"
25 25
26static struct resource gpmc_smsc911x_resources[] = { 26static struct resource gpmc_smsc911x_resources[] = {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 92b5718fa722..bf6117c32f4b 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,16 +26,14 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28 28
29#include <asm/mach-types.h> 29#include <linux/platform_data/mtd-nand-omap2.h>
30#include <plat/gpmc.h>
31 30
32#include <plat/cpu.h> 31#include <asm/mach-types.h>
33#include <plat/gpmc.h>
34#include <plat/sdrc.h>
35#include <plat/omap_device.h>
36 32
37#include "soc.h" 33#include "soc.h"
38#include "common.h" 34#include "common.h"
35#include "omap_device.h"
36#include "gpmc.h"
39 37
40#define DEVICE_NAME "omap-gpmc" 38#define DEVICE_NAME "omap-gpmc"
41 39
@@ -59,6 +57,9 @@
59#define GPMC_ECC_SIZE_CONFIG 0x1fc 57#define GPMC_ECC_SIZE_CONFIG 0x1fc
60#define GPMC_ECC1_RESULT 0x200 58#define GPMC_ECC1_RESULT 0x200
61#define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ 59#define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */
60#define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */
61#define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */
62#define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */
62 63
63/* GPMC ECC control settings */ 64/* GPMC ECC control settings */
64#define GPMC_ECC_CTRL_ECCCLEAR 0x100 65#define GPMC_ECC_CTRL_ECCCLEAR 0x100
@@ -75,6 +76,7 @@
75 76
76#define GPMC_CS0_OFFSET 0x60 77#define GPMC_CS0_OFFSET 0x60
77#define GPMC_CS_SIZE 0x30 78#define GPMC_CS_SIZE 0x30
79#define GPMC_BCH_SIZE 0x10
78 80
79#define GPMC_MEM_START 0x00000000 81#define GPMC_MEM_START 0x00000000
80#define GPMC_MEM_END 0x3FFFFFFF 82#define GPMC_MEM_END 0x3FFFFFFF
@@ -137,7 +139,6 @@ static struct resource gpmc_mem_root;
137static struct resource gpmc_cs_mem[GPMC_CS_NUM]; 139static struct resource gpmc_cs_mem[GPMC_CS_NUM];
138static DEFINE_SPINLOCK(gpmc_mem_lock); 140static DEFINE_SPINLOCK(gpmc_mem_lock);
139static unsigned int gpmc_cs_map; /* flag for cs which are initialized */ 141static unsigned int gpmc_cs_map; /* flag for cs which are initialized */
140static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */
141static struct device *gpmc_dev; 142static struct device *gpmc_dev;
142static int gpmc_irq; 143static int gpmc_irq;
143static resource_size_t phys_base, mem_size; 144static resource_size_t phys_base, mem_size;
@@ -158,22 +159,6 @@ static u32 gpmc_read_reg(int idx)
158 return __raw_readl(gpmc_base + idx); 159 return __raw_readl(gpmc_base + idx);
159} 160}
160 161
161static void gpmc_cs_write_byte(int cs, int idx, u8 val)
162{
163 void __iomem *reg_addr;
164
165 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
166 __raw_writeb(val, reg_addr);
167}
168
169static u8 gpmc_cs_read_byte(int cs, int idx)
170{
171 void __iomem *reg_addr;
172
173 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
174 return __raw_readb(reg_addr);
175}
176
177void gpmc_cs_write_reg(int cs, int idx, u32 val) 162void gpmc_cs_write_reg(int cs, int idx, u32 val)
178{ 163{
179 void __iomem *reg_addr; 164 void __iomem *reg_addr;
@@ -288,7 +273,7 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
288 return -1 273 return -1
289#endif 274#endif
290 275
291int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) 276int gpmc_calc_divider(unsigned int sync_clk)
292{ 277{
293 int div; 278 int div;
294 u32 l; 279 u32 l;
@@ -308,7 +293,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
308 int div; 293 int div;
309 u32 l; 294 u32 l;
310 295
311 div = gpmc_cs_calc_divider(cs, t->sync_clk); 296 div = gpmc_calc_divider(t->sync_clk);
312 if (div < 0) 297 if (div < 0)
313 return div; 298 return div;
314 299
@@ -509,44 +494,6 @@ void gpmc_cs_free(int cs)
509EXPORT_SYMBOL(gpmc_cs_free); 494EXPORT_SYMBOL(gpmc_cs_free);
510 495
511/** 496/**
512 * gpmc_read_status - read access request to get the different gpmc status
513 * @cmd: command type
514 * @return status
515 */
516int gpmc_read_status(int cmd)
517{
518 int status = -EINVAL;
519 u32 regval = 0;
520
521 switch (cmd) {
522 case GPMC_GET_IRQ_STATUS:
523 status = gpmc_read_reg(GPMC_IRQSTATUS);
524 break;
525
526 case GPMC_PREFETCH_FIFO_CNT:
527 regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
528 status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval);
529 break;
530
531 case GPMC_PREFETCH_COUNT:
532 regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
533 status = GPMC_PREFETCH_STATUS_COUNT(regval);
534 break;
535
536 case GPMC_STATUS_BUFFER:
537 regval = gpmc_read_reg(GPMC_STATUS);
538 /* 1 : buffer is available to write */
539 status = regval & GPMC_STATUS_BUFF_EMPTY;
540 break;
541
542 default:
543 printk(KERN_ERR "gpmc_read_status: Not supported\n");
544 }
545 return status;
546}
547EXPORT_SYMBOL(gpmc_read_status);
548
549/**
550 * gpmc_cs_configure - write request to configure gpmc 497 * gpmc_cs_configure - write request to configure gpmc
551 * @cs: chip select number 498 * @cs: chip select number
552 * @cmd: command type 499 * @cmd: command type
@@ -614,121 +561,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
614} 561}
615EXPORT_SYMBOL(gpmc_cs_configure); 562EXPORT_SYMBOL(gpmc_cs_configure);
616 563
617/**
618 * gpmc_nand_read - nand specific read access request
619 * @cs: chip select number
620 * @cmd: command type
621 */
622int gpmc_nand_read(int cs, int cmd)
623{
624 int rval = -EINVAL;
625
626 switch (cmd) {
627 case GPMC_NAND_DATA:
628 rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA);
629 break;
630
631 default:
632 printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n");
633 }
634 return rval;
635}
636EXPORT_SYMBOL(gpmc_nand_read);
637
638/**
639 * gpmc_nand_write - nand specific write request
640 * @cs: chip select number
641 * @cmd: command type
642 * @wval: value to write
643 */
644int gpmc_nand_write(int cs, int cmd, int wval)
645{
646 int err = 0;
647
648 switch (cmd) {
649 case GPMC_NAND_COMMAND:
650 gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval);
651 break;
652
653 case GPMC_NAND_ADDRESS:
654 gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval);
655 break;
656
657 case GPMC_NAND_DATA:
658 gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval);
659
660 default:
661 printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n");
662 err = -EINVAL;
663 }
664 return err;
665}
666EXPORT_SYMBOL(gpmc_nand_write);
667
668
669
670/**
671 * gpmc_prefetch_enable - configures and starts prefetch transfer
672 * @cs: cs (chip select) number
673 * @fifo_th: fifo threshold to be used for read/ write
674 * @dma_mode: dma mode enable (1) or disable (0)
675 * @u32_count: number of bytes to be transferred
676 * @is_write: prefetch read(0) or write post(1) mode
677 */
678int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
679 unsigned int u32_count, int is_write)
680{
681
682 if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
683 pr_err("gpmc: fifo threshold is not supported\n");
684 return -1;
685 } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
686 /* Set the amount of bytes to be prefetched */
687 gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
688
689 /* Set dma/mpu mode, the prefetch read / post write and
690 * enable the engine. Set which cs is has requested for.
691 */
692 gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
693 PREFETCH_FIFOTHRESHOLD(fifo_th) |
694 ENABLE_PREFETCH |
695 (dma_mode << DMA_MPU_MODE) |
696 (0x1 & is_write)));
697
698 /* Start the prefetch engine */
699 gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
700 } else {
701 return -EBUSY;
702 }
703
704 return 0;
705}
706EXPORT_SYMBOL(gpmc_prefetch_enable);
707
708/**
709 * gpmc_prefetch_reset - disables and stops the prefetch engine
710 */
711int gpmc_prefetch_reset(int cs)
712{
713 u32 config1;
714
715 /* check if the same module/cs is trying to reset */
716 config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
717 if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs)
718 return -EINVAL;
719
720 /* Stop the PFPW engine */
721 gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
722
723 /* Reset/disable the PFPW engine */
724 gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
725
726 return 0;
727}
728EXPORT_SYMBOL(gpmc_prefetch_reset);
729
730void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) 564void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
731{ 565{
566 int i;
567
732 reg->gpmc_status = gpmc_base + GPMC_STATUS; 568 reg->gpmc_status = gpmc_base + GPMC_STATUS;
733 reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + 569 reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
734 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; 570 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
@@ -744,7 +580,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
744 reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; 580 reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
745 reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; 581 reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
746 reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; 582 reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
747 reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0; 583
584 for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) {
585 reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 +
586 GPMC_BCH_SIZE * i;
587 reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 +
588 GPMC_BCH_SIZE * i;
589 reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 +
590 GPMC_BCH_SIZE * i;
591 reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
592 GPMC_BCH_SIZE * i;
593 }
748} 594}
749 595
750int gpmc_get_client_irq(unsigned irq_config) 596int gpmc_get_client_irq(unsigned irq_config)
@@ -1093,267 +939,3 @@ void omap3_gpmc_restore_context(void)
1093 } 939 }
1094} 940}
1095#endif /* CONFIG_ARCH_OMAP3 */ 941#endif /* CONFIG_ARCH_OMAP3 */
1096
1097/**
1098 * gpmc_enable_hwecc - enable hardware ecc functionality
1099 * @cs: chip select number
1100 * @mode: read/write mode
1101 * @dev_width: device bus width(1 for x16, 0 for x8)
1102 * @ecc_size: bytes for which ECC will be generated
1103 */
1104int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
1105{
1106 unsigned int val;
1107
1108 /* check if ecc module is in used */
1109 if (gpmc_ecc_used != -EINVAL)
1110 return -EINVAL;
1111
1112 gpmc_ecc_used = cs;
1113
1114 /* clear ecc and enable bits */
1115 gpmc_write_reg(GPMC_ECC_CONTROL,
1116 GPMC_ECC_CTRL_ECCCLEAR |
1117 GPMC_ECC_CTRL_ECCREG1);
1118
1119 /* program ecc and result sizes */
1120 val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
1121 gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val);
1122
1123 switch (mode) {
1124 case GPMC_ECC_READ:
1125 case GPMC_ECC_WRITE:
1126 gpmc_write_reg(GPMC_ECC_CONTROL,
1127 GPMC_ECC_CTRL_ECCCLEAR |
1128 GPMC_ECC_CTRL_ECCREG1);
1129 break;
1130 case GPMC_ECC_READSYN:
1131 gpmc_write_reg(GPMC_ECC_CONTROL,
1132 GPMC_ECC_CTRL_ECCCLEAR |
1133 GPMC_ECC_CTRL_ECCDISABLE);
1134 break;
1135 default:
1136 printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
1137 break;
1138 }
1139
1140 /* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */
1141 val = (dev_width << 7) | (cs << 1) | (0x1);
1142 gpmc_write_reg(GPMC_ECC_CONFIG, val);
1143 return 0;
1144}
1145EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
1146
1147/**
1148 * gpmc_calculate_ecc - generate non-inverted ecc bytes
1149 * @cs: chip select number
1150 * @dat: data pointer over which ecc is computed
1151 * @ecc_code: ecc code buffer
1152 *
1153 * Using non-inverted ECC is considered ugly since writing a blank
1154 * page (padding) will clear the ECC bytes. This is not a problem as long
1155 * no one is trying to write data on the seemingly unused page. Reading
1156 * an erased page will produce an ECC mismatch between generated and read
1157 * ECC bytes that has to be dealt with separately.
1158 */
1159int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
1160{
1161 unsigned int val = 0x0;
1162
1163 if (gpmc_ecc_used != cs)
1164 return -EINVAL;
1165
1166 /* read ecc result */
1167 val = gpmc_read_reg(GPMC_ECC1_RESULT);
1168 *ecc_code++ = val; /* P128e, ..., P1e */
1169 *ecc_code++ = val >> 16; /* P128o, ..., P1o */
1170 /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
1171 *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
1172
1173 gpmc_ecc_used = -EINVAL;
1174 return 0;
1175}
1176EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
1177
1178#ifdef CONFIG_ARCH_OMAP3
1179
1180/**
1181 * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality
1182 * @cs: chip select number
1183 * @nsectors: how many 512-byte sectors to process
1184 * @nerrors: how many errors to correct per sector (4 or 8)
1185 *
1186 * This function must be executed before any call to gpmc_enable_hwecc_bch.
1187 */
1188int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors)
1189{
1190 /* check if ecc module is in use */
1191 if (gpmc_ecc_used != -EINVAL)
1192 return -EINVAL;
1193
1194 /* support only OMAP3 class */
1195 if (!cpu_is_omap34xx()) {
1196 printk(KERN_ERR "BCH ecc is not supported on this CPU\n");
1197 return -EINVAL;
1198 }
1199
1200 /*
1201 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
1202 * Other chips may be added if confirmed to work.
1203 */
1204 if ((nerrors == 4) &&
1205 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
1206 printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n");
1207 return -EINVAL;
1208 }
1209
1210 /* sanity check */
1211 if (nsectors > 8) {
1212 printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n",
1213 nsectors);
1214 return -EINVAL;
1215 }
1216
1217 return 0;
1218}
1219EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch);
1220
1221/**
1222 * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality
1223 * @cs: chip select number
1224 * @mode: read/write mode
1225 * @dev_width: device bus width(1 for x16, 0 for x8)
1226 * @nsectors: how many 512-byte sectors to process
1227 * @nerrors: how many errors to correct per sector (4 or 8)
1228 */
1229int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
1230 int nerrors)
1231{
1232 unsigned int val;
1233
1234 /* check if ecc module is in use */
1235 if (gpmc_ecc_used != -EINVAL)
1236 return -EINVAL;
1237
1238 gpmc_ecc_used = cs;
1239
1240 /* clear ecc and enable bits */
1241 gpmc_write_reg(GPMC_ECC_CONTROL, 0x1);
1242
1243 /*
1244 * When using BCH, sector size is hardcoded to 512 bytes.
1245 * Here we are using wrapping mode 6 both for reading and writing, with:
1246 * size0 = 0 (no additional protected byte in spare area)
1247 * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
1248 */
1249 gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 << 22) | (0 << 12));
1250
1251 /* BCH configuration */
1252 val = ((1 << 16) | /* enable BCH */
1253 (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
1254 (0x06 << 8) | /* wrap mode = 6 */
1255 (dev_width << 7) | /* bus width */
1256 (((nsectors-1) & 0x7) << 4) | /* number of sectors */
1257 (cs << 1) | /* ECC CS */
1258 (0x1)); /* enable ECC */
1259
1260 gpmc_write_reg(GPMC_ECC_CONFIG, val);
1261 gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
1262 return 0;
1263}
1264EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch);
1265
1266/**
1267 * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes
1268 * @cs: chip select number
1269 * @dat: The pointer to data on which ecc is computed
1270 * @ecc: The ecc output buffer
1271 */
1272int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc)
1273{
1274 int i;
1275 unsigned long nsectors, reg, val1, val2;
1276
1277 if (gpmc_ecc_used != cs)
1278 return -EINVAL;
1279
1280 nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
1281
1282 for (i = 0; i < nsectors; i++) {
1283
1284 reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
1285
1286 /* Read hw-computed remainder */
1287 val1 = gpmc_read_reg(reg + 0);
1288 val2 = gpmc_read_reg(reg + 4);
1289
1290 /*
1291 * Add constant polynomial to remainder, in order to get an ecc
1292 * sequence of 0xFFs for a buffer filled with 0xFFs; and
1293 * left-justify the resulting polynomial.
1294 */
1295 *ecc++ = 0x28 ^ ((val2 >> 12) & 0xFF);
1296 *ecc++ = 0x13 ^ ((val2 >> 4) & 0xFF);
1297 *ecc++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
1298 *ecc++ = 0x39 ^ ((val1 >> 20) & 0xFF);
1299 *ecc++ = 0x96 ^ ((val1 >> 12) & 0xFF);
1300 *ecc++ = 0xac ^ ((val1 >> 4) & 0xFF);
1301 *ecc++ = 0x7f ^ ((val1 & 0xF) << 4);
1302 }
1303
1304 gpmc_ecc_used = -EINVAL;
1305 return 0;
1306}
1307EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4);
1308
1309/**
1310 * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes
1311 * @cs: chip select number
1312 * @dat: The pointer to data on which ecc is computed
1313 * @ecc: The ecc output buffer
1314 */
1315int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc)
1316{
1317 int i;
1318 unsigned long nsectors, reg, val1, val2, val3, val4;
1319
1320 if (gpmc_ecc_used != cs)
1321 return -EINVAL;
1322
1323 nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
1324
1325 for (i = 0; i < nsectors; i++) {
1326
1327 reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
1328
1329 /* Read hw-computed remainder */
1330 val1 = gpmc_read_reg(reg + 0);
1331 val2 = gpmc_read_reg(reg + 4);
1332 val3 = gpmc_read_reg(reg + 8);
1333 val4 = gpmc_read_reg(reg + 12);
1334
1335 /*
1336 * Add constant polynomial to remainder, in order to get an ecc
1337 * sequence of 0xFFs for a buffer filled with 0xFFs.
1338 */
1339 *ecc++ = 0xef ^ (val4 & 0xFF);
1340 *ecc++ = 0x51 ^ ((val3 >> 24) & 0xFF);
1341 *ecc++ = 0x2e ^ ((val3 >> 16) & 0xFF);
1342 *ecc++ = 0x09 ^ ((val3 >> 8) & 0xFF);
1343 *ecc++ = 0xed ^ (val3 & 0xFF);
1344 *ecc++ = 0x93 ^ ((val2 >> 24) & 0xFF);
1345 *ecc++ = 0x9a ^ ((val2 >> 16) & 0xFF);
1346 *ecc++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
1347 *ecc++ = 0x97 ^ (val2 & 0xFF);
1348 *ecc++ = 0x79 ^ ((val1 >> 24) & 0xFF);
1349 *ecc++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
1350 *ecc++ = 0x24 ^ ((val1 >> 8) & 0xFF);
1351 *ecc++ = 0xb5 ^ (val1 & 0xFF);
1352 }
1353
1354 gpmc_ecc_used = -EINVAL;
1355 return 0;
1356}
1357EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8);
1358
1359#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/mach-omap2/gpmc.h
index 2e6e2597178c..79f4dfc2adb3 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/mach-omap2/gpmc.h
@@ -11,6 +11,8 @@
11#ifndef __OMAP2_GPMC_H 11#ifndef __OMAP2_GPMC_H
12#define __OMAP2_GPMC_H 12#define __OMAP2_GPMC_H
13 13
14#include <linux/platform_data/mtd-nand-omap2.h>
15
14/* Maximum Number of Chip Selects */ 16/* Maximum Number of Chip Selects */
15#define GPMC_CS_NUM 8 17#define GPMC_CS_NUM 8
16 18
@@ -32,15 +34,6 @@
32#define GPMC_SET_IRQ_STATUS 0x00000004 34#define GPMC_SET_IRQ_STATUS 0x00000004
33#define GPMC_CONFIG_WP 0x00000005 35#define GPMC_CONFIG_WP 0x00000005
34 36
35#define GPMC_GET_IRQ_STATUS 0x00000006
36#define GPMC_PREFETCH_FIFO_CNT 0x00000007 /* bytes available in FIFO for r/w */
37#define GPMC_PREFETCH_COUNT 0x00000008 /* remaining bytes to be read/write*/
38#define GPMC_STATUS_BUFFER 0x00000009 /* 1: buffer is available to write */
39
40#define GPMC_NAND_COMMAND 0x0000000a
41#define GPMC_NAND_ADDRESS 0x0000000b
42#define GPMC_NAND_DATA 0x0000000c
43
44#define GPMC_ENABLE_IRQ 0x0000000d 37#define GPMC_ENABLE_IRQ 0x0000000d
45 38
46/* ECC commands */ 39/* ECC commands */
@@ -76,25 +69,10 @@
76#define GPMC_DEVICETYPE_NOR 0 69#define GPMC_DEVICETYPE_NOR 0
77#define GPMC_DEVICETYPE_NAND 2 70#define GPMC_DEVICETYPE_NAND 2
78#define GPMC_CONFIG_WRITEPROTECT 0x00000010 71#define GPMC_CONFIG_WRITEPROTECT 0x00000010
79#define GPMC_STATUS_BUFF_EMPTY 0x00000001
80#define WR_RD_PIN_MONITORING 0x00600000 72#define WR_RD_PIN_MONITORING 0x00600000
81#define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
82#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
83#define GPMC_IRQ_FIFOEVENTENABLE 0x01 73#define GPMC_IRQ_FIFOEVENTENABLE 0x01
84#define GPMC_IRQ_COUNT_EVENT 0x02 74#define GPMC_IRQ_COUNT_EVENT 0x02
85 75
86#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
87#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
88
89enum omap_ecc {
90 /* 1-bit ecc: stored at end of spare area */
91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93 /* 1-bit ecc: stored at beginning of spare area as romcode */
94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
95 OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
96 OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
97};
98 76
99/* 77/*
100 * Note that all values in this struct are in nanoseconds except sync_clk 78 * Note that all values in this struct are in nanoseconds except sync_clk
@@ -133,22 +111,6 @@ struct gpmc_timings {
133 u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ 111 u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
134}; 112};
135 113
136struct gpmc_nand_regs {
137 void __iomem *gpmc_status;
138 void __iomem *gpmc_nand_command;
139 void __iomem *gpmc_nand_address;
140 void __iomem *gpmc_nand_data;
141 void __iomem *gpmc_prefetch_config1;
142 void __iomem *gpmc_prefetch_config2;
143 void __iomem *gpmc_prefetch_control;
144 void __iomem *gpmc_prefetch_status;
145 void __iomem *gpmc_ecc_config;
146 void __iomem *gpmc_ecc_control;
147 void __iomem *gpmc_ecc_size_config;
148 void __iomem *gpmc_ecc1_result;
149 void __iomem *gpmc_bch_result0;
150};
151
152extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); 114extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
153extern int gpmc_get_client_irq(unsigned irq_config); 115extern int gpmc_get_client_irq(unsigned irq_config);
154 116
@@ -160,31 +122,14 @@ extern unsigned long gpmc_get_fclk_period(void);
160 122
161extern void gpmc_cs_write_reg(int cs, int idx, u32 val); 123extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
162extern u32 gpmc_cs_read_reg(int cs, int idx); 124extern u32 gpmc_cs_read_reg(int cs, int idx);
163extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); 125extern int gpmc_calc_divider(unsigned int sync_clk);
164extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); 126extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t);
165extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); 127extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
166extern void gpmc_cs_free(int cs); 128extern void gpmc_cs_free(int cs);
167extern int gpmc_cs_set_reserved(int cs, int reserved); 129extern int gpmc_cs_set_reserved(int cs, int reserved);
168extern int gpmc_cs_reserved(int cs); 130extern int gpmc_cs_reserved(int cs);
169extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
170 unsigned int u32_count, int is_write);
171extern int gpmc_prefetch_reset(int cs);
172extern void omap3_gpmc_save_context(void); 131extern void omap3_gpmc_save_context(void);
173extern void omap3_gpmc_restore_context(void); 132extern void omap3_gpmc_restore_context(void);
174extern int gpmc_read_status(int cmd);
175extern int gpmc_cs_configure(int cs, int cmd, int wval); 133extern int gpmc_cs_configure(int cs, int cmd, int wval);
176extern int gpmc_nand_read(int cs, int cmd);
177extern int gpmc_nand_write(int cs, int cmd, int wval);
178
179int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);
180int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);
181
182#ifdef CONFIG_ARCH_OMAP3
183int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors);
184int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
185 int nerrors);
186int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc);
187int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc);
188#endif /* CONFIG_ARCH_OMAP3 */
189 134
190#endif 135#endif
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c
index e003f2bba30c..3da8900598c8 100644
--- a/arch/arm/mach-omap2/hdq1w.c
+++ b/arch/arm/mach-omap2/hdq1w.c
@@ -27,8 +27,8 @@
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29 29
30#include <plat/omap_hwmod.h> 30#include "omap_hwmod.h"
31#include <plat/omap_device.h> 31#include "omap_device.h"
32#include "hdq1w.h" 32#include "hdq1w.h"
33 33
34#include "common.h" 34#include "common.h"
diff --git a/arch/arm/mach-omap2/hdq1w.h b/arch/arm/mach-omap2/hdq1w.h
index 0c1efc846d8d..c7e08d2a7a46 100644
--- a/arch/arm/mach-omap2/hdq1w.h
+++ b/arch/arm/mach-omap2/hdq1w.h
@@ -21,7 +21,7 @@
21#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H 21#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H
22#define ARCH_ARM_MACH_OMAP2_HDQ1W_H 22#define ARCH_ARM_MACH_OMAP2_HDQ1W_H
23 23
24#include <plat/omap_hwmod.h> 24#include "omap_hwmod.h"
25 25
26/* 26/*
27 * XXX A future cleanup patch should modify 27 * XXX A future cleanup patch should modify
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 4d3a6324155f..4a964338992a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -14,14 +14,14 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <mach/hardware.h>
18#include <linux/platform_data/gpio-omap.h> 17#include <linux/platform_data/gpio-omap.h>
19 18
20#include <plat/mmc.h> 19#include "soc.h"
21#include <plat/omap-pm.h> 20#include "omap_device.h"
22#include <plat/omap_device.h> 21#include "omap-pm.h"
23 22
24#include "mux.h" 23#include "mux.h"
24#include "mmc.h"
25#include "hsmmc.h" 25#include "hsmmc.h"
26#include "control.h" 26#include "control.h"
27 27
diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c
index 8763c8520dc2..1df9b5feda16 100644
--- a/arch/arm/mach-omap2/hwspinlock.c
+++ b/arch/arm/mach-omap2/hwspinlock.c
@@ -21,8 +21,8 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/hwspinlock.h> 22#include <linux/hwspinlock.h>
23 23
24#include <plat/omap_hwmod.h> 24#include "omap_hwmod.h"
25#include <plat/omap_device.h> 25#include "omap_device.h"
26 26
27static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = { 27static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = {
28 .base_id = 0, 28 .base_id = 0,
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67b321f..4e63097e3cd8 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,11 +19,13 @@
19 * 19 *
20 */ 20 */
21 21
22#include <plat/i2c.h> 22#include "soc.h"
23#include "common.h" 23#include "common.h"
24#include <plat/omap_hwmod.h> 24#include "omap_hwmod.h"
25#include "omap_device.h"
25 26
26#include "mux.h" 27#include "mux.h"
28#include "i2c.h"
27 29
28/* In register I2C_CON, Bit 15 is the I2C enable bit */ 30/* In register I2C_CON, Bit 15 is the I2C enable bit */
29#define I2C_EN BIT(15) 31#define I2C_EN BIT(15)
@@ -33,7 +35,9 @@
33/* Maximum microseconds to wait for OMAP module to softreset */ 35/* Maximum microseconds to wait for OMAP module to softreset */
34#define MAX_MODULE_SOFTRESET_WAIT 10000 36#define MAX_MODULE_SOFTRESET_WAIT 10000
35 37
36void __init omap2_i2c_mux_pins(int bus_id) 38#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
39
40static void __init omap2_i2c_mux_pins(int bus_id)
37{ 41{
38 char mux_name[sizeof("i2c2_scl.i2c2_scl")]; 42 char mux_name[sizeof("i2c2_scl.i2c2_scl")];
39 43
@@ -104,3 +108,62 @@ int omap_i2c_reset(struct omap_hwmod *oh)
104 108
105 return 0; 109 return 0;
106} 110}
111
112static int __init omap_i2c_nr_ports(void)
113{
114 int ports = 0;
115
116 if (cpu_is_omap24xx())
117 ports = 2;
118 else if (cpu_is_omap34xx())
119 ports = 3;
120 else if (cpu_is_omap44xx())
121 ports = 4;
122 return ports;
123}
124
125static const char name[] = "omap_i2c";
126
127int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
128 int bus_id)
129{
130 int l;
131 struct omap_hwmod *oh;
132 struct platform_device *pdev;
133 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
134 struct omap_i2c_bus_platform_data *pdata;
135 struct omap_i2c_dev_attr *dev_attr;
136
137 if (bus_id > omap_i2c_nr_ports())
138 return -EINVAL;
139
140 omap2_i2c_mux_pins(bus_id);
141
142 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
143 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
144 "String buffer overflow in I2C%d device setup\n", bus_id);
145 oh = omap_hwmod_lookup(oh_name);
146 if (!oh) {
147 pr_err("Could not look up %s\n", oh_name);
148 return -EEXIST;
149 }
150
151 pdata = i2c_pdata;
152 /*
153 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
154 * use, and functionality implementation flags, up to the OMAP I2C
155 * driver via platform data
156 */
157 pdata->rev = oh->class->rev;
158
159 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
160 pdata->flags = dev_attr->flags;
161
162 pdev = omap_device_build(name, bus_id, oh, pdata,
163 sizeof(struct omap_i2c_bus_platform_data),
164 NULL, 0, 0);
165 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
166
167 return PTR_RET(pdev);
168}
169
diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h
new file mode 100644
index 000000000000..42b6f2e7d190
--- /dev/null
+++ b/arch/arm/mach-omap2/i2c.h
@@ -0,0 +1,42 @@
1/*
2 * Helper module for board specific I2C bus registration
3 *
4 * Copyright (C) 2009 Nokia Corporation.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <plat/i2c.h>
23
24#ifndef __MACH_OMAP2_I2C_H
25#define __MACH_OMAP2_I2C_H
26
27/**
28 * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
29 * @fifo_depth: total controller FIFO size (in bytes)
30 * @flags: differences in hardware support capability
31 *
32 * @fifo_depth represents what exists on the hardware, not what is
33 * actually configured at runtime by the device driver.
34 */
35struct omap_i2c_dev_attr {
36 u8 fifo_depth;
37 u32 flags;
38};
39
40int omap_i2c_reset(struct omap_hwmod *oh);
41
42#endif /* __MACH_OMAP2_I2C_H */
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 93d10de7129f..cfaed13d0040 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
13 13
14#include <linux/serial_reg.h> 14#include <linux/serial_reg.h>
15 15
16#include <plat/serial.h> 16#include <mach/serial.h>
17 17
18#define UART_OFFSET(addr) ((addr) & 0x00ffffff) 18#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
19 19
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
deleted file mode 100644
index 5621cc59c9f4..000000000000
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/*
2 * arch/arm/mach-omap2/include/mach/gpio.h
3 */
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/mach-omap2/include/mach/serial.h
index 65fce44dce34..70eda00db7a4 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/mach-omap2/include/mach/serial.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/serial.h
3 *
4 * Copyright (C) 2009 Texas Instruments 2 * Copyright (C) 2009 Texas Instruments
5 * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> 3 * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * 4 *
@@ -10,11 +8,6 @@
10 * GNU General Public License for more details. 8 * GNU General Public License for more details.
11 */ 9 */
12 10
13#ifndef __ASM_ARCH_SERIAL_H
14#define __ASM_ARCH_SERIAL_H
15
16#include <linux/init.h>
17
18/* 11/*
19 * Memory entry used for the DEBUG_LL UART configuration, relative to 12 * Memory entry used for the DEBUG_LL UART configuration, relative to
20 * start of RAM. See also uncompress.h and debug-macro.S. 13 * start of RAM. See also uncompress.h and debug-macro.S.
@@ -29,11 +22,6 @@
29 */ 22 */
30#define OMAP_UART_INFO_OFS 0x3ffc 23#define OMAP_UART_INFO_OFS 0x3ffc
31 24
32/* OMAP1 serial ports */
33#define OMAP1_UART1_BASE 0xfffb0000
34#define OMAP1_UART2_BASE 0xfffb0800
35#define OMAP1_UART3_BASE 0xfffb9800
36
37/* OMAP2 serial ports */ 25/* OMAP2 serial ports */
38#define OMAP2_UART1_BASE 0x4806a000 26#define OMAP2_UART1_BASE 0x4806a000
39#define OMAP2_UART2_BASE 0x4806c000 27#define OMAP2_UART2_BASE 0x4806c000
@@ -76,20 +64,14 @@
76#define ZOOM_UART_VIRT 0xfa400000 64#define ZOOM_UART_VIRT 0xfa400000
77 65
78#define OMAP_PORT_SHIFT 2 66#define OMAP_PORT_SHIFT 2
79#define OMAP7XX_PORT_SHIFT 0
80#define ZOOM_PORT_SHIFT 1 67#define ZOOM_PORT_SHIFT 1
81 68
82#define OMAP1510_BASE_BAUD (12000000/16)
83#define OMAP16XX_BASE_BAUD (48000000/16)
84#define OMAP24XX_BASE_BAUD (48000000/16) 69#define OMAP24XX_BASE_BAUD (48000000/16)
85 70
86/* 71/*
87 * DEBUG_LL port encoding stored into the UART1 scratchpad register by 72 * DEBUG_LL port encoding stored into the UART1 scratchpad register by
88 * decomp_setup in uncompress.h 73 * decomp_setup in uncompress.h
89 */ 74 */
90#define OMAP1UART1 11
91#define OMAP1UART2 12
92#define OMAP1UART3 13
93#define OMAP2UART1 21 75#define OMAP2UART1 21
94#define OMAP2UART2 22 76#define OMAP2UART2 22
95#define OMAP2UART3 23 77#define OMAP2UART3 23
@@ -109,15 +91,6 @@
109#define OMAP5UART4 OMAP4UART4 91#define OMAP5UART4 OMAP4UART4
110#define ZOOM_UART 95 /* Only on zoom2/3 */ 92#define ZOOM_UART 95 /* Only on zoom2/3 */
111 93
112/* This is only used by 8250.c for omap1510 */
113#define is_omap_port(pt) ({int __ret = 0; \
114 if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
115 (pt)->port.mapbase == OMAP1_UART2_BASE || \
116 (pt)->port.mapbase == OMAP1_UART3_BASE) \
117 __ret = 1; \
118 __ret; \
119 })
120
121#ifndef __ASSEMBLER__ 94#ifndef __ASSEMBLER__
122 95
123struct omap_board_data; 96struct omap_board_data;
@@ -128,5 +101,3 @@ extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
128extern void omap_serial_init_port(struct omap_board_data *bdata, 101extern void omap_serial_init_port(struct omap_board_data *bdata,
129 struct omap_uart_port_info *platform_data); 102 struct omap_uart_port_info *platform_data);
130#endif 103#endif
131
132#endif
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h
index 78e0557bfd4e..8e3546d3e041 100644
--- a/arch/arm/mach-omap2/include/mach/uncompress.h
+++ b/arch/arm/mach-omap2/include/mach/uncompress.h
@@ -1,5 +1,176 @@
1/* 1/*
2 * arch/arm/mach-omap2/include/mach/uncompress.h 2 * arch/arm/plat-omap/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Initially based on:
7 * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
8 * Copyright (C) 2000 RidgeRun, Inc.
9 * Author: Greg Lonnon <glonnon@ridgerun.com>
10 *
11 * Rewritten by:
12 * Author: <source@mvista.com>
13 * 2004 (c) MontaVista Software, Inc.
14 *
15 * This file is licensed under the terms of the GNU General Public License
16 * version 2. This program is licensed "as is" without any warranty of any
17 * kind, whether express or implied.
3 */ 18 */
4 19
5#include <plat/uncompress.h> 20#include <linux/types.h>
21#include <linux/serial_reg.h>
22
23#include <asm/memory.h>
24#include <asm/mach-types.h>
25
26#include <mach/serial.h>
27
28#define MDR1_MODE_MASK 0x07
29
30volatile u8 *uart_base;
31int uart_shift;
32
33/*
34 * Store the DEBUG_LL uart number into memory.
35 * See also debug-macro.S, and serial.c for related code.
36 */
37static void set_omap_uart_info(unsigned char port)
38{
39 /*
40 * Get address of some.bss variable and round it down
41 * a la CONFIG_AUTO_ZRELADDR.
42 */
43 u32 ram_start = (u32)&uart_shift & 0xf8000000;
44 u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
45 *uart_info = port;
46}
47
48static void putc(int c)
49{
50 if (!uart_base)
51 return;
52
53 /* Check for UART 16x mode */
54 if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
55 return;
56
57 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
58 barrier();
59 uart_base[UART_TX << uart_shift] = c;
60}
61
62static inline void flush(void)
63{
64}
65
66/*
67 * Macros to configure UART1 and debug UART
68 */
69#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \
70 if (machine_is_##mach()) { \
71 uart_base = (volatile u8 *)(dbg_uart); \
72 uart_shift = (dbg_shft); \
73 port = (dbg_id); \
74 set_omap_uart_info(port); \
75 break; \
76 }
77
78#define DEBUG_LL_OMAP2(p, mach) \
79 _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \
80 OMAP2UART##p)
81
82#define DEBUG_LL_OMAP3(p, mach) \
83 _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \
84 OMAP3UART##p)
85
86#define DEBUG_LL_OMAP4(p, mach) \
87 _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \
88 OMAP4UART##p)
89
90#define DEBUG_LL_OMAP5(p, mach) \
91 _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \
92 OMAP5UART##p)
93/* Zoom2/3 shift is different for UART1 and external port */
94#define DEBUG_LL_ZOOM(mach) \
95 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
96
97#define DEBUG_LL_TI81XX(p, mach) \
98 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
99 TI81XXUART##p)
100
101#define DEBUG_LL_AM33XX(p, mach) \
102 _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
103 AM33XXUART##p)
104
105static inline void arch_decomp_setup(void)
106{
107 int port = 0;
108
109 /*
110 * Initialize the port based on the machine ID from the bootloader.
111 * Note that we're using macros here instead of switch statement
112 * as machine_is functions are optimized out for the boards that
113 * are not selected.
114 */
115 do {
116 /* omap2 based boards using UART1 */
117 DEBUG_LL_OMAP2(1, omap_2430sdp);
118 DEBUG_LL_OMAP2(1, omap_apollon);
119 DEBUG_LL_OMAP2(1, omap_h4);
120
121 /* omap2 based boards using UART3 */
122 DEBUG_LL_OMAP2(3, nokia_n800);
123 DEBUG_LL_OMAP2(3, nokia_n810);
124 DEBUG_LL_OMAP2(3, nokia_n810_wimax);
125
126 /* omap3 based boards using UART1 */
127 DEBUG_LL_OMAP2(1, omap3evm);
128 DEBUG_LL_OMAP3(1, omap_3430sdp);
129 DEBUG_LL_OMAP3(1, omap_3630sdp);
130 DEBUG_LL_OMAP3(1, omap3530_lv_som);
131 DEBUG_LL_OMAP3(1, omap3_torpedo);
132
133 /* omap3 based boards using UART3 */
134 DEBUG_LL_OMAP3(3, cm_t35);
135 DEBUG_LL_OMAP3(3, cm_t3517);
136 DEBUG_LL_OMAP3(3, cm_t3730);
137 DEBUG_LL_OMAP3(3, craneboard);
138 DEBUG_LL_OMAP3(3, devkit8000);
139 DEBUG_LL_OMAP3(3, igep0020);
140 DEBUG_LL_OMAP3(3, igep0030);
141 DEBUG_LL_OMAP3(3, nokia_rm680);
142 DEBUG_LL_OMAP3(3, nokia_rm696);
143 DEBUG_LL_OMAP3(3, nokia_rx51);
144 DEBUG_LL_OMAP3(3, omap3517evm);
145 DEBUG_LL_OMAP3(3, omap3_beagle);
146 DEBUG_LL_OMAP3(3, omap3_pandora);
147 DEBUG_LL_OMAP3(3, omap_ldp);
148 DEBUG_LL_OMAP3(3, overo);
149 DEBUG_LL_OMAP3(3, touchbook);
150
151 /* omap4 based boards using UART3 */
152 DEBUG_LL_OMAP4(3, omap_4430sdp);
153 DEBUG_LL_OMAP4(3, omap4_panda);
154
155 /* omap5 based boards using UART3 */
156 DEBUG_LL_OMAP5(3, omap5_sevm);
157
158 /* zoom2/3 external uart */
159 DEBUG_LL_ZOOM(omap_zoom2);
160 DEBUG_LL_ZOOM(omap_zoom3);
161
162 /* TI8168 base boards using UART3 */
163 DEBUG_LL_TI81XX(3, ti8168evm);
164
165 /* TI8148 base boards using UART1 */
166 DEBUG_LL_TI81XX(1, ti8148evm);
167
168 /* AM33XX base boards using UART1 */
169 DEBUG_LL_AM33XX(1, am335xevm);
170 } while (0);
171}
172
173/*
174 * nothing to do
175 */
176#define arch_decomp_wdog()
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4234d28dc171..807b8d919f81 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -25,14 +25,9 @@
25#include <asm/tlb.h> 25#include <asm/tlb.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <plat/sram.h> 28#include <plat-omap/dma-omap.h>
29#include <plat/sdrc.h>
30#include <plat/serial.h>
31#include <plat/omap-pm.h>
32#include <plat/omap_hwmod.h>
33#include <plat/multi.h>
34#include <plat/dma.h>
35 29
30#include "omap_hwmod.h"
36#include "soc.h" 31#include "soc.h"
37#include "iomap.h" 32#include "iomap.h"
38#include "voltage.h" 33#include "voltage.h"
@@ -43,6 +38,10 @@
43#include "clock2xxx.h" 38#include "clock2xxx.h"
44#include "clock3xxx.h" 39#include "clock3xxx.h"
45#include "clock44xx.h" 40#include "clock44xx.h"
41#include "omap-pm.h"
42#include "sdrc.h"
43#include "serial.h"
44#include "sram.h"
46 45
47/* 46/*
48 * The machine specific code may provide the extra mapping besides the 47 * The machine specific code may provide the extra mapping besides the
@@ -354,11 +353,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
354 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 353 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
355} 354}
356 355
357static void __init omap_common_init_early(void)
358{
359 omap_init_consistent_dma_size();
360}
361
362static void __init omap_hwmod_init_postsetup(void) 356static void __init omap_hwmod_init_postsetup(void)
363{ 357{
364 u8 postsetup_state; 358 u8 postsetup_state;
@@ -379,7 +373,6 @@ void __init omap2420_init_early(void)
379{ 373{
380 omap2_set_globals_242x(); 374 omap2_set_globals_242x();
381 omap2xxx_check_revision(); 375 omap2xxx_check_revision();
382 omap_common_init_early();
383 omap2xxx_voltagedomains_init(); 376 omap2xxx_voltagedomains_init();
384 omap242x_powerdomains_init(); 377 omap242x_powerdomains_init();
385 omap242x_clockdomains_init(); 378 omap242x_clockdomains_init();
@@ -401,7 +394,6 @@ void __init omap2430_init_early(void)
401{ 394{
402 omap2_set_globals_243x(); 395 omap2_set_globals_243x();
403 omap2xxx_check_revision(); 396 omap2xxx_check_revision();
404 omap_common_init_early();
405 omap2xxx_voltagedomains_init(); 397 omap2xxx_voltagedomains_init();
406 omap243x_powerdomains_init(); 398 omap243x_powerdomains_init();
407 omap243x_clockdomains_init(); 399 omap243x_clockdomains_init();
@@ -428,7 +420,6 @@ void __init omap3_init_early(void)
428 omap2_set_globals_3xxx(); 420 omap2_set_globals_3xxx();
429 omap3xxx_check_revision(); 421 omap3xxx_check_revision();
430 omap3xxx_check_features(); 422 omap3xxx_check_features();
431 omap_common_init_early();
432 omap3xxx_voltagedomains_init(); 423 omap3xxx_voltagedomains_init();
433 omap3xxx_powerdomains_init(); 424 omap3xxx_powerdomains_init();
434 omap3xxx_clockdomains_init(); 425 omap3xxx_clockdomains_init();
@@ -462,7 +453,6 @@ void __init ti81xx_init_early(void)
462 omap2_set_globals_ti81xx(); 453 omap2_set_globals_ti81xx();
463 omap3xxx_check_revision(); 454 omap3xxx_check_revision();
464 ti81xx_check_features(); 455 ti81xx_check_features();
465 omap_common_init_early();
466 omap3xxx_voltagedomains_init(); 456 omap3xxx_voltagedomains_init();
467 omap3xxx_powerdomains_init(); 457 omap3xxx_powerdomains_init();
468 omap3xxx_clockdomains_init(); 458 omap3xxx_clockdomains_init();
@@ -520,7 +510,6 @@ void __init am33xx_init_early(void)
520 omap2_set_globals_am33xx(); 510 omap2_set_globals_am33xx();
521 omap3xxx_check_revision(); 511 omap3xxx_check_revision();
522 ti81xx_check_features(); 512 ti81xx_check_features();
523 omap_common_init_early();
524 am33xx_voltagedomains_init(); 513 am33xx_voltagedomains_init();
525 am33xx_powerdomains_init(); 514 am33xx_powerdomains_init();
526 am33xx_clockdomains_init(); 515 am33xx_clockdomains_init();
@@ -536,7 +525,6 @@ void __init omap4430_init_early(void)
536 omap2_set_globals_443x(); 525 omap2_set_globals_443x();
537 omap4xxx_check_revision(); 526 omap4xxx_check_revision();
538 omap4xxx_check_features(); 527 omap4xxx_check_features();
539 omap_common_init_early();
540 omap44xx_voltagedomains_init(); 528 omap44xx_voltagedomains_init();
541 omap44xx_powerdomains_init(); 529 omap44xx_powerdomains_init();
542 omap44xx_clockdomains_init(); 530 omap44xx_clockdomains_init();
@@ -558,7 +546,6 @@ void __init omap5_init_early(void)
558{ 546{
559 omap2_set_globals_5xxx(); 547 omap2_set_globals_5xxx();
560 omap5xxx_check_revision(); 548 omap5xxx_check_revision();
561 omap_common_init_early();
562} 549}
563#endif 550#endif
564 551
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 37f8f948047b..a106c75c5338 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -19,11 +19,12 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/platform_data/asoc-ti-mcbsp.h> 21#include <linux/platform_data/asoc-ti-mcbsp.h>
22
23#include <plat/dma.h>
24#include <plat/omap_device.h>
25#include <linux/pm_runtime.h> 22#include <linux/pm_runtime.h>
26 23
24#include <plat-omap/dma-omap.h>
25
26#include "omap_device.h"
27
27/* 28/*
28 * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. 29 * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
29 * Sidetone needs non-gated ICLK and sidetone autoidle is broken. 30 * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h
new file mode 100644
index 000000000000..0cd4b089da9c
--- /dev/null
+++ b/arch/arm/mach-omap2/mmc.h
@@ -0,0 +1,23 @@
1#include <linux/mmc/host.h>
2#include <linux/platform_data/mmc-omap.h>
3
4#define OMAP24XX_NR_MMC 2
5#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
6#define OMAP2_MMC1_BASE 0x4809c000
7
8#define OMAP4_MMC_REG_OFFSET 0x100
9
10#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
11void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
12#else
13static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
14{
15}
16#endif
17
18struct omap_hwmod;
19int omap_msdi_reset(struct omap_hwmod *oh);
20
21/* called from board-specific card detection service routine */
22extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
23 int is_closed);
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index 9e57b4aadb06..627e97e30743 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -25,13 +25,12 @@
25#include <linux/err.h> 25#include <linux/err.h>
26#include <linux/platform_data/gpio-omap.h> 26#include <linux/platform_data/gpio-omap.h>
27 27
28#include <plat/omap_hwmod.h>
29#include <plat/omap_device.h>
30#include <plat/mmc.h>
31
32#include "common.h" 28#include "common.h"
33#include "control.h" 29#include "control.h"
30#include "omap_hwmod.h"
31#include "omap_device.h"
34#include "mux.h" 32#include "mux.h"
33#include "mmc.h"
35 34
36/* 35/*
37 * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register 36 * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 701e17cba468..26126343d6ac 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -36,8 +36,9 @@
36#include <linux/interrupt.h> 36#include <linux/interrupt.h>
37 37
38 38
39#include <plat/omap_hwmod.h> 39#include "omap_hwmod.h"
40 40
41#include "soc.h"
41#include "control.h" 42#include "control.h"
42#include "mux.h" 43#include "mux.h"
43#include "prm.h" 44#include "prm.h"
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ff4e6a0e9c7c..3f5fd7e3549d 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -50,6 +50,7 @@
50#include <asm/suspend.h> 50#include <asm/suspend.h>
51#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
52 52
53#include "soc.h"
53#include "common.h" 54#include "common.h"
54#include "omap44xx.h" 55#include "omap44xx.h"
55#include "omap4-sar-layout.h" 56#include "omap4-sar-layout.h"
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
index 9722f418ae1f..6a3be2bebddb 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -22,9 +22,8 @@
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24 24
25/* Interface documentation is in mach/omap-pm.h */ 25#include "omap_device.h"
26#include <plat/omap-pm.h> 26#include "omap-pm.h"
27#include <plat/omap_device.h>
28 27
29static bool off_mode_enabled; 28static bool off_mode_enabled;
30static int dummy_context_loss_counter; 29static int dummy_context_loss_counter;
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/mach-omap2/omap-pm.h
index 67faa7b8fe92..67faa7b8fe92 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/mach-omap2/omap-pm.h
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
index e089e4d1ae38..b970440cffca 100644
--- a/arch/arm/mach-omap2/omap-secure.c
+++ b/arch/arm/mach-omap2/omap-secure.c
@@ -18,7 +18,6 @@
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/memblock.h> 19#include <asm/memblock.h>
20 20
21#include <plat/omap-secure.h>
22#include "omap-secure.h" 21#include "omap-secure.h"
23 22
24static phys_addr_t omap_secure_memblock_base; 23static phys_addr_t omap_secure_memblock_base;
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index c90a43589abe..0e729170c46b 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -52,6 +52,13 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
52 u32 arg1, u32 arg2, u32 arg3, u32 arg4); 52 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
53extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); 53extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
54extern phys_addr_t omap_secure_ram_mempool_base(void); 54extern phys_addr_t omap_secure_ram_mempool_base(void);
55extern int omap_secure_ram_reserve_memblock(void);
55 56
57#ifdef CONFIG_OMAP4_ERRATA_I688
58extern int omap_barrier_reserve_memblock(void);
59#else
60static inline void omap_barrier_reserve_memblock(void)
61{ }
62#endif
56#endif /* __ASSEMBLER__ */ 63#endif /* __ASSEMBLER__ */
57#endif /* OMAP_ARCH_OMAP_SECURE_H */ 64#endif /* OMAP_ARCH_OMAP_SECURE_H */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index e1f289748c5d..3cfcd41bf8fa 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -25,16 +25,14 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/memblock.h> 26#include <asm/memblock.h>
27 27
28#include <plat/sram.h>
29#include <plat/omap-secure.h>
30#include <plat/mmc.h>
31
32#include "omap-wakeupgen.h" 28#include "omap-wakeupgen.h"
33
34#include "soc.h" 29#include "soc.h"
35#include "common.h" 30#include "common.h"
31#include "mmc.h"
36#include "hsmmc.h" 32#include "hsmmc.h"
37#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include "omap-secure.h"
35#include "sram.h"
38 36
39#ifdef CONFIG_CACHE_L2X0 37#ifdef CONFIG_CACHE_L2X0
40static void __iomem *l2cache_base; 38static void __iomem *l2cache_base;
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 7a7d1f2a65e9..0ef934fec364 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -89,9 +89,8 @@
89#include <linux/of.h> 89#include <linux/of.h>
90#include <linux/notifier.h> 90#include <linux/notifier.h>
91 91
92#include <plat/omap_device.h> 92#include "omap_device.h"
93#include <plat/omap_hwmod.h> 93#include "omap_hwmod.h"
94#include <plat/clock.h>
95 94
96/* These parameters are passed to _omap_device_{de,}activate() */ 95/* These parameters are passed to _omap_device_{de,}activate() */
97#define USE_WAKEUP_LAT 0 96#define USE_WAKEUP_LAT 0
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 106f50665804..0933c599bf89 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -34,7 +34,7 @@
34#include <linux/kernel.h> 34#include <linux/kernel.h>
35#include <linux/platform_device.h> 35#include <linux/platform_device.h>
36 36
37#include <plat/omap_hwmod.h> 37#include "omap_hwmod.h"
38 38
39extern struct dev_pm_domain omap_device_pm_domain; 39extern struct dev_pm_domain omap_device_pm_domain;
40 40
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b969ab1d258b..87eee3b62a3c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,8 +139,8 @@
139#include <linux/slab.h> 139#include <linux/slab.h>
140#include <linux/bootmem.h> 140#include <linux/bootmem.h>
141 141
142#include <plat/clock.h> 142#include "clock.h"
143#include <plat/omap_hwmod.h> 143#include "omap_hwmod.h"
144#include <plat/prcm.h> 144#include <plat/prcm.h>
145 145
146#include "soc.h" 146#include "soc.h"
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index b3349f7b1a2c..87b59b45c678 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -35,7 +35,6 @@
35#include <linux/list.h> 35#include <linux/list.h>
36#include <linux/ioport.h> 36#include <linux/ioport.h>
37#include <linux/spinlock.h> 37#include <linux/spinlock.h>
38#include <plat/cpu.h>
39 38
40struct omap_device; 39struct omap_device;
41 40
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index b5db6007c523..a8b3368dca3d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -12,21 +12,24 @@
12 * XXX handle crossbar/shared link difference for L3? 12 * XXX handle crossbar/shared link difference for L3?
13 * XXX these should be marked initdata for multi-OMAP kernels 13 * XXX these should be marked initdata for multi-OMAP kernels
14 */ 14 */
15
16#include <linux/i2c-omap.h>
15#include <linux/platform_data/spi-omap2-mcspi.h> 17#include <linux/platform_data/spi-omap2-mcspi.h>
16 18
17#include <plat/omap_hwmod.h> 19#include <plat-omap/dma-omap.h>
18#include <plat/dma.h>
19#include <plat/serial.h>
20#include <plat/i2c.h>
21#include <plat/dmtimer.h> 20#include <plat/dmtimer.h>
21
22#include "omap_hwmod.h"
22#include "l3_2xxx.h" 23#include "l3_2xxx.h"
23#include "l4_2xxx.h" 24#include "l4_2xxx.h"
24#include <plat/mmc.h>
25 25
26#include "omap_hwmod_common_data.h" 26#include "omap_hwmod_common_data.h"
27 27
28#include "cm-regbits-24xx.h" 28#include "cm-regbits-24xx.h"
29#include "prm-regbits-24xx.h" 29#include "prm-regbits-24xx.h"
30#include "i2c.h"
31#include "mmc.h"
32#include "serial.h"
30#include "wd_timer.h" 33#include "wd_timer.h"
31 34
32/* 35/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c455e41b0237..dc768c50e523 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -12,21 +12,23 @@
12 * XXX handle crossbar/shared link difference for L3? 12 * XXX handle crossbar/shared link difference for L3?
13 * XXX these should be marked initdata for multi-OMAP kernels 13 * XXX these should be marked initdata for multi-OMAP kernels
14 */ 14 */
15
16#include <linux/i2c-omap.h>
15#include <linux/platform_data/asoc-ti-mcbsp.h> 17#include <linux/platform_data/asoc-ti-mcbsp.h>
16#include <linux/platform_data/spi-omap2-mcspi.h> 18#include <linux/platform_data/spi-omap2-mcspi.h>
17 19
18#include <plat/omap_hwmod.h> 20#include <plat-omap/dma-omap.h>
19#include <plat/dma.h>
20#include <plat/serial.h>
21#include <plat/i2c.h>
22#include <plat/dmtimer.h> 21#include <plat/dmtimer.h>
23#include <plat/mmc.h> 22
23#include "omap_hwmod.h"
24#include "mmc.h"
24#include "l3_2xxx.h" 25#include "l3_2xxx.h"
25 26
26#include "soc.h" 27#include "soc.h"
27#include "omap_hwmod_common_data.h" 28#include "omap_hwmod_common_data.h"
28#include "prm-regbits-24xx.h" 29#include "prm-regbits-24xx.h"
29#include "cm-regbits-24xx.h" 30#include "cm-regbits-24xx.h"
31#include "i2c.h"
30#include "wd_timer.h" 32#include "wd_timer.h"
31 33
32/* 34/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
index cbb4ef6544ad..0413daba2dba 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
@@ -13,8 +13,7 @@
13 */ 13 */
14#include <asm/sizes.h> 14#include <asm/sizes.h>
15 15
16#include <plat/omap_hwmod.h> 16#include "omap_hwmod.h"
17#include <plat/serial.h>
18 17
19#include "omap_hwmod_common_data.h" 18#include "omap_hwmod_common_data.h"
20 19
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 8851bbb6bb24..40d6c93d9853 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -9,13 +9,14 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#include <plat/omap_hwmod.h> 12
13#include <plat/serial.h> 13#include <plat-omap/dma-omap.h>
14#include <plat/dma.h> 14
15#include <plat/common.h> 15#include "omap_hwmod.h"
16#include "hdq1w.h" 16#include "hdq1w.h"
17 17
18#include "omap_hwmod_common_data.h" 18#include "omap_hwmod_common_data.h"
19#include "dma.h"
19 20
20/* UART */ 21/* UART */
21 22
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
index 1a1287d62648..47901a5e76de 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -13,10 +13,10 @@
13 */ 13 */
14#include <asm/sizes.h> 14#include <asm/sizes.h>
15 15
16#include <plat/omap_hwmod.h> 16#include "omap_hwmod.h"
17#include <plat/serial.h>
18#include "l3_2xxx.h" 17#include "l3_2xxx.h"
19#include "l4_2xxx.h" 18#include "l4_2xxx.h"
19#include "serial.h"
20 20
21#include "omap_hwmod_common_data.h" 21#include "omap_hwmod_common_data.h"
22 22
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index bd9220ed5ab9..a0116d08cf45 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -8,13 +8,13 @@
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11#include <plat/omap_hwmod.h> 11
12#include <plat/serial.h>
13#include <linux/platform_data/gpio-omap.h> 12#include <linux/platform_data/gpio-omap.h>
14#include <plat/dma.h> 13#include <plat-omap/dma-omap.h>
15#include <plat/dmtimer.h> 14#include <plat/dmtimer.h>
16#include <linux/platform_data/spi-omap2-mcspi.h> 15#include <linux/platform_data/spi-omap2-mcspi.h>
17 16
17#include "omap_hwmod.h"
18#include "omap_hwmod_common_data.h" 18#include "omap_hwmod_common_data.h"
19#include "cm-regbits-24xx.h" 19#include "cm-regbits-24xx.h"
20#include "prm-regbits-24xx.h" 20#include "prm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1cd316d..ad8d43b33273 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -14,13 +14,11 @@
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 */ 15 */
16 16
17#include <plat/omap_hwmod.h> 17#include <linux/i2c-omap.h>
18#include <plat/cpu.h> 18
19#include "omap_hwmod.h"
19#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
20#include <linux/platform_data/spi-omap2-mcspi.h> 21#include <linux/platform_data/spi-omap2-mcspi.h>
21#include <plat/dma.h>
22#include <plat/mmc.h>
23#include <plat/i2c.h>
24 22
25#include "omap_hwmod_common_data.h" 23#include "omap_hwmod_common_data.h"
26 24
@@ -28,6 +26,8 @@
28#include "cm33xx.h" 26#include "cm33xx.h"
29#include "prm33xx.h" 27#include "prm33xx.h"
30#include "prm-regbits-33xx.h" 28#include "prm-regbits-33xx.h"
29#include "i2c.h"
30#include "mmc.h"
31 31
32/* 32/*
33 * IP blocks 33 * IP blocks
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd4..abe66ced903f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -14,16 +14,14 @@
14 * 14 *
15 * XXX these should be marked initdata for multi-OMAP kernels 15 * XXX these should be marked initdata for multi-OMAP kernels
16 */ 16 */
17
18#include <linux/i2c-omap.h>
17#include <linux/power/smartreflex.h> 19#include <linux/power/smartreflex.h>
18#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
19 21
20#include <plat/omap_hwmod.h> 22#include <plat-omap/dma-omap.h>
21#include <plat/dma.h>
22#include <plat/serial.h>
23#include "l3_3xxx.h" 23#include "l3_3xxx.h"
24#include "l4_3xxx.h" 24#include "l4_3xxx.h"
25#include <plat/i2c.h>
26#include <plat/mmc.h>
27#include <linux/platform_data/asoc-ti-mcbsp.h> 25#include <linux/platform_data/asoc-ti-mcbsp.h>
28#include <linux/platform_data/spi-omap2-mcspi.h> 26#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <plat/dmtimer.h> 27#include <plat/dmtimer.h>
@@ -32,10 +30,16 @@
32#include "am35xx.h" 30#include "am35xx.h"
33 31
34#include "soc.h" 32#include "soc.h"
33#include "omap_hwmod.h"
35#include "omap_hwmod_common_data.h" 34#include "omap_hwmod_common_data.h"
36#include "prm-regbits-34xx.h" 35#include "prm-regbits-34xx.h"
37#include "cm-regbits-34xx.h" 36#include "cm-regbits-34xx.h"
37
38#include "dma.h"
39#include "i2c.h"
40#include "mmc.h"
38#include "wd_timer.h" 41#include "wd_timer.h"
42#include "serial.h"
39 43
40/* 44/*
41 * OMAP3xxx hardware module integration data 45 * OMAP3xxx hardware module integration data
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6d..7a6132848f5d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,22 +21,23 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/platform_data/gpio-omap.h> 22#include <linux/platform_data/gpio-omap.h>
23#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
24#include <linux/i2c-omap.h>
25
26#include <plat-omap/dma-omap.h>
24 27
25#include <plat/omap_hwmod.h>
26#include <plat/i2c.h>
27#include <plat/dma.h>
28#include <linux/platform_data/spi-omap2-mcspi.h> 28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/asoc-ti-mcbsp.h> 29#include <linux/platform_data/asoc-ti-mcbsp.h>
30#include <plat/mmc.h>
31#include <plat/dmtimer.h> 30#include <plat/dmtimer.h>
32#include <plat/common.h>
33#include <plat/iommu.h> 31#include <plat/iommu.h>
34 32
33#include "omap_hwmod.h"
35#include "omap_hwmod_common_data.h" 34#include "omap_hwmod_common_data.h"
36#include "cm1_44xx.h" 35#include "cm1_44xx.h"
37#include "cm2_44xx.h" 36#include "cm2_44xx.h"
38#include "prm44xx.h" 37#include "prm44xx.h"
39#include "prm-regbits-44xx.h" 38#include "prm-regbits-44xx.h"
39#include "i2c.h"
40#include "mmc.h"
40#include "wd_timer.h" 41#include "wd_timer.h"
41 42
42/* Base offset for all OMAP4 interrupts external to MPUSS */ 43/* Base offset for all OMAP4 interrupts external to MPUSS */
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 9f1ccdc8cc8c..79d623b83e49 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -16,7 +16,7 @@
16 * data and their integration with other OMAP modules and Linux. 16 * data and their integration with other OMAP modules and Linux.
17 */ 17 */
18 18
19#include <plat/omap_hwmod.h> 19#include "omap_hwmod.h"
20 20
21#include "omap_hwmod_common_data.h" 21#include "omap_hwmod_common_data.h"
22 22
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 2bc8f1705d4a..cfcce299177c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -13,7 +13,7 @@
13#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H 13#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H
14#define __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H 14#define __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H
15 15
16#include <plat/omap_hwmod.h> 16#include "omap_hwmod.h"
17 17
18#include "common.h" 18#include "common.h"
19#include "display.h" 19#include "display.h"
diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12f98a1..7e437bf6024c 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -19,7 +19,7 @@
19#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H 19#ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
20#define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H 20#define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
21 21
22#include <plat/omap_hwmod.h> 22#include "omap_hwmod.h"
23 23
24#include "voltage.h" 24#include "voltage.h"
25 25
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index d992db8ff0b0..4d76a3ca5bf3 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -27,11 +27,11 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/err.h> 28#include <linux/err.h>
29#include <linux/usb.h> 29#include <linux/usb.h>
30 30#include <linux/usb/musb.h>
31#include <plat/usb.h>
32 31
33#include "soc.h" 32#include "soc.h"
34#include "control.h" 33#include "control.h"
34#include "usb.h"
35 35
36void am35x_musb_reset(void) 36void am35x_musb_reset(void)
37{ 37{
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a056d5..2bf35dc091be 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -18,6 +18,7 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/i2c/twl.h> 19#include <linux/i2c/twl.h>
20 20
21#include "soc.h"
21#include "voltage.h" 22#include "voltage.h"
22 23
23#include "pm.h" 24#include "pm.h"
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 58e16aef40bb..bd41d59a7cab 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -20,7 +20,7 @@
20#include <linux/opp.h> 20#include <linux/opp.h>
21#include <linux/cpu.h> 21#include <linux/cpu.h>
22 22
23#include <plat/omap_device.h> 23#include "omap_device.h"
24 24
25#include "omap_opp_data.h" 25#include "omap_opp_data.h"
26 26
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index 75cef5f67a8a..62772e0e0d69 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -19,6 +19,7 @@
19 */ 19 */
20#include <linux/module.h> 20#include <linux/module.h>
21 21
22#include "soc.h"
22#include "control.h" 23#include "control.h"
23#include "omap_opp_data.h" 24#include "omap_opp_data.h"
24#include "pm.h" 25#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 46092cd806fa..3cf4fdfd7ab0 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -27,12 +27,13 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29 29
30#include <plat/clock.h> 30#include "clock.h"
31#include "powerdomain.h" 31#include "powerdomain.h"
32#include "clockdomain.h" 32#include "clockdomain.h"
33#include <plat/dmtimer.h> 33#include <plat/dmtimer.h>
34#include <plat/omap-pm.h> 34#include "omap-pm.h"
35 35
36#include "soc.h"
36#include "cm2xxx_3xxx.h" 37#include "cm2xxx_3xxx.h"
37#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
38#include "pm.h" 39#include "pm.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index ea61c32957bd..331478f9b864 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -20,10 +20,11 @@
20 20
21#include <asm/system_misc.h> 21#include <asm/system_misc.h>
22 22
23#include <plat/omap-pm.h> 23#include "omap-pm.h"
24#include <plat/omap_device.h> 24#include "omap_device.h"
25#include "common.h" 25#include "common.h"
26 26
27#include "soc.h"
27#include "prcm-common.h" 28#include "prcm-common.h"
28#include "voltage.h" 29#include "voltage.h"
29#include "powerdomain.h" 30#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 8af6cd6ac331..9a2f5594a7dc 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -31,21 +31,24 @@
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/platform_data/gpio-omap.h> 32#include <linux/platform_data/gpio-omap.h>
33 33
34#include <asm/fncpy.h>
35
34#include <asm/mach/time.h> 36#include <asm/mach/time.h>
35#include <asm/mach/irq.h> 37#include <asm/mach/irq.h>
36#include <asm/mach-types.h> 38#include <asm/mach-types.h>
37#include <asm/system_misc.h> 39#include <asm/system_misc.h>
38 40
39#include <plat/clock.h> 41#include <plat-omap/dma-omap.h>
40#include <plat/sram.h>
41#include <plat/dma.h>
42 42
43#include "soc.h"
43#include "common.h" 44#include "common.h"
45#include "clock.h"
44#include "prm2xxx_3xxx.h" 46#include "prm2xxx_3xxx.h"
45#include "prm-regbits-24xx.h" 47#include "prm-regbits-24xx.h"
46#include "cm2xxx_3xxx.h" 48#include "cm2xxx_3xxx.h"
47#include "cm-regbits-24xx.h" 49#include "cm-regbits-24xx.h"
48#include "sdrc.h" 50#include "sdrc.h"
51#include "sram.h"
49#include "pm.h" 52#include "pm.h"
50#include "control.h" 53#include "control.h"
51#include "powerdomain.h" 54#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3a904de4313e..11f9669eb7ed 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,25 +32,26 @@
32 32
33#include <trace/events/power.h> 33#include <trace/events/power.h>
34 34
35#include <asm/fncpy.h>
35#include <asm/suspend.h> 36#include <asm/suspend.h>
36#include <asm/system_misc.h> 37#include <asm/system_misc.h>
37 38
38#include <plat/sram.h>
39#include "clockdomain.h" 39#include "clockdomain.h"
40#include "powerdomain.h" 40#include "powerdomain.h"
41#include <plat/sdrc.h>
42#include <plat/prcm.h> 41#include <plat/prcm.h>
43#include <plat/gpmc.h> 42#include <plat-omap/dma-omap.h>
44#include <plat/dma.h>
45 43
44#include "soc.h"
46#include "common.h" 45#include "common.h"
47#include "cm2xxx_3xxx.h" 46#include "cm2xxx_3xxx.h"
48#include "cm-regbits-34xx.h" 47#include "cm-regbits-34xx.h"
48#include "gpmc.h"
49#include "prm-regbits-34xx.h" 49#include "prm-regbits-34xx.h"
50 50
51#include "prm2xxx_3xxx.h" 51#include "prm2xxx_3xxx.h"
52#include "pm.h" 52#include "pm.h"
53#include "sdrc.h" 53#include "sdrc.h"
54#include "sram.h"
54#include "control.h" 55#include "control.h"
55 56
56/* pm34xx errata defined in pm.h */ 57/* pm34xx errata defined in pm.h */
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 04922d149068..7da75aed1514 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -18,6 +18,7 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20 20
21#include "soc.h"
21#include "common.h" 22#include "common.h"
22#include "clockdomain.h" 23#include "clockdomain.h"
23#include "powerdomain.h" 24#include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 2a791766283d..3cf79b54ce61 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -15,8 +15,9 @@
15 15
16#include <asm/pmu.h> 16#include <asm/pmu.h>
17 17
18#include <plat/omap_hwmod.h> 18#include "soc.h"
19#include <plat/omap_device.h> 19#include "omap_hwmod.h"
20#include "omap_device.h"
20 21
21static char *omap2_pmu_oh_names[] = {"mpu"}; 22static char *omap2_pmu_oh_names[] = {"mpu"};
22static char *omap3_pmu_oh_names[] = {"mpu", "debugss"}; 23static char *omap3_pmu_oh_names[] = {"mpu", "debugss"};
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index baee90608d11..5277d56eb37f 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -22,8 +22,6 @@
22 22
23#include <linux/atomic.h> 23#include <linux/atomic.h>
24 24
25#include <plat/cpu.h>
26
27#include "voltage.h" 25#include "voltage.h"
28 26
29/* Powerdomain basic power states */ 27/* Powerdomain basic power states */
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index 2385c1f009ee..ba520d4f7c7b 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17#include "soc.h"
17#include "powerdomain.h" 18#include "powerdomain.h"
18#include "powerdomains2xxx_3xxx_data.h" 19#include "powerdomains2xxx_3xxx_data.h"
19 20
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 0f51e034e0aa..cff270a178c5 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -28,6 +28,7 @@
28#include "common.h" 28#include "common.h"
29#include <plat/prcm.h> 29#include <plat/prcm.h>
30 30
31#include "soc.h"
31#include "clock.h" 32#include "clock.h"
32#include "clock2xxx.h" 33#include "clock2xxx.h"
33#include "cm2xxx_3xxx.h" 34#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index e7dbb6cf1255..0d8abb577669 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,8 +19,6 @@
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/io.h> 20#include <linux/io.h>
21 21
22#include <plat/common.h>
23
24#include "common.h" 22#include "common.h"
25#include "prm33xx.h" 23#include "prm33xx.h"
26#include "prm-regbits-33xx.h" 24#include "prm-regbits-33xx.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 6b4d332be2f6..3442227d3f0b 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26 26
27#include <plat/common.h>
28#include <plat/prcm.h> 27#include <plat/prcm.h>
29 28
30#include "prm2xxx_3xxx.h" 29#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
index 8bfaf342a028..1ee58c281a31 100644
--- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
+++ b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
@@ -11,7 +11,7 @@
11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM 11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
12#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM 12#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
13 13
14#include <plat/sdrc.h> 14#include "sdrc.h"
15 15
16/* Hynix H8MBX00U0MER-0EM */ 16/* Hynix H8MBX00U0MER-0EM */
17static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = { 17static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
index a391b4939f74..85cccc004c06 100644
--- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
+++ b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
@@ -14,7 +14,7 @@
14#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF 14#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
15#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF 15#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
16 16
17#include <plat/sdrc.h> 17#include "sdrc.h"
18 18
19/* Micron MT46H32M32LF-6 */ 19/* Micron MT46H32M32LF-6 */
20/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ 20/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 845c4fd2b125..0fa7ffa9b5ed 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,10 +18,8 @@
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h" 20#include "common.h"
21#include <plat/clock.h>
22#include <plat/sdrc.h>
23
24#include "sdram-nokia.h" 21#include "sdram-nokia.h"
22#include "sdrc.h"
25 23
26/* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */ 24/* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */
27struct sdram_timings { 25struct sdram_timings {
diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
index cd4352917022..003f7bf4e2e3 100644
--- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
+++ b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
@@ -11,7 +11,7 @@
11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM 11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
12#define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM 12#define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
13 13
14#include <plat/sdrc.h> 14#include "sdrc.h"
15 15
16/* Numonyx M65KXXXXAM */ 16/* Numonyx M65KXXXXAM */
17static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = { 17static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
index 0e518a72831f..8dc3de5ebb5b 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -14,7 +14,7 @@
14#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 14#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
15#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 15#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
16 16
17#include <plat/sdrc.h> 17#include "sdrc.h"
18 18
19/* Qimonda HYB18M512160AF-6 */ 19/* Qimonda HYB18M512160AF-6 */
20static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { 20static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index e3d345f46409..c64ee1904be8 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -24,10 +24,7 @@
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include "common.h" 26#include "common.h"
27#include <plat/clock.h> 27#include "clock.h"
28#include <plat/sram.h>
29
30#include <plat/sdrc.h>
31#include "sdrc.h" 28#include "sdrc.h"
32 29
33static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; 30static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1;
@@ -160,19 +157,3 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
160 sdrc_write_reg(l, SDRC_POWER); 157 sdrc_write_reg(l, SDRC_POWER);
161 omap2_sms_save_context(); 158 omap2_sms_save_context();
162} 159}
163
164void omap2_sms_write_rot_control(u32 val, unsigned ctx)
165{
166 sms_write_reg(val, SMS_ROT_CONTROL(ctx));
167}
168
169void omap2_sms_write_rot_size(u32 val, unsigned ctx)
170{
171 sms_write_reg(val, SMS_ROT_SIZE(ctx));
172}
173
174void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
175{
176 sms_write_reg(val, SMS_ROT_PHYSICAL_BA(ctx));
177}
178
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index b3f83799e6cf..69c4b329452e 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -2,12 +2,14 @@
2#define __ARCH_ARM_MACH_OMAP2_SDRC_H 2#define __ARCH_ARM_MACH_OMAP2_SDRC_H
3 3
4/* 4/*
5 * OMAP2 SDRC register definitions 5 * OMAP2/3 SDRC/SMS macros and prototypes
6 * 6 *
7 * Copyright (C) 2007 Texas Instruments, Inc. 7 * Copyright (C) 2007-2008, 2012 Texas Instruments, Inc.
8 * Copyright (C) 2007 Nokia Corporation 8 * Copyright (C) 2007-2008 Nokia Corporation
9 * 9 *
10 * Written by Paul Walmsley 10 * Paul Walmsley
11 * Tony Lindgren
12 * Richard Woodruff
11 * 13 *
12 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
@@ -15,8 +17,6 @@
15 */ 17 */
16#undef DEBUG 18#undef DEBUG
17 19
18#include <plat/sdrc.h>
19
20#ifndef __ASSEMBLER__ 20#ifndef __ASSEMBLER__
21 21
22#include <linux/io.h> 22#include <linux/io.h>
@@ -50,6 +50,58 @@ static inline u32 sms_read_reg(u16 reg)
50{ 50{
51 return __raw_readl(OMAP_SMS_REGADDR(reg)); 51 return __raw_readl(OMAP_SMS_REGADDR(reg));
52} 52}
53
54
55/**
56 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
57 * @rate: SDRC clock rate (in Hz)
58 * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate
59 * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate
60 * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate
61 * @mr: Value to program to SDRC_MR for this rate
62 *
63 * This structure holds a pre-computed set of register values for the
64 * SDRC for a given SDRC clock rate and SDRAM chip. These are
65 * intended to be pre-computed and specified in an array in the board-*.c
66 * files. The structure is keyed off the 'rate' field.
67 */
68struct omap_sdrc_params {
69 unsigned long rate;
70 u32 actim_ctrla;
71 u32 actim_ctrlb;
72 u32 rfr_ctrl;
73 u32 mr;
74};
75
76#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
77void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
78 struct omap_sdrc_params *sdrc_cs1);
79#else
80static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
81 struct omap_sdrc_params *sdrc_cs1) {};
82#endif
83
84int omap2_sdrc_get_params(unsigned long r,
85 struct omap_sdrc_params **sdrc_cs0,
86 struct omap_sdrc_params **sdrc_cs1);
87void omap2_sms_save_context(void);
88void omap2_sms_restore_context(void);
89
90struct memory_timings {
91 u32 m_type; /* ddr = 1, sdr = 0 */
92 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */
93 u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */
94 u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */
95 u32 base_cs; /* base chip select to use for calculations */
96};
97
98extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
99struct omap_sdrc_params *rx51_get_sdram_timings(void);
100
101u32 omap2xxx_sdrc_dll_is_unlocked(void);
102u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
103
104
53#else 105#else
54#define OMAP242X_SDRC_REGADDR(reg) \ 106#define OMAP242X_SDRC_REGADDR(reg) \
55 OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) 107 OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
@@ -57,6 +109,7 @@ static inline u32 sms_read_reg(u16 reg)
57 OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) 109 OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
58#define OMAP34XX_SDRC_REGADDR(reg) \ 110#define OMAP34XX_SDRC_REGADDR(reg) \
59 OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) 111 OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
112
60#endif /* __ASSEMBLER__ */ 113#endif /* __ASSEMBLER__ */
61 114
62/* Minimum frequency that the SDRC DLL can lock at */ 115/* Minimum frequency that the SDRC DLL can lock at */
@@ -74,4 +127,85 @@ static inline u32 sms_read_reg(u16 reg)
74 */ 127 */
75#define SDRC_MPURATE_LOOPS 96 128#define SDRC_MPURATE_LOOPS 96
76 129
130/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
131
132#define SDRC_SYSCONFIG 0x010
133#define SDRC_CS_CFG 0x040
134#define SDRC_SHARING 0x044
135#define SDRC_ERR_TYPE 0x04C
136#define SDRC_DLLA_CTRL 0x060
137#define SDRC_DLLA_STATUS 0x064
138#define SDRC_DLLB_CTRL 0x068
139#define SDRC_DLLB_STATUS 0x06C
140#define SDRC_POWER 0x070
141#define SDRC_MCFG_0 0x080
142#define SDRC_MR_0 0x084
143#define SDRC_EMR2_0 0x08c
144#define SDRC_ACTIM_CTRL_A_0 0x09c
145#define SDRC_ACTIM_CTRL_B_0 0x0a0
146#define SDRC_RFR_CTRL_0 0x0a4
147#define SDRC_MANUAL_0 0x0a8
148#define SDRC_MCFG_1 0x0B0
149#define SDRC_MR_1 0x0B4
150#define SDRC_EMR2_1 0x0BC
151#define SDRC_ACTIM_CTRL_A_1 0x0C4
152#define SDRC_ACTIM_CTRL_B_1 0x0C8
153#define SDRC_RFR_CTRL_1 0x0D4
154#define SDRC_MANUAL_1 0x0D8
155
156#define SDRC_POWER_AUTOCOUNT_SHIFT 8
157#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
158#define SDRC_POWER_CLKCTRL_SHIFT 4
159#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
160#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
161
162/*
163 * These values represent the number of memory clock cycles between
164 * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192
165 * rows per device, and include a subtraction of a 50 cycle window in the
166 * event that the autorefresh command is delayed due to other SDRC activity.
167 * The '| 1' sets the ARE field to send one autorefresh when the autorefresh
168 * counter reaches 0.
169 *
170 * These represent optimal values for common parts, it won't work for all.
171 * As long as you scale down, most parameters are still work, they just
172 * become sub-optimal. The RFR value goes in the opposite direction. If you
173 * don't adjust it down as your clock period increases the refresh interval
174 * will not be met. Setting all parameters for complete worst case may work,
175 * but may cut memory performance by 2x. Due to errata the DLLs need to be
176 * unlocked and their value needs run time calibration. A dynamic call is
177 * need for that as no single right value exists acorss production samples.
178 *
179 * Only the FULL speed values are given. Current code is such that rate
180 * changes must be made at DPLLoutx2. The actual value adjustment for low
181 * frequency operation will be handled by omap_set_performance()
182 *
183 * By having the boot loader boot up in the fastest L4 speed available likely
184 * will result in something which you can switch between.
185 */
186#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1)
187#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1)
188#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1)
189#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */
190#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */
191
192
193/*
194 * SMS register access
195 */
196
197#define OMAP242X_SMS_REGADDR(reg) \
198 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
199#define OMAP243X_SMS_REGADDR(reg) \
200 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
201#define OMAP343X_SMS_REGADDR(reg) \
202 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
203
204/* SMS register offsets - read/write with sms_{read,write}_reg() */
205
206#define SMS_SYSCONFIG 0x010
207/* REVISIT: fill in other SMS registers here */
208
209
210
77#endif 211#endif
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 73e55e485329..20cc950db4de 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,16 +24,13 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <plat/clock.h>
28#include <plat/sram.h>
29#include <plat/sdrc.h>
30
31#include "soc.h" 27#include "soc.h"
32#include "iomap.h" 28#include "iomap.h"
33#include "common.h" 29#include "common.h"
34#include "prm2xxx_3xxx.h" 30#include "prm2xxx_3xxx.h"
35#include "clock.h" 31#include "clock.h"
36#include "sdrc.h" 32#include "sdrc.h"
33#include "sram.h"
37 34
38/* Memory timing, DLL mode flags */ 35/* Memory timing, DLL mode flags */
39#define M_DDR 1 36#define M_DDR 1
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index a507cd6cf4f1..aa30a3c20883 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -28,19 +28,20 @@
28#include <linux/console.h> 28#include <linux/console.h>
29 29
30#include <plat/omap-serial.h> 30#include <plat/omap-serial.h>
31#include "common.h" 31#include <plat-omap/dma-omap.h>
32#include <plat/dma.h>
33#include <plat/omap_hwmod.h>
34#include <plat/omap_device.h>
35#include <plat/omap-pm.h>
36#include <plat/serial.h>
37 32
33#include "common.h"
34#include "omap_hwmod.h"
35#include "omap_device.h"
36#include "omap-pm.h"
37#include "soc.h"
38#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
39#include "pm.h" 39#include "pm.h"
40#include "cm2xxx_3xxx.h" 40#include "cm2xxx_3xxx.h"
41#include "prm-regbits-34xx.h" 41#include "prm-regbits-34xx.h"
42#include "control.h" 42#include "control.h"
43#include "mux.h" 43#include "mux.h"
44#include "serial.h"
44 45
45/* 46/*
46 * NOTE: By default the serial auto_suspend timeout is disabled as it causes 47 * NOTE: By default the serial auto_suspend timeout is disabled as it causes
diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h
new file mode 100644
index 000000000000..c4014f013df0
--- /dev/null
+++ b/arch/arm/mach-omap2/serial.h
@@ -0,0 +1 @@
#include <mach/serial.h>
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 506987979c1c..7046c3c67181 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,13 +26,12 @@
26 26
27#include <asm/assembler.h> 27#include <asm/assembler.h>
28 28
29#include <plat/sram.h>
30
31#include "omap34xx.h" 29#include "omap34xx.h"
32#include "iomap.h" 30#include "iomap.h"
33#include "cm2xxx_3xxx.h" 31#include "cm2xxx_3xxx.h"
34#include "prm2xxx_3xxx.h" 32#include "prm2xxx_3xxx.h"
35#include "sdrc.h" 33#include "sdrc.h"
34#include "sram.h"
36#include "control.h" 35#include "control.h"
37 36
38/* 37/*
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index fc9b96daf851..070096496e20 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -1,7 +1,473 @@
1#include <plat/cpu.h> 1/*
2 * OMAP cpu type detection
3 *
4 * Copyright (C) 2004, 2008 Nokia Corporation
5 *
6 * Copyright (C) 2009-11 Texas Instruments.
7 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 *
10 * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
2#include "omap24xx.h" 28#include "omap24xx.h"
3#include "omap34xx.h" 29#include "omap34xx.h"
4#include "omap44xx.h" 30#include "omap44xx.h"
5#include "ti81xx.h" 31#include "ti81xx.h"
6#include "am33xx.h" 32#include "am33xx.h"
7#include "omap54xx.h" 33#include "omap54xx.h"
34
35#ifndef __ASSEMBLY__
36
37#include <linux/bitops.h>
38
39/*
40 * Test if multicore OMAP support is needed
41 */
42#undef MULTI_OMAP2
43#undef OMAP_NAME
44
45#ifdef CONFIG_SOC_OMAP2420
46# ifdef OMAP_NAME
47# undef MULTI_OMAP2
48# define MULTI_OMAP2
49# else
50# define OMAP_NAME omap2420
51# endif
52#endif
53#ifdef CONFIG_SOC_OMAP2430
54# ifdef OMAP_NAME
55# undef MULTI_OMAP2
56# define MULTI_OMAP2
57# else
58# define OMAP_NAME omap2430
59# endif
60#endif
61#ifdef CONFIG_ARCH_OMAP3
62# ifdef OMAP_NAME
63# undef MULTI_OMAP2
64# define MULTI_OMAP2
65# else
66# define OMAP_NAME omap3
67# endif
68#endif
69#ifdef CONFIG_ARCH_OMAP4
70# ifdef OMAP_NAME
71# undef MULTI_OMAP2
72# define MULTI_OMAP2
73# else
74# define OMAP_NAME omap4
75# endif
76#endif
77
78#ifdef CONFIG_SOC_OMAP5
79# ifdef OMAP_NAME
80# undef MULTI_OMAP2
81# define MULTI_OMAP2
82# else
83# define OMAP_NAME omap5
84# endif
85#endif
86
87#ifdef CONFIG_SOC_AM33XX
88# ifdef OMAP_NAME
89# undef MULTI_OMAP2
90# define MULTI_OMAP2
91# else
92# define OMAP_NAME am33xx
93# endif
94#endif
95
96/*
97 * Omap device type i.e. EMU/HS/TST/GP/BAD
98 */
99#define OMAP2_DEVICE_TYPE_TEST 0
100#define OMAP2_DEVICE_TYPE_EMU 1
101#define OMAP2_DEVICE_TYPE_SEC 2
102#define OMAP2_DEVICE_TYPE_GP 3
103#define OMAP2_DEVICE_TYPE_BAD 4
104
105int omap_type(void);
106
107/*
108 * omap_rev bits:
109 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
110 * CPU revision (See _REV_ defined in cpu.h) [15:08]
111 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
112 */
113unsigned int omap_rev(void);
114
115/*
116 * Get the CPU revision for OMAP devices
117 */
118#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
119
120/*
121 * Macros to group OMAP into cpu classes.
122 * These can be used in most places.
123 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
124 * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
125 * cpu_is_omap243x(): True for OMAP2430
126 * cpu_is_omap343x(): True for OMAP3430
127 * cpu_is_omap443x(): True for OMAP4430
128 * cpu_is_omap446x(): True for OMAP4460
129 * cpu_is_omap447x(): True for OMAP4470
130 * soc_is_omap543x(): True for OMAP5430, OMAP5432
131 */
132#define GET_OMAP_CLASS (omap_rev() & 0xff)
133
134#define IS_OMAP_CLASS(class, id) \
135static inline int is_omap ##class (void) \
136{ \
137 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
138}
139
140#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
141
142#define IS_AM_CLASS(class, id) \
143static inline int is_am ##class (void) \
144{ \
145 return (GET_AM_CLASS == (id)) ? 1 : 0; \
146}
147
148#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
149
150#define IS_TI_CLASS(class, id) \
151static inline int is_ti ##class (void) \
152{ \
153 return (GET_TI_CLASS == (id)) ? 1 : 0; \
154}
155
156#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
157
158#define IS_OMAP_SUBCLASS(subclass, id) \
159static inline int is_omap ##subclass (void) \
160{ \
161 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
162}
163
164#define IS_TI_SUBCLASS(subclass, id) \
165static inline int is_ti ##subclass (void) \
166{ \
167 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
168}
169
170#define IS_AM_SUBCLASS(subclass, id) \
171static inline int is_am ##subclass (void) \
172{ \
173 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
174}
175
176IS_OMAP_CLASS(24xx, 0x24)
177IS_OMAP_CLASS(34xx, 0x34)
178IS_OMAP_CLASS(44xx, 0x44)
179IS_AM_CLASS(35xx, 0x35)
180IS_OMAP_CLASS(54xx, 0x54)
181IS_AM_CLASS(33xx, 0x33)
182
183IS_TI_CLASS(81xx, 0x81)
184
185IS_OMAP_SUBCLASS(242x, 0x242)
186IS_OMAP_SUBCLASS(243x, 0x243)
187IS_OMAP_SUBCLASS(343x, 0x343)
188IS_OMAP_SUBCLASS(363x, 0x363)
189IS_OMAP_SUBCLASS(443x, 0x443)
190IS_OMAP_SUBCLASS(446x, 0x446)
191IS_OMAP_SUBCLASS(447x, 0x447)
192IS_OMAP_SUBCLASS(543x, 0x543)
193
194IS_TI_SUBCLASS(816x, 0x816)
195IS_TI_SUBCLASS(814x, 0x814)
196IS_AM_SUBCLASS(335x, 0x335)
197
198#define cpu_is_omap24xx() 0
199#define cpu_is_omap242x() 0
200#define cpu_is_omap243x() 0
201#define cpu_is_omap34xx() 0
202#define cpu_is_omap343x() 0
203#define cpu_is_ti81xx() 0
204#define cpu_is_ti816x() 0
205#define cpu_is_ti814x() 0
206#define soc_is_am35xx() 0
207#define soc_is_am33xx() 0
208#define soc_is_am335x() 0
209#define cpu_is_omap44xx() 0
210#define cpu_is_omap443x() 0
211#define cpu_is_omap446x() 0
212#define cpu_is_omap447x() 0
213#define soc_is_omap54xx() 0
214#define soc_is_omap543x() 0
215
216#if defined(MULTI_OMAP2)
217# if defined(CONFIG_ARCH_OMAP2)
218# undef cpu_is_omap24xx
219# define cpu_is_omap24xx() is_omap24xx()
220# endif
221# if defined (CONFIG_SOC_OMAP2420)
222# undef cpu_is_omap242x
223# define cpu_is_omap242x() is_omap242x()
224# endif
225# if defined (CONFIG_SOC_OMAP2430)
226# undef cpu_is_omap243x
227# define cpu_is_omap243x() is_omap243x()
228# endif
229# if defined(CONFIG_ARCH_OMAP3)
230# undef cpu_is_omap34xx
231# undef cpu_is_omap343x
232# define cpu_is_omap34xx() is_omap34xx()
233# define cpu_is_omap343x() is_omap343x()
234# endif
235#else
236# if defined(CONFIG_ARCH_OMAP2)
237# undef cpu_is_omap24xx
238# define cpu_is_omap24xx() 1
239# endif
240# if defined(CONFIG_SOC_OMAP2420)
241# undef cpu_is_omap242x
242# define cpu_is_omap242x() 1
243# endif
244# if defined(CONFIG_SOC_OMAP2430)
245# undef cpu_is_omap243x
246# define cpu_is_omap243x() 1
247# endif
248# if defined(CONFIG_ARCH_OMAP3)
249# undef cpu_is_omap34xx
250# define cpu_is_omap34xx() 1
251# endif
252# if defined(CONFIG_SOC_OMAP3430)
253# undef cpu_is_omap343x
254# define cpu_is_omap343x() 1
255# endif
256#endif
257
258/*
259 * Macros to detect individual cpu types.
260 * These are only rarely needed.
261 * cpu_is_omap2420(): True for OMAP2420
262 * cpu_is_omap2422(): True for OMAP2422
263 * cpu_is_omap2423(): True for OMAP2423
264 * cpu_is_omap2430(): True for OMAP2430
265 * cpu_is_omap3430(): True for OMAP3430
266 */
267#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
268
269#define IS_OMAP_TYPE(type, id) \
270static inline int is_omap ##type (void) \
271{ \
272 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
273}
274
275IS_OMAP_TYPE(2420, 0x2420)
276IS_OMAP_TYPE(2422, 0x2422)
277IS_OMAP_TYPE(2423, 0x2423)
278IS_OMAP_TYPE(2430, 0x2430)
279IS_OMAP_TYPE(3430, 0x3430)
280
281#define cpu_is_omap2420() 0
282#define cpu_is_omap2422() 0
283#define cpu_is_omap2423() 0
284#define cpu_is_omap2430() 0
285#define cpu_is_omap3430() 0
286#define cpu_is_omap3630() 0
287#define soc_is_omap5430() 0
288
289/* These are needed for the common code */
290#ifdef CONFIG_ARCH_OMAP2PLUS
291#define cpu_is_omap7xx() 0
292#define cpu_is_omap15xx() 0
293#define cpu_is_omap16xx() 0
294#define cpu_is_omap1510() 0
295#define cpu_is_omap1610() 0
296#define cpu_is_omap1611() 0
297#define cpu_is_omap1621() 0
298#define cpu_is_omap1710() 0
299#define cpu_class_is_omap1() 0
300#define cpu_class_is_omap2() 1
301#endif
302
303#if defined(CONFIG_ARCH_OMAP2)
304# undef cpu_is_omap2420
305# undef cpu_is_omap2422
306# undef cpu_is_omap2423
307# undef cpu_is_omap2430
308# define cpu_is_omap2420() is_omap2420()
309# define cpu_is_omap2422() is_omap2422()
310# define cpu_is_omap2423() is_omap2423()
311# define cpu_is_omap2430() is_omap2430()
312#endif
313
314#if defined(CONFIG_ARCH_OMAP3)
315# undef cpu_is_omap3430
316# undef cpu_is_ti81xx
317# undef cpu_is_ti816x
318# undef cpu_is_ti814x
319# undef soc_is_am35xx
320# define cpu_is_omap3430() is_omap3430()
321# undef cpu_is_omap3630
322# define cpu_is_omap3630() is_omap363x()
323# define cpu_is_ti81xx() is_ti81xx()
324# define cpu_is_ti816x() is_ti816x()
325# define cpu_is_ti814x() is_ti814x()
326# define soc_is_am35xx() is_am35xx()
327#endif
328
329# if defined(CONFIG_SOC_AM33XX)
330# undef soc_is_am33xx
331# undef soc_is_am335x
332# define soc_is_am33xx() is_am33xx()
333# define soc_is_am335x() is_am335x()
334#endif
335
336# if defined(CONFIG_ARCH_OMAP4)
337# undef cpu_is_omap44xx
338# undef cpu_is_omap443x
339# undef cpu_is_omap446x
340# undef cpu_is_omap447x
341# define cpu_is_omap44xx() is_omap44xx()
342# define cpu_is_omap443x() is_omap443x()
343# define cpu_is_omap446x() is_omap446x()
344# define cpu_is_omap447x() is_omap447x()
345# endif
346
347# if defined(CONFIG_SOC_OMAP5)
348# undef soc_is_omap54xx
349# undef soc_is_omap543x
350# define soc_is_omap54xx() is_omap54xx()
351# define soc_is_omap543x() is_omap543x()
352#endif
353
354/* Various silicon revisions for omap2 */
355#define OMAP242X_CLASS 0x24200024
356#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
357#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
358
359#define OMAP243X_CLASS 0x24300024
360#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
361
362#define OMAP343X_CLASS 0x34300034
363#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
364#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
365#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
366#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
367#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
368#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
369
370#define OMAP363X_CLASS 0x36300034
371#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
372#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
373#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
374
375#define TI816X_CLASS 0x81600034
376#define TI8168_REV_ES1_0 TI816X_CLASS
377#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
378
379#define TI814X_CLASS 0x81400034
380#define TI8148_REV_ES1_0 TI814X_CLASS
381#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
382#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
383
384#define AM35XX_CLASS 0x35170034
385#define AM35XX_REV_ES1_0 AM35XX_CLASS
386#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
387
388#define AM335X_CLASS 0x33500033
389#define AM335X_REV_ES1_0 AM335X_CLASS
390
391#define OMAP443X_CLASS 0x44300044
392#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
393#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
394#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
395#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
396#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
397
398#define OMAP446X_CLASS 0x44600044
399#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
400#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
401
402#define OMAP447X_CLASS 0x44700044
403#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
404
405#define OMAP54XX_CLASS 0x54000054
406#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
407#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
408
409void omap2xxx_check_revision(void);
410void omap3xxx_check_revision(void);
411void omap4xxx_check_revision(void);
412void omap5xxx_check_revision(void);
413void omap3xxx_check_features(void);
414void ti81xx_check_features(void);
415void omap4xxx_check_features(void);
416
417/*
418 * Runtime detection of OMAP3 features
419 *
420 * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
421 * family have OS-level control over the I/O chain clock. This is
422 * to avoid a window during which wakeups could potentially be lost
423 * during powerdomain transitions. If this bit is set, it
424 * indicates that the chip does support OS-level control of this
425 * feature.
426 */
427extern u32 omap_features;
428
429#define OMAP3_HAS_L2CACHE BIT(0)
430#define OMAP3_HAS_IVA BIT(1)
431#define OMAP3_HAS_SGX BIT(2)
432#define OMAP3_HAS_NEON BIT(3)
433#define OMAP3_HAS_ISP BIT(4)
434#define OMAP3_HAS_192MHZ_CLK BIT(5)
435#define OMAP3_HAS_IO_WAKEUP BIT(6)
436#define OMAP3_HAS_SDRC BIT(7)
437#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
438#define OMAP4_HAS_MPU_1GHZ BIT(9)
439#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
440#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
441
442
443#define OMAP3_HAS_FEATURE(feat,flag) \
444static inline unsigned int omap3_has_ ##feat(void) \
445{ \
446 return omap_features & OMAP3_HAS_ ##flag; \
447} \
448
449OMAP3_HAS_FEATURE(l2cache, L2CACHE)
450OMAP3_HAS_FEATURE(sgx, SGX)
451OMAP3_HAS_FEATURE(iva, IVA)
452OMAP3_HAS_FEATURE(neon, NEON)
453OMAP3_HAS_FEATURE(isp, ISP)
454OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
455OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
456OMAP3_HAS_FEATURE(sdrc, SDRC)
457OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
458
459/*
460 * Runtime detection of OMAP4 features
461 */
462#define OMAP4_HAS_FEATURE(feat, flag) \
463static inline unsigned int omap4_has_ ##feat(void) \
464{ \
465 return omap_features & OMAP4_HAS_ ##flag; \
466} \
467
468OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
469OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
470OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
471
472#endif /* __ASSEMBLY__ */
473
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index f8217a5a4a26..b0e77a407047 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -23,8 +23,8 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/omap_device.h> 26#include "soc.h"
27 27#include "omap_device.h"
28#include "voltage.h" 28#include "voltage.h"
29#include "control.h" 29#include "control.h"
30#include "pm.h" 30#include "pm.h"
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
new file mode 100644
index 000000000000..0ff0f068bea8
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.c
@@ -0,0 +1,305 @@
1/*
2 *
3 * OMAP SRAM detection and management
4 *
5 * Copyright (C) 2005 Nokia Corporation
6 * Written by Tony Lindgren <tony@atomide.com>
7 *
8 * Copyright (C) 2009-2012 Texas Instruments
9 * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/io.h>
20
21#include <asm/fncpy.h>
22#include <asm/tlb.h>
23#include <asm/cacheflush.h>
24
25#include <asm/mach/map.h>
26
27#include "soc.h"
28#include "iomap.h"
29#include "prm2xxx_3xxx.h"
30#include "sdrc.h"
31#include "sram.h"
32
33#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
34#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
35#ifdef CONFIG_OMAP4_ERRATA_I688
36#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
37#else
38#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
39#endif
40#define OMAP5_SRAM_PA 0x40300000
41
42#define SRAM_BOOTLOADER_SZ 0x00
43
44#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
45#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
46#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
47
48#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
49#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
50#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
51#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
52#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
53
54#define GP_DEVICE 0x300
55
56#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
57
58static unsigned long omap_sram_start;
59static unsigned long omap_sram_skip;
60static unsigned long omap_sram_size;
61
62/*
63 * Depending on the target RAMFS firewall setup, the public usable amount of
64 * SRAM varies. The default accessible size for all device types is 2k. A GP
65 * device allows ARM11 but not other initiators for full size. This
66 * functionality seems ok until some nice security API happens.
67 */
68static int is_sram_locked(void)
69{
70 if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
71 /* RAMFW: R/W access to all initiators for all qualifier sets */
72 if (cpu_is_omap242x()) {
73 __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
74 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
75 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
76 }
77 if (cpu_is_omap34xx()) {
78 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
79 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
80 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
81 __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
82 __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
83 }
84 return 0;
85 } else
86 return 1; /* assume locked with no PPA or security driver */
87}
88
89/*
90 * The amount of SRAM depends on the core type.
91 * Note that we cannot try to test for SRAM here because writes
92 * to secure SRAM will hang the system. Also the SRAM is not
93 * yet mapped at this point.
94 */
95static void __init omap_detect_sram(void)
96{
97 omap_sram_skip = SRAM_BOOTLOADER_SZ;
98 if (is_sram_locked()) {
99 if (cpu_is_omap34xx()) {
100 omap_sram_start = OMAP3_SRAM_PUB_PA;
101 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
102 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
103 omap_sram_size = 0x7000; /* 28K */
104 omap_sram_skip += SZ_16K;
105 } else {
106 omap_sram_size = 0x8000; /* 32K */
107 }
108 } else if (cpu_is_omap44xx()) {
109 omap_sram_start = OMAP4_SRAM_PUB_PA;
110 omap_sram_size = 0xa000; /* 40K */
111 } else if (soc_is_omap54xx()) {
112 omap_sram_start = OMAP5_SRAM_PA;
113 omap_sram_size = SZ_128K; /* 128KB */
114 } else {
115 omap_sram_start = OMAP2_SRAM_PUB_PA;
116 omap_sram_size = 0x800; /* 2K */
117 }
118 } else {
119 if (soc_is_am33xx()) {
120 omap_sram_start = AM33XX_SRAM_PA;
121 omap_sram_size = 0x10000; /* 64K */
122 } else if (cpu_is_omap34xx()) {
123 omap_sram_start = OMAP3_SRAM_PA;
124 omap_sram_size = 0x10000; /* 64K */
125 } else if (cpu_is_omap44xx()) {
126 omap_sram_start = OMAP4_SRAM_PA;
127 omap_sram_size = 0xe000; /* 56K */
128 } else if (soc_is_omap54xx()) {
129 omap_sram_start = OMAP5_SRAM_PA;
130 omap_sram_size = SZ_128K; /* 128KB */
131 } else {
132 omap_sram_start = OMAP2_SRAM_PA;
133 if (cpu_is_omap242x())
134 omap_sram_size = 0xa0000; /* 640K */
135 else if (cpu_is_omap243x())
136 omap_sram_size = 0x10000; /* 64K */
137 }
138 }
139}
140
141/*
142 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
143 */
144static void __init omap2_map_sram(void)
145{
146 int cached = 1;
147
148#ifdef CONFIG_OMAP4_ERRATA_I688
149 if (cpu_is_omap44xx()) {
150 omap_sram_start += PAGE_SIZE;
151 omap_sram_size -= SZ_16K;
152 }
153#endif
154 if (cpu_is_omap34xx()) {
155 /*
156 * SRAM must be marked as non-cached on OMAP3 since the
157 * CORE DPLL M2 divider change code (in SRAM) runs with the
158 * SDRAM controller disabled, and if it is marked cached,
159 * the ARM may attempt to write cache lines back to SDRAM
160 * which will cause the system to hang.
161 */
162 cached = 0;
163 }
164
165 omap_map_sram(omap_sram_start, omap_sram_size,
166 omap_sram_skip, cached);
167}
168
169static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
170 u32 base_cs, u32 force_unlock);
171
172void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
173 u32 base_cs, u32 force_unlock)
174{
175 BUG_ON(!_omap2_sram_ddr_init);
176 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
177 base_cs, force_unlock);
178}
179
180static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
181 u32 mem_type);
182
183void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
184{
185 BUG_ON(!_omap2_sram_reprogram_sdrc);
186 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
187}
188
189static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
190
191u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
192{
193 BUG_ON(!_omap2_set_prcm);
194 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
195}
196
197#ifdef CONFIG_SOC_OMAP2420
198static int __init omap242x_sram_init(void)
199{
200 _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
201 omap242x_sram_ddr_init_sz);
202
203 _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
204 omap242x_sram_reprogram_sdrc_sz);
205
206 _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
207 omap242x_sram_set_prcm_sz);
208
209 return 0;
210}
211#else
212static inline int omap242x_sram_init(void)
213{
214 return 0;
215}
216#endif
217
218#ifdef CONFIG_SOC_OMAP2430
219static int __init omap243x_sram_init(void)
220{
221 _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
222 omap243x_sram_ddr_init_sz);
223
224 _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
225 omap243x_sram_reprogram_sdrc_sz);
226
227 _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
228 omap243x_sram_set_prcm_sz);
229
230 return 0;
231}
232#else
233static inline int omap243x_sram_init(void)
234{
235 return 0;
236}
237#endif
238
239#ifdef CONFIG_ARCH_OMAP3
240
241static u32 (*_omap3_sram_configure_core_dpll)(
242 u32 m2, u32 unlock_dll, u32 f, u32 inc,
243 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
244 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
245 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
246 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
247
248u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
249 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
250 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
251 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
252 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
253{
254 BUG_ON(!_omap3_sram_configure_core_dpll);
255 return _omap3_sram_configure_core_dpll(
256 m2, unlock_dll, f, inc,
257 sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
258 sdrc_actim_ctrl_b_0, sdrc_mr_0,
259 sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
260 sdrc_actim_ctrl_b_1, sdrc_mr_1);
261}
262
263void omap3_sram_restore_context(void)
264{
265 omap_sram_reset();
266
267 _omap3_sram_configure_core_dpll =
268 omap_sram_push(omap3_sram_configure_core_dpll,
269 omap3_sram_configure_core_dpll_sz);
270 omap_push_sram_idle();
271}
272
273static inline int omap34xx_sram_init(void)
274{
275 omap3_sram_restore_context();
276 return 0;
277}
278#else
279static inline int omap34xx_sram_init(void)
280{
281 return 0;
282}
283#endif /* CONFIG_ARCH_OMAP3 */
284
285static inline int am33xx_sram_init(void)
286{
287 return 0;
288}
289
290int __init omap_sram_init(void)
291{
292 omap_detect_sram();
293 omap2_map_sram();
294
295 if (cpu_is_omap242x())
296 omap242x_sram_init();
297 else if (cpu_is_omap2430())
298 omap243x_sram_init();
299 else if (soc_is_am33xx())
300 am33xx_sram_init();
301 else if (cpu_is_omap34xx())
302 omap34xx_sram_init();
303
304 return 0;
305}
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
new file mode 100644
index 000000000000..ca7277c2a9ee
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.h
@@ -0,0 +1,83 @@
1/*
2 * Interface for functions that need to be run in internal SRAM
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASSEMBLY__
10#include <plat/sram.h>
11
12extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
13 u32 base_cs, u32 force_unlock);
14extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
15 u32 mem_type);
16extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
17
18extern u32 omap3_configure_core_dpll(
19 u32 m2, u32 unlock_dll, u32 f, u32 inc,
20 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
21 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
22 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
23 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
24extern void omap3_sram_restore_context(void);
25
26/* Do not use these */
27extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
28extern unsigned long omap24xx_sram_reprogram_clock_sz;
29
30extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
31 u32 base_cs, u32 force_unlock);
32extern unsigned long omap242x_sram_ddr_init_sz;
33
34extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
35 int bypass);
36extern unsigned long omap242x_sram_set_prcm_sz;
37
38extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
39 u32 mem_type);
40extern unsigned long omap242x_sram_reprogram_sdrc_sz;
41
42
43extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
44 u32 base_cs, u32 force_unlock);
45extern unsigned long omap243x_sram_ddr_init_sz;
46
47extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
48 int bypass);
49extern unsigned long omap243x_sram_set_prcm_sz;
50
51extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
52 u32 mem_type);
53extern unsigned long omap243x_sram_reprogram_sdrc_sz;
54
55extern u32 omap3_sram_configure_core_dpll(
56 u32 m2, u32 unlock_dll, u32 f, u32 inc,
57 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
58 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
59 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
60 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
61extern unsigned long omap3_sram_configure_core_dpll_sz;
62
63#ifdef CONFIG_PM
64extern void omap_push_sram_idle(void);
65#else
66static inline void omap_push_sram_idle(void) {}
67#endif /* CONFIG_PM */
68
69#endif /* __ASSEMBLY__ */
70
71/*
72 * OMAP2+: define the SRAM PA addresses.
73 * Used by the SRAM management code and the idle sleep code.
74 */
75#define OMAP2_SRAM_PA 0x40200000
76#define OMAP3_SRAM_PA 0x40200000
77#ifdef CONFIG_OMAP4_ERRATA_I688
78#define OMAP4_SRAM_PA 0x40304000
79#define OMAP4_SRAM_VA 0xfe404000
80#else
81#define OMAP4_SRAM_PA 0x40300000
82#endif
83#define AM33XX_SRAM_PA 0x40300000
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 0758bae3a57a..684d2fc3d485 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -45,10 +45,11 @@
45#include <asm/sched_clock.h> 45#include <asm/sched_clock.h>
46 46
47#include <asm/arch_timer.h> 47#include <asm/arch_timer.h>
48#include <plat/omap_hwmod.h> 48#include "omap_hwmod.h"
49#include <plat/omap_device.h> 49#include "omap_device.h"
50#include <plat/counter-32k.h>
50#include <plat/dmtimer.h> 51#include <plat/dmtimer.h>
51#include <plat/omap-pm.h> 52#include "omap-pm.h"
52 53
53#include "soc.h" 54#include "soc.h"
54#include "common.h" 55#include "common.h"
@@ -692,6 +693,8 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
692 if (timer_dev_attr) 693 if (timer_dev_attr)
693 pdata->timer_capability = timer_dev_attr->timer_capability; 694 pdata->timer_capability = timer_dev_attr->timer_capability;
694 695
696 pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
697
695 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), 698 pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
696 NULL, 0, 0); 699 NULL, 0, 0);
697 700
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109f5ad3..827f54a1dd1d 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -26,9 +26,6 @@
26#include <linux/regulator/machine.h> 26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h> 27#include <linux/regulator/fixed.h>
28 28
29#include <plat/i2c.h>
30#include <plat/usb.h>
31
32#include "soc.h" 29#include "soc.h"
33#include "twl-common.h" 30#include "twl-common.h"
34#include "pm.h" 31#include "pm.h"
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 3c434498e12e..d1dbe125b34f 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -25,10 +25,10 @@
25 25
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28#include <plat/usb.h> 28#include "soc.h"
29#include <plat/omap_device.h> 29#include "omap_device.h"
30
31#include "mux.h" 30#include "mux.h"
31#include "usb.h"
32 32
33#ifdef CONFIG_MFD_OMAP_USB_HOST 33#ifdef CONFIG_MFD_OMAP_USB_HOST
34 34
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 51da21cb78f1..7b33b375fe77 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -25,12 +25,10 @@
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/usb/musb.h> 26#include <linux/usb/musb.h>
27 27
28#include <plat/usb.h> 28#include "omap_device.h"
29#include <plat/omap_device.h> 29#include "soc.h"
30
31#include "am35xx.h"
32
33#include "mux.h" 30#include "mux.h"
31#include "usb.h"
34 32
35static struct musb_hdrc_config musb_config = { 33static struct musb_hdrc_config musb_config = {
36 .multipoint = 1, 34 .multipoint = 1,
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 805bea6edf17..a8795ff19e6d 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -15,10 +15,11 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/export.h> 17#include <linux/export.h>
18#include <linux/platform_data/usb-omap.h>
18 19
19#include <linux/usb/musb.h> 20#include <linux/usb/musb.h>
20 21
21#include <plat/gpmc.h> 22#include "gpmc.h"
22 23
23#include "mux.h" 24#include "mux.h"
24 25
diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h
new file mode 100644
index 000000000000..9b986ead7c45
--- /dev/null
+++ b/arch/arm/mach-omap2/usb.h
@@ -0,0 +1,82 @@
1#include <linux/platform_data/usb-omap.h>
2
3/* AM35x */
4/* USB 2.0 PHY Control */
5#define CONF2_PHY_GPIOMODE (1 << 23)
6#define CONF2_OTGMODE (3 << 14)
7#define CONF2_NO_OVERRIDE (0 << 14)
8#define CONF2_FORCE_HOST (1 << 14)
9#define CONF2_FORCE_DEVICE (2 << 14)
10#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
11#define CONF2_SESENDEN (1 << 13)
12#define CONF2_VBDTCTEN (1 << 12)
13#define CONF2_REFFREQ_24MHZ (2 << 8)
14#define CONF2_REFFREQ_26MHZ (7 << 8)
15#define CONF2_REFFREQ_13MHZ (6 << 8)
16#define CONF2_REFFREQ (0xf << 8)
17#define CONF2_PHYCLKGD (1 << 7)
18#define CONF2_VBUSSENSE (1 << 6)
19#define CONF2_PHY_PLLON (1 << 5)
20#define CONF2_RESET (1 << 4)
21#define CONF2_PHYPWRDN (1 << 3)
22#define CONF2_OTGPWRDN (1 << 2)
23#define CONF2_DATPOL (1 << 1)
24
25/* TI81XX specific definitions */
26#define USBCTRL0 0x620
27#define USBSTAT0 0x624
28
29/* TI816X PHY controls bits */
30#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
31#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
32
33/* TI814X PHY controls bits */
34#define USBPHY_CM_PWRDN (1 << 0)
35#define USBPHY_OTG_PWRDN (1 << 1)
36#define USBPHY_CHGDET_DIS (1 << 2)
37#define USBPHY_CHGDET_RSTRT (1 << 3)
38#define USBPHY_SRCONDM (1 << 4)
39#define USBPHY_SINKONDP (1 << 5)
40#define USBPHY_CHGISINK_EN (1 << 6)
41#define USBPHY_CHGVSRC_EN (1 << 7)
42#define USBPHY_DMPULLUP (1 << 8)
43#define USBPHY_DPPULLUP (1 << 9)
44#define USBPHY_CDET_EXTCTL (1 << 10)
45#define USBPHY_GPIO_MODE (1 << 12)
46#define USBPHY_DPOPBUFCTL (1 << 13)
47#define USBPHY_DMOPBUFCTL (1 << 14)
48#define USBPHY_DPINPUT (1 << 15)
49#define USBPHY_DMINPUT (1 << 16)
50#define USBPHY_DPGPIO_PD (1 << 17)
51#define USBPHY_DMGPIO_PD (1 << 18)
52#define USBPHY_OTGVDET_EN (1 << 19)
53#define USBPHY_OTGSESSEND_EN (1 << 20)
54#define USBPHY_DATA_POLARITY (1 << 23)
55
56struct usbhs_omap_board_data {
57 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
58
59 /* have to be valid if phy_reset is true and portx is in phy mode */
60 int reset_gpio_port[OMAP3_HS_USB_PORTS];
61
62 /* Set this to true for ES2.x silicon */
63 unsigned es2_compatibility:1;
64
65 unsigned phy_reset:1;
66
67 /*
68 * Regulators for USB PHYs.
69 * Each PHY can have a separate regulator.
70 */
71 struct regulator *regulator[OMAP3_HS_USB_PORTS];
72};
73
74extern void usb_musb_init(struct omap_musb_board_data *board_data);
75extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
76
77extern void am35x_musb_reset(void);
78extern void am35x_musb_phy_power(u8 on);
79extern void am35x_musb_clear_irq(void);
80extern void am35x_set_mode(u8 musb_mode);
81extern void ti81xx_musb_phy_power(u8 on);
82
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index b2f1c67043a2..f6b6c37ac3f4 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -11,7 +11,7 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/err.h> 12#include <linux/err.h>
13 13
14#include <plat/omap_hwmod.h> 14#include "omap_hwmod.h"
15 15
16#include "wd_timer.h" 16#include "wd_timer.h"
17#include "common.h" 17#include "common.h"
diff --git a/arch/arm/mach-omap2/wd_timer.h b/arch/arm/mach-omap2/wd_timer.h
index f6bbba73b535..a78f81034a9f 100644
--- a/arch/arm/mach-omap2/wd_timer.h
+++ b/arch/arm/mach-omap2/wd_timer.h
@@ -10,7 +10,7 @@
10#ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H 10#ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H
11#define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H 11#define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H
12 12
13#include <plat/omap_hwmod.h> 13#include "omap_hwmod.h"
14 14
15extern int omap2_wd_timer_disable(struct omap_hwmod *oh); 15extern int omap2_wd_timer_disable(struct omap_hwmod *oh);
16extern int omap2_wd_timer_reset(struct omap_hwmod *oh); 16extern int omap2_wd_timer_reset(struct omap_hwmod *oh);
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index dacaee009a4e..8d885848600a 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,13 +3,12 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o dma.o fb.o counter_32k.o 6obj-y := sram.o dma.o fb.o counter_32k.o
7obj-m := 7obj-m :=
8obj-n := 8obj-n :=
9obj- := 9obj- :=
10 10
11# omap_device support (OMAP2+ only at the moment) 11# omap_device support (OMAP2+ only at the moment)
12obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o
13 12
14obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 13obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
15obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 14obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
@@ -20,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
20# OMAP mailbox framework 19# OMAP mailbox framework
21obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o 20obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
22 21
23obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
deleted file mode 100644
index 9d7ac20ef8f9..000000000000
--- a/arch/arm/plat-omap/clock.c
+++ /dev/null
@@ -1,544 +0,0 @@
1/*
2 * linux/arch/arm/plat-omap/clock.c
3 *
4 * Copyright (C) 2004 - 2008 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 *
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/list.h>
16#include <linux/errno.h>
17#include <linux/export.h>
18#include <linux/err.h>
19#include <linux/string.h>
20#include <linux/clk.h>
21#include <linux/mutex.h>
22#include <linux/cpufreq.h>
23#include <linux/io.h>
24
25#include <plat/clock.h>
26
27static LIST_HEAD(clocks);
28static DEFINE_MUTEX(clocks_mutex);
29static DEFINE_SPINLOCK(clockfw_lock);
30
31static struct clk_functions *arch_clock;
32
33/*
34 * Standard clock functions defined in include/linux/clk.h
35 */
36
37int clk_enable(struct clk *clk)
38{
39 unsigned long flags;
40 int ret;
41
42 if (clk == NULL || IS_ERR(clk))
43 return -EINVAL;
44
45 if (!arch_clock || !arch_clock->clk_enable)
46 return -EINVAL;
47
48 spin_lock_irqsave(&clockfw_lock, flags);
49 ret = arch_clock->clk_enable(clk);
50 spin_unlock_irqrestore(&clockfw_lock, flags);
51
52 return ret;
53}
54EXPORT_SYMBOL(clk_enable);
55
56void clk_disable(struct clk *clk)
57{
58 unsigned long flags;
59
60 if (clk == NULL || IS_ERR(clk))
61 return;
62
63 if (!arch_clock || !arch_clock->clk_disable)
64 return;
65
66 spin_lock_irqsave(&clockfw_lock, flags);
67 if (clk->usecount == 0) {
68 pr_err("Trying disable clock %s with 0 usecount\n",
69 clk->name);
70 WARN_ON(1);
71 goto out;
72 }
73
74 arch_clock->clk_disable(clk);
75
76out:
77 spin_unlock_irqrestore(&clockfw_lock, flags);
78}
79EXPORT_SYMBOL(clk_disable);
80
81unsigned long clk_get_rate(struct clk *clk)
82{
83 unsigned long flags;
84 unsigned long ret;
85
86 if (clk == NULL || IS_ERR(clk))
87 return 0;
88
89 spin_lock_irqsave(&clockfw_lock, flags);
90 ret = clk->rate;
91 spin_unlock_irqrestore(&clockfw_lock, flags);
92
93 return ret;
94}
95EXPORT_SYMBOL(clk_get_rate);
96
97/*
98 * Optional clock functions defined in include/linux/clk.h
99 */
100
101long clk_round_rate(struct clk *clk, unsigned long rate)
102{
103 unsigned long flags;
104 long ret;
105
106 if (clk == NULL || IS_ERR(clk))
107 return 0;
108
109 if (!arch_clock || !arch_clock->clk_round_rate)
110 return 0;
111
112 spin_lock_irqsave(&clockfw_lock, flags);
113 ret = arch_clock->clk_round_rate(clk, rate);
114 spin_unlock_irqrestore(&clockfw_lock, flags);
115
116 return ret;
117}
118EXPORT_SYMBOL(clk_round_rate);
119
120int clk_set_rate(struct clk *clk, unsigned long rate)
121{
122 unsigned long flags;
123 int ret = -EINVAL;
124
125 if (clk == NULL || IS_ERR(clk))
126 return ret;
127
128 if (!arch_clock || !arch_clock->clk_set_rate)
129 return ret;
130
131 spin_lock_irqsave(&clockfw_lock, flags);
132 ret = arch_clock->clk_set_rate(clk, rate);
133 if (ret == 0)
134 propagate_rate(clk);
135 spin_unlock_irqrestore(&clockfw_lock, flags);
136
137 return ret;
138}
139EXPORT_SYMBOL(clk_set_rate);
140
141int clk_set_parent(struct clk *clk, struct clk *parent)
142{
143 unsigned long flags;
144 int ret = -EINVAL;
145
146 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
147 return ret;
148
149 if (!arch_clock || !arch_clock->clk_set_parent)
150 return ret;
151
152 spin_lock_irqsave(&clockfw_lock, flags);
153 if (clk->usecount == 0) {
154 ret = arch_clock->clk_set_parent(clk, parent);
155 if (ret == 0)
156 propagate_rate(clk);
157 } else
158 ret = -EBUSY;
159 spin_unlock_irqrestore(&clockfw_lock, flags);
160
161 return ret;
162}
163EXPORT_SYMBOL(clk_set_parent);
164
165struct clk *clk_get_parent(struct clk *clk)
166{
167 return clk->parent;
168}
169EXPORT_SYMBOL(clk_get_parent);
170
171/*
172 * OMAP specific clock functions shared between omap1 and omap2
173 */
174
175int __initdata mpurate;
176
177/*
178 * By default we use the rate set by the bootloader.
179 * You can override this with mpurate= cmdline option.
180 */
181static int __init omap_clk_setup(char *str)
182{
183 get_option(&str, &mpurate);
184
185 if (!mpurate)
186 return 1;
187
188 if (mpurate < 1000)
189 mpurate *= 1000000;
190
191 return 1;
192}
193__setup("mpurate=", omap_clk_setup);
194
195/* Used for clocks that always have same value as the parent clock */
196unsigned long followparent_recalc(struct clk *clk)
197{
198 return clk->parent->rate;
199}
200
201/*
202 * Used for clocks that have the same value as the parent clock,
203 * divided by some factor
204 */
205unsigned long omap_fixed_divisor_recalc(struct clk *clk)
206{
207 WARN_ON(!clk->fixed_div);
208
209 return clk->parent->rate / clk->fixed_div;
210}
211
212void clk_reparent(struct clk *child, struct clk *parent)
213{
214 list_del_init(&child->sibling);
215 if (parent)
216 list_add(&child->sibling, &parent->children);
217 child->parent = parent;
218
219 /* now do the debugfs renaming to reattach the child
220 to the proper parent */
221}
222
223/* Propagate rate to children */
224void propagate_rate(struct clk *tclk)
225{
226 struct clk *clkp;
227
228 list_for_each_entry(clkp, &tclk->children, sibling) {
229 if (clkp->recalc)
230 clkp->rate = clkp->recalc(clkp);
231 propagate_rate(clkp);
232 }
233}
234
235static LIST_HEAD(root_clks);
236
237/**
238 * recalculate_root_clocks - recalculate and propagate all root clocks
239 *
240 * Recalculates all root clocks (clocks with no parent), which if the
241 * clock's .recalc is set correctly, should also propagate their rates.
242 * Called at init.
243 */
244void recalculate_root_clocks(void)
245{
246 struct clk *clkp;
247
248 list_for_each_entry(clkp, &root_clks, sibling) {
249 if (clkp->recalc)
250 clkp->rate = clkp->recalc(clkp);
251 propagate_rate(clkp);
252 }
253}
254
255/**
256 * clk_preinit - initialize any fields in the struct clk before clk init
257 * @clk: struct clk * to initialize
258 *
259 * Initialize any struct clk fields needed before normal clk initialization
260 * can run. No return value.
261 */
262void clk_preinit(struct clk *clk)
263{
264 INIT_LIST_HEAD(&clk->children);
265}
266
267int clk_register(struct clk *clk)
268{
269 if (clk == NULL || IS_ERR(clk))
270 return -EINVAL;
271
272 /*
273 * trap out already registered clocks
274 */
275 if (clk->node.next || clk->node.prev)
276 return 0;
277
278 mutex_lock(&clocks_mutex);
279 if (clk->parent)
280 list_add(&clk->sibling, &clk->parent->children);
281 else
282 list_add(&clk->sibling, &root_clks);
283
284 list_add(&clk->node, &clocks);
285 if (clk->init)
286 clk->init(clk);
287 mutex_unlock(&clocks_mutex);
288
289 return 0;
290}
291EXPORT_SYMBOL(clk_register);
292
293void clk_unregister(struct clk *clk)
294{
295 if (clk == NULL || IS_ERR(clk))
296 return;
297
298 mutex_lock(&clocks_mutex);
299 list_del(&clk->sibling);
300 list_del(&clk->node);
301 mutex_unlock(&clocks_mutex);
302}
303EXPORT_SYMBOL(clk_unregister);
304
305void clk_enable_init_clocks(void)
306{
307 struct clk *clkp;
308
309 list_for_each_entry(clkp, &clocks, node) {
310 if (clkp->flags & ENABLE_ON_INIT)
311 clk_enable(clkp);
312 }
313}
314
315int omap_clk_enable_autoidle_all(void)
316{
317 struct clk *c;
318 unsigned long flags;
319
320 spin_lock_irqsave(&clockfw_lock, flags);
321
322 list_for_each_entry(c, &clocks, node)
323 if (c->ops->allow_idle)
324 c->ops->allow_idle(c);
325
326 spin_unlock_irqrestore(&clockfw_lock, flags);
327
328 return 0;
329}
330
331int omap_clk_disable_autoidle_all(void)
332{
333 struct clk *c;
334 unsigned long flags;
335
336 spin_lock_irqsave(&clockfw_lock, flags);
337
338 list_for_each_entry(c, &clocks, node)
339 if (c->ops->deny_idle)
340 c->ops->deny_idle(c);
341
342 spin_unlock_irqrestore(&clockfw_lock, flags);
343
344 return 0;
345}
346
347/*
348 * Low level helpers
349 */
350static int clkll_enable_null(struct clk *clk)
351{
352 return 0;
353}
354
355static void clkll_disable_null(struct clk *clk)
356{
357}
358
359const struct clkops clkops_null = {
360 .enable = clkll_enable_null,
361 .disable = clkll_disable_null,
362};
363
364/*
365 * Dummy clock
366 *
367 * Used for clock aliases that are needed on some OMAPs, but not others
368 */
369struct clk dummy_ck = {
370 .name = "dummy",
371 .ops = &clkops_null,
372};
373
374/*
375 *
376 */
377
378#ifdef CONFIG_OMAP_RESET_CLOCKS
379/*
380 * Disable any unused clocks left on by the bootloader
381 */
382static int __init clk_disable_unused(void)
383{
384 struct clk *ck;
385 unsigned long flags;
386
387 if (!arch_clock || !arch_clock->clk_disable_unused)
388 return 0;
389
390 pr_info("clock: disabling unused clocks to save power\n");
391
392 spin_lock_irqsave(&clockfw_lock, flags);
393 list_for_each_entry(ck, &clocks, node) {
394 if (ck->ops == &clkops_null)
395 continue;
396
397 if (ck->usecount > 0 || !ck->enable_reg)
398 continue;
399
400 arch_clock->clk_disable_unused(ck);
401 }
402 spin_unlock_irqrestore(&clockfw_lock, flags);
403
404 return 0;
405}
406late_initcall(clk_disable_unused);
407late_initcall(omap_clk_enable_autoidle_all);
408#endif
409
410int __init clk_init(struct clk_functions * custom_clocks)
411{
412 if (!custom_clocks) {
413 pr_err("No custom clock functions registered\n");
414 BUG();
415 }
416
417 arch_clock = custom_clocks;
418
419 return 0;
420}
421
422#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
423/*
424 * debugfs support to trace clock tree hierarchy and attributes
425 */
426
427#include <linux/debugfs.h>
428#include <linux/seq_file.h>
429
430static struct dentry *clk_debugfs_root;
431
432static int clk_dbg_show_summary(struct seq_file *s, void *unused)
433{
434 struct clk *c;
435 struct clk *pa;
436
437 mutex_lock(&clocks_mutex);
438 seq_printf(s, "%-30s %-30s %-10s %s\n",
439 "clock-name", "parent-name", "rate", "use-count");
440
441 list_for_each_entry(c, &clocks, node) {
442 pa = c->parent;
443 seq_printf(s, "%-30s %-30s %-10lu %d\n",
444 c->name, pa ? pa->name : "none", c->rate, c->usecount);
445 }
446 mutex_unlock(&clocks_mutex);
447
448 return 0;
449}
450
451static int clk_dbg_open(struct inode *inode, struct file *file)
452{
453 return single_open(file, clk_dbg_show_summary, inode->i_private);
454}
455
456static const struct file_operations debug_clock_fops = {
457 .open = clk_dbg_open,
458 .read = seq_read,
459 .llseek = seq_lseek,
460 .release = single_release,
461};
462
463static int clk_debugfs_register_one(struct clk *c)
464{
465 int err;
466 struct dentry *d;
467 struct clk *pa = c->parent;
468
469 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
470 if (!d)
471 return -ENOMEM;
472 c->dent = d;
473
474 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
475 if (!d) {
476 err = -ENOMEM;
477 goto err_out;
478 }
479 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
480 if (!d) {
481 err = -ENOMEM;
482 goto err_out;
483 }
484 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
485 if (!d) {
486 err = -ENOMEM;
487 goto err_out;
488 }
489 return 0;
490
491err_out:
492 debugfs_remove_recursive(c->dent);
493 return err;
494}
495
496static int clk_debugfs_register(struct clk *c)
497{
498 int err;
499 struct clk *pa = c->parent;
500
501 if (pa && !pa->dent) {
502 err = clk_debugfs_register(pa);
503 if (err)
504 return err;
505 }
506
507 if (!c->dent) {
508 err = clk_debugfs_register_one(c);
509 if (err)
510 return err;
511 }
512 return 0;
513}
514
515static int __init clk_debugfs_init(void)
516{
517 struct clk *c;
518 struct dentry *d;
519 int err;
520
521 d = debugfs_create_dir("clock", NULL);
522 if (!d)
523 return -ENOMEM;
524 clk_debugfs_root = d;
525
526 list_for_each_entry(c, &clocks, node) {
527 err = clk_debugfs_register(c);
528 if (err)
529 goto err_out;
530 }
531
532 d = debugfs_create_file("summary", S_IRUGO,
533 d, NULL, &debug_clock_fops);
534 if (!d)
535 return -ENOMEM;
536
537 return 0;
538err_out:
539 debugfs_remove_recursive(clk_debugfs_root);
540 return err;
541}
542late_initcall(clk_debugfs_init);
543
544#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
deleted file mode 100644
index 111315a69354..000000000000
--- a/arch/arm/plat-omap/common.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/arm/plat-omap/common.c
3 *
4 * Code common to all OMAP machines.
5 * The file is created by Tony Lindgren <tony@atomide.com>
6 *
7 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/dma-mapping.h>
18
19#include <plat/common.h>
20#include <plat/vram.h>
21#include <linux/platform_data/dsp-omap.h>
22#include <plat/dma.h>
23
24#include <plat/omap-secure.h>
25
26void __init omap_reserve(void)
27{
28 omap_vram_reserve_sdram_memblock();
29 omap_dsp_reserve_sdram_memblock();
30 omap_secure_ram_reserve_memblock();
31 omap_barrier_reserve_memblock();
32}
33
34void __init omap_init_consistent_dma_size(void)
35{
36#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
37 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
38#endif
39}
40
41/*
42 * Stub function for OMAP2 so that common files
43 * continue to build when custom builds are used
44 */
45int __weak omap_secure_ram_reserve_memblock(void)
46{
47 return 0;
48}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 87ba8dd0d791..f3771cdb9838 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,9 +22,6 @@
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23#include <asm/sched_clock.h> 23#include <asm/sched_clock.h>
24 24
25#include <plat/common.h>
26#include <plat/clock.h>
27
28/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ 25/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
29#define OMAP2_32KSYNCNT_REV_OFF 0x0 26#define OMAP2_32KSYNCNT_REV_OFF 0x0
30#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) 27#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5a4678edd65a..a609e2161817 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -15,8 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/smc91x.h> 16#include <linux/smc91x.h>
17 17
18#include <mach/hardware.h> 18#include <plat/debug-devices.h>
19#include "../mach-omap2/debug-devices.h"
20 19
21/* Many OMAP development platforms reuse the same "debug board"; these 20/* Many OMAP development platforms reuse the same "debug board"; these
22 * platforms include H2, H3, H4, and Perseus2. 21 * platforms include H2, H3, H4, and Perseus2.
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index ea29bbe8e5cf..c43ea21f33b4 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -17,16 +17,33 @@
17#include <linux/platform_data/gpio-omap.h> 17#include <linux/platform_data/gpio-omap.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19 19
20#include <mach/hardware.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22 21
23#include <plat/fpga.h>
24
25/* Many OMAP development platforms reuse the same "debug board"; these 22/* Many OMAP development platforms reuse the same "debug board"; these
26 * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the 23 * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
27 * debug board (all green), accessed through FPGA registers. 24 * debug board (all green), accessed through FPGA registers.
28 */ 25 */
29 26
27/* NOTE: most boards don't have a static mapping for the FPGA ... */
28struct h2p2_dbg_fpga {
29 /* offset 0x00 */
30 u16 smc91x[8];
31 /* offset 0x10 */
32 u16 fpga_rev;
33 u16 board_rev;
34 u16 gpio_outputs;
35 u16 leds;
36 /* offset 0x18 */
37 u16 misc_inputs;
38 u16 lan_status;
39 u16 lan_reset;
40 u16 reserved0;
41 /* offset 0x20 */
42 u16 ps2_data;
43 u16 ps2_ctrl;
44 /* plus also 4 rs232 ports ... */
45};
46
30static struct h2p2_dbg_fpga __iomem *fpga; 47static struct h2p2_dbg_fpga __iomem *fpga;
31 48
32static u16 fpga_led_state; 49static u16 fpga_led_state;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c76ed8bff838..c288b76f8e6c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,9 +36,7 @@
36#include <linux/slab.h> 36#include <linux/slab.h>
37#include <linux/delay.h> 37#include <linux/delay.h>
38 38
39#include <plat/cpu.h> 39#include <plat-omap/dma-omap.h>
40#include <plat/dma.h>
41#include <plat/tc.h>
42 40
43/* 41/*
44 * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA 42 * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
@@ -175,12 +173,13 @@ static inline void set_gdma_dev(int req, int dev)
175#define omap_writel(val, reg) do {} while (0) 173#define omap_writel(val, reg) do {} while (0)
176#endif 174#endif
177 175
176#ifdef CONFIG_ARCH_OMAP1
178void omap_set_dma_priority(int lch, int dst_port, int priority) 177void omap_set_dma_priority(int lch, int dst_port, int priority)
179{ 178{
180 unsigned long reg; 179 unsigned long reg;
181 u32 l; 180 u32 l;
182 181
183 if (cpu_class_is_omap1()) { 182 if (dma_omap1()) {
184 switch (dst_port) { 183 switch (dst_port) {
185 case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */ 184 case OMAP_DMA_PORT_OCP_T1: /* FFFECC00 */
186 reg = OMAP_TC_OCPT1_PRIOR; 185 reg = OMAP_TC_OCPT1_PRIOR;
@@ -203,18 +202,22 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
203 l |= (priority & 0xf) << 8; 202 l |= (priority & 0xf) << 8;
204 omap_writel(l, reg); 203 omap_writel(l, reg);
205 } 204 }
205}
206#endif
206 207
207 if (cpu_class_is_omap2()) { 208#ifdef CONFIG_ARCH_OMAP2PLUS
208 u32 ccr; 209void omap_set_dma_priority(int lch, int dst_port, int priority)
210{
211 u32 ccr;
209 212
210 ccr = p->dma_read(CCR, lch); 213 ccr = p->dma_read(CCR, lch);
211 if (priority) 214 if (priority)
212 ccr |= (1 << 6); 215 ccr |= (1 << 6);
213 else 216 else
214 ccr &= ~(1 << 6); 217 ccr &= ~(1 << 6);
215 p->dma_write(ccr, CCR, lch); 218 p->dma_write(ccr, CCR, lch);
216 }
217} 219}
220#endif
218EXPORT_SYMBOL(omap_set_dma_priority); 221EXPORT_SYMBOL(omap_set_dma_priority);
219 222
220void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, 223void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
@@ -228,7 +231,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
228 l |= data_type; 231 l |= data_type;
229 p->dma_write(l, CSDP, lch); 232 p->dma_write(l, CSDP, lch);
230 233
231 if (cpu_class_is_omap1()) { 234 if (dma_omap1()) {
232 u16 ccr; 235 u16 ccr;
233 236
234 ccr = p->dma_read(CCR, lch); 237 ccr = p->dma_read(CCR, lch);
@@ -244,7 +247,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
244 p->dma_write(ccr, CCR2, lch); 247 p->dma_write(ccr, CCR2, lch);
245 } 248 }
246 249
247 if (cpu_class_is_omap2() && dma_trigger) { 250 if (dma_omap2plus() && dma_trigger) {
248 u32 val; 251 u32 val;
249 252
250 val = p->dma_read(CCR, lch); 253 val = p->dma_read(CCR, lch);
@@ -284,7 +287,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
284{ 287{
285 BUG_ON(omap_dma_in_1510_mode()); 288 BUG_ON(omap_dma_in_1510_mode());
286 289
287 if (cpu_class_is_omap1()) { 290 if (dma_omap1()) {
288 u16 w; 291 u16 w;
289 292
290 w = p->dma_read(CCR2, lch); 293 w = p->dma_read(CCR2, lch);
@@ -314,7 +317,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
314 p->dma_write(w, LCH_CTRL, lch); 317 p->dma_write(w, LCH_CTRL, lch);
315 } 318 }
316 319
317 if (cpu_class_is_omap2()) { 320 if (dma_omap2plus()) {
318 u32 val; 321 u32 val;
319 322
320 val = p->dma_read(CCR, lch); 323 val = p->dma_read(CCR, lch);
@@ -342,7 +345,7 @@ EXPORT_SYMBOL(omap_set_dma_color_mode);
342 345
343void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode) 346void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
344{ 347{
345 if (cpu_class_is_omap2()) { 348 if (dma_omap2plus()) {
346 u32 csdp; 349 u32 csdp;
347 350
348 csdp = p->dma_read(CSDP, lch); 351 csdp = p->dma_read(CSDP, lch);
@@ -355,7 +358,7 @@ EXPORT_SYMBOL(omap_set_dma_write_mode);
355 358
356void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode) 359void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
357{ 360{
358 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { 361 if (dma_omap1() && !dma_omap15xx()) {
359 u32 l; 362 u32 l;
360 363
361 l = p->dma_read(LCH_CTRL, lch); 364 l = p->dma_read(LCH_CTRL, lch);
@@ -373,7 +376,7 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
373{ 376{
374 u32 l; 377 u32 l;
375 378
376 if (cpu_class_is_omap1()) { 379 if (dma_omap1()) {
377 u16 w; 380 u16 w;
378 381
379 w = p->dma_read(CSDP, lch); 382 w = p->dma_read(CSDP, lch);
@@ -415,7 +418,7 @@ EXPORT_SYMBOL(omap_set_dma_params);
415 418
416void omap_set_dma_src_index(int lch, int eidx, int fidx) 419void omap_set_dma_src_index(int lch, int eidx, int fidx)
417{ 420{
418 if (cpu_class_is_omap2()) 421 if (dma_omap2plus())
419 return; 422 return;
420 423
421 p->dma_write(eidx, CSEI, lch); 424 p->dma_write(eidx, CSEI, lch);
@@ -447,13 +450,13 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
447 case OMAP_DMA_DATA_BURST_DIS: 450 case OMAP_DMA_DATA_BURST_DIS:
448 break; 451 break;
449 case OMAP_DMA_DATA_BURST_4: 452 case OMAP_DMA_DATA_BURST_4:
450 if (cpu_class_is_omap2()) 453 if (dma_omap2plus())
451 burst = 0x1; 454 burst = 0x1;
452 else 455 else
453 burst = 0x2; 456 burst = 0x2;
454 break; 457 break;
455 case OMAP_DMA_DATA_BURST_8: 458 case OMAP_DMA_DATA_BURST_8:
456 if (cpu_class_is_omap2()) { 459 if (dma_omap2plus()) {
457 burst = 0x2; 460 burst = 0x2;
458 break; 461 break;
459 } 462 }
@@ -463,7 +466,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
463 * fall through 466 * fall through
464 */ 467 */
465 case OMAP_DMA_DATA_BURST_16: 468 case OMAP_DMA_DATA_BURST_16:
466 if (cpu_class_is_omap2()) { 469 if (dma_omap2plus()) {
467 burst = 0x3; 470 burst = 0x3;
468 break; 471 break;
469 } 472 }
@@ -487,7 +490,7 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
487{ 490{
488 u32 l; 491 u32 l;
489 492
490 if (cpu_class_is_omap1()) { 493 if (dma_omap1()) {
491 l = p->dma_read(CSDP, lch); 494 l = p->dma_read(CSDP, lch);
492 l &= ~(0x1f << 9); 495 l &= ~(0x1f << 9);
493 l |= dest_port << 9; 496 l |= dest_port << 9;
@@ -508,7 +511,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_params);
508 511
509void omap_set_dma_dest_index(int lch, int eidx, int fidx) 512void omap_set_dma_dest_index(int lch, int eidx, int fidx)
510{ 513{
511 if (cpu_class_is_omap2()) 514 if (dma_omap2plus())
512 return; 515 return;
513 516
514 p->dma_write(eidx, CDEI, lch); 517 p->dma_write(eidx, CDEI, lch);
@@ -540,19 +543,19 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
540 case OMAP_DMA_DATA_BURST_DIS: 543 case OMAP_DMA_DATA_BURST_DIS:
541 break; 544 break;
542 case OMAP_DMA_DATA_BURST_4: 545 case OMAP_DMA_DATA_BURST_4:
543 if (cpu_class_is_omap2()) 546 if (dma_omap2plus())
544 burst = 0x1; 547 burst = 0x1;
545 else 548 else
546 burst = 0x2; 549 burst = 0x2;
547 break; 550 break;
548 case OMAP_DMA_DATA_BURST_8: 551 case OMAP_DMA_DATA_BURST_8:
549 if (cpu_class_is_omap2()) 552 if (dma_omap2plus())
550 burst = 0x2; 553 burst = 0x2;
551 else 554 else
552 burst = 0x3; 555 burst = 0x3;
553 break; 556 break;
554 case OMAP_DMA_DATA_BURST_16: 557 case OMAP_DMA_DATA_BURST_16:
555 if (cpu_class_is_omap2()) { 558 if (dma_omap2plus()) {
556 burst = 0x3; 559 burst = 0x3;
557 break; 560 break;
558 } 561 }
@@ -573,7 +576,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
573static inline void omap_enable_channel_irq(int lch) 576static inline void omap_enable_channel_irq(int lch)
574{ 577{
575 /* Clear CSR */ 578 /* Clear CSR */
576 if (cpu_class_is_omap1()) 579 if (dma_omap1())
577 p->dma_read(CSR, lch); 580 p->dma_read(CSR, lch);
578 else 581 else
579 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); 582 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -587,7 +590,7 @@ static inline void omap_disable_channel_irq(int lch)
587 /* disable channel interrupts */ 590 /* disable channel interrupts */
588 p->dma_write(0, CICR, lch); 591 p->dma_write(0, CICR, lch);
589 /* Clear CSR */ 592 /* Clear CSR */
590 if (cpu_class_is_omap1()) 593 if (dma_omap1())
591 p->dma_read(CSR, lch); 594 p->dma_read(CSR, lch);
592 else 595 else
593 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); 596 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -611,7 +614,7 @@ static inline void enable_lnk(int lch)
611 614
612 l = p->dma_read(CLNK_CTRL, lch); 615 l = p->dma_read(CLNK_CTRL, lch);
613 616
614 if (cpu_class_is_omap1()) 617 if (dma_omap1())
615 l &= ~(1 << 14); 618 l &= ~(1 << 14);
616 619
617 /* Set the ENABLE_LNK bits */ 620 /* Set the ENABLE_LNK bits */
@@ -619,7 +622,7 @@ static inline void enable_lnk(int lch)
619 l = dma_chan[lch].next_lch | (1 << 15); 622 l = dma_chan[lch].next_lch | (1 << 15);
620 623
621#ifndef CONFIG_ARCH_OMAP1 624#ifndef CONFIG_ARCH_OMAP1
622 if (cpu_class_is_omap2()) 625 if (dma_omap2plus())
623 if (dma_chan[lch].next_linked_ch != -1) 626 if (dma_chan[lch].next_linked_ch != -1)
624 l = dma_chan[lch].next_linked_ch | (1 << 15); 627 l = dma_chan[lch].next_linked_ch | (1 << 15);
625#endif 628#endif
@@ -636,12 +639,12 @@ static inline void disable_lnk(int lch)
636 /* Disable interrupts */ 639 /* Disable interrupts */
637 omap_disable_channel_irq(lch); 640 omap_disable_channel_irq(lch);
638 641
639 if (cpu_class_is_omap1()) { 642 if (dma_omap1()) {
640 /* Set the STOP_LNK bit */ 643 /* Set the STOP_LNK bit */
641 l |= 1 << 14; 644 l |= 1 << 14;
642 } 645 }
643 646
644 if (cpu_class_is_omap2()) { 647 if (dma_omap2plus()) {
645 /* Clear the ENABLE_LNK bit */ 648 /* Clear the ENABLE_LNK bit */
646 l &= ~(1 << 15); 649 l &= ~(1 << 15);
647 } 650 }
@@ -655,7 +658,7 @@ static inline void omap2_enable_irq_lch(int lch)
655 u32 val; 658 u32 val;
656 unsigned long flags; 659 unsigned long flags;
657 660
658 if (!cpu_class_is_omap2()) 661 if (dma_omap1())
659 return; 662 return;
660 663
661 spin_lock_irqsave(&dma_chan_lock, flags); 664 spin_lock_irqsave(&dma_chan_lock, flags);
@@ -673,7 +676,7 @@ static inline void omap2_disable_irq_lch(int lch)
673 u32 val; 676 u32 val;
674 unsigned long flags; 677 unsigned long flags;
675 678
676 if (!cpu_class_is_omap2()) 679 if (dma_omap1())
677 return; 680 return;
678 681
679 spin_lock_irqsave(&dma_chan_lock, flags); 682 spin_lock_irqsave(&dma_chan_lock, flags);
@@ -712,7 +715,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
712 if (p->clear_lch_regs) 715 if (p->clear_lch_regs)
713 p->clear_lch_regs(free_ch); 716 p->clear_lch_regs(free_ch);
714 717
715 if (cpu_class_is_omap2()) 718 if (dma_omap2plus())
716 omap_clear_dma(free_ch); 719 omap_clear_dma(free_ch);
717 720
718 spin_unlock_irqrestore(&dma_chan_lock, flags); 721 spin_unlock_irqrestore(&dma_chan_lock, flags);
@@ -723,7 +726,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
723 chan->flags = 0; 726 chan->flags = 0;
724 727
725#ifndef CONFIG_ARCH_OMAP1 728#ifndef CONFIG_ARCH_OMAP1
726 if (cpu_class_is_omap2()) { 729 if (dma_omap2plus()) {
727 chan->chain_id = -1; 730 chan->chain_id = -1;
728 chan->next_linked_ch = -1; 731 chan->next_linked_ch = -1;
729 } 732 }
@@ -731,13 +734,13 @@ int omap_request_dma(int dev_id, const char *dev_name,
731 734
732 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; 735 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
733 736
734 if (cpu_class_is_omap1()) 737 if (dma_omap1())
735 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; 738 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
736 else if (cpu_class_is_omap2()) 739 else if (dma_omap2plus())
737 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ | 740 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ |
738 OMAP2_DMA_TRANS_ERR_IRQ; 741 OMAP2_DMA_TRANS_ERR_IRQ;
739 742
740 if (cpu_is_omap16xx()) { 743 if (dma_omap16xx()) {
741 /* If the sync device is set, configure it dynamically. */ 744 /* If the sync device is set, configure it dynamically. */
742 if (dev_id != 0) { 745 if (dev_id != 0) {
743 set_gdma_dev(free_ch + 1, dev_id); 746 set_gdma_dev(free_ch + 1, dev_id);
@@ -748,11 +751,11 @@ int omap_request_dma(int dev_id, const char *dev_name,
748 * id. 751 * id.
749 */ 752 */
750 p->dma_write(dev_id | (1 << 10), CCR, free_ch); 753 p->dma_write(dev_id | (1 << 10), CCR, free_ch);
751 } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) { 754 } else if (dma_omap1()) {
752 p->dma_write(dev_id, CCR, free_ch); 755 p->dma_write(dev_id, CCR, free_ch);
753 } 756 }
754 757
755 if (cpu_class_is_omap2()) { 758 if (dma_omap2plus()) {
756 omap_enable_channel_irq(free_ch); 759 omap_enable_channel_irq(free_ch);
757 omap2_enable_irq_lch(free_ch); 760 omap2_enable_irq_lch(free_ch);
758 } 761 }
@@ -774,7 +777,7 @@ void omap_free_dma(int lch)
774 } 777 }
775 778
776 /* Disable interrupt for logical channel */ 779 /* Disable interrupt for logical channel */
777 if (cpu_class_is_omap2()) 780 if (dma_omap2plus())
778 omap2_disable_irq_lch(lch); 781 omap2_disable_irq_lch(lch);
779 782
780 /* Disable all DMA interrupts for the channel. */ 783 /* Disable all DMA interrupts for the channel. */
@@ -784,7 +787,7 @@ void omap_free_dma(int lch)
784 p->dma_write(0, CCR, lch); 787 p->dma_write(0, CCR, lch);
785 788
786 /* Clear registers */ 789 /* Clear registers */
787 if (cpu_class_is_omap2()) 790 if (dma_omap2plus())
788 omap_clear_dma(lch); 791 omap_clear_dma(lch);
789 792
790 spin_lock_irqsave(&dma_chan_lock, flags); 793 spin_lock_irqsave(&dma_chan_lock, flags);
@@ -810,7 +813,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
810{ 813{
811 u32 reg; 814 u32 reg;
812 815
813 if (!cpu_class_is_omap2()) { 816 if (dma_omap1()) {
814 printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__); 817 printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__);
815 return; 818 return;
816 } 819 }
@@ -849,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
849 } 852 }
850 l = p->dma_read(CCR, lch); 853 l = p->dma_read(CCR, lch);
851 l &= ~((1 << 6) | (1 << 26)); 854 l &= ~((1 << 6) | (1 << 26));
852 if (cpu_class_is_omap2() && !cpu_is_omap242x()) 855 if (d->dev_caps & IS_RW_PRIORITY)
853 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26); 856 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
854 else 857 else
855 l |= ((read_prio & 0x1) << 6); 858 l |= ((read_prio & 0x1) << 6);
@@ -882,7 +885,7 @@ void omap_start_dma(int lch)
882 * The CPC/CDAC register needs to be initialized to zero 885 * The CPC/CDAC register needs to be initialized to zero
883 * before starting dma transfer. 886 * before starting dma transfer.
884 */ 887 */
885 if (cpu_is_omap15xx()) 888 if (dma_omap15xx())
886 p->dma_write(0, CPC, lch); 889 p->dma_write(0, CPC, lch);
887 else 890 else
888 p->dma_write(0, CDAC, lch); 891 p->dma_write(0, CDAC, lch);
@@ -1045,7 +1048,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1045{ 1048{
1046 dma_addr_t offset = 0; 1049 dma_addr_t offset = 0;
1047 1050
1048 if (cpu_is_omap15xx()) 1051 if (dma_omap15xx())
1049 offset = p->dma_read(CPC, lch); 1052 offset = p->dma_read(CPC, lch);
1050 else 1053 else
1051 offset = p->dma_read(CSAC, lch); 1054 offset = p->dma_read(CSAC, lch);
@@ -1053,7 +1056,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1053 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) 1056 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
1054 offset = p->dma_read(CSAC, lch); 1057 offset = p->dma_read(CSAC, lch);
1055 1058
1056 if (!cpu_is_omap15xx()) { 1059 if (!dma_omap15xx()) {
1057 /* 1060 /*
1058 * CDAC == 0 indicates that the DMA transfer on the channel has 1061 * CDAC == 0 indicates that the DMA transfer on the channel has
1059 * not been started (no data has been transferred so far). 1062 * not been started (no data has been transferred so far).
@@ -1065,7 +1068,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1065 offset = p->dma_read(CSSA, lch); 1068 offset = p->dma_read(CSSA, lch);
1066 } 1069 }
1067 1070
1068 if (cpu_class_is_omap1()) 1071 if (dma_omap1())
1069 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); 1072 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
1070 1073
1071 return offset; 1074 return offset;
@@ -1084,7 +1087,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1084{ 1087{
1085 dma_addr_t offset = 0; 1088 dma_addr_t offset = 0;
1086 1089
1087 if (cpu_is_omap15xx()) 1090 if (dma_omap15xx())
1088 offset = p->dma_read(CPC, lch); 1091 offset = p->dma_read(CPC, lch);
1089 else 1092 else
1090 offset = p->dma_read(CDAC, lch); 1093 offset = p->dma_read(CDAC, lch);
@@ -1093,7 +1096,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1093 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1096 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
1094 * read before the DMA controller finished disabling the channel. 1097 * read before the DMA controller finished disabling the channel.
1095 */ 1098 */
1096 if (!cpu_is_omap15xx() && offset == 0) { 1099 if (!dma_omap15xx() && offset == 0) {
1097 offset = p->dma_read(CDAC, lch); 1100 offset = p->dma_read(CDAC, lch);
1098 /* 1101 /*
1099 * CDAC == 0 indicates that the DMA transfer on the channel has 1102 * CDAC == 0 indicates that the DMA transfer on the channel has
@@ -1104,7 +1107,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1104 offset = p->dma_read(CDSA, lch); 1107 offset = p->dma_read(CDSA, lch);
1105 } 1108 }
1106 1109
1107 if (cpu_class_is_omap1()) 1110 if (dma_omap1())
1108 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); 1111 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
1109 1112
1110 return offset; 1113 return offset;
@@ -1121,7 +1124,7 @@ int omap_dma_running(void)
1121{ 1124{
1122 int lch; 1125 int lch;
1123 1126
1124 if (cpu_class_is_omap1()) 1127 if (dma_omap1())
1125 if (omap_lcd_dma_running()) 1128 if (omap_lcd_dma_running())
1126 return 1; 1129 return 1;
1127 1130
@@ -2024,7 +2027,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2024 dma_chan = d->chan; 2027 dma_chan = d->chan;
2025 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; 2028 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
2026 2029
2027 if (cpu_class_is_omap2()) { 2030 if (dma_omap2plus()) {
2028 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) * 2031 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
2029 dma_lch_count, GFP_KERNEL); 2032 dma_lch_count, GFP_KERNEL);
2030 if (!dma_linked_lch) { 2033 if (!dma_linked_lch) {
@@ -2036,7 +2039,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2036 spin_lock_init(&dma_chan_lock); 2039 spin_lock_init(&dma_chan_lock);
2037 for (ch = 0; ch < dma_chan_count; ch++) { 2040 for (ch = 0; ch < dma_chan_count; ch++) {
2038 omap_clear_dma(ch); 2041 omap_clear_dma(ch);
2039 if (cpu_class_is_omap2()) 2042 if (dma_omap2plus())
2040 omap2_disable_irq_lch(ch); 2043 omap2_disable_irq_lch(ch);
2041 2044
2042 dma_chan[ch].dev_id = -1; 2045 dma_chan[ch].dev_id = -1;
@@ -2045,7 +2048,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2045 if (ch >= 6 && enable_1510_mode) 2048 if (ch >= 6 && enable_1510_mode)
2046 continue; 2049 continue;
2047 2050
2048 if (cpu_class_is_omap1()) { 2051 if (dma_omap1()) {
2049 /* 2052 /*
2050 * request_irq() doesn't like dev_id (ie. ch) being 2053 * request_irq() doesn't like dev_id (ie. ch) being
2051 * zero, so we have to kludge around this. 2054 * zero, so we have to kludge around this.
@@ -2070,11 +2073,11 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2070 } 2073 }
2071 } 2074 }
2072 2075
2073 if (cpu_class_is_omap2() && !cpu_is_omap242x()) 2076 if (d->dev_caps & IS_RW_PRIORITY)
2074 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 2077 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
2075 DMA_DEFAULT_FIFO_DEPTH, 0); 2078 DMA_DEFAULT_FIFO_DEPTH, 0);
2076 2079
2077 if (cpu_class_is_omap2()) { 2080 if (dma_omap2plus()) {
2078 strcpy(irq_name, "0"); 2081 strcpy(irq_name, "0");
2079 dma_irq = platform_get_irq_byname(pdev, irq_name); 2082 dma_irq = platform_get_irq_byname(pdev, irq_name);
2080 if (dma_irq < 0) { 2083 if (dma_irq < 0) {
@@ -2089,9 +2092,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2089 } 2092 }
2090 } 2093 }
2091 2094
2092 /* reserve dma channels 0 and 1 in high security devices */ 2095 /* reserve dma channels 0 and 1 in high security devices on 34xx */
2093 if (cpu_is_omap34xx() && 2096 if (d->dev_caps & HS_CHANNELS_RESERVED) {
2094 (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
2095 pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n"); 2097 pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n");
2096 dma_chan[0].dev_id = 0; 2098 dma_chan[0].dev_id = 0;
2097 dma_chan[1].dev_id = 1; 2099 dma_chan[1].dev_id = 1;
@@ -2118,7 +2120,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
2118{ 2120{
2119 int dma_irq; 2121 int dma_irq;
2120 2122
2121 if (cpu_class_is_omap2()) { 2123 if (dma_omap2plus()) {
2122 char irq_name[4]; 2124 char irq_name[4];
2123 strcpy(irq_name, "0"); 2125 strcpy(irq_name, "0");
2124 dma_irq = platform_get_irq_byname(pdev, irq_name); 2126 dma_irq = platform_get_irq_byname(pdev, irq_name);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index b09e55632f4b..9dca23e4d6b0 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -44,9 +44,6 @@
44#include <linux/of_device.h> 44#include <linux/of_device.h>
45 45
46#include <plat/dmtimer.h> 46#include <plat/dmtimer.h>
47#include <plat/omap-pm.h>
48
49#include <mach/hardware.h>
50 47
51static u32 omap_reserved_systimers; 48static u32 omap_reserved_systimers;
52static LIST_HEAD(omap_timer_list); 49static LIST_HEAD(omap_timer_list);
@@ -332,7 +329,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
332EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq); 329EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
333 330
334#if defined(CONFIG_ARCH_OMAP1) 331#if defined(CONFIG_ARCH_OMAP1)
335 332#include <mach/hardware.h>
336/** 333/**
337 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR 334 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
338 * @inputmask: current value of idlect mask 335 * @inputmask: current value of idlect mask
@@ -409,7 +406,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
409 omap_dm_timer_enable(timer); 406 omap_dm_timer_enable(timer);
410 407
411 if (!(timer->capability & OMAP_TIMER_ALWON)) { 408 if (!(timer->capability & OMAP_TIMER_ALWON)) {
412 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != 409 if (timer->get_context_loss_count &&
410 timer->get_context_loss_count(&timer->pdev->dev) !=
413 timer->ctx_loss_count) 411 timer->ctx_loss_count)
414 omap_timer_restore_context(timer); 412 omap_timer_restore_context(timer);
415 } 413 }
@@ -438,9 +436,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
438 436
439 __omap_dm_timer_stop(timer, timer->posted, rate); 437 __omap_dm_timer_stop(timer, timer->posted, rate);
440 438
441 if (!(timer->capability & OMAP_TIMER_ALWON)) 439 if (!(timer->capability & OMAP_TIMER_ALWON)) {
442 timer->ctx_loss_count = 440 if (timer->get_context_loss_count)
443 omap_pm_get_dev_context_loss_count(&timer->pdev->dev); 441 timer->ctx_loss_count =
442 timer->get_context_loss_count(&timer->pdev->dev);
443 }
444 444
445 /* 445 /*
446 * Since the register values are computed and written within 446 * Since the register values are computed and written within
@@ -556,7 +556,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
556 omap_dm_timer_enable(timer); 556 omap_dm_timer_enable(timer);
557 557
558 if (!(timer->capability & OMAP_TIMER_ALWON)) { 558 if (!(timer->capability & OMAP_TIMER_ALWON)) {
559 if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != 559 if (timer->get_context_loss_count &&
560 timer->get_context_loss_count(&timer->pdev->dev) !=
560 timer->ctx_loss_count) 561 timer->ctx_loss_count)
561 omap_timer_restore_context(timer); 562 omap_timer_restore_context(timer);
562 } 563 }
@@ -798,6 +799,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
798 timer->id = pdev->id; 799 timer->id = pdev->id;
799 timer->capability = pdata->timer_capability; 800 timer->capability = pdata->timer_capability;
800 timer->reserved = omap_dm_timer_reserved_systimer(timer->id); 801 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
802 timer->get_context_loss_count = pdata->get_context_loss_count;
801 } 803 }
802 804
803 timer->irq = irq->start; 805 timer->irq = irq->start;
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index bcbb9d5dc293..3a77b30f53d4 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -30,9 +30,69 @@
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/omapfb.h> 31#include <linux/omapfb.h>
32 32
33#include <mach/hardware.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35 34
35#include <plat/cpu.h>
36
37#ifdef CONFIG_OMAP2_VRFB
38
39/*
40 * The first memory resource is the register region for VRFB,
41 * the rest are VRFB virtual memory areas for each VRFB context.
42 */
43
44static const struct resource omap2_vrfb_resources[] = {
45 DEFINE_RES_MEM_NAMED(0x68008000u, 0x40, "vrfb-regs"),
46 DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"),
47 DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"),
48 DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"),
49 DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"),
50};
51
52static const struct resource omap3_vrfb_resources[] = {
53 DEFINE_RES_MEM_NAMED(0x6C000180u, 0xc0, "vrfb-regs"),
54 DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"),
55 DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"),
56 DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"),
57 DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"),
58 DEFINE_RES_MEM_NAMED(0xe0000000u, 0x4000000, "vrfb-area-4"),
59 DEFINE_RES_MEM_NAMED(0xe4000000u, 0x4000000, "vrfb-area-5"),
60 DEFINE_RES_MEM_NAMED(0xe8000000u, 0x4000000, "vrfb-area-6"),
61 DEFINE_RES_MEM_NAMED(0xec000000u, 0x4000000, "vrfb-area-7"),
62 DEFINE_RES_MEM_NAMED(0xf0000000u, 0x4000000, "vrfb-area-8"),
63 DEFINE_RES_MEM_NAMED(0xf4000000u, 0x4000000, "vrfb-area-9"),
64 DEFINE_RES_MEM_NAMED(0xf8000000u, 0x4000000, "vrfb-area-10"),
65 DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"),
66};
67
68static int __init omap_init_vrfb(void)
69{
70 struct platform_device *pdev;
71 const struct resource *res;
72 unsigned int num_res;
73
74 if (cpu_is_omap24xx()) {
75 res = omap2_vrfb_resources;
76 num_res = ARRAY_SIZE(omap2_vrfb_resources);
77 } else if (cpu_is_omap34xx()) {
78 res = omap3_vrfb_resources;
79 num_res = ARRAY_SIZE(omap3_vrfb_resources);
80 } else {
81 return 0;
82 }
83
84 pdev = platform_device_register_resndata(NULL, "omapvrfb", -1,
85 res, num_res, NULL, 0);
86
87 if (IS_ERR(pdev))
88 return PTR_ERR(pdev);
89 else
90 return 0;
91}
92
93arch_initcall(omap_init_vrfb);
94#endif
95
36#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) 96#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
37 97
38static bool omapfb_lcd_configured; 98static bool omapfb_lcd_configured;
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5683a84c6ee..f9df624d108c 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,160 +26,18 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-omap.h>
29#include <linux/slab.h> 30#include <linux/slab.h>
30#include <linux/err.h> 31#include <linux/err.h>
31#include <linux/clk.h> 32#include <linux/clk.h>
32 33
33#include <mach/irqs.h>
34#include <plat/i2c.h> 34#include <plat/i2c.h>
35#include <plat/omap_device.h>
36 35
37#define OMAP_I2C_SIZE 0x3f
38#define OMAP1_I2C_BASE 0xfffb3800
39#define OMAP1_INT_I2C (32 + 4)
40
41static const char name[] = "omap_i2c";
42
43#define I2C_RESOURCE_BUILDER(base, irq) \
44 { \
45 .start = (base), \
46 .end = (base) + OMAP_I2C_SIZE, \
47 .flags = IORESOURCE_MEM, \
48 }, \
49 { \
50 .start = (irq), \
51 .flags = IORESOURCE_IRQ, \
52 },
53
54static struct resource i2c_resources[][2] = {
55 { I2C_RESOURCE_BUILDER(0, 0) },
56};
57
58#define I2C_DEV_BUILDER(bus_id, res, data) \
59 { \
60 .id = (bus_id), \
61 .name = name, \
62 .num_resources = ARRAY_SIZE(res), \
63 .resource = (res), \
64 .dev = { \
65 .platform_data = (data), \
66 }, \
67 }
68
69#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
70#define OMAP_I2C_MAX_CONTROLLERS 4 36#define OMAP_I2C_MAX_CONTROLLERS 4
71static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; 37static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
72static struct platform_device omap_i2c_devices[] = {
73 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
74};
75 38
76#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) 39#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
77 40
78static int __init omap_i2c_nr_ports(void)
79{
80 int ports = 0;
81
82 if (cpu_class_is_omap1())
83 ports = 1;
84 else if (cpu_is_omap24xx())
85 ports = 2;
86 else if (cpu_is_omap34xx())
87 ports = 3;
88 else if (cpu_is_omap44xx())
89 ports = 4;
90
91 return ports;
92}
93
94static inline int omap1_i2c_add_bus(int bus_id)
95{
96 struct platform_device *pdev;
97 struct omap_i2c_bus_platform_data *pdata;
98 struct resource *res;
99
100 omap1_i2c_mux_pins(bus_id);
101
102 pdev = &omap_i2c_devices[bus_id - 1];
103 res = pdev->resource;
104 res[0].start = OMAP1_I2C_BASE;
105 res[0].end = res[0].start + OMAP_I2C_SIZE;
106 res[1].start = OMAP1_INT_I2C;
107 pdata = &i2c_pdata[bus_id - 1];
108
109 /* all OMAP1 have IP version 1 register set */
110 pdata->rev = OMAP_I2C_IP_VERSION_1;
111
112 /* all OMAP1 I2C are implemented like this */
113 pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
114 OMAP_I2C_FLAG_SIMPLE_CLOCK |
115 OMAP_I2C_FLAG_16BIT_DATA_REG |
116 OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
117
118 /* how the cpu bus is wired up differs for 7xx only */
119
120 if (cpu_is_omap7xx())
121 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
122 else
123 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
124
125 return platform_device_register(pdev);
126}
127
128
129#ifdef CONFIG_ARCH_OMAP2PLUS
130static inline int omap2_i2c_add_bus(int bus_id)
131{
132 int l;
133 struct omap_hwmod *oh;
134 struct platform_device *pdev;
135 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
136 struct omap_i2c_bus_platform_data *pdata;
137 struct omap_i2c_dev_attr *dev_attr;
138
139 omap2_i2c_mux_pins(bus_id);
140
141 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
142 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
143 "String buffer overflow in I2C%d device setup\n", bus_id);
144 oh = omap_hwmod_lookup(oh_name);
145 if (!oh) {
146 pr_err("Could not look up %s\n", oh_name);
147 return -EEXIST;
148 }
149
150 pdata = &i2c_pdata[bus_id - 1];
151 /*
152 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
153 * use, and functionality implementation flags, up to the OMAP I2C
154 * driver via platform data
155 */
156 pdata->rev = oh->class->rev;
157
158 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
159 pdata->flags = dev_attr->flags;
160
161 pdev = omap_device_build(name, bus_id, oh, pdata,
162 sizeof(struct omap_i2c_bus_platform_data),
163 NULL, 0, 0);
164 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
165
166 return PTR_RET(pdev);
167}
168#else
169static inline int omap2_i2c_add_bus(int bus_id)
170{
171 return 0;
172}
173#endif
174
175static int __init omap_i2c_add_bus(int bus_id)
176{
177 if (cpu_class_is_omap1())
178 return omap1_i2c_add_bus(bus_id);
179 else
180 return omap2_i2c_add_bus(bus_id);
181}
182
183/** 41/**
184 * omap_i2c_bus_setup - Process command line options for the I2C bus speed 42 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
185 * @str: String of options 43 * @str: String of options
@@ -193,12 +51,11 @@ static int __init omap_i2c_add_bus(int bus_id)
193 */ 51 */
194static int __init omap_i2c_bus_setup(char *str) 52static int __init omap_i2c_bus_setup(char *str)
195{ 53{
196 int ports;
197 int ints[3]; 54 int ints[3];
198 55
199 ports = omap_i2c_nr_ports();
200 get_options(str, 3, ints); 56 get_options(str, 3, ints);
201 if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports) 57 if (ints[0] < 2 || ints[1] < 1 ||
58 ints[1] > OMAP_I2C_MAX_CONTROLLERS)
202 return 0; 59 return 0;
203 i2c_pdata[ints[1] - 1].clkrate = ints[2]; 60 i2c_pdata[ints[1] - 1].clkrate = ints[2];
204 i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; 61 i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
@@ -218,7 +75,7 @@ static int __init omap_register_i2c_bus_cmdline(void)
218 for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) 75 for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
219 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { 76 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
220 i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; 77 i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
221 err = omap_i2c_add_bus(i + 1); 78 err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
222 if (err) 79 if (err)
223 goto out; 80 goto out;
224 } 81 }
@@ -243,7 +100,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
243{ 100{
244 int err; 101 int err;
245 102
246 BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports()); 103 BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
247 104
248 if (info) { 105 if (info) {
249 err = i2c_register_board_info(bus_id, info, len); 106 err = i2c_register_board_info(bus_id, info, len);
@@ -256,5 +113,5 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
256 113
257 i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; 114 i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
258 115
259 return omap_i2c_add_bus(bus_id); 116 return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
260} 117}
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
index 0a87b052f8f7..6f506ba9e453 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/dma.h 2 * OMAP DMA handling defines and function
3 * 3 *
4 * Copyright (C) 2003 Nokia Corporation 4 * Copyright (C) 2003 Nokia Corporation
5 * Author: Juha Yrjölä <juha.yrjola@nokia.com> 5 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
@@ -23,187 +23,8 @@
23 23
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25 25
26/*
27 * TODO: These dma channel defines should go away once all
28 * the omap drivers hwmod adapted.
29 */
30
31/* Move omap4 specific defines to dma-44xx.h */
32#include "dma-44xx.h"
33
34#define INT_DMA_LCD 25 26#define INT_DMA_LCD 25
35 27
36/* DMA channels for omap1 */
37#define OMAP_DMA_NO_DEVICE 0
38#define OMAP_DMA_MCSI1_TX 1
39#define OMAP_DMA_MCSI1_RX 2
40#define OMAP_DMA_I2C_RX 3
41#define OMAP_DMA_I2C_TX 4
42#define OMAP_DMA_EXT_NDMA_REQ 5
43#define OMAP_DMA_EXT_NDMA_REQ2 6
44#define OMAP_DMA_UWIRE_TX 7
45#define OMAP_DMA_MCBSP1_TX 8
46#define OMAP_DMA_MCBSP1_RX 9
47#define OMAP_DMA_MCBSP3_TX 10
48#define OMAP_DMA_MCBSP3_RX 11
49#define OMAP_DMA_UART1_TX 12
50#define OMAP_DMA_UART1_RX 13
51#define OMAP_DMA_UART2_TX 14
52#define OMAP_DMA_UART2_RX 15
53#define OMAP_DMA_MCBSP2_TX 16
54#define OMAP_DMA_MCBSP2_RX 17
55#define OMAP_DMA_UART3_TX 18
56#define OMAP_DMA_UART3_RX 19
57#define OMAP_DMA_CAMERA_IF_RX 20
58#define OMAP_DMA_MMC_TX 21
59#define OMAP_DMA_MMC_RX 22
60#define OMAP_DMA_NAND 23
61#define OMAP_DMA_IRQ_LCD_LINE 24
62#define OMAP_DMA_MEMORY_STICK 25
63#define OMAP_DMA_USB_W2FC_RX0 26
64#define OMAP_DMA_USB_W2FC_RX1 27
65#define OMAP_DMA_USB_W2FC_RX2 28
66#define OMAP_DMA_USB_W2FC_TX0 29
67#define OMAP_DMA_USB_W2FC_TX1 30
68#define OMAP_DMA_USB_W2FC_TX2 31
69
70/* These are only for 1610 */
71#define OMAP_DMA_CRYPTO_DES_IN 32
72#define OMAP_DMA_SPI_TX 33
73#define OMAP_DMA_SPI_RX 34
74#define OMAP_DMA_CRYPTO_HASH 35
75#define OMAP_DMA_CCP_ATTN 36
76#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37
77#define OMAP_DMA_CMT_APE_TX_CHAN_0 38
78#define OMAP_DMA_CMT_APE_RV_CHAN_0 39
79#define OMAP_DMA_CMT_APE_TX_CHAN_1 40
80#define OMAP_DMA_CMT_APE_RV_CHAN_1 41
81#define OMAP_DMA_CMT_APE_TX_CHAN_2 42
82#define OMAP_DMA_CMT_APE_RV_CHAN_2 43
83#define OMAP_DMA_CMT_APE_TX_CHAN_3 44
84#define OMAP_DMA_CMT_APE_RV_CHAN_3 45
85#define OMAP_DMA_CMT_APE_TX_CHAN_4 46
86#define OMAP_DMA_CMT_APE_RV_CHAN_4 47
87#define OMAP_DMA_CMT_APE_TX_CHAN_5 48
88#define OMAP_DMA_CMT_APE_RV_CHAN_5 49
89#define OMAP_DMA_CMT_APE_TX_CHAN_6 50
90#define OMAP_DMA_CMT_APE_RV_CHAN_6 51
91#define OMAP_DMA_CMT_APE_TX_CHAN_7 52
92#define OMAP_DMA_CMT_APE_RV_CHAN_7 53
93#define OMAP_DMA_MMC2_TX 54
94#define OMAP_DMA_MMC2_RX 55
95#define OMAP_DMA_CRYPTO_DES_OUT 56
96
97/* DMA channels for 24xx */
98#define OMAP24XX_DMA_NO_DEVICE 0
99#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
100#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
101#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
102#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
103#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
104#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
105#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */
106#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */
107#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
108#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
109#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
110#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
111#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
112#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
113#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */
114#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
115#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
116#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
117#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */
118#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */
119#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
120#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
121#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
122#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
123#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
124#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
125#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
126#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
127#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */
128#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
129#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
130#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */
131#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */
132#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */
133#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */
134#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */
135#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */
136#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
137#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
138#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */
139#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */
140#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
141#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
142#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
143#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
144#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
145#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
146#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */
147#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */
148#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */
149#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */
150#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
151#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
152#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
153#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
154#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
155#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
156#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
157#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
158#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
159#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
160#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
161#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
162#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
163#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
164#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
165#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
166#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
167#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
168#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
169#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
170#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */
171#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */
172#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */
173#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */
174#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */
175#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */
176#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
177#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
178#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */
179#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
180#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */
181#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */
182#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
183#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
184#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */
185#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */
186#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
187#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
188#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
189#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */
190#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */
191#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */
192#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */
193#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */
194#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */
195#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
196#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
197
198#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
199#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
200
201/* Only for AM35xx */
202#define AM35XX_DMA_UART4_TX 54
203#define AM35XX_DMA_UART4_RX 55
204
205/*----------------------------------------------------------------------------*/
206
207#define OMAP1_DMA_TOUT_IRQ (1 << 0) 28#define OMAP1_DMA_TOUT_IRQ (1 << 0)
208#define OMAP_DMA_DROP_IRQ (1 << 1) 29#define OMAP_DMA_DROP_IRQ (1 << 1)
209#define OMAP_DMA_HALF_IRQ (1 << 2) 30#define OMAP_DMA_HALF_IRQ (1 << 2)
@@ -309,10 +130,12 @@
309#define SRC_PORT BIT(0x7) 130#define SRC_PORT BIT(0x7)
310#define DST_PORT BIT(0x8) 131#define DST_PORT BIT(0x8)
311#define SRC_INDEX BIT(0x9) 132#define SRC_INDEX BIT(0x9)
312#define DST_INDEX BIT(0xA) 133#define DST_INDEX BIT(0xa)
313#define IS_BURST_ONLY4 BIT(0xB) 134#define IS_BURST_ONLY4 BIT(0xb)
314#define CLEAR_CSR_ON_READ BIT(0xC) 135#define CLEAR_CSR_ON_READ BIT(0xc)
315#define IS_WORD_16 BIT(0xD) 136#define IS_WORD_16 BIT(0xd)
137#define ENABLE_16XX_MODE BIT(0xe)
138#define HS_CHANNELS_RESERVED BIT(0xf)
316 139
317/* Defines for DMA Capabilities */ 140/* Defines for DMA Capabilities */
318#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18) 141#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
@@ -449,7 +272,15 @@ struct omap_system_dma_plat_info {
449 u32 (*dma_read)(int reg, int lch); 272 u32 (*dma_read)(int reg, int lch);
450}; 273};
451 274
452extern void __init omap_init_consistent_dma_size(void); 275#ifdef CONFIG_ARCH_OMAP2PLUS
276#define dma_omap2plus() 1
277#else
278#define dma_omap2plus() 0
279#endif
280#define dma_omap1() (!dma_omap2plus())
281#define dma_omap15xx() ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
282#define dma_omap16xx() ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
283
453extern void omap_set_dma_priority(int lch, int dst_port, int priority); 284extern void omap_set_dma_priority(int lch, int dst_port, int priority);
454extern int omap_request_dma(int dev_id, const char *dev_name, 285extern int omap_request_dma(int dev_id, const char *dev_name,
455 void (*callback)(int lch, u16 ch_status, void *data), 286 void (*callback)(int lch, u16 ch_status, void *data),
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
deleted file mode 100644
index 025d85a3ee86..000000000000
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * clkdev <-> OMAP integration
3 *
4 * Russell King <linux@arm.linux.org.uk>
5 *
6 */
7
8#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
9#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
10
11#include <linux/clkdev.h>
12
13struct omap_clk {
14 u16 cpu;
15 struct clk_lookup lk;
16};
17
18#define CLK(dev, con, ck, cp) \
19 { \
20 .cpu = cp, \
21 .lk = { \
22 .dev_id = dev, \
23 .con_id = con, \
24 .clk = ck, \
25 }, \
26 }
27
28/* Platform flags for the clkdev-OMAP integration code */
29#define CK_310 (1 << 0)
30#define CK_7XX (1 << 1) /* 7xx, 850 */
31#define CK_1510 (1 << 2)
32#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
33#define CK_242X (1 << 4)
34#define CK_243X (1 << 5) /* 243x, 253x */
35#define CK_3430ES1 (1 << 6) /* 34xxES1 only */
36#define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */
37#define CK_AM35XX (1 << 9) /* Sitara AM35xx */
38#define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */
39#define CK_443X (1 << 11)
40#define CK_TI816X (1 << 12)
41#define CK_446X (1 << 13)
42#define CK_AM33XX (1 << 14) /* AM33xx specific clocks */
43#define CK_1710 (1 << 15) /* 1710 extra for rate selection */
44
45
46#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
47#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX)
48
49
50#endif
51
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
deleted file mode 100644
index e2e2d045e428..000000000000
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ /dev/null
@@ -1,309 +0,0 @@
1/*
2 * OMAP clock: data structure definitions, function prototypes, shared macros
3 *
4 * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ARCH_ARM_OMAP_CLOCK_H
14#define __ARCH_ARM_OMAP_CLOCK_H
15
16#include <linux/list.h>
17
18struct module;
19struct clk;
20struct clockdomain;
21
22/* Temporary, needed during the common clock framework conversion */
23#define __clk_get_name(clk) (clk->name)
24#define __clk_get_parent(clk) (clk->parent)
25#define __clk_get_rate(clk) (clk->rate)
26
27/**
28 * struct clkops - some clock function pointers
29 * @enable: fn ptr that enables the current clock in hardware
30 * @disable: fn ptr that enables the current clock in hardware
31 * @find_idlest: function returning the IDLEST register for the clock's IP blk
32 * @find_companion: function returning the "companion" clk reg for the clock
33 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
34 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
35 *
36 * A "companion" clk is an accompanying clock to the one being queried
37 * that must be enabled for the IP module connected to the clock to
38 * become accessible by the hardware. Neither @find_idlest nor
39 * @find_companion should be needed; that information is IP
40 * block-specific; the hwmod code has been created to handle this, but
41 * until hwmod data is ready and drivers have been converted to use PM
42 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
43 * @find_companion must, unfortunately, remain.
44 */
45struct clkops {
46 int (*enable)(struct clk *);
47 void (*disable)(struct clk *);
48 void (*find_idlest)(struct clk *, void __iomem **,
49 u8 *, u8 *);
50 void (*find_companion)(struct clk *, void __iomem **,
51 u8 *);
52 void (*allow_idle)(struct clk *);
53 void (*deny_idle)(struct clk *);
54};
55
56#ifdef CONFIG_ARCH_OMAP2PLUS
57
58/* struct clksel_rate.flags possibilities */
59#define RATE_IN_242X (1 << 0)
60#define RATE_IN_243X (1 << 1)
61#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
62#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
63#define RATE_IN_36XX (1 << 4)
64#define RATE_IN_4430 (1 << 5)
65#define RATE_IN_TI816X (1 << 6)
66#define RATE_IN_4460 (1 << 7)
67#define RATE_IN_AM33XX (1 << 8)
68#define RATE_IN_TI814X (1 << 9)
69
70#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
71#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
72#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
73#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
74
75/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
76#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
77
78
79/**
80 * struct clksel_rate - register bitfield values corresponding to clk divisors
81 * @val: register bitfield value (shifted to bit 0)
82 * @div: clock divisor corresponding to @val
83 * @flags: (see "struct clksel_rate.flags possibilities" above)
84 *
85 * @val should match the value of a read from struct clk.clksel_reg
86 * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
87 *
88 * @div is the divisor that should be applied to the parent clock's rate
89 * to produce the current clock's rate.
90 */
91struct clksel_rate {
92 u32 val;
93 u8 div;
94 u16 flags;
95};
96
97/**
98 * struct clksel - available parent clocks, and a pointer to their divisors
99 * @parent: struct clk * to a possible parent clock
100 * @rates: available divisors for this parent clock
101 *
102 * A struct clksel is always associated with one or more struct clks
103 * and one or more struct clksel_rates.
104 */
105struct clksel {
106 struct clk *parent;
107 const struct clksel_rate *rates;
108};
109
110/**
111 * struct dpll_data - DPLL registers and integration data
112 * @mult_div1_reg: register containing the DPLL M and N bitfields
113 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
114 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
115 * @clk_bypass: struct clk pointer to the clock's bypass clock input
116 * @clk_ref: struct clk pointer to the clock's reference clock input
117 * @control_reg: register containing the DPLL mode bitfield
118 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
119 * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
120 * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
121 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
122 * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
123 * @min_divider: minimum valid non-bypass divider value (actual)
124 * @max_divider: maximum valid non-bypass divider value (actual)
125 * @modes: possible values of @enable_mask
126 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
127 * @idlest_reg: register containing the DPLL idle status bitfield
128 * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
129 * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
130 * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
131 * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
132 * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
133 * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
134 * @flags: DPLL type/features (see below)
135 *
136 * Possible values for @flags:
137 * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
138 *
139 * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
140 *
141 * XXX Some DPLLs have multiple bypass inputs, so it's not technically
142 * correct to only have one @clk_bypass pointer.
143 *
144 * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
145 * @last_rounded_n) should be separated from the runtime-fixed fields
146 * and placed into a different structure, so that the runtime-fixed data
147 * can be placed into read-only space.
148 */
149struct dpll_data {
150 void __iomem *mult_div1_reg;
151 u32 mult_mask;
152 u32 div1_mask;
153 struct clk *clk_bypass;
154 struct clk *clk_ref;
155 void __iomem *control_reg;
156 u32 enable_mask;
157 unsigned long last_rounded_rate;
158 u16 last_rounded_m;
159 u16 max_multiplier;
160 u8 last_rounded_n;
161 u8 min_divider;
162 u16 max_divider;
163 u8 modes;
164 void __iomem *autoidle_reg;
165 void __iomem *idlest_reg;
166 u32 autoidle_mask;
167 u32 freqsel_mask;
168 u32 idlest_mask;
169 u32 dco_mask;
170 u32 sddiv_mask;
171 u8 auto_recal_bit;
172 u8 recal_en_bit;
173 u8 recal_st_bit;
174 u8 flags;
175};
176
177#endif
178
179/*
180 * struct clk.flags possibilities
181 *
182 * XXX document the rest of the clock flags here
183 *
184 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
185 * bits share the same register. This flag allows the
186 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
187 * should be used. This is a temporary solution - a better approach
188 * would be to associate clock type-specific data with the clock,
189 * similar to the struct dpll_data approach.
190 */
191#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
192#define CLOCK_IDLE_CONTROL (1 << 1)
193#define CLOCK_NO_IDLE_PARENT (1 << 2)
194#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
195#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
196#define CLOCK_CLKOUTX2 (1 << 5)
197
198/**
199 * struct clk - OMAP struct clk
200 * @node: list_head connecting this clock into the full clock list
201 * @ops: struct clkops * for this clock
202 * @name: the name of the clock in the hardware (used in hwmod data and debug)
203 * @parent: pointer to this clock's parent struct clk
204 * @children: list_head connecting to the child clks' @sibling list_heads
205 * @sibling: list_head connecting this clk to its parent clk's @children
206 * @rate: current clock rate
207 * @enable_reg: register to write to enable the clock (see @enable_bit)
208 * @recalc: fn ptr that returns the clock's current rate
209 * @set_rate: fn ptr that can change the clock's current rate
210 * @round_rate: fn ptr that can round the clock's current rate
211 * @init: fn ptr to do clock-specific initialization
212 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
213 * @usecount: number of users that have requested this clock to be enabled
214 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
215 * @flags: see "struct clk.flags possibilities" above
216 * @clksel_reg: for clksel clks, register va containing src/divisor select
217 * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
218 * @clksel: for clksel clks, pointer to struct clksel for this clock
219 * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
220 * @clkdm_name: clockdomain name that this clock is contained in
221 * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
222 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
223 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
224 *
225 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
226 * clock code converted to use clksel.
227 *
228 * XXX @usecount is poorly named. It should be "enable_count" or
229 * something similar. "users" in the description refers to kernel
230 * code (core code or drivers) that have called clk_enable() and not
231 * yet called clk_disable(); the usecount of parent clocks is also
232 * incremented by the clock code when clk_enable() is called on child
233 * clocks and decremented by the clock code when clk_disable() is
234 * called on child clocks.
235 *
236 * XXX @clkdm, @usecount, @children, @sibling should be marked for
237 * internal use only.
238 *
239 * @children and @sibling are used to optimize parent-to-child clock
240 * tree traversals. (child-to-parent traversals use @parent.)
241 *
242 * XXX The notion of the clock's current rate probably needs to be
243 * separated from the clock's target rate.
244 */
245struct clk {
246 struct list_head node;
247 const struct clkops *ops;
248 const char *name;
249 struct clk *parent;
250 struct list_head children;
251 struct list_head sibling; /* node for children */
252 unsigned long rate;
253 void __iomem *enable_reg;
254 unsigned long (*recalc)(struct clk *);
255 int (*set_rate)(struct clk *, unsigned long);
256 long (*round_rate)(struct clk *, unsigned long);
257 void (*init)(struct clk *);
258 u8 enable_bit;
259 s8 usecount;
260 u8 fixed_div;
261 u8 flags;
262#ifdef CONFIG_ARCH_OMAP2PLUS
263 void __iomem *clksel_reg;
264 u32 clksel_mask;
265 const struct clksel *clksel;
266 struct dpll_data *dpll_data;
267 const char *clkdm_name;
268 struct clockdomain *clkdm;
269#else
270 u8 rate_offset;
271 u8 src_offset;
272#endif
273#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
274 struct dentry *dent; /* For visible tree hierarchy */
275#endif
276};
277
278struct clk_functions {
279 int (*clk_enable)(struct clk *clk);
280 void (*clk_disable)(struct clk *clk);
281 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
282 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
283 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
284 void (*clk_allow_idle)(struct clk *clk);
285 void (*clk_deny_idle)(struct clk *clk);
286 void (*clk_disable_unused)(struct clk *clk);
287};
288
289extern int mpurate;
290
291extern int clk_init(struct clk_functions *custom_clocks);
292extern void clk_preinit(struct clk *clk);
293extern int clk_register(struct clk *clk);
294extern void clk_reparent(struct clk *child, struct clk *parent);
295extern void clk_unregister(struct clk *clk);
296extern void propagate_rate(struct clk *clk);
297extern void recalculate_root_clocks(void);
298extern unsigned long followparent_recalc(struct clk *clk);
299extern void clk_enable_init_clocks(void);
300unsigned long omap_fixed_divisor_recalc(struct clk *clk);
301extern struct clk *omap_clk_get_by_name(const char *name);
302extern int omap_clk_enable_autoidle_all(void);
303extern int omap_clk_disable_autoidle_all(void);
304
305extern const struct clkops clkops_null;
306
307extern struct clk dummy_ck;
308
309#endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
deleted file mode 100644
index d1cb6f527b7e..000000000000
--- a/arch/arm/plat-omap/include/plat/common.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/common.h
3 *
4 * Header for code common to all OMAP machines.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
28#define __ARCH_ARM_MACH_OMAP_COMMON_H
29
30#include <plat/i2c.h>
31#include <plat/omap_hwmod.h>
32
33extern int __init omap_init_clocksource_32k(void __iomem *vbase);
34
35extern void __init omap_check_revision(void);
36
37extern void omap_reserve(void);
38extern int omap_dss_reset(struct omap_hwmod *);
39
40void omap_sram_init(void);
41
42#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
new file mode 100644
index 000000000000..da000d482ff2
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/counter-32k.h
@@ -0,0 +1 @@
int omap_init_clocksource_32k(void __iomem *vbase);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 67da857783ce..b4516aba67ed 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/cpu.h
3 *
4 * OMAP cpu type detection 2 * OMAP cpu type detection
5 * 3 *
6 * Copyright (C) 2004, 2008 Nokia Corporation 4 * Copyright (C) 2004, 2008 Nokia Corporation
@@ -30,470 +28,12 @@
30#ifndef __ASM_ARCH_OMAP_CPU_H 28#ifndef __ASM_ARCH_OMAP_CPU_H
31#define __ASM_ARCH_OMAP_CPU_H 29#define __ASM_ARCH_OMAP_CPU_H
32 30
33#ifndef __ASSEMBLY__ 31#ifdef CONFIG_ARCH_OMAP1
34 32#include <mach/soc.h>
35#include <linux/bitops.h>
36#include <plat/multi.h>
37
38/*
39 * Omap device type i.e. EMU/HS/TST/GP/BAD
40 */
41#define OMAP2_DEVICE_TYPE_TEST 0
42#define OMAP2_DEVICE_TYPE_EMU 1
43#define OMAP2_DEVICE_TYPE_SEC 2
44#define OMAP2_DEVICE_TYPE_GP 3
45#define OMAP2_DEVICE_TYPE_BAD 4
46
47int omap_type(void);
48
49/*
50 * omap_rev bits:
51 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
52 * CPU revision (See _REV_ defined in cpu.h) [15:08]
53 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
54 */
55unsigned int omap_rev(void);
56
57/*
58 * Get the CPU revision for OMAP devices
59 */
60#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
61
62/*
63 * Macros to group OMAP into cpu classes.
64 * These can be used in most places.
65 * cpu_is_omap7xx(): True for OMAP730, OMAP850
66 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
67 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
68 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
69 * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
70 * cpu_is_omap243x(): True for OMAP2430
71 * cpu_is_omap343x(): True for OMAP3430
72 * cpu_is_omap443x(): True for OMAP4430
73 * cpu_is_omap446x(): True for OMAP4460
74 * cpu_is_omap447x(): True for OMAP4470
75 * soc_is_omap543x(): True for OMAP5430, OMAP5432
76 */
77#define GET_OMAP_CLASS (omap_rev() & 0xff)
78
79#define IS_OMAP_CLASS(class, id) \
80static inline int is_omap ##class (void) \
81{ \
82 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
83}
84
85#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
86
87#define IS_AM_CLASS(class, id) \
88static inline int is_am ##class (void) \
89{ \
90 return (GET_AM_CLASS == (id)) ? 1 : 0; \
91}
92
93#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
94
95#define IS_TI_CLASS(class, id) \
96static inline int is_ti ##class (void) \
97{ \
98 return (GET_TI_CLASS == (id)) ? 1 : 0; \
99}
100
101#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
102
103#define IS_OMAP_SUBCLASS(subclass, id) \
104static inline int is_omap ##subclass (void) \
105{ \
106 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
107}
108
109#define IS_TI_SUBCLASS(subclass, id) \
110static inline int is_ti ##subclass (void) \
111{ \
112 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
113}
114
115#define IS_AM_SUBCLASS(subclass, id) \
116static inline int is_am ##subclass (void) \
117{ \
118 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
119}
120
121IS_OMAP_CLASS(7xx, 0x07)
122IS_OMAP_CLASS(15xx, 0x15)
123IS_OMAP_CLASS(16xx, 0x16)
124IS_OMAP_CLASS(24xx, 0x24)
125IS_OMAP_CLASS(34xx, 0x34)
126IS_OMAP_CLASS(44xx, 0x44)
127IS_AM_CLASS(35xx, 0x35)
128IS_OMAP_CLASS(54xx, 0x54)
129IS_AM_CLASS(33xx, 0x33)
130
131IS_TI_CLASS(81xx, 0x81)
132
133IS_OMAP_SUBCLASS(242x, 0x242)
134IS_OMAP_SUBCLASS(243x, 0x243)
135IS_OMAP_SUBCLASS(343x, 0x343)
136IS_OMAP_SUBCLASS(363x, 0x363)
137IS_OMAP_SUBCLASS(443x, 0x443)
138IS_OMAP_SUBCLASS(446x, 0x446)
139IS_OMAP_SUBCLASS(447x, 0x447)
140IS_OMAP_SUBCLASS(543x, 0x543)
141
142IS_TI_SUBCLASS(816x, 0x816)
143IS_TI_SUBCLASS(814x, 0x814)
144IS_AM_SUBCLASS(335x, 0x335)
145
146#define cpu_is_omap7xx() 0
147#define cpu_is_omap15xx() 0
148#define cpu_is_omap16xx() 0
149#define cpu_is_omap24xx() 0
150#define cpu_is_omap242x() 0
151#define cpu_is_omap243x() 0
152#define cpu_is_omap34xx() 0
153#define cpu_is_omap343x() 0
154#define cpu_is_ti81xx() 0
155#define cpu_is_ti816x() 0
156#define cpu_is_ti814x() 0
157#define soc_is_am35xx() 0
158#define soc_is_am33xx() 0
159#define soc_is_am335x() 0
160#define cpu_is_omap44xx() 0
161#define cpu_is_omap443x() 0
162#define cpu_is_omap446x() 0
163#define cpu_is_omap447x() 0
164#define soc_is_omap54xx() 0
165#define soc_is_omap543x() 0
166
167#if defined(MULTI_OMAP1)
168# if defined(CONFIG_ARCH_OMAP730)
169# undef cpu_is_omap7xx
170# define cpu_is_omap7xx() is_omap7xx()
171# endif
172# if defined(CONFIG_ARCH_OMAP850)
173# undef cpu_is_omap7xx
174# define cpu_is_omap7xx() is_omap7xx()
175# endif
176# if defined(CONFIG_ARCH_OMAP15XX)
177# undef cpu_is_omap15xx
178# define cpu_is_omap15xx() is_omap15xx()
179# endif
180# if defined(CONFIG_ARCH_OMAP16XX)
181# undef cpu_is_omap16xx
182# define cpu_is_omap16xx() is_omap16xx()
183# endif
184#else
185# if defined(CONFIG_ARCH_OMAP730)
186# undef cpu_is_omap7xx
187# define cpu_is_omap7xx() 1
188# endif
189# if defined(CONFIG_ARCH_OMAP850)
190# undef cpu_is_omap7xx
191# define cpu_is_omap7xx() 1
192# endif
193# if defined(CONFIG_ARCH_OMAP15XX)
194# undef cpu_is_omap15xx
195# define cpu_is_omap15xx() 1
196# endif
197# if defined(CONFIG_ARCH_OMAP16XX)
198# undef cpu_is_omap16xx
199# define cpu_is_omap16xx() 1
200# endif
201#endif
202
203#if defined(MULTI_OMAP2)
204# if defined(CONFIG_ARCH_OMAP2)
205# undef cpu_is_omap24xx
206# define cpu_is_omap24xx() is_omap24xx()
207# endif
208# if defined (CONFIG_SOC_OMAP2420)
209# undef cpu_is_omap242x
210# define cpu_is_omap242x() is_omap242x()
211# endif
212# if defined (CONFIG_SOC_OMAP2430)
213# undef cpu_is_omap243x
214# define cpu_is_omap243x() is_omap243x()
215# endif
216# if defined(CONFIG_ARCH_OMAP3)
217# undef cpu_is_omap34xx
218# undef cpu_is_omap343x
219# define cpu_is_omap34xx() is_omap34xx()
220# define cpu_is_omap343x() is_omap343x()
221# endif
222#else
223# if defined(CONFIG_ARCH_OMAP2)
224# undef cpu_is_omap24xx
225# define cpu_is_omap24xx() 1
226# endif
227# if defined(CONFIG_SOC_OMAP2420)
228# undef cpu_is_omap242x
229# define cpu_is_omap242x() 1
230# endif
231# if defined(CONFIG_SOC_OMAP2430)
232# undef cpu_is_omap243x
233# define cpu_is_omap243x() 1
234# endif
235# if defined(CONFIG_ARCH_OMAP3)
236# undef cpu_is_omap34xx
237# define cpu_is_omap34xx() 1
238# endif
239# if defined(CONFIG_SOC_OMAP3430)
240# undef cpu_is_omap343x
241# define cpu_is_omap343x() 1
242# endif
243#endif
244
245/*
246 * Macros to detect individual cpu types.
247 * These are only rarely needed.
248 * cpu_is_omap310(): True for OMAP310
249 * cpu_is_omap1510(): True for OMAP1510
250 * cpu_is_omap1610(): True for OMAP1610
251 * cpu_is_omap1611(): True for OMAP1611
252 * cpu_is_omap5912(): True for OMAP5912
253 * cpu_is_omap1621(): True for OMAP1621
254 * cpu_is_omap1710(): True for OMAP1710
255 * cpu_is_omap2420(): True for OMAP2420
256 * cpu_is_omap2422(): True for OMAP2422
257 * cpu_is_omap2423(): True for OMAP2423
258 * cpu_is_omap2430(): True for OMAP2430
259 * cpu_is_omap3430(): True for OMAP3430
260 */
261#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
262
263#define IS_OMAP_TYPE(type, id) \
264static inline int is_omap ##type (void) \
265{ \
266 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
267}
268
269IS_OMAP_TYPE(310, 0x0310)
270IS_OMAP_TYPE(1510, 0x1510)
271IS_OMAP_TYPE(1610, 0x1610)
272IS_OMAP_TYPE(1611, 0x1611)
273IS_OMAP_TYPE(5912, 0x1611)
274IS_OMAP_TYPE(1621, 0x1621)
275IS_OMAP_TYPE(1710, 0x1710)
276IS_OMAP_TYPE(2420, 0x2420)
277IS_OMAP_TYPE(2422, 0x2422)
278IS_OMAP_TYPE(2423, 0x2423)
279IS_OMAP_TYPE(2430, 0x2430)
280IS_OMAP_TYPE(3430, 0x3430)
281
282#define cpu_is_omap310() 0
283#define cpu_is_omap1510() 0
284#define cpu_is_omap1610() 0
285#define cpu_is_omap5912() 0
286#define cpu_is_omap1611() 0
287#define cpu_is_omap1621() 0
288#define cpu_is_omap1710() 0
289#define cpu_is_omap2420() 0
290#define cpu_is_omap2422() 0
291#define cpu_is_omap2423() 0
292#define cpu_is_omap2430() 0
293#define cpu_is_omap3430() 0
294#define cpu_is_omap3630() 0
295#define soc_is_omap5430() 0
296
297/*
298 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
299 * between 310 vs. 1510 and 1611B/5912 vs. 1710.
300 */
301
302#if defined(CONFIG_ARCH_OMAP15XX)
303# undef cpu_is_omap310
304# undef cpu_is_omap1510
305# define cpu_is_omap310() is_omap310()
306# define cpu_is_omap1510() is_omap1510()
307#endif
308
309#if defined(CONFIG_ARCH_OMAP16XX)
310# undef cpu_is_omap1610
311# undef cpu_is_omap1611
312# undef cpu_is_omap5912
313# undef cpu_is_omap1621
314# undef cpu_is_omap1710
315# define cpu_is_omap1610() is_omap1610()
316# define cpu_is_omap1611() is_omap1611()
317# define cpu_is_omap5912() is_omap5912()
318# define cpu_is_omap1621() is_omap1621()
319# define cpu_is_omap1710() is_omap1710()
320#endif
321
322#if defined(CONFIG_ARCH_OMAP2)
323# undef cpu_is_omap2420
324# undef cpu_is_omap2422
325# undef cpu_is_omap2423
326# undef cpu_is_omap2430
327# define cpu_is_omap2420() is_omap2420()
328# define cpu_is_omap2422() is_omap2422()
329# define cpu_is_omap2423() is_omap2423()
330# define cpu_is_omap2430() is_omap2430()
331#endif
332
333#if defined(CONFIG_ARCH_OMAP3)
334# undef cpu_is_omap3430
335# undef cpu_is_ti81xx
336# undef cpu_is_ti816x
337# undef cpu_is_ti814x
338# undef soc_is_am35xx
339# define cpu_is_omap3430() is_omap3430()
340# undef cpu_is_omap3630
341# define cpu_is_omap3630() is_omap363x()
342# define cpu_is_ti81xx() is_ti81xx()
343# define cpu_is_ti816x() is_ti816x()
344# define cpu_is_ti814x() is_ti814x()
345# define soc_is_am35xx() is_am35xx()
346#endif 33#endif
347 34
348# if defined(CONFIG_SOC_AM33XX) 35#ifdef CONFIG_ARCH_OMAP2PLUS
349# undef soc_is_am33xx 36#include "../../mach-omap2/soc.h"
350# undef soc_is_am335x
351# define soc_is_am33xx() is_am33xx()
352# define soc_is_am335x() is_am335x()
353#endif 37#endif
354 38
355# if defined(CONFIG_ARCH_OMAP4)
356# undef cpu_is_omap44xx
357# undef cpu_is_omap443x
358# undef cpu_is_omap446x
359# undef cpu_is_omap447x
360# define cpu_is_omap44xx() is_omap44xx()
361# define cpu_is_omap443x() is_omap443x()
362# define cpu_is_omap446x() is_omap446x()
363# define cpu_is_omap447x() is_omap447x()
364# endif
365
366# if defined(CONFIG_SOC_OMAP5)
367# undef soc_is_omap54xx
368# undef soc_is_omap543x
369# define soc_is_omap54xx() is_omap54xx()
370# define soc_is_omap543x() is_omap543x()
371#endif
372
373/* Macros to detect if we have OMAP1 or OMAP2 */
374#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
375 cpu_is_omap16xx())
376#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
377 cpu_is_omap44xx() || soc_is_omap54xx() || \
378 soc_is_am33xx())
379
380/* Various silicon revisions for omap2 */
381#define OMAP242X_CLASS 0x24200024
382#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
383#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
384
385#define OMAP243X_CLASS 0x24300024
386#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
387
388#define OMAP343X_CLASS 0x34300034
389#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
390#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
391#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
392#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
393#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
394#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
395
396#define OMAP363X_CLASS 0x36300034
397#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
398#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
399#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
400
401#define TI816X_CLASS 0x81600034
402#define TI8168_REV_ES1_0 TI816X_CLASS
403#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
404
405#define TI814X_CLASS 0x81400034
406#define TI8148_REV_ES1_0 TI814X_CLASS
407#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
408#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
409
410#define AM35XX_CLASS 0x35170034
411#define AM35XX_REV_ES1_0 AM35XX_CLASS
412#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
413
414#define AM335X_CLASS 0x33500033
415#define AM335X_REV_ES1_0 AM335X_CLASS
416
417#define OMAP443X_CLASS 0x44300044
418#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
419#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
420#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
421#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
422#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
423
424#define OMAP446X_CLASS 0x44600044
425#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
426#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
427
428#define OMAP447X_CLASS 0x44700044
429#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
430
431#define OMAP54XX_CLASS 0x54000054
432#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
433#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
434
435void omap2xxx_check_revision(void);
436void omap3xxx_check_revision(void);
437void omap4xxx_check_revision(void);
438void omap5xxx_check_revision(void);
439void omap3xxx_check_features(void);
440void ti81xx_check_features(void);
441void omap4xxx_check_features(void);
442
443/*
444 * Runtime detection of OMAP3 features
445 *
446 * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
447 * family have OS-level control over the I/O chain clock. This is
448 * to avoid a window during which wakeups could potentially be lost
449 * during powerdomain transitions. If this bit is set, it
450 * indicates that the chip does support OS-level control of this
451 * feature.
452 */
453extern u32 omap_features;
454
455#define OMAP3_HAS_L2CACHE BIT(0)
456#define OMAP3_HAS_IVA BIT(1)
457#define OMAP3_HAS_SGX BIT(2)
458#define OMAP3_HAS_NEON BIT(3)
459#define OMAP3_HAS_ISP BIT(4)
460#define OMAP3_HAS_192MHZ_CLK BIT(5)
461#define OMAP3_HAS_IO_WAKEUP BIT(6)
462#define OMAP3_HAS_SDRC BIT(7)
463#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
464#define OMAP4_HAS_MPU_1GHZ BIT(9)
465#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
466#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
467
468
469#define OMAP3_HAS_FEATURE(feat,flag) \
470static inline unsigned int omap3_has_ ##feat(void) \
471{ \
472 return omap_features & OMAP3_HAS_ ##flag; \
473} \
474
475OMAP3_HAS_FEATURE(l2cache, L2CACHE)
476OMAP3_HAS_FEATURE(sgx, SGX)
477OMAP3_HAS_FEATURE(iva, IVA)
478OMAP3_HAS_FEATURE(neon, NEON)
479OMAP3_HAS_FEATURE(isp, ISP)
480OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
481OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
482OMAP3_HAS_FEATURE(sdrc, SDRC)
483OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
484
485/*
486 * Runtime detection of OMAP4 features
487 */
488#define OMAP4_HAS_FEATURE(feat, flag) \
489static inline unsigned int omap4_has_ ##feat(void) \
490{ \
491 return omap_features & OMAP4_HAS_ ##flag; \
492} \
493
494OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
495OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
496OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
497
498#endif /* __ASSEMBLY__ */
499#endif 39#endif
diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
index a4edbd2f7484..8fc4287222dd 100644
--- a/arch/arm/mach-omap2/debug-devices.h
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -1,9 +1,2 @@
1#ifndef _OMAP_DEBUG_DEVICES_H
2#define _OMAP_DEBUG_DEVICES_H
3
4#include <linux/types.h>
5
6/* for TI reference platforms sharing the same debug card */ 1/* for TI reference platforms sharing the same debug card */
7extern int debug_card_init(u32 addr, unsigned gpio); 2extern int debug_card_init(u32 addr, unsigned gpio);
8
9#endif
diff --git a/arch/arm/plat-omap/include/plat/dma-44xx.h b/arch/arm/plat-omap/include/plat/dma-44xx.h
deleted file mode 100644
index 1f767cb2f38a..000000000000
--- a/arch/arm/plat-omap/include/plat/dma-44xx.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * OMAP4 SDMA channel definitions
3 *
4 * Copyright (C) 2009-2010 Texas Instruments, Inc.
5 * Copyright (C) 2009-2010 Nokia Corporation
6 *
7 * Santosh Shilimkar (santosh.shilimkar@ti.com)
8 * Benoit Cousson (b-cousson@ti.com)
9 * Paul Walmsley (paul@pwsan.com)
10 *
11 * This file is automatically generated from the OMAP hardware databases.
12 * We respectfully ask that any modifications to this file be coordinated
13 * with the public linux-omap@vger.kernel.org mailing list and the
14 * authors above to ensure that the autogeneration scripts are kept
15 * up-to-date with the file contents.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
23#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
24
25#define OMAP44XX_DMA_SYS_REQ0 2
26#define OMAP44XX_DMA_SYS_REQ1 3
27#define OMAP44XX_DMA_GPMC 4
28#define OMAP44XX_DMA_DSS_DISPC_REQ 6
29#define OMAP44XX_DMA_SYS_REQ2 7
30#define OMAP44XX_DMA_MCASP1_AXEVT 8
31#define OMAP44XX_DMA_ISS_REQ1 9
32#define OMAP44XX_DMA_ISS_REQ2 10
33#define OMAP44XX_DMA_MCASP1_AREVT 11
34#define OMAP44XX_DMA_ISS_REQ3 12
35#define OMAP44XX_DMA_ISS_REQ4 13
36#define OMAP44XX_DMA_DSS_RFBI_REQ 14
37#define OMAP44XX_DMA_SPI3_TX0 15
38#define OMAP44XX_DMA_SPI3_RX0 16
39#define OMAP44XX_DMA_MCBSP2_TX 17
40#define OMAP44XX_DMA_MCBSP2_RX 18
41#define OMAP44XX_DMA_MCBSP3_TX 19
42#define OMAP44XX_DMA_MCBSP3_RX 20
43#define OMAP44XX_DMA_C2C_SSCM_GPO0 21
44#define OMAP44XX_DMA_C2C_SSCM_GPO1 22
45#define OMAP44XX_DMA_SPI3_TX1 23
46#define OMAP44XX_DMA_SPI3_RX1 24
47#define OMAP44XX_DMA_I2C3_TX 25
48#define OMAP44XX_DMA_I2C3_RX 26
49#define OMAP44XX_DMA_I2C1_TX 27
50#define OMAP44XX_DMA_I2C1_RX 28
51#define OMAP44XX_DMA_I2C2_TX 29
52#define OMAP44XX_DMA_I2C2_RX 30
53#define OMAP44XX_DMA_MCBSP4_TX 31
54#define OMAP44XX_DMA_MCBSP4_RX 32
55#define OMAP44XX_DMA_MCBSP1_TX 33
56#define OMAP44XX_DMA_MCBSP1_RX 34
57#define OMAP44XX_DMA_SPI1_TX0 35
58#define OMAP44XX_DMA_SPI1_RX0 36
59#define OMAP44XX_DMA_SPI1_TX1 37
60#define OMAP44XX_DMA_SPI1_RX1 38
61#define OMAP44XX_DMA_SPI1_TX2 39
62#define OMAP44XX_DMA_SPI1_RX2 40
63#define OMAP44XX_DMA_SPI1_TX3 41
64#define OMAP44XX_DMA_SPI1_RX3 42
65#define OMAP44XX_DMA_SPI2_TX0 43
66#define OMAP44XX_DMA_SPI2_RX0 44
67#define OMAP44XX_DMA_SPI2_TX1 45
68#define OMAP44XX_DMA_SPI2_RX1 46
69#define OMAP44XX_DMA_MMC2_TX 47
70#define OMAP44XX_DMA_MMC2_RX 48
71#define OMAP44XX_DMA_UART1_TX 49
72#define OMAP44XX_DMA_UART1_RX 50
73#define OMAP44XX_DMA_UART2_TX 51
74#define OMAP44XX_DMA_UART2_RX 52
75#define OMAP44XX_DMA_UART3_TX 53
76#define OMAP44XX_DMA_UART3_RX 54
77#define OMAP44XX_DMA_UART4_TX 55
78#define OMAP44XX_DMA_UART4_RX 56
79#define OMAP44XX_DMA_MMC4_TX 57
80#define OMAP44XX_DMA_MMC4_RX 58
81#define OMAP44XX_DMA_MMC5_TX 59
82#define OMAP44XX_DMA_MMC5_RX 60
83#define OMAP44XX_DMA_MMC1_TX 61
84#define OMAP44XX_DMA_MMC1_RX 62
85#define OMAP44XX_DMA_SYS_REQ3 64
86#define OMAP44XX_DMA_MCPDM_UP 65
87#define OMAP44XX_DMA_MCPDM_DL 66
88#define OMAP44XX_DMA_DMIC_REQ 67
89#define OMAP44XX_DMA_C2C_SSCM_GPO2 68
90#define OMAP44XX_DMA_C2C_SSCM_GPO3 69
91#define OMAP44XX_DMA_SPI4_TX0 70
92#define OMAP44XX_DMA_SPI4_RX0 71
93#define OMAP44XX_DMA_DSS_DSI1_REQ0 72
94#define OMAP44XX_DMA_DSS_DSI1_REQ1 73
95#define OMAP44XX_DMA_DSS_DSI1_REQ2 74
96#define OMAP44XX_DMA_DSS_DSI1_REQ3 75
97#define OMAP44XX_DMA_DSS_HDMI_REQ 76
98#define OMAP44XX_DMA_MMC3_TX 77
99#define OMAP44XX_DMA_MMC3_RX 78
100#define OMAP44XX_DMA_USIM_TX 79
101#define OMAP44XX_DMA_USIM_RX 80
102#define OMAP44XX_DMA_DSS_DSI2_REQ0 81
103#define OMAP44XX_DMA_DSS_DSI2_REQ1 82
104#define OMAP44XX_DMA_DSS_DSI2_REQ2 83
105#define OMAP44XX_DMA_DSS_DSI2_REQ3 84
106#define OMAP44XX_DMA_SLIMBUS1_TX0 85
107#define OMAP44XX_DMA_SLIMBUS1_TX1 86
108#define OMAP44XX_DMA_SLIMBUS1_TX2 87
109#define OMAP44XX_DMA_SLIMBUS1_TX3 88
110#define OMAP44XX_DMA_SLIMBUS1_RX0 89
111#define OMAP44XX_DMA_SLIMBUS1_RX1 90
112#define OMAP44XX_DMA_SLIMBUS1_RX2 91
113#define OMAP44XX_DMA_SLIMBUS1_RX3 92
114#define OMAP44XX_DMA_SLIMBUS2_TX0 93
115#define OMAP44XX_DMA_SLIMBUS2_TX1 94
116#define OMAP44XX_DMA_SLIMBUS2_TX2 95
117#define OMAP44XX_DMA_SLIMBUS2_TX3 96
118#define OMAP44XX_DMA_SLIMBUS2_RX0 97
119#define OMAP44XX_DMA_SLIMBUS2_RX1 98
120#define OMAP44XX_DMA_SLIMBUS2_RX2 99
121#define OMAP44XX_DMA_SLIMBUS2_RX3 100
122#define OMAP44XX_DMA_ABE_REQ_0 101
123#define OMAP44XX_DMA_ABE_REQ_1 102
124#define OMAP44XX_DMA_ABE_REQ_2 103
125#define OMAP44XX_DMA_ABE_REQ_3 104
126#define OMAP44XX_DMA_ABE_REQ_4 105
127#define OMAP44XX_DMA_ABE_REQ_5 106
128#define OMAP44XX_DMA_ABE_REQ_6 107
129#define OMAP44XX_DMA_ABE_REQ_7 108
130#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109
131#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110
132#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111
133#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112
134#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113
135#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114
136#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115
137#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116
138#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117
139#define OMAP44XX_DMA_SHA2_CTXIN_P 118
140#define OMAP44XX_DMA_SHA2_DIN_P 119
141#define OMAP44XX_DMA_SHA2_CTXOUT_P 120
142#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121
143#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122
144#define OMAP44XX_DMA_I2C4_TX 124
145#define OMAP44XX_DMA_I2C4_RX 125
146
147#endif
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 348f855d3dab..f8943c8f9dbf 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -94,6 +94,7 @@ struct dmtimer_platform_data {
94 /* set_timer_src - Only used for OMAP1 devices */ 94 /* set_timer_src - Only used for OMAP1 devices */
95 int (*set_timer_src)(struct platform_device *pdev, int source); 95 int (*set_timer_src)(struct platform_device *pdev, int source);
96 u32 timer_capability; 96 u32 timer_capability;
97 int (*get_context_loss_count)(struct device *);
97}; 98};
98 99
99int omap_dm_timer_reserve_systimer(int id); 100int omap_dm_timer_reserve_systimer(int id);
@@ -264,6 +265,7 @@ struct omap_dm_timer {
264 unsigned reserved:1; 265 unsigned reserved:1;
265 unsigned posted:1; 266 unsigned posted:1;
266 struct timer_regs context; 267 struct timer_regs context;
268 int (*get_context_loss_count)(struct device *);
267 int ctx_loss_count; 269 int ctx_loss_count;
268 int revision; 270 int revision;
269 u32 capability; 271 u32 capability;
diff --git a/arch/arm/plat-omap/include/plat/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h
deleted file mode 100644
index bd3c6324ae1f..000000000000
--- a/arch/arm/plat-omap/include/plat/fpga.h
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/fpga.h
3 *
4 * Interrupt handler for OMAP-1510 FPGA
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#ifndef __ASM_ARCH_OMAP_FPGA_H
20#define __ASM_ARCH_OMAP_FPGA_H
21
22extern void omap1510_fpga_init_irq(void);
23
24#define fpga_read(reg) __raw_readb(reg)
25#define fpga_write(val, reg) __raw_writeb(val, reg)
26
27/*
28 * ---------------------------------------------------------------------------
29 * H2/P2 Debug board FPGA
30 * ---------------------------------------------------------------------------
31 */
32/* maps in the FPGA registers and the ETHR registers */
33#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
34#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
35#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
36
37#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
38#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
39#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
40#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
41#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
42#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
43#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
44#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
45
46/* NOTE: most boards don't have a static mapping for the FPGA ... */
47struct h2p2_dbg_fpga {
48 /* offset 0x00 */
49 u16 smc91x[8];
50 /* offset 0x10 */
51 u16 fpga_rev;
52 u16 board_rev;
53 u16 gpio_outputs;
54 u16 leds;
55 /* offset 0x18 */
56 u16 misc_inputs;
57 u16 lan_status;
58 u16 lan_reset;
59 u16 reserved0;
60 /* offset 0x20 */
61 u16 ps2_data;
62 u16 ps2_ctrl;
63 /* plus also 4 rs232 ports ... */
64};
65
66/* LEDs definition on debug board (16 LEDs, all physically green) */
67#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
68#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
69#define H2P2_DBG_FPGA_LED_RED (1 << 13)
70#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
71/* cpu0 load-meter LEDs */
72#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
73#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
74#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
75
76#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
77#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
78
79/*
80 * ---------------------------------------------------------------------------
81 * OMAP-1510 FPGA
82 * ---------------------------------------------------------------------------
83 */
84#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
85#define OMAP1510_FPGA_SIZE SZ_4K
86#define OMAP1510_FPGA_START 0x08000000 /* PA */
87
88/* Revision */
89#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
90#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
91
92#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
93#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
94#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
95#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
96
97/* Interrupt status */
98#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
99#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
100
101/* Interrupt mask */
102#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
103#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
104
105/* Reset registers */
106#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
107#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
108
109#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
110#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
111#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
112#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
113#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
114#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
115#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
116#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
117#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
118#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
119
120#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
121
122#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
123#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
124#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
125#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
126#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
127#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
128#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
129#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
130#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
131#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
132#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
133
134#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
135
136/*
137 * Power up Giga UART driver, turn on HID clock.
138 * Turn off BT power, since we're not using it and it
139 * draws power.
140 */
141#define OMAP1510_FPGA_RESET_VALUE 0x42
142
143#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
144#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
145#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
146#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
147#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
148#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
149#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
150#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
151
152/*
153 * Innovator/OMAP1510 FPGA HID register bit definitions
154 */
155#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
156#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
157#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
158#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
159#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
160#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
161#define OMAP1510_FPGA_HID_rsrvd (1<<6)
162#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
163
164/* The FPGA IRQ is cascaded through GPIO_13 */
165#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
166
167/* IRQ Numbers for interrupts muxed through the FPGA */
168#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
169#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
170#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
171#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
172#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
173#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
174#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
175#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
176#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
177#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
178#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
179#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
180#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
181#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
182#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
183#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
184#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
185#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
186#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
187#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
188#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
189#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
190#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
191#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
192
193#endif
diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 7c22b9e10dc3..7a9028cb5a75 100644
--- a/arch/arm/plat-omap/include/plat/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
@@ -18,11 +18,15 @@
18 * 02110-1301 USA 18 * 02110-1301 USA
19 * 19 *
20 */ 20 */
21#ifndef __ASM__ARCH_OMAP_I2C_H
22#define __ASM__ARCH_OMAP_I2C_H
23 21
24#include <linux/i2c.h> 22#ifndef __PLAT_OMAP_I2C_H
25#include <linux/i2c-omap.h> 23#define __PLAT_OMAP_I2C_H
24
25struct i2c_board_info;
26struct omap_i2c_bus_platform_data;
27
28int omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
29 int bus_id);
26 30
27#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) 31#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
28extern int omap_register_i2c_bus(int bus_id, u32 clkrate, 32extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -37,23 +41,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
37} 41}
38#endif 42#endif
39 43
40/**
41 * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
42 * @fifo_depth: total controller FIFO size (in bytes)
43 * @flags: differences in hardware support capability
44 *
45 * @fifo_depth represents what exists on the hardware, not what is
46 * actually configured at runtime by the device driver.
47 */
48struct omap_i2c_dev_attr {
49 u8 fifo_depth;
50 u32 flags;
51};
52
53void __init omap1_i2c_mux_pins(int bus_id);
54void __init omap2_i2c_mux_pins(int bus_id);
55
56struct omap_hwmod; 44struct omap_hwmod;
57int omap_i2c_reset(struct omap_hwmod *oh); 45int omap_i2c_reset(struct omap_hwmod *oh);
58 46
59#endif /* __ASM__ARCH_OMAP_I2C_H */ 47#endif /* __PLAT_OMAP_I2C_H */
diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h
deleted file mode 100644
index 324d31b14852..000000000000
--- a/arch/arm/plat-omap/include/plat/multi.h
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Support for compiling in multiple OMAP processors
3 *
4 * Copyright (C) 2010 Nokia Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#ifndef __PLAT_OMAP_MULTI_H
23#define __PLAT_OMAP_MULTI_H
24
25/*
26 * Test if multicore OMAP support is needed
27 */
28#undef MULTI_OMAP1
29#undef MULTI_OMAP2
30#undef OMAP_NAME
31
32#ifdef CONFIG_ARCH_OMAP730
33# ifdef OMAP_NAME
34# undef MULTI_OMAP1
35# define MULTI_OMAP1
36# else
37# define OMAP_NAME omap730
38# endif
39#endif
40#ifdef CONFIG_ARCH_OMAP850
41# ifdef OMAP_NAME
42# undef MULTI_OMAP1
43# define MULTI_OMAP1
44# else
45# define OMAP_NAME omap850
46# endif
47#endif
48#ifdef CONFIG_ARCH_OMAP15XX
49# ifdef OMAP_NAME
50# undef MULTI_OMAP1
51# define MULTI_OMAP1
52# else
53# define OMAP_NAME omap1510
54# endif
55#endif
56#ifdef CONFIG_ARCH_OMAP16XX
57# ifdef OMAP_NAME
58# undef MULTI_OMAP1
59# define MULTI_OMAP1
60# else
61# define OMAP_NAME omap16xx
62# endif
63#endif
64#ifdef CONFIG_ARCH_OMAP2PLUS
65# if (defined(OMAP_NAME) || defined(MULTI_OMAP1))
66# error "OMAP1 and OMAP2PLUS can't be selected at the same time"
67# endif
68#endif
69#ifdef CONFIG_SOC_OMAP2420
70# ifdef OMAP_NAME
71# undef MULTI_OMAP2
72# define MULTI_OMAP2
73# else
74# define OMAP_NAME omap2420
75# endif
76#endif
77#ifdef CONFIG_SOC_OMAP2430
78# ifdef OMAP_NAME
79# undef MULTI_OMAP2
80# define MULTI_OMAP2
81# else
82# define OMAP_NAME omap2430
83# endif
84#endif
85#ifdef CONFIG_ARCH_OMAP3
86# ifdef OMAP_NAME
87# undef MULTI_OMAP2
88# define MULTI_OMAP2
89# else
90# define OMAP_NAME omap3
91# endif
92#endif
93#ifdef CONFIG_ARCH_OMAP4
94# ifdef OMAP_NAME
95# undef MULTI_OMAP2
96# define MULTI_OMAP2
97# else
98# define OMAP_NAME omap4
99# endif
100#endif
101
102#ifdef CONFIG_SOC_OMAP5
103# ifdef OMAP_NAME
104# undef MULTI_OMAP2
105# define MULTI_OMAP2
106# else
107# define OMAP_NAME omap5
108# endif
109#endif
110
111#ifdef CONFIG_SOC_AM33XX
112# ifdef OMAP_NAME
113# undef MULTI_OMAP2
114# define MULTI_OMAP2
115# else
116# define OMAP_NAME am33xx
117# endif
118#endif
119
120#endif /* __PLAT_OMAP_MULTI_H */
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
deleted file mode 100644
index 0e4acd2d2deb..000000000000
--- a/arch/arm/plat-omap/include/plat/omap-secure.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __OMAP_SECURE_H__
2#define __OMAP_SECURE_H__
3
4#include <linux/types.h>
5
6extern int omap_secure_ram_reserve_memblock(void);
7
8#ifdef CONFIG_OMAP4_ERRATA_I688
9extern int omap_barrier_reserve_memblock(void);
10#else
11static inline void omap_barrier_reserve_memblock(void)
12{ }
13#endif
14#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
deleted file mode 100644
index 36d6a7666216..000000000000
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ /dev/null
@@ -1,164 +0,0 @@
1#ifndef ____ASM_ARCH_SDRC_H
2#define ____ASM_ARCH_SDRC_H
3
4/*
5 * OMAP2/3 SDRC/SMS register definitions
6 *
7 * Copyright (C) 2007-2008 Texas Instruments, Inc.
8 * Copyright (C) 2007-2008 Nokia Corporation
9 *
10 * Tony Lindgren
11 * Paul Walmsley
12 * Richard Woodruff
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19
20/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
21
22#define SDRC_SYSCONFIG 0x010
23#define SDRC_CS_CFG 0x040
24#define SDRC_SHARING 0x044
25#define SDRC_ERR_TYPE 0x04C
26#define SDRC_DLLA_CTRL 0x060
27#define SDRC_DLLA_STATUS 0x064
28#define SDRC_DLLB_CTRL 0x068
29#define SDRC_DLLB_STATUS 0x06C
30#define SDRC_POWER 0x070
31#define SDRC_MCFG_0 0x080
32#define SDRC_MR_0 0x084
33#define SDRC_EMR2_0 0x08c
34#define SDRC_ACTIM_CTRL_A_0 0x09c
35#define SDRC_ACTIM_CTRL_B_0 0x0a0
36#define SDRC_RFR_CTRL_0 0x0a4
37#define SDRC_MANUAL_0 0x0a8
38#define SDRC_MCFG_1 0x0B0
39#define SDRC_MR_1 0x0B4
40#define SDRC_EMR2_1 0x0BC
41#define SDRC_ACTIM_CTRL_A_1 0x0C4
42#define SDRC_ACTIM_CTRL_B_1 0x0C8
43#define SDRC_RFR_CTRL_1 0x0D4
44#define SDRC_MANUAL_1 0x0D8
45
46#define SDRC_POWER_AUTOCOUNT_SHIFT 8
47#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
48#define SDRC_POWER_CLKCTRL_SHIFT 4
49#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
50#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
51
52/*
53 * These values represent the number of memory clock cycles between
54 * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192
55 * rows per device, and include a subtraction of a 50 cycle window in the
56 * event that the autorefresh command is delayed due to other SDRC activity.
57 * The '| 1' sets the ARE field to send one autorefresh when the autorefresh
58 * counter reaches 0.
59 *
60 * These represent optimal values for common parts, it won't work for all.
61 * As long as you scale down, most parameters are still work, they just
62 * become sub-optimal. The RFR value goes in the opposite direction. If you
63 * don't adjust it down as your clock period increases the refresh interval
64 * will not be met. Setting all parameters for complete worst case may work,
65 * but may cut memory performance by 2x. Due to errata the DLLs need to be
66 * unlocked and their value needs run time calibration. A dynamic call is
67 * need for that as no single right value exists acorss production samples.
68 *
69 * Only the FULL speed values are given. Current code is such that rate
70 * changes must be made at DPLLoutx2. The actual value adjustment for low
71 * frequency operation will be handled by omap_set_performance()
72 *
73 * By having the boot loader boot up in the fastest L4 speed available likely
74 * will result in something which you can switch between.
75 */
76#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1)
77#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1)
78#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1)
79#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */
80#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */
81
82
83/*
84 * SMS register access
85 */
86
87#define OMAP242X_SMS_REGADDR(reg) \
88 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
89#define OMAP243X_SMS_REGADDR(reg) \
90 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
91#define OMAP343X_SMS_REGADDR(reg) \
92 (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
93
94/* SMS register offsets - read/write with sms_{read,write}_reg() */
95
96#define SMS_SYSCONFIG 0x010
97#define SMS_ROT_CONTROL(context) (0x180 + 0x10 * context)
98#define SMS_ROT_SIZE(context) (0x184 + 0x10 * context)
99#define SMS_ROT_PHYSICAL_BA(context) (0x188 + 0x10 * context)
100/* REVISIT: fill in other SMS registers here */
101
102
103#ifndef __ASSEMBLER__
104
105/**
106 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
107 * @rate: SDRC clock rate (in Hz)
108 * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate
109 * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate
110 * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate
111 * @mr: Value to program to SDRC_MR for this rate
112 *
113 * This structure holds a pre-computed set of register values for the
114 * SDRC for a given SDRC clock rate and SDRAM chip. These are
115 * intended to be pre-computed and specified in an array in the board-*.c
116 * files. The structure is keyed off the 'rate' field.
117 */
118struct omap_sdrc_params {
119 unsigned long rate;
120 u32 actim_ctrla;
121 u32 actim_ctrlb;
122 u32 rfr_ctrl;
123 u32 mr;
124};
125
126#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
127void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
128 struct omap_sdrc_params *sdrc_cs1);
129#else
130static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
131 struct omap_sdrc_params *sdrc_cs1) {};
132#endif
133
134int omap2_sdrc_get_params(unsigned long r,
135 struct omap_sdrc_params **sdrc_cs0,
136 struct omap_sdrc_params **sdrc_cs1);
137void omap2_sms_save_context(void);
138void omap2_sms_restore_context(void);
139
140void omap2_sms_write_rot_control(u32 val, unsigned ctx);
141void omap2_sms_write_rot_size(u32 val, unsigned ctx);
142void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx);
143
144#ifdef CONFIG_ARCH_OMAP2
145
146struct memory_timings {
147 u32 m_type; /* ddr = 1, sdr = 0 */
148 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */
149 u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */
150 u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */
151 u32 base_cs; /* base chip select to use for calculations */
152};
153
154extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
155struct omap_sdrc_params *rx51_get_sdram_timings(void);
156
157u32 omap2xxx_sdrc_dll_is_unlocked(void);
158u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
159
160#endif /* CONFIG_ARCH_OMAP2 */
161
162#endif /* __ASSEMBLER__ */
163
164#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index 227ae2657554..ba4525059a99 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -1,18 +1,8 @@
1/* 1int omap_sram_init(void);
2 * arch/arm/plat-omap/include/mach/sram.h
3 *
4 * Interface for functions that need to be run in internal SRAM
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 2
11#ifndef __ARCH_ARM_OMAP_SRAM_H 3void omap_map_sram(unsigned long start, unsigned long size,
12#define __ARCH_ARM_OMAP_SRAM_H 4 unsigned long skip, int cached);
13 5void omap_sram_reset(void);
14#ifndef __ASSEMBLY__
15#include <asm/fncpy.h>
16 6
17extern void *omap_sram_push_address(unsigned long size); 7extern void *omap_sram_push_address(unsigned long size);
18 8
@@ -24,82 +14,3 @@ extern void *omap_sram_push_address(unsigned long size);
24 _res = fncpy(_sram_address, &(funcp), size); \ 14 _res = fncpy(_sram_address, &(funcp), size); \
25 _res; \ 15 _res; \
26}) 16})
27
28extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
29
30extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
31 u32 base_cs, u32 force_unlock);
32extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
33 u32 mem_type);
34extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
35
36extern u32 omap3_configure_core_dpll(
37 u32 m2, u32 unlock_dll, u32 f, u32 inc,
38 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
39 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
40 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
41 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
42extern void omap3_sram_restore_context(void);
43
44/* Do not use these */
45extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
46extern unsigned long omap1_sram_reprogram_clock_sz;
47
48extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
49extern unsigned long omap24xx_sram_reprogram_clock_sz;
50
51extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
52 u32 base_cs, u32 force_unlock);
53extern unsigned long omap242x_sram_ddr_init_sz;
54
55extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
56 int bypass);
57extern unsigned long omap242x_sram_set_prcm_sz;
58
59extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
60 u32 mem_type);
61extern unsigned long omap242x_sram_reprogram_sdrc_sz;
62
63
64extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
65 u32 base_cs, u32 force_unlock);
66extern unsigned long omap243x_sram_ddr_init_sz;
67
68extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
69 int bypass);
70extern unsigned long omap243x_sram_set_prcm_sz;
71
72extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
73 u32 mem_type);
74extern unsigned long omap243x_sram_reprogram_sdrc_sz;
75
76extern u32 omap3_sram_configure_core_dpll(
77 u32 m2, u32 unlock_dll, u32 f, u32 inc,
78 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
79 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
80 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
81 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
82extern unsigned long omap3_sram_configure_core_dpll_sz;
83
84#ifdef CONFIG_PM
85extern void omap_push_sram_idle(void);
86#else
87static inline void omap_push_sram_idle(void) {}
88#endif /* CONFIG_PM */
89
90#endif /* __ASSEMBLY__ */
91
92/*
93 * OMAP2+: define the SRAM PA addresses.
94 * Used by the SRAM management code and the idle sleep code.
95 */
96#define OMAP2_SRAM_PA 0x40200000
97#define OMAP3_SRAM_PA 0x40200000
98#ifdef CONFIG_OMAP4_ERRATA_I688
99#define OMAP4_SRAM_PA 0x40304000
100#define OMAP4_SRAM_VA 0xfe404000
101#else
102#define OMAP4_SRAM_PA 0x40300000
103#endif
104#define AM33XX_SRAM_PA 0x40300000
105#endif
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
deleted file mode 100644
index 7f7b112acccb..000000000000
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ /dev/null
@@ -1,204 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/uncompress.h
3 *
4 * Serial port stubs for kernel decompress status messages
5 *
6 * Initially based on:
7 * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
8 * Copyright (C) 2000 RidgeRun, Inc.
9 * Author: Greg Lonnon <glonnon@ridgerun.com>
10 *
11 * Rewritten by:
12 * Author: <source@mvista.com>
13 * 2004 (c) MontaVista Software, Inc.
14 *
15 * This file is licensed under the terms of the GNU General Public License
16 * version 2. This program is licensed "as is" without any warranty of any
17 * kind, whether express or implied.
18 */
19
20#include <linux/types.h>
21#include <linux/serial_reg.h>
22
23#include <asm/memory.h>
24#include <asm/mach-types.h>
25
26#include <plat/serial.h>
27
28#define MDR1_MODE_MASK 0x07
29
30volatile u8 *uart_base;
31int uart_shift;
32
33/*
34 * Store the DEBUG_LL uart number into memory.
35 * See also debug-macro.S, and serial.c for related code.
36 */
37static void set_omap_uart_info(unsigned char port)
38{
39 /*
40 * Get address of some.bss variable and round it down
41 * a la CONFIG_AUTO_ZRELADDR.
42 */
43 u32 ram_start = (u32)&uart_shift & 0xf8000000;
44 u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
45 *uart_info = port;
46}
47
48static void putc(int c)
49{
50 if (!uart_base)
51 return;
52
53 /* Check for UART 16x mode */
54 if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
55 return;
56
57 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
58 barrier();
59 uart_base[UART_TX << uart_shift] = c;
60}
61
62static inline void flush(void)
63{
64}
65
66/*
67 * Macros to configure UART1 and debug UART
68 */
69#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \
70 if (machine_is_##mach()) { \
71 uart_base = (volatile u8 *)(dbg_uart); \
72 uart_shift = (dbg_shft); \
73 port = (dbg_id); \
74 set_omap_uart_info(port); \
75 break; \
76 }
77
78#define DEBUG_LL_OMAP7XX(p, mach) \
79 _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \
80 OMAP1UART##p)
81
82#define DEBUG_LL_OMAP1(p, mach) \
83 _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, \
84 OMAP1UART##p)
85
86#define DEBUG_LL_OMAP2(p, mach) \
87 _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \
88 OMAP2UART##p)
89
90#define DEBUG_LL_OMAP3(p, mach) \
91 _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \
92 OMAP3UART##p)
93
94#define DEBUG_LL_OMAP4(p, mach) \
95 _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \
96 OMAP4UART##p)
97
98#define DEBUG_LL_OMAP5(p, mach) \
99 _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \
100 OMAP5UART##p)
101/* Zoom2/3 shift is different for UART1 and external port */
102#define DEBUG_LL_ZOOM(mach) \
103 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
104
105#define DEBUG_LL_TI81XX(p, mach) \
106 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
107 TI81XXUART##p)
108
109#define DEBUG_LL_AM33XX(p, mach) \
110 _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
111 AM33XXUART##p)
112
113static inline void arch_decomp_setup(void)
114{
115 int port = 0;
116
117 /*
118 * Initialize the port based on the machine ID from the bootloader.
119 * Note that we're using macros here instead of switch statement
120 * as machine_is functions are optimized out for the boards that
121 * are not selected.
122 */
123 do {
124 /* omap7xx/8xx based boards using UART1 with shift 0 */
125 DEBUG_LL_OMAP7XX(1, herald);
126 DEBUG_LL_OMAP7XX(1, omap_perseus2);
127
128 /* omap15xx/16xx based boards using UART1 */
129 DEBUG_LL_OMAP1(1, ams_delta);
130 DEBUG_LL_OMAP1(1, nokia770);
131 DEBUG_LL_OMAP1(1, omap_h2);
132 DEBUG_LL_OMAP1(1, omap_h3);
133 DEBUG_LL_OMAP1(1, omap_innovator);
134 DEBUG_LL_OMAP1(1, omap_osk);
135 DEBUG_LL_OMAP1(1, omap_palmte);
136 DEBUG_LL_OMAP1(1, omap_palmz71);
137
138 /* omap15xx/16xx based boards using UART2 */
139 DEBUG_LL_OMAP1(2, omap_palmtt);
140
141 /* omap15xx/16xx based boards using UART3 */
142 DEBUG_LL_OMAP1(3, sx1);
143
144 /* omap2 based boards using UART1 */
145 DEBUG_LL_OMAP2(1, omap_2430sdp);
146 DEBUG_LL_OMAP2(1, omap_apollon);
147 DEBUG_LL_OMAP2(1, omap_h4);
148
149 /* omap2 based boards using UART3 */
150 DEBUG_LL_OMAP2(3, nokia_n800);
151 DEBUG_LL_OMAP2(3, nokia_n810);
152 DEBUG_LL_OMAP2(3, nokia_n810_wimax);
153
154 /* omap3 based boards using UART1 */
155 DEBUG_LL_OMAP2(1, omap3evm);
156 DEBUG_LL_OMAP3(1, omap_3430sdp);
157 DEBUG_LL_OMAP3(1, omap_3630sdp);
158 DEBUG_LL_OMAP3(1, omap3530_lv_som);
159 DEBUG_LL_OMAP3(1, omap3_torpedo);
160
161 /* omap3 based boards using UART3 */
162 DEBUG_LL_OMAP3(3, cm_t35);
163 DEBUG_LL_OMAP3(3, cm_t3517);
164 DEBUG_LL_OMAP3(3, cm_t3730);
165 DEBUG_LL_OMAP3(3, craneboard);
166 DEBUG_LL_OMAP3(3, devkit8000);
167 DEBUG_LL_OMAP3(3, igep0020);
168 DEBUG_LL_OMAP3(3, igep0030);
169 DEBUG_LL_OMAP3(3, nokia_rm680);
170 DEBUG_LL_OMAP3(3, nokia_rm696);
171 DEBUG_LL_OMAP3(3, nokia_rx51);
172 DEBUG_LL_OMAP3(3, omap3517evm);
173 DEBUG_LL_OMAP3(3, omap3_beagle);
174 DEBUG_LL_OMAP3(3, omap3_pandora);
175 DEBUG_LL_OMAP3(3, omap_ldp);
176 DEBUG_LL_OMAP3(3, overo);
177 DEBUG_LL_OMAP3(3, touchbook);
178
179 /* omap4 based boards using UART3 */
180 DEBUG_LL_OMAP4(3, omap_4430sdp);
181 DEBUG_LL_OMAP4(3, omap4_panda);
182
183 /* omap5 based boards using UART3 */
184 DEBUG_LL_OMAP5(3, omap5_sevm);
185
186 /* zoom2/3 external uart */
187 DEBUG_LL_ZOOM(omap_zoom2);
188 DEBUG_LL_ZOOM(omap_zoom3);
189
190 /* TI8168 base boards using UART3 */
191 DEBUG_LL_TI81XX(3, ti8168evm);
192
193 /* TI8148 base boards using UART1 */
194 DEBUG_LL_TI81XX(1, ti8148evm);
195
196 /* AM33XX base boards using UART1 */
197 DEBUG_LL_AM33XX(1, am335xevm);
198 } while (0);
199}
200
201/*
202 * nothing to do
203 */
204#define arch_decomp_wdog()
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
deleted file mode 100644
index 87ee140fefaa..000000000000
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ /dev/null
@@ -1,179 +0,0 @@
1// include/asm-arm/mach-omap/usb.h
2
3#ifndef __ASM_ARCH_OMAP_USB_H
4#define __ASM_ARCH_OMAP_USB_H
5
6#include <linux/io.h>
7#include <linux/platform_device.h>
8#include <linux/usb/musb.h>
9
10#define OMAP3_HS_USB_PORTS 3
11
12enum usbhs_omap_port_mode {
13 OMAP_USBHS_PORT_MODE_UNUSED,
14 OMAP_EHCI_PORT_MODE_PHY,
15 OMAP_EHCI_PORT_MODE_TLL,
16 OMAP_EHCI_PORT_MODE_HSIC,
17 OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
18 OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
19 OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
20 OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
21 OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
22 OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
23 OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
24 OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
25 OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
26 OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
27};
28
29struct usbhs_omap_board_data {
30 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
31
32 /* have to be valid if phy_reset is true and portx is in phy mode */
33 int reset_gpio_port[OMAP3_HS_USB_PORTS];
34
35 /* Set this to true for ES2.x silicon */
36 unsigned es2_compatibility:1;
37
38 unsigned phy_reset:1;
39
40 /*
41 * Regulators for USB PHYs.
42 * Each PHY can have a separate regulator.
43 */
44 struct regulator *regulator[OMAP3_HS_USB_PORTS];
45};
46
47#ifdef CONFIG_ARCH_OMAP2PLUS
48
49struct ehci_hcd_omap_platform_data {
50 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
51 int reset_gpio_port[OMAP3_HS_USB_PORTS];
52 struct regulator *regulator[OMAP3_HS_USB_PORTS];
53 unsigned phy_reset:1;
54};
55
56struct ohci_hcd_omap_platform_data {
57 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
58 unsigned es2_compatibility:1;
59};
60
61struct usbhs_omap_platform_data {
62 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
63
64 struct ehci_hcd_omap_platform_data *ehci_data;
65 struct ohci_hcd_omap_platform_data *ohci_data;
66};
67
68struct usbtll_omap_platform_data {
69 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
70};
71/*-------------------------------------------------------------------------*/
72
73struct omap_musb_board_data {
74 u8 interface_type;
75 u8 mode;
76 u16 power;
77 unsigned extvbus:1;
78 void (*set_phy_power)(u8 on);
79 void (*clear_irq)(void);
80 void (*set_mode)(u8 mode);
81 void (*reset)(void);
82};
83
84enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
85
86extern void usb_musb_init(struct omap_musb_board_data *board_data);
87
88extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
89extern int omap_tll_enable(void);
90extern int omap_tll_disable(void);
91
92extern int omap4430_phy_power(struct device *dev, int ID, int on);
93extern int omap4430_phy_set_clk(struct device *dev, int on);
94extern int omap4430_phy_init(struct device *dev);
95extern int omap4430_phy_exit(struct device *dev);
96extern int omap4430_phy_suspend(struct device *dev, int suspend);
97
98#endif
99
100extern void am35x_musb_reset(void);
101extern void am35x_musb_phy_power(u8 on);
102extern void am35x_musb_clear_irq(void);
103extern void am35x_set_mode(u8 musb_mode);
104extern void ti81xx_musb_phy_power(u8 on);
105
106/* AM35x */
107/* USB 2.0 PHY Control */
108#define CONF2_PHY_GPIOMODE (1 << 23)
109#define CONF2_OTGMODE (3 << 14)
110#define CONF2_NO_OVERRIDE (0 << 14)
111#define CONF2_FORCE_HOST (1 << 14)
112#define CONF2_FORCE_DEVICE (2 << 14)
113#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
114#define CONF2_SESENDEN (1 << 13)
115#define CONF2_VBDTCTEN (1 << 12)
116#define CONF2_REFFREQ_24MHZ (2 << 8)
117#define CONF2_REFFREQ_26MHZ (7 << 8)
118#define CONF2_REFFREQ_13MHZ (6 << 8)
119#define CONF2_REFFREQ (0xf << 8)
120#define CONF2_PHYCLKGD (1 << 7)
121#define CONF2_VBUSSENSE (1 << 6)
122#define CONF2_PHY_PLLON (1 << 5)
123#define CONF2_RESET (1 << 4)
124#define CONF2_PHYPWRDN (1 << 3)
125#define CONF2_OTGPWRDN (1 << 2)
126#define CONF2_DATPOL (1 << 1)
127
128/* TI81XX specific definitions */
129#define USBCTRL0 0x620
130#define USBSTAT0 0x624
131
132/* TI816X PHY controls bits */
133#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
134#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
135
136/* TI814X PHY controls bits */
137#define USBPHY_CM_PWRDN (1 << 0)
138#define USBPHY_OTG_PWRDN (1 << 1)
139#define USBPHY_CHGDET_DIS (1 << 2)
140#define USBPHY_CHGDET_RSTRT (1 << 3)
141#define USBPHY_SRCONDM (1 << 4)
142#define USBPHY_SINKONDP (1 << 5)
143#define USBPHY_CHGISINK_EN (1 << 6)
144#define USBPHY_CHGVSRC_EN (1 << 7)
145#define USBPHY_DMPULLUP (1 << 8)
146#define USBPHY_DPPULLUP (1 << 9)
147#define USBPHY_CDET_EXTCTL (1 << 10)
148#define USBPHY_GPIO_MODE (1 << 12)
149#define USBPHY_DPOPBUFCTL (1 << 13)
150#define USBPHY_DMOPBUFCTL (1 << 14)
151#define USBPHY_DPINPUT (1 << 15)
152#define USBPHY_DMINPUT (1 << 16)
153#define USBPHY_DPGPIO_PD (1 << 17)
154#define USBPHY_DMGPIO_PD (1 << 18)
155#define USBPHY_OTGVDET_EN (1 << 19)
156#define USBPHY_OTGSESSEND_EN (1 << 20)
157#define USBPHY_DATA_POLARITY (1 << 23)
158
159#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
160u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
161u32 omap1_usb1_init(unsigned nwires);
162u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup);
163#else
164static inline u32 omap1_usb0_init(unsigned nwires, unsigned is_device)
165{
166 return 0;
167}
168static inline u32 omap1_usb1_init(unsigned nwires)
169{
170 return 0;
171
172}
173static inline u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
174{
175 return 0;
176}
177#endif
178
179#endif /* __ASM_ARCH_OMAP_USB_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 28acb383e7df..743fc2836f7a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,198 +20,20 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include <asm/fncpy.h>
23#include <asm/tlb.h> 24#include <asm/tlb.h>
24#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
25 26
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27 28
28#include <plat/sram.h>
29#include <plat/cpu.h>
30
31#include "sram.h"
32
33/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
34#include "../mach-omap2/iomap.h"
35#include "../mach-omap2/prm2xxx_3xxx.h"
36#include "../mach-omap2/sdrc.h"
37
38#define OMAP1_SRAM_PA 0x20000000
39#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
40#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
41#ifdef CONFIG_OMAP4_ERRATA_I688
42#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
43#else
44#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
45#endif
46#define OMAP5_SRAM_PA 0x40300000
47
48#if defined(CONFIG_ARCH_OMAP2PLUS)
49#define SRAM_BOOTLOADER_SZ 0x00
50#else
51#define SRAM_BOOTLOADER_SZ 0x80
52#endif
53
54#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
55#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
56#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
57
58#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
59#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
60#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
61#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
62#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
63
64#define GP_DEVICE 0x300
65
66#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) 29#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
67 30
68static unsigned long omap_sram_start;
69static void __iomem *omap_sram_base; 31static void __iomem *omap_sram_base;
70static unsigned long omap_sram_skip; 32static unsigned long omap_sram_skip;
71static unsigned long omap_sram_size; 33static unsigned long omap_sram_size;
72static void __iomem *omap_sram_ceil; 34static void __iomem *omap_sram_ceil;
73 35
74/* 36/*
75 * Depending on the target RAMFS firewall setup, the public usable amount of
76 * SRAM varies. The default accessible size for all device types is 2k. A GP
77 * device allows ARM11 but not other initiators for full size. This
78 * functionality seems ok until some nice security API happens.
79 */
80static int is_sram_locked(void)
81{
82 if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
83 /* RAMFW: R/W access to all initiators for all qualifier sets */
84 if (cpu_is_omap242x()) {
85 __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
86 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
87 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
88 }
89 if (cpu_is_omap34xx()) {
90 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
91 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
92 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
93 __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
94 __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
95 }
96 return 0;
97 } else
98 return 1; /* assume locked with no PPA or security driver */
99}
100
101/*
102 * The amount of SRAM depends on the core type.
103 * Note that we cannot try to test for SRAM here because writes
104 * to secure SRAM will hang the system. Also the SRAM is not
105 * yet mapped at this point.
106 */
107static void __init omap_detect_sram(void)
108{
109 omap_sram_skip = SRAM_BOOTLOADER_SZ;
110 if (cpu_class_is_omap2()) {
111 if (is_sram_locked()) {
112 if (cpu_is_omap34xx()) {
113 omap_sram_start = OMAP3_SRAM_PUB_PA;
114 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
115 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
116 omap_sram_size = 0x7000; /* 28K */
117 omap_sram_skip += SZ_16K;
118 } else {
119 omap_sram_size = 0x8000; /* 32K */
120 }
121 } else if (cpu_is_omap44xx()) {
122 omap_sram_start = OMAP4_SRAM_PUB_PA;
123 omap_sram_size = 0xa000; /* 40K */
124 } else if (soc_is_omap54xx()) {
125 omap_sram_start = OMAP5_SRAM_PA;
126 omap_sram_size = SZ_128K; /* 128KB */
127 } else {
128 omap_sram_start = OMAP2_SRAM_PUB_PA;
129 omap_sram_size = 0x800; /* 2K */
130 }
131 } else {
132 if (soc_is_am33xx()) {
133 omap_sram_start = AM33XX_SRAM_PA;
134 omap_sram_size = 0x10000; /* 64K */
135 } else if (cpu_is_omap34xx()) {
136 omap_sram_start = OMAP3_SRAM_PA;
137 omap_sram_size = 0x10000; /* 64K */
138 } else if (cpu_is_omap44xx()) {
139 omap_sram_start = OMAP4_SRAM_PA;
140 omap_sram_size = 0xe000; /* 56K */
141 } else if (soc_is_omap54xx()) {
142 omap_sram_start = OMAP5_SRAM_PA;
143 omap_sram_size = SZ_128K; /* 128KB */
144 } else {
145 omap_sram_start = OMAP2_SRAM_PA;
146 if (cpu_is_omap242x())
147 omap_sram_size = 0xa0000; /* 640K */
148 else if (cpu_is_omap243x())
149 omap_sram_size = 0x10000; /* 64K */
150 }
151 }
152 } else {
153 omap_sram_start = OMAP1_SRAM_PA;
154
155 if (cpu_is_omap7xx())
156 omap_sram_size = 0x32000; /* 200K */
157 else if (cpu_is_omap15xx())
158 omap_sram_size = 0x30000; /* 192K */
159 else if (cpu_is_omap1610() || cpu_is_omap1611() ||
160 cpu_is_omap1621() || cpu_is_omap1710())
161 omap_sram_size = 0x4000; /* 16K */
162 else {
163 pr_err("Could not detect SRAM size\n");
164 omap_sram_size = 0x4000;
165 }
166 }
167}
168
169/*
170 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
171 */
172static void __init omap_map_sram(void)
173{
174 int cached = 1;
175
176 if (omap_sram_size == 0)
177 return;
178
179#ifdef CONFIG_OMAP4_ERRATA_I688
180 if (cpu_is_omap44xx()) {
181 omap_sram_start += PAGE_SIZE;
182 omap_sram_size -= SZ_16K;
183 }
184#endif
185 if (cpu_is_omap34xx()) {
186 /*
187 * SRAM must be marked as non-cached on OMAP3 since the
188 * CORE DPLL M2 divider change code (in SRAM) runs with the
189 * SDRAM controller disabled, and if it is marked cached,
190 * the ARM may attempt to write cache lines back to SDRAM
191 * which will cause the system to hang.
192 */
193 cached = 0;
194 }
195
196 omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
197 omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
198 cached);
199 if (!omap_sram_base) {
200 pr_err("SRAM: Could not map\n");
201 return;
202 }
203
204 omap_sram_ceil = omap_sram_base + omap_sram_size;
205
206 /*
207 * Looks like we need to preserve some bootloader code at the
208 * beginning of SRAM for jumping to flash for reboot to work...
209 */
210 memset_io(omap_sram_base + omap_sram_skip, 0,
211 omap_sram_size - omap_sram_skip);
212}
213
214/*
215 * Memory allocator for SRAM: calculates the new ceiling address 37 * Memory allocator for SRAM: calculates the new ceiling address
216 * for pushing a function using the fncpy API. 38 * for pushing a function using the fncpy API.
217 * 39 *
@@ -236,171 +58,39 @@ void *omap_sram_push_address(unsigned long size)
236 return (void *)omap_sram_ceil; 58 return (void *)omap_sram_ceil;
237} 59}
238 60
239#ifdef CONFIG_ARCH_OMAP1 61/*
240 62 * The SRAM context is lost during off-idle and stack
241static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); 63 * needs to be reset.
242 64 */
243void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) 65void omap_sram_reset(void)
244{
245 BUG_ON(!_omap_sram_reprogram_clock);
246 /* On 730, bit 13 must always be 1 */
247 if (cpu_is_omap7xx())
248 ckctl |= 0x2000;
249 _omap_sram_reprogram_clock(dpllctl, ckctl);
250}
251
252static int __init omap1_sram_init(void)
253{
254 _omap_sram_reprogram_clock =
255 omap_sram_push(omap1_sram_reprogram_clock,
256 omap1_sram_reprogram_clock_sz);
257
258 return 0;
259}
260
261#else
262#define omap1_sram_init() do {} while (0)
263#endif
264
265#if defined(CONFIG_ARCH_OMAP2)
266
267static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
268 u32 base_cs, u32 force_unlock);
269
270void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
271 u32 base_cs, u32 force_unlock)
272{
273 BUG_ON(!_omap2_sram_ddr_init);
274 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
275 base_cs, force_unlock);
276}
277
278static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
279 u32 mem_type);
280
281void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
282{
283 BUG_ON(!_omap2_sram_reprogram_sdrc);
284 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
285}
286
287static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
288
289u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
290{
291 BUG_ON(!_omap2_set_prcm);
292 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
293}
294#endif
295
296#ifdef CONFIG_SOC_OMAP2420
297static int __init omap242x_sram_init(void)
298{
299 _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
300 omap242x_sram_ddr_init_sz);
301
302 _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
303 omap242x_sram_reprogram_sdrc_sz);
304
305 _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
306 omap242x_sram_set_prcm_sz);
307
308 return 0;
309}
310#else
311static inline int omap242x_sram_init(void)
312{
313 return 0;
314}
315#endif
316
317#ifdef CONFIG_SOC_OMAP2430
318static int __init omap243x_sram_init(void)
319{
320 _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
321 omap243x_sram_ddr_init_sz);
322
323 _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
324 omap243x_sram_reprogram_sdrc_sz);
325
326 _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
327 omap243x_sram_set_prcm_sz);
328
329 return 0;
330}
331#else
332static inline int omap243x_sram_init(void)
333{
334 return 0;
335}
336#endif
337
338#ifdef CONFIG_ARCH_OMAP3
339
340static u32 (*_omap3_sram_configure_core_dpll)(
341 u32 m2, u32 unlock_dll, u32 f, u32 inc,
342 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
343 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
344 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
345 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
346
347u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
348 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
349 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
350 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
351 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
352{
353 BUG_ON(!_omap3_sram_configure_core_dpll);
354 return _omap3_sram_configure_core_dpll(
355 m2, unlock_dll, f, inc,
356 sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
357 sdrc_actim_ctrl_b_0, sdrc_mr_0,
358 sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
359 sdrc_actim_ctrl_b_1, sdrc_mr_1);
360}
361
362void omap3_sram_restore_context(void)
363{ 66{
364 omap_sram_ceil = omap_sram_base + omap_sram_size; 67 omap_sram_ceil = omap_sram_base + omap_sram_size;
365
366 _omap3_sram_configure_core_dpll =
367 omap_sram_push(omap3_sram_configure_core_dpll,
368 omap3_sram_configure_core_dpll_sz);
369 omap_push_sram_idle();
370} 68}
371 69
372static inline int omap34xx_sram_init(void) 70/*
373{ 71 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
374 omap3_sram_restore_context(); 72 */
375 return 0; 73void __init omap_map_sram(unsigned long start, unsigned long size,
376} 74 unsigned long skip, int cached)
377#else
378static inline int omap34xx_sram_init(void)
379{
380 return 0;
381}
382#endif /* CONFIG_ARCH_OMAP3 */
383
384static inline int am33xx_sram_init(void)
385{ 75{
386 return 0; 76 if (size == 0)
387} 77 return;
388 78
389int __init omap_sram_init(void) 79 start = ROUND_DOWN(start, PAGE_SIZE);
390{ 80 omap_sram_size = size;
391 omap_detect_sram(); 81 omap_sram_skip = skip;
392 omap_map_sram(); 82 omap_sram_base = __arm_ioremap_exec(start, size, cached);
83 if (!omap_sram_base) {
84 pr_err("SRAM: Could not map\n");
85 return;
86 }
393 87
394 if (!(cpu_class_is_omap2())) 88 omap_sram_reset();
395 omap1_sram_init();
396 else if (cpu_is_omap242x())
397 omap242x_sram_init();
398 else if (cpu_is_omap2430())
399 omap243x_sram_init();
400 else if (soc_is_am33xx())
401 am33xx_sram_init();
402 else if (cpu_is_omap34xx())
403 omap34xx_sram_init();
404 89
405 return 0; 90 /*
91 * Looks like we need to preserve some bootloader code at the
92 * beginning of SRAM for jumping to flash for reboot to work...
93 */
94 memset_io(omap_sram_base + omap_sram_skip, 0,
95 omap_sram_size - omap_sram_skip);
406} 96}
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/plat-omap/sram.h
deleted file mode 100644
index 29b43ef97f20..000000000000
--- a/arch/arm/plat-omap/sram.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __PLAT_OMAP_SRAM_H__
2#define __PLAT_OMAP_SRAM_H__
3
4extern int __init omap_sram_init(void);
5
6#endif /* __PLAT_OMAP_SRAM_H__ */
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index c8abce3d2d9c..ed0fade46aed 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -270,15 +270,10 @@ static int hci_uart_send_frame(struct sk_buff *skb)
270 */ 270 */
271static int hci_uart_tty_open(struct tty_struct *tty) 271static int hci_uart_tty_open(struct tty_struct *tty)
272{ 272{
273 struct hci_uart *hu = (void *) tty->disc_data; 273 struct hci_uart *hu;
274 274
275 BT_DBG("tty %p", tty); 275 BT_DBG("tty %p", tty);
276 276
277 /* FIXME: This btw is bogus, nothing requires the old ldisc to clear
278 the pointer */
279 if (hu)
280 return -EEXIST;
281
282 /* Error if the tty has no write op instead of leaving an exploitable 277 /* Error if the tty has no write op instead of leaving an exploitable
283 hole */ 278 hole */
284 if (tty->ops->write == NULL) 279 if (tty->ops->write == NULL)
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index a5effd813abd..45e467dcc8c8 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -27,8 +27,6 @@
27 27
28#include <asm/io.h> 28#include <asm/io.h>
29 29
30#include <plat/cpu.h>
31
32#define RNG_OUT_REG 0x00 /* Output register */ 30#define RNG_OUT_REG 0x00 /* Output register */
33#define RNG_STAT_REG 0x04 /* Status register 31#define RNG_STAT_REG 0x04 /* Status register
34 [0] = STAT_BUSY */ 32 [0] = STAT_BUSY */
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 093a8af59cbe..649a146e1382 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -29,8 +29,7 @@
29#include <crypto/scatterwalk.h> 29#include <crypto/scatterwalk.h>
30#include <crypto/aes.h> 30#include <crypto/aes.h>
31 31
32#include <plat/cpu.h> 32#include <plat-omap/dma-omap.h>
33#include <plat/dma.h>
34 33
35/* OMAP TRM gives bitfields as start:end, where start is the higher bit 34/* OMAP TRM gives bitfields as start:end, where start is the higher bit
36 number. For example 7:0 */ 35 number. For example 7:0 */
@@ -941,11 +940,6 @@ static int __init omap_aes_mod_init(void)
941{ 940{
942 pr_info("loading %s driver\n", "omap-aes"); 941 pr_info("loading %s driver\n", "omap-aes");
943 942
944 if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
945 pr_err("Unsupported cpu\n");
946 return -ENODEV;
947 }
948
949 return platform_driver_register(&omap_aes_driver); 943 return platform_driver_register(&omap_aes_driver);
950} 944}
951 945
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index a3fd6fc504b1..d76fe06b9417 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -37,8 +37,7 @@
37#include <crypto/hash.h> 37#include <crypto/hash.h>
38#include <crypto/internal/hash.h> 38#include <crypto/internal/hash.h>
39 39
40#include <plat/cpu.h> 40#include <plat-omap/dma-omap.h>
41#include <plat/dma.h>
42#include <mach/irqs.h> 41#include <mach/irqs.h>
43 42
44#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04)) 43#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
@@ -1289,13 +1288,6 @@ static int __init omap_sham_mod_init(void)
1289{ 1288{
1290 pr_info("loading %s driver\n", "omap-sham"); 1289 pr_info("loading %s driver\n", "omap-sham");
1291 1290
1292 if (!cpu_class_is_omap2() ||
1293 (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
1294 omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
1295 pr_err("Unsupported cpu\n");
1296 return -ENODEV;
1297 }
1298
1299 return platform_driver_register(&omap_sham_driver); 1291 return platform_driver_register(&omap_sham_driver);
1300} 1292}
1301 1293
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index bb2d8e7029eb..7d35c237fbf1 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -19,8 +19,7 @@
19 19
20#include "virt-dma.h" 20#include "virt-dma.h"
21 21
22#include <plat/cpu.h> 22#include <plat-omap/dma-omap.h>
23#include <plat/dma.h>
24 23
25struct omap_dmadev { 24struct omap_dmadev {
26 struct dma_device ddev; 25 struct dma_device ddev;
@@ -438,7 +437,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
438 omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ); 437 omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
439 } 438 }
440 439
441 if (!cpu_class_is_omap1()) { 440 if (dma_omap2plus()) {
442 omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16); 441 omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
443 omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16); 442 omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
444 } 443 }
diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c
index a3b1a34c896d..4b1becc86e54 100644
--- a/drivers/media/platform/omap/omap_vout.c
+++ b/drivers/media/platform/omap/omap_vout.c
@@ -45,8 +45,8 @@
45#include <media/v4l2-ioctl.h> 45#include <media/v4l2-ioctl.h>
46 46
47#include <plat/cpu.h> 47#include <plat/cpu.h>
48#include <plat/dma.h> 48#include <plat-omap/dma-omap.h>
49#include <plat/vrfb.h> 49#include <video/omapvrfb.h>
50#include <video/omapdss.h> 50#include <video/omapdss.h>
51 51
52#include "omap_voutlib.h" 52#include "omap_voutlib.h"
diff --git a/drivers/media/platform/omap/omap_vout_vrfb.c b/drivers/media/platform/omap/omap_vout_vrfb.c
index 4be26abf6cea..8340445a0ee5 100644
--- a/drivers/media/platform/omap/omap_vout_vrfb.c
+++ b/drivers/media/platform/omap/omap_vout_vrfb.c
@@ -16,12 +16,14 @@
16#include <media/videobuf-dma-contig.h> 16#include <media/videobuf-dma-contig.h>
17#include <media/v4l2-device.h> 17#include <media/v4l2-device.h>
18 18
19#include <plat/dma.h> 19#include <plat-omap/dma-omap.h>
20#include <plat/vrfb.h> 20#include <video/omapvrfb.h>
21 21
22#include "omap_voutdef.h" 22#include "omap_voutdef.h"
23#include "omap_voutlib.h" 23#include "omap_voutlib.h"
24 24
25#define OMAP_DMA_NO_DEVICE 0
26
25/* 27/*
26 * Function for allocating video buffers 28 * Function for allocating video buffers
27 */ 29 */
diff --git a/drivers/media/platform/omap/omap_voutdef.h b/drivers/media/platform/omap/omap_voutdef.h
index 27a95d23b913..9ccfe1f475a4 100644
--- a/drivers/media/platform/omap/omap_voutdef.h
+++ b/drivers/media/platform/omap/omap_voutdef.h
@@ -12,7 +12,7 @@
12#define OMAP_VOUTDEF_H 12#define OMAP_VOUTDEF_H
13 13
14#include <video/omapdss.h> 14#include <video/omapdss.h>
15#include <plat/vrfb.h> 15#include <video/omapvrfb.h>
16 16
17#define YUYV_BPP 2 17#define YUYV_BPP 2
18#define RGB565_BPP 2 18#define RGB565_BPP 2
diff --git a/drivers/media/platform/omap3isp/isphist.c b/drivers/media/platform/omap3isp/isphist.c
index d1a8dee5e1ca..e7f9c4292cc6 100644
--- a/drivers/media/platform/omap3isp/isphist.c
+++ b/drivers/media/platform/omap3isp/isphist.c
@@ -34,6 +34,8 @@
34#include "ispreg.h" 34#include "ispreg.h"
35#include "isphist.h" 35#include "isphist.h"
36 36
37#define OMAP24XX_DMA_NO_DEVICE 0
38
37#define HIST_CONFIG_DMA 1 39#define HIST_CONFIG_DMA 1
38 40
39#define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0) 41#define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
diff --git a/drivers/media/platform/omap3isp/ispstat.h b/drivers/media/platform/omap3isp/ispstat.h
index a6fe653eb237..40f87cdd7994 100644
--- a/drivers/media/platform/omap3isp/ispstat.h
+++ b/drivers/media/platform/omap3isp/ispstat.h
@@ -30,7 +30,7 @@
30 30
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/omap3isp.h> 32#include <linux/omap3isp.h>
33#include <plat/dma.h> 33#include <plat-omap/dma-omap.h>
34#include <media/v4l2-event.h> 34#include <media/v4l2-event.h>
35 35
36#include "isp.h" 36#include "isp.h"
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index a0b737fecf13..5bd40e6870cc 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -36,7 +36,6 @@
36#include <media/v4l2-ioctl.h> 36#include <media/v4l2-ioctl.h>
37#include <plat/iommu.h> 37#include <plat/iommu.h>
38#include <plat/iovmm.h> 38#include <plat/iovmm.h>
39#include <plat/omap-pm.h>
40 39
41#include "ispvideo.h" 40#include "ispvideo.h"
42#include "isp.h" 41#include "isp.h"
diff --git a/drivers/media/platform/soc_camera/omap1_camera.c b/drivers/media/platform/soc_camera/omap1_camera.c
index fa08c7695ccb..cae9ce6275e9 100644
--- a/drivers/media/platform/soc_camera/omap1_camera.c
+++ b/drivers/media/platform/soc_camera/omap1_camera.c
@@ -34,12 +34,13 @@
34#include <media/videobuf-dma-contig.h> 34#include <media/videobuf-dma-contig.h>
35#include <media/videobuf-dma-sg.h> 35#include <media/videobuf-dma-sg.h>
36 36
37#include <plat/dma.h> 37#include <plat-omap/dma-omap.h>
38 38
39 39
40#define DRIVER_NAME "omap1-camera" 40#define DRIVER_NAME "omap1-camera"
41#define DRIVER_VERSION "0.0.2" 41#define DRIVER_VERSION "0.0.2"
42 42
43#define OMAP_DMA_CAMERA_IF_RX 20
43 44
44/* 45/*
45 * --------------------------------------------------------------------------- 46 * ---------------------------------------------------------------------------
diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c
index 546199e9ccc7..82e6c1e282d5 100644
--- a/drivers/media/rc/ir-rx51.c
+++ b/drivers/media/rc/ir-rx51.c
@@ -28,7 +28,6 @@
28 28
29#include <plat/dmtimer.h> 29#include <plat/dmtimer.h>
30#include <plat/clock.h> 30#include <plat/clock.h>
31#include <plat/omap-pm.h>
32 31
33#include <media/lirc.h> 32#include <media/lirc.h>
34#include <media/lirc_dev.h> 33#include <media/lirc_dev.h>
diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c
index 55d589981412..998ce8cb3065 100644
--- a/drivers/mfd/menelaus.c
+++ b/drivers/mfd/menelaus.c
@@ -41,11 +41,11 @@
41#include <linux/rtc.h> 41#include <linux/rtc.h>
42#include <linux/bcd.h> 42#include <linux/bcd.h>
43#include <linux/slab.h> 43#include <linux/slab.h>
44#include <linux/mfd/menelaus.h>
44 45
45#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
46 47
47#include <asm/gpio.h> 48#include <asm/gpio.h>
48#include <plat/menelaus.h>
49 49
50#define DRIVER_NAME "menelaus" 50#define DRIVER_NAME "menelaus"
51 51
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 23cec57c02ba..cebfe0a68aa7 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -26,9 +26,12 @@
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/usb.h> 29#include <linux/platform_device.h>
30#include <linux/platform_data/usb-omap.h>
30#include <linux/pm_runtime.h> 31#include <linux/pm_runtime.h>
31 32
33#include "omap-usb.h"
34
32#define USBHS_DRIVER_NAME "usbhs_omap" 35#define USBHS_DRIVER_NAME "usbhs_omap"
33#define OMAP_EHCI_DEVICE "ehci-omap" 36#define OMAP_EHCI_DEVICE "ehci-omap"
34#define OMAP_OHCI_DEVICE "ohci-omap3" 37#define OMAP_OHCI_DEVICE "ohci-omap3"
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 4b7757b84301..0db0dfa3d08c 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -25,8 +25,8 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <plat/usb.h>
29#include <linux/pm_runtime.h> 28#include <linux/pm_runtime.h>
29#include <linux/platform_data/usb-omap.h>
30 30
31#define USBTLL_DRIVER_NAME "usbhs_tll" 31#define USBTLL_DRIVER_NAME "usbhs_tll"
32 32
diff --git a/drivers/mfd/omap-usb.h b/drivers/mfd/omap-usb.h
new file mode 100644
index 000000000000..972aa961b064
--- /dev/null
+++ b/drivers/mfd/omap-usb.h
@@ -0,0 +1,2 @@
1extern int omap_tll_enable(void);
2extern int omap_tll_disable(void);
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 48ad361613ef..ae115c01283b 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -28,9 +28,8 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/scatterlist.h> 29#include <linux/scatterlist.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/platform_data/mmc-omap.h>
31 32
32#include <plat/mmc.h>
33#include <plat/dma.h>
34 33
35#define OMAP_MMC_REG_CMD 0x00 34#define OMAP_MMC_REG_CMD 0x00
36#define OMAP_MMC_REG_ARGL 0x01 35#define OMAP_MMC_REG_ARGL 0x01
@@ -72,6 +71,13 @@
72#define OMAP_MMC_STAT_CARD_BUSY (1 << 2) 71#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
73#define OMAP_MMC_STAT_END_OF_CMD (1 << 0) 72#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
74 73
74#define mmc_omap7xx() (host->features & MMC_OMAP7XX)
75#define mmc_omap15xx() (host->features & MMC_OMAP15XX)
76#define mmc_omap16xx() (host->features & MMC_OMAP16XX)
77#define MMC_OMAP1_MASK (MMC_OMAP7XX | MMC_OMAP15XX | MMC_OMAP16XX)
78#define mmc_omap1() (host->features & MMC_OMAP1_MASK)
79#define mmc_omap2() (!mmc_omap1())
80
75#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift) 81#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift)
76#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg)) 82#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
77#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg)) 83#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
@@ -84,6 +90,16 @@
84#define OMAP_MMC_CMDTYPE_AC 2 90#define OMAP_MMC_CMDTYPE_AC 2
85#define OMAP_MMC_CMDTYPE_ADTC 3 91#define OMAP_MMC_CMDTYPE_ADTC 3
86 92
93#define OMAP_DMA_MMC_TX 21
94#define OMAP_DMA_MMC_RX 22
95#define OMAP_DMA_MMC2_TX 54
96#define OMAP_DMA_MMC2_RX 55
97
98#define OMAP24XX_DMA_MMC2_TX 47
99#define OMAP24XX_DMA_MMC2_RX 48
100#define OMAP24XX_DMA_MMC1_TX 61
101#define OMAP24XX_DMA_MMC1_RX 62
102
87 103
88#define DRIVER_NAME "mmci-omap" 104#define DRIVER_NAME "mmci-omap"
89 105
@@ -147,6 +163,7 @@ struct mmc_omap_host {
147 u32 buffer_bytes_left; 163 u32 buffer_bytes_left;
148 u32 total_bytes_left; 164 u32 total_bytes_left;
149 165
166 unsigned features;
150 unsigned use_dma:1; 167 unsigned use_dma:1;
151 unsigned brs_received:1, dma_done:1; 168 unsigned brs_received:1, dma_done:1;
152 unsigned dma_in_use:1; 169 unsigned dma_in_use:1;
@@ -988,7 +1005,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
988 * blocksize is at least that large. Blocksize is 1005 * blocksize is at least that large. Blocksize is
989 * usually 512 bytes; but not for some SD reads. 1006 * usually 512 bytes; but not for some SD reads.
990 */ 1007 */
991 burst = cpu_is_omap15xx() ? 32 : 64; 1008 burst = mmc_omap15xx() ? 32 : 64;
992 if (burst > data->blksz) 1009 if (burst > data->blksz)
993 burst = data->blksz; 1010 burst = data->blksz;
994 1011
@@ -1104,8 +1121,7 @@ static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on,
1104 if (slot->pdata->set_power != NULL) 1121 if (slot->pdata->set_power != NULL)
1105 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on, 1122 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on,
1106 vdd); 1123 vdd);
1107 1124 if (mmc_omap2()) {
1108 if (cpu_is_omap24xx()) {
1109 u16 w; 1125 u16 w;
1110 1126
1111 if (power_on) { 1127 if (power_on) {
@@ -1239,7 +1255,7 @@ static int __devinit mmc_omap_new_slot(struct mmc_omap_host *host, int id)
1239 mmc->ops = &mmc_omap_ops; 1255 mmc->ops = &mmc_omap_ops;
1240 mmc->f_min = 400000; 1256 mmc->f_min = 400000;
1241 1257
1242 if (cpu_class_is_omap2()) 1258 if (mmc_omap2())
1243 mmc->f_max = 48000000; 1259 mmc->f_max = 48000000;
1244 else 1260 else
1245 mmc->f_max = 24000000; 1261 mmc->f_max = 24000000;
@@ -1359,6 +1375,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
1359 init_waitqueue_head(&host->slot_wq); 1375 init_waitqueue_head(&host->slot_wq);
1360 1376
1361 host->pdata = pdata; 1377 host->pdata = pdata;
1378 host->features = host->pdata->slots[0].features;
1362 host->dev = &pdev->dev; 1379 host->dev = &pdev->dev;
1363 platform_set_drvdata(pdev, host); 1380 platform_set_drvdata(pdev, host);
1364 1381
@@ -1391,7 +1408,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
1391 host->dma_tx_burst = -1; 1408 host->dma_tx_burst = -1;
1392 host->dma_rx_burst = -1; 1409 host->dma_rx_burst = -1;
1393 1410
1394 if (cpu_is_omap24xx()) 1411 if (mmc_omap2())
1395 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_TX : OMAP24XX_DMA_MMC2_TX; 1412 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_TX : OMAP24XX_DMA_MMC2_TX;
1396 else 1413 else
1397 sig = host->id == 0 ? OMAP_DMA_MMC_TX : OMAP_DMA_MMC2_TX; 1414 sig = host->id == 0 ? OMAP_DMA_MMC_TX : OMAP_DMA_MMC2_TX;
@@ -1407,7 +1424,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
1407 dev_warn(host->dev, "unable to obtain TX DMA engine channel %u\n", 1424 dev_warn(host->dev, "unable to obtain TX DMA engine channel %u\n",
1408 sig); 1425 sig);
1409#endif 1426#endif
1410 if (cpu_is_omap24xx()) 1427 if (mmc_omap2())
1411 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_RX : OMAP24XX_DMA_MMC2_RX; 1428 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_RX : OMAP24XX_DMA_MMC2_RX;
1412 else 1429 else
1413 sig = host->id == 0 ? OMAP_DMA_MMC_RX : OMAP_DMA_MMC2_RX; 1430 sig = host->id == 0 ? OMAP_DMA_MMC_RX : OMAP_DMA_MMC2_RX;
@@ -1435,7 +1452,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
1435 } 1452 }
1436 1453
1437 host->nr_slots = pdata->nr_slots; 1454 host->nr_slots = pdata->nr_slots;
1438 host->reg_shift = (cpu_is_omap7xx() ? 1 : 2); 1455 host->reg_shift = (mmc_omap7xx() ? 1 : 2);
1439 1456
1440 host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0); 1457 host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);
1441 if (!host->mmc_omap_wq) 1458 if (!host->mmc_omap_wq)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 54bfd0cc106b..9b24bd46aad3 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -38,9 +38,7 @@
38#include <linux/gpio.h> 38#include <linux/gpio.h>
39#include <linux/regulator/consumer.h> 39#include <linux/regulator/consumer.h>
40#include <linux/pm_runtime.h> 40#include <linux/pm_runtime.h>
41#include <mach/hardware.h> 41#include <linux/platform_data/mmc-omap.h>
42#include <plat/mmc.h>
43#include <plat/cpu.h>
44 42
45/* OMAP HSMMC Host Controller Registers */ 43/* OMAP HSMMC Host Controller Registers */
46#define OMAP_HSMMC_SYSSTATUS 0x0014 44#define OMAP_HSMMC_SYSSTATUS 0x0014
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b3138620646..5c8978e90240 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -27,8 +27,7 @@
27#include <linux/bch.h> 27#include <linux/bch.h>
28#endif 28#endif
29 29
30#include <plat/dma.h> 30#include <plat-omap/dma-omap.h>
31#include <plat/gpmc.h>
32#include <linux/platform_data/mtd-nand-omap2.h> 31#include <linux/platform_data/mtd-nand-omap2.h>
33 32
34#define DRIVER_NAME "omap2-nand" 33#define DRIVER_NAME "omap2-nand"
@@ -106,10 +105,18 @@
106#define CS_MASK 0x7 105#define CS_MASK 0x7
107#define ENABLE_PREFETCH (0x1 << 7) 106#define ENABLE_PREFETCH (0x1 << 7)
108#define DMA_MPU_MODE_SHIFT 2 107#define DMA_MPU_MODE_SHIFT 2
108#define ECCSIZE0_SHIFT 12
109#define ECCSIZE1_SHIFT 22 109#define ECCSIZE1_SHIFT 22
110#define ECC1RESULTSIZE 0x1 110#define ECC1RESULTSIZE 0x1
111#define ECCCLEAR 0x100 111#define ECCCLEAR 0x100
112#define ECC1 0x1 112#define ECC1 0x1
113#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
114#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
115#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
116#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
117#define STATUS_BUFF_EMPTY 0x00000001
118
119#define OMAP24XX_DMA_GPMC 4
113 120
114/* oob info generated runtime depending on ecc algorithm and layout selected */ 121/* oob info generated runtime depending on ecc algorithm and layout selected */
115static struct nand_ecclayout omap_oobinfo; 122static struct nand_ecclayout omap_oobinfo;
@@ -269,7 +276,7 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
269 /* wait until buffer is available for write */ 276 /* wait until buffer is available for write */
270 do { 277 do {
271 status = readl(info->reg.gpmc_status) & 278 status = readl(info->reg.gpmc_status) &
272 GPMC_STATUS_BUFF_EMPTY; 279 STATUS_BUFF_EMPTY;
273 } while (!status); 280 } while (!status);
274 } 281 }
275} 282}
@@ -307,7 +314,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
307 /* wait until buffer is available for write */ 314 /* wait until buffer is available for write */
308 do { 315 do {
309 status = readl(info->reg.gpmc_status) & 316 status = readl(info->reg.gpmc_status) &
310 GPMC_STATUS_BUFF_EMPTY; 317 STATUS_BUFF_EMPTY;
311 } while (!status); 318 } while (!status);
312 } 319 }
313} 320}
@@ -348,7 +355,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
348 } else { 355 } else {
349 do { 356 do {
350 r_count = readl(info->reg.gpmc_prefetch_status); 357 r_count = readl(info->reg.gpmc_prefetch_status);
351 r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count); 358 r_count = PREFETCH_STATUS_FIFO_CNT(r_count);
352 r_count = r_count >> 2; 359 r_count = r_count >> 2;
353 ioread32_rep(info->nand.IO_ADDR_R, p, r_count); 360 ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
354 p += r_count; 361 p += r_count;
@@ -395,7 +402,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
395 } else { 402 } else {
396 while (len) { 403 while (len) {
397 w_count = readl(info->reg.gpmc_prefetch_status); 404 w_count = readl(info->reg.gpmc_prefetch_status);
398 w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count); 405 w_count = PREFETCH_STATUS_FIFO_CNT(w_count);
399 w_count = w_count >> 1; 406 w_count = w_count >> 1;
400 for (i = 0; (i < w_count) && len; i++, len -= 2) 407 for (i = 0; (i < w_count) && len; i++, len -= 2)
401 iowrite16(*p++, info->nand.IO_ADDR_W); 408 iowrite16(*p++, info->nand.IO_ADDR_W);
@@ -407,7 +414,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
407 do { 414 do {
408 cpu_relax(); 415 cpu_relax();
409 val = readl(info->reg.gpmc_prefetch_status); 416 val = readl(info->reg.gpmc_prefetch_status);
410 val = GPMC_PREFETCH_STATUS_COUNT(val); 417 val = PREFETCH_STATUS_COUNT(val);
411 } while (val && (tim++ < limit)); 418 } while (val && (tim++ < limit));
412 419
413 /* disable and stop the PFPW engine */ 420 /* disable and stop the PFPW engine */
@@ -493,7 +500,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
493 do { 500 do {
494 cpu_relax(); 501 cpu_relax();
495 val = readl(info->reg.gpmc_prefetch_status); 502 val = readl(info->reg.gpmc_prefetch_status);
496 val = GPMC_PREFETCH_STATUS_COUNT(val); 503 val = PREFETCH_STATUS_COUNT(val);
497 } while (val && (tim++ < limit)); 504 } while (val && (tim++ < limit));
498 505
499 /* disable and stop the PFPW engine */ 506 /* disable and stop the PFPW engine */
@@ -556,7 +563,7 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
556 u32 bytes; 563 u32 bytes;
557 564
558 bytes = readl(info->reg.gpmc_prefetch_status); 565 bytes = readl(info->reg.gpmc_prefetch_status);
559 bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes); 566 bytes = PREFETCH_STATUS_FIFO_CNT(bytes);
560 bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */ 567 bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */
561 if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */ 568 if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
562 if (this_irq == info->gpmc_irq_count) 569 if (this_irq == info->gpmc_irq_count)
@@ -682,7 +689,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
682 limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS)); 689 limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
683 do { 690 do {
684 val = readl(info->reg.gpmc_prefetch_status); 691 val = readl(info->reg.gpmc_prefetch_status);
685 val = GPMC_PREFETCH_STATUS_COUNT(val); 692 val = PREFETCH_STATUS_COUNT(val);
686 cpu_relax(); 693 cpu_relax();
687 } while (val && (tim++ < limit)); 694 } while (val && (tim++ < limit));
688 695
@@ -996,7 +1003,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
996 cond_resched(); 1003 cond_resched();
997 } 1004 }
998 1005
999 status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA); 1006 status = readb(info->reg.gpmc_nand_data);
1000 return status; 1007 return status;
1001} 1008}
1002 1009
@@ -1029,19 +1036,45 @@ static int omap_dev_ready(struct mtd_info *mtd)
1029static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode) 1036static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
1030{ 1037{
1031 int nerrors; 1038 int nerrors;
1032 unsigned int dev_width; 1039 unsigned int dev_width, nsectors;
1033 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, 1040 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
1034 mtd); 1041 mtd);
1035 struct nand_chip *chip = mtd->priv; 1042 struct nand_chip *chip = mtd->priv;
1043 u32 val;
1036 1044
1037 nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4; 1045 nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
1038 dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0; 1046 dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
1047 nsectors = 1;
1039 /* 1048 /*
1040 * Program GPMC to perform correction on one 512-byte sector at a time. 1049 * Program GPMC to perform correction on one 512-byte sector at a time.
1041 * Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and 1050 * Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and
1042 * gives a slight (5%) performance gain (but requires additional code). 1051 * gives a slight (5%) performance gain (but requires additional code).
1043 */ 1052 */
1044 (void)gpmc_enable_hwecc_bch(info->gpmc_cs, mode, dev_width, 1, nerrors); 1053
1054 writel(ECC1, info->reg.gpmc_ecc_control);
1055
1056 /*
1057 * When using BCH, sector size is hardcoded to 512 bytes.
1058 * Here we are using wrapping mode 6 both for reading and writing, with:
1059 * size0 = 0 (no additional protected byte in spare area)
1060 * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
1061 */
1062 val = (32 << ECCSIZE1_SHIFT) | (0 << ECCSIZE0_SHIFT);
1063 writel(val, info->reg.gpmc_ecc_size_config);
1064
1065 /* BCH configuration */
1066 val = ((1 << 16) | /* enable BCH */
1067 (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
1068 (0x06 << 8) | /* wrap mode = 6 */
1069 (dev_width << 7) | /* bus width */
1070 (((nsectors-1) & 0x7) << 4) | /* number of sectors */
1071 (info->gpmc_cs << 1) | /* ECC CS */
1072 (0x1)); /* enable ECC */
1073
1074 writel(val, info->reg.gpmc_ecc_config);
1075
1076 /* clear ecc and enable bits */
1077 writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
1045} 1078}
1046 1079
1047/** 1080/**
@@ -1055,7 +1088,32 @@ static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,
1055{ 1088{
1056 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, 1089 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
1057 mtd); 1090 mtd);
1058 return gpmc_calculate_ecc_bch4(info->gpmc_cs, dat, ecc_code); 1091 unsigned long nsectors, val1, val2;
1092 int i;
1093
1094 nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
1095
1096 for (i = 0; i < nsectors; i++) {
1097
1098 /* Read hw-computed remainder */
1099 val1 = readl(info->reg.gpmc_bch_result0[i]);
1100 val2 = readl(info->reg.gpmc_bch_result1[i]);
1101
1102 /*
1103 * Add constant polynomial to remainder, in order to get an ecc
1104 * sequence of 0xFFs for a buffer filled with 0xFFs; and
1105 * left-justify the resulting polynomial.
1106 */
1107 *ecc_code++ = 0x28 ^ ((val2 >> 12) & 0xFF);
1108 *ecc_code++ = 0x13 ^ ((val2 >> 4) & 0xFF);
1109 *ecc_code++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
1110 *ecc_code++ = 0x39 ^ ((val1 >> 20) & 0xFF);
1111 *ecc_code++ = 0x96 ^ ((val1 >> 12) & 0xFF);
1112 *ecc_code++ = 0xac ^ ((val1 >> 4) & 0xFF);
1113 *ecc_code++ = 0x7f ^ ((val1 & 0xF) << 4);
1114 }
1115
1116 return 0;
1059} 1117}
1060 1118
1061/** 1119/**
@@ -1069,7 +1127,39 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
1069{ 1127{
1070 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, 1128 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
1071 mtd); 1129 mtd);
1072 return gpmc_calculate_ecc_bch8(info->gpmc_cs, dat, ecc_code); 1130 unsigned long nsectors, val1, val2, val3, val4;
1131 int i;
1132
1133 nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
1134
1135 for (i = 0; i < nsectors; i++) {
1136
1137 /* Read hw-computed remainder */
1138 val1 = readl(info->reg.gpmc_bch_result0[i]);
1139 val2 = readl(info->reg.gpmc_bch_result1[i]);
1140 val3 = readl(info->reg.gpmc_bch_result2[i]);
1141 val4 = readl(info->reg.gpmc_bch_result3[i]);
1142
1143 /*
1144 * Add constant polynomial to remainder, in order to get an ecc
1145 * sequence of 0xFFs for a buffer filled with 0xFFs.
1146 */
1147 *ecc_code++ = 0xef ^ (val4 & 0xFF);
1148 *ecc_code++ = 0x51 ^ ((val3 >> 24) & 0xFF);
1149 *ecc_code++ = 0x2e ^ ((val3 >> 16) & 0xFF);
1150 *ecc_code++ = 0x09 ^ ((val3 >> 8) & 0xFF);
1151 *ecc_code++ = 0xed ^ (val3 & 0xFF);
1152 *ecc_code++ = 0x93 ^ ((val2 >> 24) & 0xFF);
1153 *ecc_code++ = 0x9a ^ ((val2 >> 16) & 0xFF);
1154 *ecc_code++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
1155 *ecc_code++ = 0x97 ^ (val2 & 0xFF);
1156 *ecc_code++ = 0x79 ^ ((val1 >> 24) & 0xFF);
1157 *ecc_code++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
1158 *ecc_code++ = 0x24 ^ ((val1 >> 8) & 0xFF);
1159 *ecc_code++ = 0xb5 ^ (val1 & 0xFF);
1160 }
1161
1162 return 0;
1073} 1163}
1074 1164
1075/** 1165/**
@@ -1125,7 +1215,7 @@ static void omap3_free_bch(struct mtd_info *mtd)
1125 */ 1215 */
1126static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt) 1216static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
1127{ 1217{
1128 int ret, max_errors; 1218 int max_errors;
1129 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, 1219 struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
1130 mtd); 1220 mtd);
1131#ifdef CONFIG_MTD_NAND_OMAP_BCH8 1221#ifdef CONFIG_MTD_NAND_OMAP_BCH8
@@ -1142,11 +1232,6 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
1142 goto fail; 1232 goto fail;
1143 } 1233 }
1144 1234
1145 /* initialize GPMC BCH engine */
1146 ret = gpmc_init_hwecc_bch(info->gpmc_cs, 1, max_errors);
1147 if (ret)
1148 goto fail;
1149
1150 /* software bch library is only used to detect and locate errors */ 1235 /* software bch library is only used to detect and locate errors */
1151 info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */); 1236 info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
1152 if (!info->bch) 1237 if (!info->bch)
@@ -1513,7 +1598,7 @@ static int omap_nand_remove(struct platform_device *pdev)
1513 /* Release NAND device, its internal structures and partitions */ 1598 /* Release NAND device, its internal structures and partitions */
1514 nand_release(&info->mtd); 1599 nand_release(&info->mtd);
1515 iounmap(info->nand.IO_ADDR_R); 1600 iounmap(info->nand.IO_ADDR_R);
1516 release_mem_region(info->phys_base, NAND_IO_SIZE); 1601 release_mem_region(info->phys_base, info->mem_size);
1517 kfree(info); 1602 kfree(info);
1518 return 0; 1603 return 0;
1519} 1604}
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 1961be985171..99f96e19ebea 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -38,12 +38,10 @@
38#include <linux/regulator/consumer.h> 38#include <linux/regulator/consumer.h>
39 39
40#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
41#include <plat/gpmc.h>
42#include <linux/platform_data/mtd-onenand-omap2.h> 41#include <linux/platform_data/mtd-onenand-omap2.h>
43#include <asm/gpio.h> 42#include <asm/gpio.h>
44 43
45#include <plat/dma.h> 44#include <plat-omap/dma-omap.h>
46#include <plat/cpu.h>
47 45
48#define DRIVER_NAME "omap2-onenand" 46#define DRIVER_NAME "omap2-onenand"
49 47
@@ -63,6 +61,7 @@ struct omap2_onenand {
63 int freq; 61 int freq;
64 int (*setup)(void __iomem *base, int *freq_ptr); 62 int (*setup)(void __iomem *base, int *freq_ptr);
65 struct regulator *regulator; 63 struct regulator *regulator;
64 u8 flags;
66}; 65};
67 66
68static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data) 67static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data)
@@ -155,7 +154,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
155 if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) { 154 if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) {
156 syscfg |= ONENAND_SYS_CFG1_IOBE; 155 syscfg |= ONENAND_SYS_CFG1_IOBE;
157 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1); 156 write_reg(c, syscfg, ONENAND_REG_SYS_CFG1);
158 if (cpu_is_omap34xx()) 157 if (c->flags & ONENAND_IN_OMAP34XX)
159 /* Add a delay to let GPIO settle */ 158 /* Add a delay to let GPIO settle */
160 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); 159 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
161 } 160 }
@@ -446,13 +445,19 @@ out_copy:
446 445
447#else 446#else
448 447
449int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area, 448static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
450 unsigned char *buffer, int offset, 449 unsigned char *buffer, int offset,
451 size_t count); 450 size_t count)
451{
452 return -ENOSYS;
453}
452 454
453int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area, 455static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
454 const unsigned char *buffer, 456 const unsigned char *buffer,
455 int offset, size_t count); 457 int offset, size_t count)
458{
459 return -ENOSYS;
460}
456 461
457#endif 462#endif
458 463
@@ -550,13 +555,19 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
550 555
551#else 556#else
552 557
553int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area, 558static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
554 unsigned char *buffer, int offset, 559 unsigned char *buffer, int offset,
555 size_t count); 560 size_t count)
561{
562 return -ENOSYS;
563}
556 564
557int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area, 565static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
558 const unsigned char *buffer, 566 const unsigned char *buffer,
559 int offset, size_t count); 567 int offset, size_t count)
568{
569 return -ENOSYS;
570}
560 571
561#endif 572#endif
562 573
@@ -639,6 +650,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
639 650
640 init_completion(&c->irq_done); 651 init_completion(&c->irq_done);
641 init_completion(&c->dma_done); 652 init_completion(&c->dma_done);
653 c->flags = pdata->flags;
642 c->gpmc_cs = pdata->cs; 654 c->gpmc_cs = pdata->cs;
643 c->gpio_irq = pdata->gpio_irq; 655 c->gpio_irq = pdata->gpio_irq;
644 c->dma_channel = pdata->dma_channel; 656 c->dma_channel = pdata->dma_channel;
@@ -729,7 +741,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
729 this = &c->onenand; 741 this = &c->onenand;
730 if (c->dma_channel >= 0) { 742 if (c->dma_channel >= 0) {
731 this->wait = omap2_onenand_wait; 743 this->wait = omap2_onenand_wait;
732 if (cpu_is_omap34xx()) { 744 if (c->flags & ONENAND_IN_OMAP34XX) {
733 this->read_bufferram = omap3_onenand_read_bufferram; 745 this->read_bufferram = omap3_onenand_read_bufferram;
734 this->write_bufferram = omap3_onenand_write_bufferram; 746 this->write_bufferram = omap3_onenand_write_bufferram;
735 } else { 747 } else {
@@ -803,7 +815,6 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
803 } 815 }
804 iounmap(c->onenand.base); 816 iounmap(c->onenand.base);
805 release_mem_region(c->phys_base, c->mem_size); 817 release_mem_region(c->phys_base, c->mem_size);
806 gpmc_cs_free(c->gpmc_cs);
807 kfree(c); 818 kfree(c);
808 819
809 return 0; 820 return 0;
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c
index fa74efe82206..25c4b1993b3d 100644
--- a/drivers/pcmcia/omap_cf.c
+++ b/drivers/pcmcia/omap_cf.c
@@ -25,7 +25,7 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27#include <mach/mux.h> 27#include <mach/mux.h>
28#include <plat/tc.h> 28#include <mach/tc.h>
29 29
30 30
31/* NOTE: don't expect this to support many I/O cards. The 16xx chips have 31/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
diff --git a/drivers/staging/tidspbridge/include/dspbridge/host_os.h b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
index 5e2f4d82d925..7f3a1db31619 100644
--- a/drivers/staging/tidspbridge/include/dspbridge/host_os.h
+++ b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
@@ -40,7 +40,6 @@
40#include <linux/vmalloc.h> 40#include <linux/vmalloc.h>
41#include <linux/ioport.h> 41#include <linux/ioport.h>
42#include <linux/platform_device.h> 42#include <linux/platform_device.h>
43#include <plat/clock.h>
44#include <linux/clk.h> 43#include <linux/clk.h>
45#include <plat/mailbox.h> 44#include <plat/mailbox.h>
46#include <linux/pagemap.h> 45#include <linux/pagemap.h>
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 8c0b7b42319c..60b076cc4e20 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -73,10 +73,42 @@
73#define ECHO_OP_SET_CANON_COL 0x81 73#define ECHO_OP_SET_CANON_COL 0x81
74#define ECHO_OP_ERASE_TAB 0x82 74#define ECHO_OP_ERASE_TAB 0x82
75 75
76struct n_tty_data {
77 unsigned int column;
78 unsigned long overrun_time;
79 int num_overrun;
80
81 unsigned char lnext:1, erasing:1, raw:1, real_raw:1, icanon:1;
82 unsigned char echo_overrun:1;
83
84 DECLARE_BITMAP(process_char_map, 256);
85 DECLARE_BITMAP(read_flags, N_TTY_BUF_SIZE);
86
87 char *read_buf;
88 int read_head;
89 int read_tail;
90 int read_cnt;
91
92 unsigned char *echo_buf;
93 unsigned int echo_pos;
94 unsigned int echo_cnt;
95
96 int canon_data;
97 unsigned long canon_head;
98 unsigned int canon_column;
99
100 struct mutex atomic_read_lock;
101 struct mutex output_lock;
102 struct mutex echo_lock;
103 spinlock_t read_lock;
104};
105
76static inline int tty_put_user(struct tty_struct *tty, unsigned char x, 106static inline int tty_put_user(struct tty_struct *tty, unsigned char x,
77 unsigned char __user *ptr) 107 unsigned char __user *ptr)
78{ 108{
79 tty_audit_add_data(tty, &x, 1); 109 struct n_tty_data *ldata = tty->disc_data;
110
111 tty_audit_add_data(tty, &x, 1, ldata->icanon);
80 return put_user(x, ptr); 112 return put_user(x, ptr);
81} 113}
82 114
@@ -92,17 +124,18 @@ static inline int tty_put_user(struct tty_struct *tty, unsigned char x,
92 124
93static void n_tty_set_room(struct tty_struct *tty) 125static void n_tty_set_room(struct tty_struct *tty)
94{ 126{
127 struct n_tty_data *ldata = tty->disc_data;
95 int left; 128 int left;
96 int old_left; 129 int old_left;
97 130
98 /* tty->read_cnt is not read locked ? */ 131 /* ldata->read_cnt is not read locked ? */
99 if (I_PARMRK(tty)) { 132 if (I_PARMRK(tty)) {
100 /* Multiply read_cnt by 3, since each byte might take up to 133 /* Multiply read_cnt by 3, since each byte might take up to
101 * three times as many spaces when PARMRK is set (depending on 134 * three times as many spaces when PARMRK is set (depending on
102 * its flags, e.g. parity error). */ 135 * its flags, e.g. parity error). */
103 left = N_TTY_BUF_SIZE - tty->read_cnt * 3 - 1; 136 left = N_TTY_BUF_SIZE - ldata->read_cnt * 3 - 1;
104 } else 137 } else
105 left = N_TTY_BUF_SIZE - tty->read_cnt - 1; 138 left = N_TTY_BUF_SIZE - ldata->read_cnt - 1;
106 139
107 /* 140 /*
108 * If we are doing input canonicalization, and there are no 141 * If we are doing input canonicalization, and there are no
@@ -111,44 +144,47 @@ static void n_tty_set_room(struct tty_struct *tty)
111 * characters will be beeped. 144 * characters will be beeped.
112 */ 145 */
113 if (left <= 0) 146 if (left <= 0)
114 left = tty->icanon && !tty->canon_data; 147 left = ldata->icanon && !ldata->canon_data;
115 old_left = tty->receive_room; 148 old_left = tty->receive_room;
116 tty->receive_room = left; 149 tty->receive_room = left;
117 150
118 /* Did this open up the receive buffer? We may need to flip */ 151 /* Did this open up the receive buffer? We may need to flip */
119 if (left && !old_left) 152 if (left && !old_left) {
120 schedule_work(&tty->buf.work); 153 WARN_RATELIMIT(tty->port->itty == NULL,
154 "scheduling with invalid itty");
155 schedule_work(&tty->port->buf.work);
156 }
121} 157}
122 158
123static void put_tty_queue_nolock(unsigned char c, struct tty_struct *tty) 159static void put_tty_queue_nolock(unsigned char c, struct n_tty_data *ldata)
124{ 160{
125 if (tty->read_cnt < N_TTY_BUF_SIZE) { 161 if (ldata->read_cnt < N_TTY_BUF_SIZE) {
126 tty->read_buf[tty->read_head] = c; 162 ldata->read_buf[ldata->read_head] = c;
127 tty->read_head = (tty->read_head + 1) & (N_TTY_BUF_SIZE-1); 163 ldata->read_head = (ldata->read_head + 1) & (N_TTY_BUF_SIZE-1);
128 tty->read_cnt++; 164 ldata->read_cnt++;
129 } 165 }
130} 166}
131 167
132/** 168/**
133 * put_tty_queue - add character to tty 169 * put_tty_queue - add character to tty
134 * @c: character 170 * @c: character
135 * @tty: tty device 171 * @ldata: n_tty data
136 * 172 *
137 * Add a character to the tty read_buf queue. This is done under the 173 * Add a character to the tty read_buf queue. This is done under the
138 * read_lock to serialize character addition and also to protect us 174 * read_lock to serialize character addition and also to protect us
139 * against parallel reads or flushes 175 * against parallel reads or flushes
140 */ 176 */
141 177
142static void put_tty_queue(unsigned char c, struct tty_struct *tty) 178static void put_tty_queue(unsigned char c, struct n_tty_data *ldata)
143{ 179{
144 unsigned long flags; 180 unsigned long flags;
145 /* 181 /*
146 * The problem of stomping on the buffers ends here. 182 * The problem of stomping on the buffers ends here.
147 * Why didn't anyone see this one coming? --AJK 183 * Why didn't anyone see this one coming? --AJK
148 */ 184 */
149 spin_lock_irqsave(&tty->read_lock, flags); 185 spin_lock_irqsave(&ldata->read_lock, flags);
150 put_tty_queue_nolock(c, tty); 186 put_tty_queue_nolock(c, ldata);
151 spin_unlock_irqrestore(&tty->read_lock, flags); 187 spin_unlock_irqrestore(&ldata->read_lock, flags);
152} 188}
153 189
154/** 190/**
@@ -179,18 +215,19 @@ static void check_unthrottle(struct tty_struct *tty)
179 215
180static void reset_buffer_flags(struct tty_struct *tty) 216static void reset_buffer_flags(struct tty_struct *tty)
181{ 217{
218 struct n_tty_data *ldata = tty->disc_data;
182 unsigned long flags; 219 unsigned long flags;
183 220
184 spin_lock_irqsave(&tty->read_lock, flags); 221 spin_lock_irqsave(&ldata->read_lock, flags);
185 tty->read_head = tty->read_tail = tty->read_cnt = 0; 222 ldata->read_head = ldata->read_tail = ldata->read_cnt = 0;
186 spin_unlock_irqrestore(&tty->read_lock, flags); 223 spin_unlock_irqrestore(&ldata->read_lock, flags);
187 224
188 mutex_lock(&tty->echo_lock); 225 mutex_lock(&ldata->echo_lock);
189 tty->echo_pos = tty->echo_cnt = tty->echo_overrun = 0; 226 ldata->echo_pos = ldata->echo_cnt = ldata->echo_overrun = 0;
190 mutex_unlock(&tty->echo_lock); 227 mutex_unlock(&ldata->echo_lock);
191 228
192 tty->canon_head = tty->canon_data = tty->erasing = 0; 229 ldata->canon_head = ldata->canon_data = ldata->erasing = 0;
193 memset(&tty->read_flags, 0, sizeof tty->read_flags); 230 bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
194 n_tty_set_room(tty); 231 n_tty_set_room(tty);
195} 232}
196 233
@@ -235,18 +272,19 @@ static void n_tty_flush_buffer(struct tty_struct *tty)
235 272
236static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty) 273static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty)
237{ 274{
275 struct n_tty_data *ldata = tty->disc_data;
238 unsigned long flags; 276 unsigned long flags;
239 ssize_t n = 0; 277 ssize_t n = 0;
240 278
241 spin_lock_irqsave(&tty->read_lock, flags); 279 spin_lock_irqsave(&ldata->read_lock, flags);
242 if (!tty->icanon) { 280 if (!ldata->icanon) {
243 n = tty->read_cnt; 281 n = ldata->read_cnt;
244 } else if (tty->canon_data) { 282 } else if (ldata->canon_data) {
245 n = (tty->canon_head > tty->read_tail) ? 283 n = (ldata->canon_head > ldata->read_tail) ?
246 tty->canon_head - tty->read_tail : 284 ldata->canon_head - ldata->read_tail :
247 tty->canon_head + (N_TTY_BUF_SIZE - tty->read_tail); 285 ldata->canon_head + (N_TTY_BUF_SIZE - ldata->read_tail);
248 } 286 }
249 spin_unlock_irqrestore(&tty->read_lock, flags); 287 spin_unlock_irqrestore(&ldata->read_lock, flags);
250 return n; 288 return n;
251} 289}
252 290
@@ -301,6 +339,7 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty)
301 339
302static int do_output_char(unsigned char c, struct tty_struct *tty, int space) 340static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
303{ 341{
342 struct n_tty_data *ldata = tty->disc_data;
304 int spaces; 343 int spaces;
305 344
306 if (!space) 345 if (!space)
@@ -309,48 +348,48 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
309 switch (c) { 348 switch (c) {
310 case '\n': 349 case '\n':
311 if (O_ONLRET(tty)) 350 if (O_ONLRET(tty))
312 tty->column = 0; 351 ldata->column = 0;
313 if (O_ONLCR(tty)) { 352 if (O_ONLCR(tty)) {
314 if (space < 2) 353 if (space < 2)
315 return -1; 354 return -1;
316 tty->canon_column = tty->column = 0; 355 ldata->canon_column = ldata->column = 0;
317 tty->ops->write(tty, "\r\n", 2); 356 tty->ops->write(tty, "\r\n", 2);
318 return 2; 357 return 2;
319 } 358 }
320 tty->canon_column = tty->column; 359 ldata->canon_column = ldata->column;
321 break; 360 break;
322 case '\r': 361 case '\r':
323 if (O_ONOCR(tty) && tty->column == 0) 362 if (O_ONOCR(tty) && ldata->column == 0)
324 return 0; 363 return 0;
325 if (O_OCRNL(tty)) { 364 if (O_OCRNL(tty)) {
326 c = '\n'; 365 c = '\n';
327 if (O_ONLRET(tty)) 366 if (O_ONLRET(tty))
328 tty->canon_column = tty->column = 0; 367 ldata->canon_column = ldata->column = 0;
329 break; 368 break;
330 } 369 }
331 tty->canon_column = tty->column = 0; 370 ldata->canon_column = ldata->column = 0;
332 break; 371 break;
333 case '\t': 372 case '\t':
334 spaces = 8 - (tty->column & 7); 373 spaces = 8 - (ldata->column & 7);
335 if (O_TABDLY(tty) == XTABS) { 374 if (O_TABDLY(tty) == XTABS) {
336 if (space < spaces) 375 if (space < spaces)
337 return -1; 376 return -1;
338 tty->column += spaces; 377 ldata->column += spaces;
339 tty->ops->write(tty, " ", spaces); 378 tty->ops->write(tty, " ", spaces);
340 return spaces; 379 return spaces;
341 } 380 }
342 tty->column += spaces; 381 ldata->column += spaces;
343 break; 382 break;
344 case '\b': 383 case '\b':
345 if (tty->column > 0) 384 if (ldata->column > 0)
346 tty->column--; 385 ldata->column--;
347 break; 386 break;
348 default: 387 default:
349 if (!iscntrl(c)) { 388 if (!iscntrl(c)) {
350 if (O_OLCUC(tty)) 389 if (O_OLCUC(tty))
351 c = toupper(c); 390 c = toupper(c);
352 if (!is_continuation(c, tty)) 391 if (!is_continuation(c, tty))
353 tty->column++; 392 ldata->column++;
354 } 393 }
355 break; 394 break;
356 } 395 }
@@ -375,14 +414,15 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
375 414
376static int process_output(unsigned char c, struct tty_struct *tty) 415static int process_output(unsigned char c, struct tty_struct *tty)
377{ 416{
417 struct n_tty_data *ldata = tty->disc_data;
378 int space, retval; 418 int space, retval;
379 419
380 mutex_lock(&tty->output_lock); 420 mutex_lock(&ldata->output_lock);
381 421
382 space = tty_write_room(tty); 422 space = tty_write_room(tty);
383 retval = do_output_char(c, tty, space); 423 retval = do_output_char(c, tty, space);
384 424
385 mutex_unlock(&tty->output_lock); 425 mutex_unlock(&ldata->output_lock);
386 if (retval < 0) 426 if (retval < 0)
387 return -1; 427 return -1;
388 else 428 else
@@ -411,15 +451,16 @@ static int process_output(unsigned char c, struct tty_struct *tty)
411static ssize_t process_output_block(struct tty_struct *tty, 451static ssize_t process_output_block(struct tty_struct *tty,
412 const unsigned char *buf, unsigned int nr) 452 const unsigned char *buf, unsigned int nr)
413{ 453{
454 struct n_tty_data *ldata = tty->disc_data;
414 int space; 455 int space;
415 int i; 456 int i;
416 const unsigned char *cp; 457 const unsigned char *cp;
417 458
418 mutex_lock(&tty->output_lock); 459 mutex_lock(&ldata->output_lock);
419 460
420 space = tty_write_room(tty); 461 space = tty_write_room(tty);
421 if (!space) { 462 if (!space) {
422 mutex_unlock(&tty->output_lock); 463 mutex_unlock(&ldata->output_lock);
423 return 0; 464 return 0;
424 } 465 }
425 if (nr > space) 466 if (nr > space)
@@ -431,30 +472,30 @@ static ssize_t process_output_block(struct tty_struct *tty,
431 switch (c) { 472 switch (c) {
432 case '\n': 473 case '\n':
433 if (O_ONLRET(tty)) 474 if (O_ONLRET(tty))
434 tty->column = 0; 475 ldata->column = 0;
435 if (O_ONLCR(tty)) 476 if (O_ONLCR(tty))
436 goto break_out; 477 goto break_out;
437 tty->canon_column = tty->column; 478 ldata->canon_column = ldata->column;
438 break; 479 break;
439 case '\r': 480 case '\r':
440 if (O_ONOCR(tty) && tty->column == 0) 481 if (O_ONOCR(tty) && ldata->column == 0)
441 goto break_out; 482 goto break_out;
442 if (O_OCRNL(tty)) 483 if (O_OCRNL(tty))
443 goto break_out; 484 goto break_out;
444 tty->canon_column = tty->column = 0; 485 ldata->canon_column = ldata->column = 0;
445 break; 486 break;
446 case '\t': 487 case '\t':
447 goto break_out; 488 goto break_out;
448 case '\b': 489 case '\b':
449 if (tty->column > 0) 490 if (ldata->column > 0)
450 tty->column--; 491 ldata->column--;
451 break; 492 break;
452 default: 493 default:
453 if (!iscntrl(c)) { 494 if (!iscntrl(c)) {
454 if (O_OLCUC(tty)) 495 if (O_OLCUC(tty))
455 goto break_out; 496 goto break_out;
456 if (!is_continuation(c, tty)) 497 if (!is_continuation(c, tty))
457 tty->column++; 498 ldata->column++;
458 } 499 }
459 break; 500 break;
460 } 501 }
@@ -462,7 +503,7 @@ static ssize_t process_output_block(struct tty_struct *tty,
462break_out: 503break_out:
463 i = tty->ops->write(tty, buf, i); 504 i = tty->ops->write(tty, buf, i);
464 505
465 mutex_unlock(&tty->output_lock); 506 mutex_unlock(&ldata->output_lock);
466 return i; 507 return i;
467} 508}
468 509
@@ -494,21 +535,22 @@ break_out:
494 535
495static void process_echoes(struct tty_struct *tty) 536static void process_echoes(struct tty_struct *tty)
496{ 537{
538 struct n_tty_data *ldata = tty->disc_data;
497 int space, nr; 539 int space, nr;
498 unsigned char c; 540 unsigned char c;
499 unsigned char *cp, *buf_end; 541 unsigned char *cp, *buf_end;
500 542
501 if (!tty->echo_cnt) 543 if (!ldata->echo_cnt)
502 return; 544 return;
503 545
504 mutex_lock(&tty->output_lock); 546 mutex_lock(&ldata->output_lock);
505 mutex_lock(&tty->echo_lock); 547 mutex_lock(&ldata->echo_lock);
506 548
507 space = tty_write_room(tty); 549 space = tty_write_room(tty);
508 550
509 buf_end = tty->echo_buf + N_TTY_BUF_SIZE; 551 buf_end = ldata->echo_buf + N_TTY_BUF_SIZE;
510 cp = tty->echo_buf + tty->echo_pos; 552 cp = ldata->echo_buf + ldata->echo_pos;
511 nr = tty->echo_cnt; 553 nr = ldata->echo_cnt;
512 while (nr > 0) { 554 while (nr > 0) {
513 c = *cp; 555 c = *cp;
514 if (c == ECHO_OP_START) { 556 if (c == ECHO_OP_START) {
@@ -545,7 +587,7 @@ static void process_echoes(struct tty_struct *tty)
545 * Otherwise, tab spacing is normal. 587 * Otherwise, tab spacing is normal.
546 */ 588 */
547 if (!(num_chars & 0x80)) 589 if (!(num_chars & 0x80))
548 num_chars += tty->canon_column; 590 num_chars += ldata->canon_column;
549 num_bs = 8 - (num_chars & 7); 591 num_bs = 8 - (num_chars & 7);
550 592
551 if (num_bs > space) { 593 if (num_bs > space) {
@@ -555,22 +597,22 @@ static void process_echoes(struct tty_struct *tty)
555 space -= num_bs; 597 space -= num_bs;
556 while (num_bs--) { 598 while (num_bs--) {
557 tty_put_char(tty, '\b'); 599 tty_put_char(tty, '\b');
558 if (tty->column > 0) 600 if (ldata->column > 0)
559 tty->column--; 601 ldata->column--;
560 } 602 }
561 cp += 3; 603 cp += 3;
562 nr -= 3; 604 nr -= 3;
563 break; 605 break;
564 606
565 case ECHO_OP_SET_CANON_COL: 607 case ECHO_OP_SET_CANON_COL:
566 tty->canon_column = tty->column; 608 ldata->canon_column = ldata->column;
567 cp += 2; 609 cp += 2;
568 nr -= 2; 610 nr -= 2;
569 break; 611 break;
570 612
571 case ECHO_OP_MOVE_BACK_COL: 613 case ECHO_OP_MOVE_BACK_COL:
572 if (tty->column > 0) 614 if (ldata->column > 0)
573 tty->column--; 615 ldata->column--;
574 cp += 2; 616 cp += 2;
575 nr -= 2; 617 nr -= 2;
576 break; 618 break;
@@ -582,7 +624,7 @@ static void process_echoes(struct tty_struct *tty)
582 break; 624 break;
583 } 625 }
584 tty_put_char(tty, ECHO_OP_START); 626 tty_put_char(tty, ECHO_OP_START);
585 tty->column++; 627 ldata->column++;
586 space--; 628 space--;
587 cp += 2; 629 cp += 2;
588 nr -= 2; 630 nr -= 2;
@@ -604,7 +646,7 @@ static void process_echoes(struct tty_struct *tty)
604 } 646 }
605 tty_put_char(tty, '^'); 647 tty_put_char(tty, '^');
606 tty_put_char(tty, op ^ 0100); 648 tty_put_char(tty, op ^ 0100);
607 tty->column += 2; 649 ldata->column += 2;
608 space -= 2; 650 space -= 2;
609 cp += 2; 651 cp += 2;
610 nr -= 2; 652 nr -= 2;
@@ -635,20 +677,20 @@ static void process_echoes(struct tty_struct *tty)
635 } 677 }
636 678
637 if (nr == 0) { 679 if (nr == 0) {
638 tty->echo_pos = 0; 680 ldata->echo_pos = 0;
639 tty->echo_cnt = 0; 681 ldata->echo_cnt = 0;
640 tty->echo_overrun = 0; 682 ldata->echo_overrun = 0;
641 } else { 683 } else {
642 int num_processed = tty->echo_cnt - nr; 684 int num_processed = ldata->echo_cnt - nr;
643 tty->echo_pos += num_processed; 685 ldata->echo_pos += num_processed;
644 tty->echo_pos &= N_TTY_BUF_SIZE - 1; 686 ldata->echo_pos &= N_TTY_BUF_SIZE - 1;
645 tty->echo_cnt = nr; 687 ldata->echo_cnt = nr;
646 if (num_processed > 0) 688 if (num_processed > 0)
647 tty->echo_overrun = 0; 689 ldata->echo_overrun = 0;
648 } 690 }
649 691
650 mutex_unlock(&tty->echo_lock); 692 mutex_unlock(&ldata->echo_lock);
651 mutex_unlock(&tty->output_lock); 693 mutex_unlock(&ldata->output_lock);
652 694
653 if (tty->ops->flush_chars) 695 if (tty->ops->flush_chars)
654 tty->ops->flush_chars(tty); 696 tty->ops->flush_chars(tty);
@@ -657,72 +699,70 @@ static void process_echoes(struct tty_struct *tty)
657/** 699/**
658 * add_echo_byte - add a byte to the echo buffer 700 * add_echo_byte - add a byte to the echo buffer
659 * @c: unicode byte to echo 701 * @c: unicode byte to echo
660 * @tty: terminal device 702 * @ldata: n_tty data
661 * 703 *
662 * Add a character or operation byte to the echo buffer. 704 * Add a character or operation byte to the echo buffer.
663 * 705 *
664 * Should be called under the echo lock to protect the echo buffer. 706 * Should be called under the echo lock to protect the echo buffer.
665 */ 707 */
666 708
667static void add_echo_byte(unsigned char c, struct tty_struct *tty) 709static void add_echo_byte(unsigned char c, struct n_tty_data *ldata)
668{ 710{
669 int new_byte_pos; 711 int new_byte_pos;
670 712
671 if (tty->echo_cnt == N_TTY_BUF_SIZE) { 713 if (ldata->echo_cnt == N_TTY_BUF_SIZE) {
672 /* Circular buffer is already at capacity */ 714 /* Circular buffer is already at capacity */
673 new_byte_pos = tty->echo_pos; 715 new_byte_pos = ldata->echo_pos;
674 716
675 /* 717 /*
676 * Since the buffer start position needs to be advanced, 718 * Since the buffer start position needs to be advanced,
677 * be sure to step by a whole operation byte group. 719 * be sure to step by a whole operation byte group.
678 */ 720 */
679 if (tty->echo_buf[tty->echo_pos] == ECHO_OP_START) { 721 if (ldata->echo_buf[ldata->echo_pos] == ECHO_OP_START) {
680 if (tty->echo_buf[(tty->echo_pos + 1) & 722 if (ldata->echo_buf[(ldata->echo_pos + 1) &
681 (N_TTY_BUF_SIZE - 1)] == 723 (N_TTY_BUF_SIZE - 1)] ==
682 ECHO_OP_ERASE_TAB) { 724 ECHO_OP_ERASE_TAB) {
683 tty->echo_pos += 3; 725 ldata->echo_pos += 3;
684 tty->echo_cnt -= 2; 726 ldata->echo_cnt -= 2;
685 } else { 727 } else {
686 tty->echo_pos += 2; 728 ldata->echo_pos += 2;
687 tty->echo_cnt -= 1; 729 ldata->echo_cnt -= 1;
688 } 730 }
689 } else { 731 } else {
690 tty->echo_pos++; 732 ldata->echo_pos++;
691 } 733 }
692 tty->echo_pos &= N_TTY_BUF_SIZE - 1; 734 ldata->echo_pos &= N_TTY_BUF_SIZE - 1;
693 735
694 tty->echo_overrun = 1; 736 ldata->echo_overrun = 1;
695 } else { 737 } else {
696 new_byte_pos = tty->echo_pos + tty->echo_cnt; 738 new_byte_pos = ldata->echo_pos + ldata->echo_cnt;
697 new_byte_pos &= N_TTY_BUF_SIZE - 1; 739 new_byte_pos &= N_TTY_BUF_SIZE - 1;
698 tty->echo_cnt++; 740 ldata->echo_cnt++;
699 } 741 }
700 742
701 tty->echo_buf[new_byte_pos] = c; 743 ldata->echo_buf[new_byte_pos] = c;
702} 744}
703 745
704/** 746/**
705 * echo_move_back_col - add operation to move back a column 747 * echo_move_back_col - add operation to move back a column
706 * @tty: terminal device 748 * @ldata: n_tty data
707 * 749 *
708 * Add an operation to the echo buffer to move back one column. 750 * Add an operation to the echo buffer to move back one column.
709 * 751 *
710 * Locking: echo_lock to protect the echo buffer 752 * Locking: echo_lock to protect the echo buffer
711 */ 753 */
712 754
713static void echo_move_back_col(struct tty_struct *tty) 755static void echo_move_back_col(struct n_tty_data *ldata)
714{ 756{
715 mutex_lock(&tty->echo_lock); 757 mutex_lock(&ldata->echo_lock);
716 758 add_echo_byte(ECHO_OP_START, ldata);
717 add_echo_byte(ECHO_OP_START, tty); 759 add_echo_byte(ECHO_OP_MOVE_BACK_COL, ldata);
718 add_echo_byte(ECHO_OP_MOVE_BACK_COL, tty); 760 mutex_unlock(&ldata->echo_lock);
719
720 mutex_unlock(&tty->echo_lock);
721} 761}
722 762
723/** 763/**
724 * echo_set_canon_col - add operation to set the canon column 764 * echo_set_canon_col - add operation to set the canon column
725 * @tty: terminal device 765 * @ldata: n_tty data
726 * 766 *
727 * Add an operation to the echo buffer to set the canon column 767 * Add an operation to the echo buffer to set the canon column
728 * to the current column. 768 * to the current column.
@@ -730,21 +770,19 @@ static void echo_move_back_col(struct tty_struct *tty)
730 * Locking: echo_lock to protect the echo buffer 770 * Locking: echo_lock to protect the echo buffer
731 */ 771 */
732 772
733static void echo_set_canon_col(struct tty_struct *tty) 773static void echo_set_canon_col(struct n_tty_data *ldata)
734{ 774{
735 mutex_lock(&tty->echo_lock); 775 mutex_lock(&ldata->echo_lock);
736 776 add_echo_byte(ECHO_OP_START, ldata);
737 add_echo_byte(ECHO_OP_START, tty); 777 add_echo_byte(ECHO_OP_SET_CANON_COL, ldata);
738 add_echo_byte(ECHO_OP_SET_CANON_COL, tty); 778 mutex_unlock(&ldata->echo_lock);
739
740 mutex_unlock(&tty->echo_lock);
741} 779}
742 780
743/** 781/**
744 * echo_erase_tab - add operation to erase a tab 782 * echo_erase_tab - add operation to erase a tab
745 * @num_chars: number of character columns already used 783 * @num_chars: number of character columns already used
746 * @after_tab: true if num_chars starts after a previous tab 784 * @after_tab: true if num_chars starts after a previous tab
747 * @tty: terminal device 785 * @ldata: n_tty data
748 * 786 *
749 * Add an operation to the echo buffer to erase a tab. 787 * Add an operation to the echo buffer to erase a tab.
750 * 788 *
@@ -758,12 +796,12 @@ static void echo_set_canon_col(struct tty_struct *tty)
758 */ 796 */
759 797
760static void echo_erase_tab(unsigned int num_chars, int after_tab, 798static void echo_erase_tab(unsigned int num_chars, int after_tab,
761 struct tty_struct *tty) 799 struct n_tty_data *ldata)
762{ 800{
763 mutex_lock(&tty->echo_lock); 801 mutex_lock(&ldata->echo_lock);
764 802
765 add_echo_byte(ECHO_OP_START, tty); 803 add_echo_byte(ECHO_OP_START, ldata);
766 add_echo_byte(ECHO_OP_ERASE_TAB, tty); 804 add_echo_byte(ECHO_OP_ERASE_TAB, ldata);
767 805
768 /* We only need to know this modulo 8 (tab spacing) */ 806 /* We only need to know this modulo 8 (tab spacing) */
769 num_chars &= 7; 807 num_chars &= 7;
@@ -772,9 +810,9 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab,
772 if (after_tab) 810 if (after_tab)
773 num_chars |= 0x80; 811 num_chars |= 0x80;
774 812
775 add_echo_byte(num_chars, tty); 813 add_echo_byte(num_chars, ldata);
776 814
777 mutex_unlock(&tty->echo_lock); 815 mutex_unlock(&ldata->echo_lock);
778} 816}
779 817
780/** 818/**
@@ -790,18 +828,16 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab,
790 * Locking: echo_lock to protect the echo buffer 828 * Locking: echo_lock to protect the echo buffer
791 */ 829 */
792 830
793static void echo_char_raw(unsigned char c, struct tty_struct *tty) 831static void echo_char_raw(unsigned char c, struct n_tty_data *ldata)
794{ 832{
795 mutex_lock(&tty->echo_lock); 833 mutex_lock(&ldata->echo_lock);
796
797 if (c == ECHO_OP_START) { 834 if (c == ECHO_OP_START) {
798 add_echo_byte(ECHO_OP_START, tty); 835 add_echo_byte(ECHO_OP_START, ldata);
799 add_echo_byte(ECHO_OP_START, tty); 836 add_echo_byte(ECHO_OP_START, ldata);
800 } else { 837 } else {
801 add_echo_byte(c, tty); 838 add_echo_byte(c, ldata);
802 } 839 }
803 840 mutex_unlock(&ldata->echo_lock);
804 mutex_unlock(&tty->echo_lock);
805} 841}
806 842
807/** 843/**
@@ -820,30 +856,32 @@ static void echo_char_raw(unsigned char c, struct tty_struct *tty)
820 856
821static void echo_char(unsigned char c, struct tty_struct *tty) 857static void echo_char(unsigned char c, struct tty_struct *tty)
822{ 858{
823 mutex_lock(&tty->echo_lock); 859 struct n_tty_data *ldata = tty->disc_data;
860
861 mutex_lock(&ldata->echo_lock);
824 862
825 if (c == ECHO_OP_START) { 863 if (c == ECHO_OP_START) {
826 add_echo_byte(ECHO_OP_START, tty); 864 add_echo_byte(ECHO_OP_START, ldata);
827 add_echo_byte(ECHO_OP_START, tty); 865 add_echo_byte(ECHO_OP_START, ldata);
828 } else { 866 } else {
829 if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t') 867 if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t')
830 add_echo_byte(ECHO_OP_START, tty); 868 add_echo_byte(ECHO_OP_START, ldata);
831 add_echo_byte(c, tty); 869 add_echo_byte(c, ldata);
832 } 870 }
833 871
834 mutex_unlock(&tty->echo_lock); 872 mutex_unlock(&ldata->echo_lock);
835} 873}
836 874
837/** 875/**
838 * finish_erasing - complete erase 876 * finish_erasing - complete erase
839 * @tty: tty doing the erase 877 * @ldata: n_tty data
840 */ 878 */
841 879
842static inline void finish_erasing(struct tty_struct *tty) 880static inline void finish_erasing(struct n_tty_data *ldata)
843{ 881{
844 if (tty->erasing) { 882 if (ldata->erasing) {
845 echo_char_raw('/', tty); 883 echo_char_raw('/', ldata);
846 tty->erasing = 0; 884 ldata->erasing = 0;
847 } 885 }
848} 886}
849 887
@@ -861,12 +899,13 @@ static inline void finish_erasing(struct tty_struct *tty)
861 899
862static void eraser(unsigned char c, struct tty_struct *tty) 900static void eraser(unsigned char c, struct tty_struct *tty)
863{ 901{
902 struct n_tty_data *ldata = tty->disc_data;
864 enum { ERASE, WERASE, KILL } kill_type; 903 enum { ERASE, WERASE, KILL } kill_type;
865 int head, seen_alnums, cnt; 904 int head, seen_alnums, cnt;
866 unsigned long flags; 905 unsigned long flags;
867 906
868 /* FIXME: locking needed ? */ 907 /* FIXME: locking needed ? */
869 if (tty->read_head == tty->canon_head) { 908 if (ldata->read_head == ldata->canon_head) {
870 /* process_output('\a', tty); */ /* what do you think? */ 909 /* process_output('\a', tty); */ /* what do you think? */
871 return; 910 return;
872 } 911 }
@@ -876,24 +915,24 @@ static void eraser(unsigned char c, struct tty_struct *tty)
876 kill_type = WERASE; 915 kill_type = WERASE;
877 else { 916 else {
878 if (!L_ECHO(tty)) { 917 if (!L_ECHO(tty)) {
879 spin_lock_irqsave(&tty->read_lock, flags); 918 spin_lock_irqsave(&ldata->read_lock, flags);
880 tty->read_cnt -= ((tty->read_head - tty->canon_head) & 919 ldata->read_cnt -= ((ldata->read_head - ldata->canon_head) &
881 (N_TTY_BUF_SIZE - 1)); 920 (N_TTY_BUF_SIZE - 1));
882 tty->read_head = tty->canon_head; 921 ldata->read_head = ldata->canon_head;
883 spin_unlock_irqrestore(&tty->read_lock, flags); 922 spin_unlock_irqrestore(&ldata->read_lock, flags);
884 return; 923 return;
885 } 924 }
886 if (!L_ECHOK(tty) || !L_ECHOKE(tty) || !L_ECHOE(tty)) { 925 if (!L_ECHOK(tty) || !L_ECHOKE(tty) || !L_ECHOE(tty)) {
887 spin_lock_irqsave(&tty->read_lock, flags); 926 spin_lock_irqsave(&ldata->read_lock, flags);
888 tty->read_cnt -= ((tty->read_head - tty->canon_head) & 927 ldata->read_cnt -= ((ldata->read_head - ldata->canon_head) &
889 (N_TTY_BUF_SIZE - 1)); 928 (N_TTY_BUF_SIZE - 1));
890 tty->read_head = tty->canon_head; 929 ldata->read_head = ldata->canon_head;
891 spin_unlock_irqrestore(&tty->read_lock, flags); 930 spin_unlock_irqrestore(&ldata->read_lock, flags);
892 finish_erasing(tty); 931 finish_erasing(ldata);
893 echo_char(KILL_CHAR(tty), tty); 932 echo_char(KILL_CHAR(tty), tty);
894 /* Add a newline if ECHOK is on and ECHOKE is off. */ 933 /* Add a newline if ECHOK is on and ECHOKE is off. */
895 if (L_ECHOK(tty)) 934 if (L_ECHOK(tty))
896 echo_char_raw('\n', tty); 935 echo_char_raw('\n', ldata);
897 return; 936 return;
898 } 937 }
899 kill_type = KILL; 938 kill_type = KILL;
@@ -901,14 +940,14 @@ static void eraser(unsigned char c, struct tty_struct *tty)
901 940
902 seen_alnums = 0; 941 seen_alnums = 0;
903 /* FIXME: Locking ?? */ 942 /* FIXME: Locking ?? */
904 while (tty->read_head != tty->canon_head) { 943 while (ldata->read_head != ldata->canon_head) {
905 head = tty->read_head; 944 head = ldata->read_head;
906 945
907 /* erase a single possibly multibyte character */ 946 /* erase a single possibly multibyte character */
908 do { 947 do {
909 head = (head - 1) & (N_TTY_BUF_SIZE-1); 948 head = (head - 1) & (N_TTY_BUF_SIZE-1);
910 c = tty->read_buf[head]; 949 c = ldata->read_buf[head];
911 } while (is_continuation(c, tty) && head != tty->canon_head); 950 } while (is_continuation(c, tty) && head != ldata->canon_head);
912 951
913 /* do not partially erase */ 952 /* do not partially erase */
914 if (is_continuation(c, tty)) 953 if (is_continuation(c, tty))
@@ -921,30 +960,31 @@ static void eraser(unsigned char c, struct tty_struct *tty)
921 else if (seen_alnums) 960 else if (seen_alnums)
922 break; 961 break;
923 } 962 }
924 cnt = (tty->read_head - head) & (N_TTY_BUF_SIZE-1); 963 cnt = (ldata->read_head - head) & (N_TTY_BUF_SIZE-1);
925 spin_lock_irqsave(&tty->read_lock, flags); 964 spin_lock_irqsave(&ldata->read_lock, flags);
926 tty->read_head = head; 965 ldata->read_head = head;
927 tty->read_cnt -= cnt; 966 ldata->read_cnt -= cnt;
928 spin_unlock_irqrestore(&tty->read_lock, flags); 967 spin_unlock_irqrestore(&ldata->read_lock, flags);
929 if (L_ECHO(tty)) { 968 if (L_ECHO(tty)) {
930 if (L_ECHOPRT(tty)) { 969 if (L_ECHOPRT(tty)) {
931 if (!tty->erasing) { 970 if (!ldata->erasing) {
932 echo_char_raw('\\', tty); 971 echo_char_raw('\\', ldata);
933 tty->erasing = 1; 972 ldata->erasing = 1;
934 } 973 }
935 /* if cnt > 1, output a multi-byte character */ 974 /* if cnt > 1, output a multi-byte character */
936 echo_char(c, tty); 975 echo_char(c, tty);
937 while (--cnt > 0) { 976 while (--cnt > 0) {
938 head = (head+1) & (N_TTY_BUF_SIZE-1); 977 head = (head+1) & (N_TTY_BUF_SIZE-1);
939 echo_char_raw(tty->read_buf[head], tty); 978 echo_char_raw(ldata->read_buf[head],
940 echo_move_back_col(tty); 979 ldata);
980 echo_move_back_col(ldata);
941 } 981 }
942 } else if (kill_type == ERASE && !L_ECHOE(tty)) { 982 } else if (kill_type == ERASE && !L_ECHOE(tty)) {
943 echo_char(ERASE_CHAR(tty), tty); 983 echo_char(ERASE_CHAR(tty), tty);
944 } else if (c == '\t') { 984 } else if (c == '\t') {
945 unsigned int num_chars = 0; 985 unsigned int num_chars = 0;
946 int after_tab = 0; 986 int after_tab = 0;
947 unsigned long tail = tty->read_head; 987 unsigned long tail = ldata->read_head;
948 988
949 /* 989 /*
950 * Count the columns used for characters 990 * Count the columns used for characters
@@ -953,9 +993,9 @@ static void eraser(unsigned char c, struct tty_struct *tty)
953 * This info is used to go back the correct 993 * This info is used to go back the correct
954 * number of columns. 994 * number of columns.
955 */ 995 */
956 while (tail != tty->canon_head) { 996 while (tail != ldata->canon_head) {
957 tail = (tail-1) & (N_TTY_BUF_SIZE-1); 997 tail = (tail-1) & (N_TTY_BUF_SIZE-1);
958 c = tty->read_buf[tail]; 998 c = ldata->read_buf[tail];
959 if (c == '\t') { 999 if (c == '\t') {
960 after_tab = 1; 1000 after_tab = 1;
961 break; 1001 break;
@@ -966,25 +1006,25 @@ static void eraser(unsigned char c, struct tty_struct *tty)
966 num_chars++; 1006 num_chars++;
967 } 1007 }
968 } 1008 }
969 echo_erase_tab(num_chars, after_tab, tty); 1009 echo_erase_tab(num_chars, after_tab, ldata);
970 } else { 1010 } else {
971 if (iscntrl(c) && L_ECHOCTL(tty)) { 1011 if (iscntrl(c) && L_ECHOCTL(tty)) {
972 echo_char_raw('\b', tty); 1012 echo_char_raw('\b', ldata);
973 echo_char_raw(' ', tty); 1013 echo_char_raw(' ', ldata);
974 echo_char_raw('\b', tty); 1014 echo_char_raw('\b', ldata);
975 } 1015 }
976 if (!iscntrl(c) || L_ECHOCTL(tty)) { 1016 if (!iscntrl(c) || L_ECHOCTL(tty)) {
977 echo_char_raw('\b', tty); 1017 echo_char_raw('\b', ldata);
978 echo_char_raw(' ', tty); 1018 echo_char_raw(' ', ldata);
979 echo_char_raw('\b', tty); 1019 echo_char_raw('\b', ldata);
980 } 1020 }
981 } 1021 }
982 } 1022 }
983 if (kill_type == ERASE) 1023 if (kill_type == ERASE)
984 break; 1024 break;
985 } 1025 }
986 if (tty->read_head == tty->canon_head && L_ECHO(tty)) 1026 if (ldata->read_head == ldata->canon_head && L_ECHO(tty))
987 finish_erasing(tty); 1027 finish_erasing(ldata);
988} 1028}
989 1029
990/** 1030/**
@@ -1023,6 +1063,8 @@ static inline void isig(int sig, struct tty_struct *tty, int flush)
1023 1063
1024static inline void n_tty_receive_break(struct tty_struct *tty) 1064static inline void n_tty_receive_break(struct tty_struct *tty)
1025{ 1065{
1066 struct n_tty_data *ldata = tty->disc_data;
1067
1026 if (I_IGNBRK(tty)) 1068 if (I_IGNBRK(tty))
1027 return; 1069 return;
1028 if (I_BRKINT(tty)) { 1070 if (I_BRKINT(tty)) {
@@ -1030,10 +1072,10 @@ static inline void n_tty_receive_break(struct tty_struct *tty)
1030 return; 1072 return;
1031 } 1073 }
1032 if (I_PARMRK(tty)) { 1074 if (I_PARMRK(tty)) {
1033 put_tty_queue('\377', tty); 1075 put_tty_queue('\377', ldata);
1034 put_tty_queue('\0', tty); 1076 put_tty_queue('\0', ldata);
1035 } 1077 }
1036 put_tty_queue('\0', tty); 1078 put_tty_queue('\0', ldata);
1037 wake_up_interruptible(&tty->read_wait); 1079 wake_up_interruptible(&tty->read_wait);
1038} 1080}
1039 1081
@@ -1052,16 +1094,17 @@ static inline void n_tty_receive_break(struct tty_struct *tty)
1052 1094
1053static inline void n_tty_receive_overrun(struct tty_struct *tty) 1095static inline void n_tty_receive_overrun(struct tty_struct *tty)
1054{ 1096{
1097 struct n_tty_data *ldata = tty->disc_data;
1055 char buf[64]; 1098 char buf[64];
1056 1099
1057 tty->num_overrun++; 1100 ldata->num_overrun++;
1058 if (time_before(tty->overrun_time, jiffies - HZ) || 1101 if (time_after(jiffies, ldata->overrun_time + HZ) ||
1059 time_after(tty->overrun_time, jiffies)) { 1102 time_after(ldata->overrun_time, jiffies)) {
1060 printk(KERN_WARNING "%s: %d input overrun(s)\n", 1103 printk(KERN_WARNING "%s: %d input overrun(s)\n",
1061 tty_name(tty, buf), 1104 tty_name(tty, buf),
1062 tty->num_overrun); 1105 ldata->num_overrun);
1063 tty->overrun_time = jiffies; 1106 ldata->overrun_time = jiffies;
1064 tty->num_overrun = 0; 1107 ldata->num_overrun = 0;
1065 } 1108 }
1066} 1109}
1067 1110
@@ -1076,16 +1119,18 @@ static inline void n_tty_receive_overrun(struct tty_struct *tty)
1076static inline void n_tty_receive_parity_error(struct tty_struct *tty, 1119static inline void n_tty_receive_parity_error(struct tty_struct *tty,
1077 unsigned char c) 1120 unsigned char c)
1078{ 1121{
1122 struct n_tty_data *ldata = tty->disc_data;
1123
1079 if (I_IGNPAR(tty)) 1124 if (I_IGNPAR(tty))
1080 return; 1125 return;
1081 if (I_PARMRK(tty)) { 1126 if (I_PARMRK(tty)) {
1082 put_tty_queue('\377', tty); 1127 put_tty_queue('\377', ldata);
1083 put_tty_queue('\0', tty); 1128 put_tty_queue('\0', ldata);
1084 put_tty_queue(c, tty); 1129 put_tty_queue(c, ldata);
1085 } else if (I_INPCK(tty)) 1130 } else if (I_INPCK(tty))
1086 put_tty_queue('\0', tty); 1131 put_tty_queue('\0', ldata);
1087 else 1132 else
1088 put_tty_queue(c, tty); 1133 put_tty_queue(c, ldata);
1089 wake_up_interruptible(&tty->read_wait); 1134 wake_up_interruptible(&tty->read_wait);
1090} 1135}
1091 1136
@@ -1101,11 +1146,12 @@ static inline void n_tty_receive_parity_error(struct tty_struct *tty,
1101 1146
1102static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c) 1147static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
1103{ 1148{
1149 struct n_tty_data *ldata = tty->disc_data;
1104 unsigned long flags; 1150 unsigned long flags;
1105 int parmrk; 1151 int parmrk;
1106 1152
1107 if (tty->raw) { 1153 if (ldata->raw) {
1108 put_tty_queue(c, tty); 1154 put_tty_queue(c, ldata);
1109 return; 1155 return;
1110 } 1156 }
1111 1157
@@ -1115,7 +1161,7 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
1115 c = tolower(c); 1161 c = tolower(c);
1116 1162
1117 if (L_EXTPROC(tty)) { 1163 if (L_EXTPROC(tty)) {
1118 put_tty_queue(c, tty); 1164 put_tty_queue(c, ldata);
1119 return; 1165 return;
1120 } 1166 }
1121 1167
@@ -1143,26 +1189,26 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
1143 * handle specially, do shortcut processing to speed things 1189 * handle specially, do shortcut processing to speed things
1144 * up. 1190 * up.
1145 */ 1191 */
1146 if (!test_bit(c, tty->process_char_map) || tty->lnext) { 1192 if (!test_bit(c, ldata->process_char_map) || ldata->lnext) {
1147 tty->lnext = 0; 1193 ldata->lnext = 0;
1148 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0; 1194 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0;
1149 if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) { 1195 if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
1150 /* beep if no space */ 1196 /* beep if no space */
1151 if (L_ECHO(tty)) 1197 if (L_ECHO(tty))
1152 process_output('\a', tty); 1198 process_output('\a', tty);
1153 return; 1199 return;
1154 } 1200 }
1155 if (L_ECHO(tty)) { 1201 if (L_ECHO(tty)) {
1156 finish_erasing(tty); 1202 finish_erasing(ldata);
1157 /* Record the column of first canon char. */ 1203 /* Record the column of first canon char. */
1158 if (tty->canon_head == tty->read_head) 1204 if (ldata->canon_head == ldata->read_head)
1159 echo_set_canon_col(tty); 1205 echo_set_canon_col(ldata);
1160 echo_char(c, tty); 1206 echo_char(c, tty);
1161 process_echoes(tty); 1207 process_echoes(tty);
1162 } 1208 }
1163 if (parmrk) 1209 if (parmrk)
1164 put_tty_queue(c, tty); 1210 put_tty_queue(c, ldata);
1165 put_tty_queue(c, tty); 1211 put_tty_queue(c, ldata);
1166 return; 1212 return;
1167 } 1213 }
1168 1214
@@ -1218,7 +1264,7 @@ send_signal:
1218 } else if (c == '\n' && I_INLCR(tty)) 1264 } else if (c == '\n' && I_INLCR(tty))
1219 c = '\r'; 1265 c = '\r';
1220 1266
1221 if (tty->icanon) { 1267 if (ldata->icanon) {
1222 if (c == ERASE_CHAR(tty) || c == KILL_CHAR(tty) || 1268 if (c == ERASE_CHAR(tty) || c == KILL_CHAR(tty) ||
1223 (c == WERASE_CHAR(tty) && L_IEXTEN(tty))) { 1269 (c == WERASE_CHAR(tty) && L_IEXTEN(tty))) {
1224 eraser(c, tty); 1270 eraser(c, tty);
@@ -1226,12 +1272,12 @@ send_signal:
1226 return; 1272 return;
1227 } 1273 }
1228 if (c == LNEXT_CHAR(tty) && L_IEXTEN(tty)) { 1274 if (c == LNEXT_CHAR(tty) && L_IEXTEN(tty)) {
1229 tty->lnext = 1; 1275 ldata->lnext = 1;
1230 if (L_ECHO(tty)) { 1276 if (L_ECHO(tty)) {
1231 finish_erasing(tty); 1277 finish_erasing(ldata);
1232 if (L_ECHOCTL(tty)) { 1278 if (L_ECHOCTL(tty)) {
1233 echo_char_raw('^', tty); 1279 echo_char_raw('^', ldata);
1234 echo_char_raw('\b', tty); 1280 echo_char_raw('\b', ldata);
1235 process_echoes(tty); 1281 process_echoes(tty);
1236 } 1282 }
1237 } 1283 }
@@ -1239,34 +1285,34 @@ send_signal:
1239 } 1285 }
1240 if (c == REPRINT_CHAR(tty) && L_ECHO(tty) && 1286 if (c == REPRINT_CHAR(tty) && L_ECHO(tty) &&
1241 L_IEXTEN(tty)) { 1287 L_IEXTEN(tty)) {
1242 unsigned long tail = tty->canon_head; 1288 unsigned long tail = ldata->canon_head;
1243 1289
1244 finish_erasing(tty); 1290 finish_erasing(ldata);
1245 echo_char(c, tty); 1291 echo_char(c, tty);
1246 echo_char_raw('\n', tty); 1292 echo_char_raw('\n', ldata);
1247 while (tail != tty->read_head) { 1293 while (tail != ldata->read_head) {
1248 echo_char(tty->read_buf[tail], tty); 1294 echo_char(ldata->read_buf[tail], tty);
1249 tail = (tail+1) & (N_TTY_BUF_SIZE-1); 1295 tail = (tail+1) & (N_TTY_BUF_SIZE-1);
1250 } 1296 }
1251 process_echoes(tty); 1297 process_echoes(tty);
1252 return; 1298 return;
1253 } 1299 }
1254 if (c == '\n') { 1300 if (c == '\n') {
1255 if (tty->read_cnt >= N_TTY_BUF_SIZE) { 1301 if (ldata->read_cnt >= N_TTY_BUF_SIZE) {
1256 if (L_ECHO(tty)) 1302 if (L_ECHO(tty))
1257 process_output('\a', tty); 1303 process_output('\a', tty);
1258 return; 1304 return;
1259 } 1305 }
1260 if (L_ECHO(tty) || L_ECHONL(tty)) { 1306 if (L_ECHO(tty) || L_ECHONL(tty)) {
1261 echo_char_raw('\n', tty); 1307 echo_char_raw('\n', ldata);
1262 process_echoes(tty); 1308 process_echoes(tty);
1263 } 1309 }
1264 goto handle_newline; 1310 goto handle_newline;
1265 } 1311 }
1266 if (c == EOF_CHAR(tty)) { 1312 if (c == EOF_CHAR(tty)) {
1267 if (tty->read_cnt >= N_TTY_BUF_SIZE) 1313 if (ldata->read_cnt >= N_TTY_BUF_SIZE)
1268 return; 1314 return;
1269 if (tty->canon_head != tty->read_head) 1315 if (ldata->canon_head != ldata->read_head)
1270 set_bit(TTY_PUSH, &tty->flags); 1316 set_bit(TTY_PUSH, &tty->flags);
1271 c = __DISABLED_CHAR; 1317 c = __DISABLED_CHAR;
1272 goto handle_newline; 1318 goto handle_newline;
@@ -1275,7 +1321,7 @@ send_signal:
1275 (c == EOL2_CHAR(tty) && L_IEXTEN(tty))) { 1321 (c == EOL2_CHAR(tty) && L_IEXTEN(tty))) {
1276 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) 1322 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty))
1277 ? 1 : 0; 1323 ? 1 : 0;
1278 if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk)) { 1324 if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk)) {
1279 if (L_ECHO(tty)) 1325 if (L_ECHO(tty))
1280 process_output('\a', tty); 1326 process_output('\a', tty);
1281 return; 1327 return;
@@ -1285,8 +1331,8 @@ send_signal:
1285 */ 1331 */
1286 if (L_ECHO(tty)) { 1332 if (L_ECHO(tty)) {
1287 /* Record the column of first canon char. */ 1333 /* Record the column of first canon char. */
1288 if (tty->canon_head == tty->read_head) 1334 if (ldata->canon_head == ldata->read_head)
1289 echo_set_canon_col(tty); 1335 echo_set_canon_col(ldata);
1290 echo_char(c, tty); 1336 echo_char(c, tty);
1291 process_echoes(tty); 1337 process_echoes(tty);
1292 } 1338 }
@@ -1295,15 +1341,15 @@ send_signal:
1295 * EOL_CHAR and EOL2_CHAR? 1341 * EOL_CHAR and EOL2_CHAR?
1296 */ 1342 */
1297 if (parmrk) 1343 if (parmrk)
1298 put_tty_queue(c, tty); 1344 put_tty_queue(c, ldata);
1299 1345
1300handle_newline: 1346handle_newline:
1301 spin_lock_irqsave(&tty->read_lock, flags); 1347 spin_lock_irqsave(&ldata->read_lock, flags);
1302 set_bit(tty->read_head, tty->read_flags); 1348 set_bit(ldata->read_head, ldata->read_flags);
1303 put_tty_queue_nolock(c, tty); 1349 put_tty_queue_nolock(c, ldata);
1304 tty->canon_head = tty->read_head; 1350 ldata->canon_head = ldata->read_head;
1305 tty->canon_data++; 1351 ldata->canon_data++;
1306 spin_unlock_irqrestore(&tty->read_lock, flags); 1352 spin_unlock_irqrestore(&ldata->read_lock, flags);
1307 kill_fasync(&tty->fasync, SIGIO, POLL_IN); 1353 kill_fasync(&tty->fasync, SIGIO, POLL_IN);
1308 if (waitqueue_active(&tty->read_wait)) 1354 if (waitqueue_active(&tty->read_wait))
1309 wake_up_interruptible(&tty->read_wait); 1355 wake_up_interruptible(&tty->read_wait);
@@ -1312,29 +1358,29 @@ handle_newline:
1312 } 1358 }
1313 1359
1314 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0; 1360 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0;
1315 if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) { 1361 if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
1316 /* beep if no space */ 1362 /* beep if no space */
1317 if (L_ECHO(tty)) 1363 if (L_ECHO(tty))
1318 process_output('\a', tty); 1364 process_output('\a', tty);
1319 return; 1365 return;
1320 } 1366 }
1321 if (L_ECHO(tty)) { 1367 if (L_ECHO(tty)) {
1322 finish_erasing(tty); 1368 finish_erasing(ldata);
1323 if (c == '\n') 1369 if (c == '\n')
1324 echo_char_raw('\n', tty); 1370 echo_char_raw('\n', ldata);
1325 else { 1371 else {
1326 /* Record the column of first canon char. */ 1372 /* Record the column of first canon char. */
1327 if (tty->canon_head == tty->read_head) 1373 if (ldata->canon_head == ldata->read_head)
1328 echo_set_canon_col(tty); 1374 echo_set_canon_col(ldata);
1329 echo_char(c, tty); 1375 echo_char(c, tty);
1330 } 1376 }
1331 process_echoes(tty); 1377 process_echoes(tty);
1332 } 1378 }
1333 1379
1334 if (parmrk) 1380 if (parmrk)
1335 put_tty_queue(c, tty); 1381 put_tty_queue(c, ldata);
1336 1382
1337 put_tty_queue(c, tty); 1383 put_tty_queue(c, ldata);
1338} 1384}
1339 1385
1340 1386
@@ -1369,33 +1415,31 @@ static void n_tty_write_wakeup(struct tty_struct *tty)
1369static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp, 1415static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
1370 char *fp, int count) 1416 char *fp, int count)
1371{ 1417{
1418 struct n_tty_data *ldata = tty->disc_data;
1372 const unsigned char *p; 1419 const unsigned char *p;
1373 char *f, flags = TTY_NORMAL; 1420 char *f, flags = TTY_NORMAL;
1374 int i; 1421 int i;
1375 char buf[64]; 1422 char buf[64];
1376 unsigned long cpuflags; 1423 unsigned long cpuflags;
1377 1424
1378 if (!tty->read_buf) 1425 if (ldata->real_raw) {
1379 return; 1426 spin_lock_irqsave(&ldata->read_lock, cpuflags);
1380 1427 i = min(N_TTY_BUF_SIZE - ldata->read_cnt,
1381 if (tty->real_raw) { 1428 N_TTY_BUF_SIZE - ldata->read_head);
1382 spin_lock_irqsave(&tty->read_lock, cpuflags);
1383 i = min(N_TTY_BUF_SIZE - tty->read_cnt,
1384 N_TTY_BUF_SIZE - tty->read_head);
1385 i = min(count, i); 1429 i = min(count, i);
1386 memcpy(tty->read_buf + tty->read_head, cp, i); 1430 memcpy(ldata->read_buf + ldata->read_head, cp, i);
1387 tty->read_head = (tty->read_head + i) & (N_TTY_BUF_SIZE-1); 1431 ldata->read_head = (ldata->read_head + i) & (N_TTY_BUF_SIZE-1);
1388 tty->read_cnt += i; 1432 ldata->read_cnt += i;
1389 cp += i; 1433 cp += i;
1390 count -= i; 1434 count -= i;
1391 1435
1392 i = min(N_TTY_BUF_SIZE - tty->read_cnt, 1436 i = min(N_TTY_BUF_SIZE - ldata->read_cnt,
1393 N_TTY_BUF_SIZE - tty->read_head); 1437 N_TTY_BUF_SIZE - ldata->read_head);
1394 i = min(count, i); 1438 i = min(count, i);
1395 memcpy(tty->read_buf + tty->read_head, cp, i); 1439 memcpy(ldata->read_buf + ldata->read_head, cp, i);
1396 tty->read_head = (tty->read_head + i) & (N_TTY_BUF_SIZE-1); 1440 ldata->read_head = (ldata->read_head + i) & (N_TTY_BUF_SIZE-1);
1397 tty->read_cnt += i; 1441 ldata->read_cnt += i;
1398 spin_unlock_irqrestore(&tty->read_lock, cpuflags); 1442 spin_unlock_irqrestore(&ldata->read_lock, cpuflags);
1399 } else { 1443 } else {
1400 for (i = count, p = cp, f = fp; i; i--, p++) { 1444 for (i = count, p = cp, f = fp; i; i--, p++) {
1401 if (f) 1445 if (f)
@@ -1426,7 +1470,7 @@ static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
1426 1470
1427 n_tty_set_room(tty); 1471 n_tty_set_room(tty);
1428 1472
1429 if ((!tty->icanon && (tty->read_cnt >= tty->minimum_to_wake)) || 1473 if ((!ldata->icanon && (ldata->read_cnt >= tty->minimum_to_wake)) ||
1430 L_EXTPROC(tty)) { 1474 L_EXTPROC(tty)) {
1431 kill_fasync(&tty->fasync, SIGIO, POLL_IN); 1475 kill_fasync(&tty->fasync, SIGIO, POLL_IN);
1432 if (waitqueue_active(&tty->read_wait)) 1476 if (waitqueue_active(&tty->read_wait))
@@ -1470,25 +1514,25 @@ int is_ignored(int sig)
1470 1514
1471static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old) 1515static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1472{ 1516{
1517 struct n_tty_data *ldata = tty->disc_data;
1473 int canon_change = 1; 1518 int canon_change = 1;
1474 BUG_ON(!tty);
1475 1519
1476 if (old) 1520 if (old)
1477 canon_change = (old->c_lflag ^ tty->termios.c_lflag) & ICANON; 1521 canon_change = (old->c_lflag ^ tty->termios.c_lflag) & ICANON;
1478 if (canon_change) { 1522 if (canon_change) {
1479 memset(&tty->read_flags, 0, sizeof tty->read_flags); 1523 bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
1480 tty->canon_head = tty->read_tail; 1524 ldata->canon_head = ldata->read_tail;
1481 tty->canon_data = 0; 1525 ldata->canon_data = 0;
1482 tty->erasing = 0; 1526 ldata->erasing = 0;
1483 } 1527 }
1484 1528
1485 if (canon_change && !L_ICANON(tty) && tty->read_cnt) 1529 if (canon_change && !L_ICANON(tty) && ldata->read_cnt)
1486 wake_up_interruptible(&tty->read_wait); 1530 wake_up_interruptible(&tty->read_wait);
1487 1531
1488 tty->icanon = (L_ICANON(tty) != 0); 1532 ldata->icanon = (L_ICANON(tty) != 0);
1489 if (test_bit(TTY_HW_COOK_IN, &tty->flags)) { 1533 if (test_bit(TTY_HW_COOK_IN, &tty->flags)) {
1490 tty->raw = 1; 1534 ldata->raw = 1;
1491 tty->real_raw = 1; 1535 ldata->real_raw = 1;
1492 n_tty_set_room(tty); 1536 n_tty_set_room(tty);
1493 return; 1537 return;
1494 } 1538 }
@@ -1496,51 +1540,51 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1496 I_ICRNL(tty) || I_INLCR(tty) || L_ICANON(tty) || 1540 I_ICRNL(tty) || I_INLCR(tty) || L_ICANON(tty) ||
1497 I_IXON(tty) || L_ISIG(tty) || L_ECHO(tty) || 1541 I_IXON(tty) || L_ISIG(tty) || L_ECHO(tty) ||
1498 I_PARMRK(tty)) { 1542 I_PARMRK(tty)) {
1499 memset(tty->process_char_map, 0, 256/8); 1543 bitmap_zero(ldata->process_char_map, 256);
1500 1544
1501 if (I_IGNCR(tty) || I_ICRNL(tty)) 1545 if (I_IGNCR(tty) || I_ICRNL(tty))
1502 set_bit('\r', tty->process_char_map); 1546 set_bit('\r', ldata->process_char_map);
1503 if (I_INLCR(tty)) 1547 if (I_INLCR(tty))
1504 set_bit('\n', tty->process_char_map); 1548 set_bit('\n', ldata->process_char_map);
1505 1549
1506 if (L_ICANON(tty)) { 1550 if (L_ICANON(tty)) {
1507 set_bit(ERASE_CHAR(tty), tty->process_char_map); 1551 set_bit(ERASE_CHAR(tty), ldata->process_char_map);
1508 set_bit(KILL_CHAR(tty), tty->process_char_map); 1552 set_bit(KILL_CHAR(tty), ldata->process_char_map);
1509 set_bit(EOF_CHAR(tty), tty->process_char_map); 1553 set_bit(EOF_CHAR(tty), ldata->process_char_map);
1510 set_bit('\n', tty->process_char_map); 1554 set_bit('\n', ldata->process_char_map);
1511 set_bit(EOL_CHAR(tty), tty->process_char_map); 1555 set_bit(EOL_CHAR(tty), ldata->process_char_map);
1512 if (L_IEXTEN(tty)) { 1556 if (L_IEXTEN(tty)) {
1513 set_bit(WERASE_CHAR(tty), 1557 set_bit(WERASE_CHAR(tty),
1514 tty->process_char_map); 1558 ldata->process_char_map);
1515 set_bit(LNEXT_CHAR(tty), 1559 set_bit(LNEXT_CHAR(tty),
1516 tty->process_char_map); 1560 ldata->process_char_map);
1517 set_bit(EOL2_CHAR(tty), 1561 set_bit(EOL2_CHAR(tty),
1518 tty->process_char_map); 1562 ldata->process_char_map);
1519 if (L_ECHO(tty)) 1563 if (L_ECHO(tty))
1520 set_bit(REPRINT_CHAR(tty), 1564 set_bit(REPRINT_CHAR(tty),
1521 tty->process_char_map); 1565 ldata->process_char_map);
1522 } 1566 }
1523 } 1567 }
1524 if (I_IXON(tty)) { 1568 if (I_IXON(tty)) {
1525 set_bit(START_CHAR(tty), tty->process_char_map); 1569 set_bit(START_CHAR(tty), ldata->process_char_map);
1526 set_bit(STOP_CHAR(tty), tty->process_char_map); 1570 set_bit(STOP_CHAR(tty), ldata->process_char_map);
1527 } 1571 }
1528 if (L_ISIG(tty)) { 1572 if (L_ISIG(tty)) {
1529 set_bit(INTR_CHAR(tty), tty->process_char_map); 1573 set_bit(INTR_CHAR(tty), ldata->process_char_map);
1530 set_bit(QUIT_CHAR(tty), tty->process_char_map); 1574 set_bit(QUIT_CHAR(tty), ldata->process_char_map);
1531 set_bit(SUSP_CHAR(tty), tty->process_char_map); 1575 set_bit(SUSP_CHAR(tty), ldata->process_char_map);
1532 } 1576 }
1533 clear_bit(__DISABLED_CHAR, tty->process_char_map); 1577 clear_bit(__DISABLED_CHAR, ldata->process_char_map);
1534 tty->raw = 0; 1578 ldata->raw = 0;
1535 tty->real_raw = 0; 1579 ldata->real_raw = 0;
1536 } else { 1580 } else {
1537 tty->raw = 1; 1581 ldata->raw = 1;
1538 if ((I_IGNBRK(tty) || (!I_BRKINT(tty) && !I_PARMRK(tty))) && 1582 if ((I_IGNBRK(tty) || (!I_BRKINT(tty) && !I_PARMRK(tty))) &&
1539 (I_IGNPAR(tty) || !I_INPCK(tty)) && 1583 (I_IGNPAR(tty) || !I_INPCK(tty)) &&
1540 (tty->driver->flags & TTY_DRIVER_REAL_RAW)) 1584 (tty->driver->flags & TTY_DRIVER_REAL_RAW))
1541 tty->real_raw = 1; 1585 ldata->real_raw = 1;
1542 else 1586 else
1543 tty->real_raw = 0; 1587 ldata->real_raw = 0;
1544 } 1588 }
1545 n_tty_set_room(tty); 1589 n_tty_set_room(tty);
1546 /* The termios change make the tty ready for I/O */ 1590 /* The termios change make the tty ready for I/O */
@@ -1560,15 +1604,13 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1560 1604
1561static void n_tty_close(struct tty_struct *tty) 1605static void n_tty_close(struct tty_struct *tty)
1562{ 1606{
1607 struct n_tty_data *ldata = tty->disc_data;
1608
1563 n_tty_flush_buffer(tty); 1609 n_tty_flush_buffer(tty);
1564 if (tty->read_buf) { 1610 kfree(ldata->read_buf);
1565 kfree(tty->read_buf); 1611 kfree(ldata->echo_buf);
1566 tty->read_buf = NULL; 1612 kfree(ldata);
1567 } 1613 tty->disc_data = NULL;
1568 if (tty->echo_buf) {
1569 kfree(tty->echo_buf);
1570 tty->echo_buf = NULL;
1571 }
1572} 1614}
1573 1615
1574/** 1616/**
@@ -1583,37 +1625,50 @@ static void n_tty_close(struct tty_struct *tty)
1583 1625
1584static int n_tty_open(struct tty_struct *tty) 1626static int n_tty_open(struct tty_struct *tty)
1585{ 1627{
1586 if (!tty) 1628 struct n_tty_data *ldata;
1587 return -EINVAL; 1629
1630 ldata = kzalloc(sizeof(*ldata), GFP_KERNEL);
1631 if (!ldata)
1632 goto err;
1633
1634 ldata->overrun_time = jiffies;
1635 mutex_init(&ldata->atomic_read_lock);
1636 mutex_init(&ldata->output_lock);
1637 mutex_init(&ldata->echo_lock);
1638 spin_lock_init(&ldata->read_lock);
1588 1639
1589 /* These are ugly. Currently a malloc failure here can panic */ 1640 /* These are ugly. Currently a malloc failure here can panic */
1590 if (!tty->read_buf) { 1641 ldata->read_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
1591 tty->read_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL); 1642 ldata->echo_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
1592 if (!tty->read_buf) 1643 if (!ldata->read_buf || !ldata->echo_buf)
1593 return -ENOMEM; 1644 goto err_free_bufs;
1594 }
1595 if (!tty->echo_buf) {
1596 tty->echo_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
1597 1645
1598 if (!tty->echo_buf) 1646 tty->disc_data = ldata;
1599 return -ENOMEM;
1600 }
1601 reset_buffer_flags(tty); 1647 reset_buffer_flags(tty);
1602 tty_unthrottle(tty); 1648 tty_unthrottle(tty);
1603 tty->column = 0; 1649 ldata->column = 0;
1604 n_tty_set_termios(tty, NULL); 1650 n_tty_set_termios(tty, NULL);
1605 tty->minimum_to_wake = 1; 1651 tty->minimum_to_wake = 1;
1606 tty->closing = 0; 1652 tty->closing = 0;
1653
1607 return 0; 1654 return 0;
1655err_free_bufs:
1656 kfree(ldata->read_buf);
1657 kfree(ldata->echo_buf);
1658 kfree(ldata);
1659err:
1660 return -ENOMEM;
1608} 1661}
1609 1662
1610static inline int input_available_p(struct tty_struct *tty, int amt) 1663static inline int input_available_p(struct tty_struct *tty, int amt)
1611{ 1664{
1665 struct n_tty_data *ldata = tty->disc_data;
1666
1612 tty_flush_to_ldisc(tty); 1667 tty_flush_to_ldisc(tty);
1613 if (tty->icanon && !L_EXTPROC(tty)) { 1668 if (ldata->icanon && !L_EXTPROC(tty)) {
1614 if (tty->canon_data) 1669 if (ldata->canon_data)
1615 return 1; 1670 return 1;
1616 } else if (tty->read_cnt >= (amt ? amt : 1)) 1671 } else if (ldata->read_cnt >= (amt ? amt : 1))
1617 return 1; 1672 return 1;
1618 1673
1619 return 0; 1674 return 0;
@@ -1632,7 +1687,7 @@ static inline int input_available_p(struct tty_struct *tty, int amt)
1632 * buffer, and once to drain the space from the (physical) beginning of 1687 * buffer, and once to drain the space from the (physical) beginning of
1633 * the buffer to head pointer. 1688 * the buffer to head pointer.
1634 * 1689 *
1635 * Called under the tty->atomic_read_lock sem 1690 * Called under the ldata->atomic_read_lock sem
1636 * 1691 *
1637 */ 1692 */
1638 1693
@@ -1641,29 +1696,31 @@ static int copy_from_read_buf(struct tty_struct *tty,
1641 size_t *nr) 1696 size_t *nr)
1642 1697
1643{ 1698{
1699 struct n_tty_data *ldata = tty->disc_data;
1644 int retval; 1700 int retval;
1645 size_t n; 1701 size_t n;
1646 unsigned long flags; 1702 unsigned long flags;
1647 bool is_eof; 1703 bool is_eof;
1648 1704
1649 retval = 0; 1705 retval = 0;
1650 spin_lock_irqsave(&tty->read_lock, flags); 1706 spin_lock_irqsave(&ldata->read_lock, flags);
1651 n = min(tty->read_cnt, N_TTY_BUF_SIZE - tty->read_tail); 1707 n = min(ldata->read_cnt, N_TTY_BUF_SIZE - ldata->read_tail);
1652 n = min(*nr, n); 1708 n = min(*nr, n);
1653 spin_unlock_irqrestore(&tty->read_lock, flags); 1709 spin_unlock_irqrestore(&ldata->read_lock, flags);
1654 if (n) { 1710 if (n) {
1655 retval = copy_to_user(*b, &tty->read_buf[tty->read_tail], n); 1711 retval = copy_to_user(*b, &ldata->read_buf[ldata->read_tail], n);
1656 n -= retval; 1712 n -= retval;
1657 is_eof = n == 1 && 1713 is_eof = n == 1 &&
1658 tty->read_buf[tty->read_tail] == EOF_CHAR(tty); 1714 ldata->read_buf[ldata->read_tail] == EOF_CHAR(tty);
1659 tty_audit_add_data(tty, &tty->read_buf[tty->read_tail], n); 1715 tty_audit_add_data(tty, &ldata->read_buf[ldata->read_tail], n,
1660 spin_lock_irqsave(&tty->read_lock, flags); 1716 ldata->icanon);
1661 tty->read_tail = (tty->read_tail + n) & (N_TTY_BUF_SIZE-1); 1717 spin_lock_irqsave(&ldata->read_lock, flags);
1662 tty->read_cnt -= n; 1718 ldata->read_tail = (ldata->read_tail + n) & (N_TTY_BUF_SIZE-1);
1719 ldata->read_cnt -= n;
1663 /* Turn single EOF into zero-length read */ 1720 /* Turn single EOF into zero-length read */
1664 if (L_EXTPROC(tty) && tty->icanon && is_eof && !tty->read_cnt) 1721 if (L_EXTPROC(tty) && ldata->icanon && is_eof && !ldata->read_cnt)
1665 n = 0; 1722 n = 0;
1666 spin_unlock_irqrestore(&tty->read_lock, flags); 1723 spin_unlock_irqrestore(&ldata->read_lock, flags);
1667 *b += n; 1724 *b += n;
1668 *nr -= n; 1725 *nr -= n;
1669 } 1726 }
@@ -1730,6 +1787,7 @@ static int job_control(struct tty_struct *tty, struct file *file)
1730static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, 1787static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
1731 unsigned char __user *buf, size_t nr) 1788 unsigned char __user *buf, size_t nr)
1732{ 1789{
1790 struct n_tty_data *ldata = tty->disc_data;
1733 unsigned char __user *b = buf; 1791 unsigned char __user *b = buf;
1734 DECLARE_WAITQUEUE(wait, current); 1792 DECLARE_WAITQUEUE(wait, current);
1735 int c; 1793 int c;
@@ -1741,17 +1799,13 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
1741 int packet; 1799 int packet;
1742 1800
1743do_it_again: 1801do_it_again:
1744
1745 if (WARN_ON(!tty->read_buf))
1746 return -EAGAIN;
1747
1748 c = job_control(tty, file); 1802 c = job_control(tty, file);
1749 if (c < 0) 1803 if (c < 0)
1750 return c; 1804 return c;
1751 1805
1752 minimum = time = 0; 1806 minimum = time = 0;
1753 timeout = MAX_SCHEDULE_TIMEOUT; 1807 timeout = MAX_SCHEDULE_TIMEOUT;
1754 if (!tty->icanon) { 1808 if (!ldata->icanon) {
1755 time = (HZ / 10) * TIME_CHAR(tty); 1809 time = (HZ / 10) * TIME_CHAR(tty);
1756 minimum = MIN_CHAR(tty); 1810 minimum = MIN_CHAR(tty);
1757 if (minimum) { 1811 if (minimum) {
@@ -1774,10 +1828,10 @@ do_it_again:
1774 * Internal serialization of reads. 1828 * Internal serialization of reads.
1775 */ 1829 */
1776 if (file->f_flags & O_NONBLOCK) { 1830 if (file->f_flags & O_NONBLOCK) {
1777 if (!mutex_trylock(&tty->atomic_read_lock)) 1831 if (!mutex_trylock(&ldata->atomic_read_lock))
1778 return -EAGAIN; 1832 return -EAGAIN;
1779 } else { 1833 } else {
1780 if (mutex_lock_interruptible(&tty->atomic_read_lock)) 1834 if (mutex_lock_interruptible(&ldata->atomic_read_lock))
1781 return -ERESTARTSYS; 1835 return -ERESTARTSYS;
1782 } 1836 }
1783 packet = tty->packet; 1837 packet = tty->packet;
@@ -1830,7 +1884,6 @@ do_it_again:
1830 /* FIXME: does n_tty_set_room need locking ? */ 1884 /* FIXME: does n_tty_set_room need locking ? */
1831 n_tty_set_room(tty); 1885 n_tty_set_room(tty);
1832 timeout = schedule_timeout(timeout); 1886 timeout = schedule_timeout(timeout);
1833 BUG_ON(!tty->read_buf);
1834 continue; 1887 continue;
1835 } 1888 }
1836 __set_current_state(TASK_RUNNING); 1889 __set_current_state(TASK_RUNNING);
@@ -1845,45 +1898,45 @@ do_it_again:
1845 nr--; 1898 nr--;
1846 } 1899 }
1847 1900
1848 if (tty->icanon && !L_EXTPROC(tty)) { 1901 if (ldata->icanon && !L_EXTPROC(tty)) {
1849 /* N.B. avoid overrun if nr == 0 */ 1902 /* N.B. avoid overrun if nr == 0 */
1850 spin_lock_irqsave(&tty->read_lock, flags); 1903 spin_lock_irqsave(&ldata->read_lock, flags);
1851 while (nr && tty->read_cnt) { 1904 while (nr && ldata->read_cnt) {
1852 int eol; 1905 int eol;
1853 1906
1854 eol = test_and_clear_bit(tty->read_tail, 1907 eol = test_and_clear_bit(ldata->read_tail,
1855 tty->read_flags); 1908 ldata->read_flags);
1856 c = tty->read_buf[tty->read_tail]; 1909 c = ldata->read_buf[ldata->read_tail];
1857 tty->read_tail = ((tty->read_tail+1) & 1910 ldata->read_tail = ((ldata->read_tail+1) &
1858 (N_TTY_BUF_SIZE-1)); 1911 (N_TTY_BUF_SIZE-1));
1859 tty->read_cnt--; 1912 ldata->read_cnt--;
1860 if (eol) { 1913 if (eol) {
1861 /* this test should be redundant: 1914 /* this test should be redundant:
1862 * we shouldn't be reading data if 1915 * we shouldn't be reading data if
1863 * canon_data is 0 1916 * canon_data is 0
1864 */ 1917 */
1865 if (--tty->canon_data < 0) 1918 if (--ldata->canon_data < 0)
1866 tty->canon_data = 0; 1919 ldata->canon_data = 0;
1867 } 1920 }
1868 spin_unlock_irqrestore(&tty->read_lock, flags); 1921 spin_unlock_irqrestore(&ldata->read_lock, flags);
1869 1922
1870 if (!eol || (c != __DISABLED_CHAR)) { 1923 if (!eol || (c != __DISABLED_CHAR)) {
1871 if (tty_put_user(tty, c, b++)) { 1924 if (tty_put_user(tty, c, b++)) {
1872 retval = -EFAULT; 1925 retval = -EFAULT;
1873 b--; 1926 b--;
1874 spin_lock_irqsave(&tty->read_lock, flags); 1927 spin_lock_irqsave(&ldata->read_lock, flags);
1875 break; 1928 break;
1876 } 1929 }
1877 nr--; 1930 nr--;
1878 } 1931 }
1879 if (eol) { 1932 if (eol) {
1880 tty_audit_push(tty); 1933 tty_audit_push(tty);
1881 spin_lock_irqsave(&tty->read_lock, flags); 1934 spin_lock_irqsave(&ldata->read_lock, flags);
1882 break; 1935 break;
1883 } 1936 }
1884 spin_lock_irqsave(&tty->read_lock, flags); 1937 spin_lock_irqsave(&ldata->read_lock, flags);
1885 } 1938 }
1886 spin_unlock_irqrestore(&tty->read_lock, flags); 1939 spin_unlock_irqrestore(&ldata->read_lock, flags);
1887 if (retval) 1940 if (retval)
1888 break; 1941 break;
1889 } else { 1942 } else {
@@ -1915,7 +1968,7 @@ do_it_again:
1915 if (time) 1968 if (time)
1916 timeout = time; 1969 timeout = time;
1917 } 1970 }
1918 mutex_unlock(&tty->atomic_read_lock); 1971 mutex_unlock(&ldata->atomic_read_lock);
1919 remove_wait_queue(&tty->read_wait, &wait); 1972 remove_wait_queue(&tty->read_wait, &wait);
1920 1973
1921 if (!waitqueue_active(&tty->read_wait)) 1974 if (!waitqueue_active(&tty->read_wait))
@@ -2076,19 +2129,19 @@ static unsigned int n_tty_poll(struct tty_struct *tty, struct file *file,
2076 return mask; 2129 return mask;
2077} 2130}
2078 2131
2079static unsigned long inq_canon(struct tty_struct *tty) 2132static unsigned long inq_canon(struct n_tty_data *ldata)
2080{ 2133{
2081 int nr, head, tail; 2134 int nr, head, tail;
2082 2135
2083 if (!tty->canon_data) 2136 if (!ldata->canon_data)
2084 return 0; 2137 return 0;
2085 head = tty->canon_head; 2138 head = ldata->canon_head;
2086 tail = tty->read_tail; 2139 tail = ldata->read_tail;
2087 nr = (head - tail) & (N_TTY_BUF_SIZE-1); 2140 nr = (head - tail) & (N_TTY_BUF_SIZE-1);
2088 /* Skip EOF-chars.. */ 2141 /* Skip EOF-chars.. */
2089 while (head != tail) { 2142 while (head != tail) {
2090 if (test_bit(tail, tty->read_flags) && 2143 if (test_bit(tail, ldata->read_flags) &&
2091 tty->read_buf[tail] == __DISABLED_CHAR) 2144 ldata->read_buf[tail] == __DISABLED_CHAR)
2092 nr--; 2145 nr--;
2093 tail = (tail+1) & (N_TTY_BUF_SIZE-1); 2146 tail = (tail+1) & (N_TTY_BUF_SIZE-1);
2094 } 2147 }
@@ -2098,6 +2151,7 @@ static unsigned long inq_canon(struct tty_struct *tty)
2098static int n_tty_ioctl(struct tty_struct *tty, struct file *file, 2151static int n_tty_ioctl(struct tty_struct *tty, struct file *file,
2099 unsigned int cmd, unsigned long arg) 2152 unsigned int cmd, unsigned long arg)
2100{ 2153{
2154 struct n_tty_data *ldata = tty->disc_data;
2101 int retval; 2155 int retval;
2102 2156
2103 switch (cmd) { 2157 switch (cmd) {
@@ -2105,9 +2159,9 @@ static int n_tty_ioctl(struct tty_struct *tty, struct file *file,
2105 return put_user(tty_chars_in_buffer(tty), (int __user *) arg); 2159 return put_user(tty_chars_in_buffer(tty), (int __user *) arg);
2106 case TIOCINQ: 2160 case TIOCINQ:
2107 /* FIXME: Locking */ 2161 /* FIXME: Locking */
2108 retval = tty->read_cnt; 2162 retval = ldata->read_cnt;
2109 if (L_ICANON(tty)) 2163 if (L_ICANON(tty))
2110 retval = inq_canon(tty); 2164 retval = inq_canon(ldata);
2111 return put_user(retval, (unsigned int __user *) arg); 2165 return put_user(retval, (unsigned int __user *) arg);
2112 default: 2166 default:
2113 return n_tty_ioctl_helper(tty, file, cmd, arg); 2167 return n_tty_ioctl_helper(tty, file, cmd, arg);
diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c
index a82b39939a9c..4219f040adb8 100644
--- a/drivers/tty/pty.c
+++ b/drivers/tty/pty.c
@@ -4,9 +4,6 @@
4 * Added support for a Unix98-style ptmx device. 4 * Added support for a Unix98-style ptmx device.
5 * -- C. Scott Ananian <cananian@alumni.princeton.edu>, 14-Jan-1998 5 * -- C. Scott Ananian <cananian@alumni.princeton.edu>, 14-Jan-1998
6 * 6 *
7 * When reading this code see also fs/devpts. In particular note that the
8 * driver_data field is used by the devpts side as a binding to the devpts
9 * inode.
10 */ 7 */
11 8
12#include <linux/module.h> 9#include <linux/module.h>
@@ -59,7 +56,7 @@ static void pty_close(struct tty_struct *tty, struct file *filp)
59#ifdef CONFIG_UNIX98_PTYS 56#ifdef CONFIG_UNIX98_PTYS
60 if (tty->driver == ptm_driver) { 57 if (tty->driver == ptm_driver) {
61 mutex_lock(&devpts_mutex); 58 mutex_lock(&devpts_mutex);
62 devpts_pty_kill(tty->link); 59 devpts_pty_kill(tty->link->driver_data);
63 mutex_unlock(&devpts_mutex); 60 mutex_unlock(&devpts_mutex);
64 } 61 }
65#endif 62#endif
@@ -96,7 +93,7 @@ static void pty_unthrottle(struct tty_struct *tty)
96 93
97static int pty_space(struct tty_struct *to) 94static int pty_space(struct tty_struct *to)
98{ 95{
99 int n = 8192 - to->buf.memory_used; 96 int n = 8192 - to->port->buf.memory_used;
100 if (n < 0) 97 if (n < 0)
101 return 0; 98 return 0;
102 return n; 99 return n;
@@ -348,6 +345,7 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
348 tty_port_init(ports[1]); 345 tty_port_init(ports[1]);
349 o_tty->port = ports[0]; 346 o_tty->port = ports[0];
350 tty->port = ports[1]; 347 tty->port = ports[1];
348 o_tty->port->itty = o_tty;
351 349
352 tty_driver_kref_get(driver); 350 tty_driver_kref_get(driver);
353 tty->count++; 351 tty->count++;
@@ -366,8 +364,15 @@ err:
366 return retval; 364 return retval;
367} 365}
368 366
367/* this is called once with whichever end is closed last */
368static void pty_unix98_shutdown(struct tty_struct *tty)
369{
370 devpts_kill_index(tty->driver_data, tty->index);
371}
372
369static void pty_cleanup(struct tty_struct *tty) 373static void pty_cleanup(struct tty_struct *tty)
370{ 374{
375 tty->port->itty = NULL;
371 kfree(tty->port); 376 kfree(tty->port);
372} 377}
373 378
@@ -547,7 +552,7 @@ static struct tty_struct *pts_unix98_lookup(struct tty_driver *driver,
547 struct tty_struct *tty; 552 struct tty_struct *tty;
548 553
549 mutex_lock(&devpts_mutex); 554 mutex_lock(&devpts_mutex);
550 tty = devpts_get_tty(pts_inode, idx); 555 tty = devpts_get_priv(pts_inode);
551 mutex_unlock(&devpts_mutex); 556 mutex_unlock(&devpts_mutex);
552 /* Master must be open before slave */ 557 /* Master must be open before slave */
553 if (!tty) 558 if (!tty)
@@ -581,6 +586,7 @@ static const struct tty_operations ptm_unix98_ops = {
581 .set_termios = pty_set_termios, 586 .set_termios = pty_set_termios,
582 .ioctl = pty_unix98_ioctl, 587 .ioctl = pty_unix98_ioctl,
583 .resize = pty_resize, 588 .resize = pty_resize,
589 .shutdown = pty_unix98_shutdown,
584 .cleanup = pty_cleanup 590 .cleanup = pty_cleanup
585}; 591};
586 592
@@ -596,6 +602,7 @@ static const struct tty_operations pty_unix98_ops = {
596 .chars_in_buffer = pty_chars_in_buffer, 602 .chars_in_buffer = pty_chars_in_buffer,
597 .unthrottle = pty_unthrottle, 603 .unthrottle = pty_unthrottle,
598 .set_termios = pty_set_termios, 604 .set_termios = pty_set_termios,
605 .shutdown = pty_unix98_shutdown,
599 .cleanup = pty_cleanup, 606 .cleanup = pty_cleanup,
600}; 607};
601 608
@@ -614,6 +621,7 @@ static const struct tty_operations pty_unix98_ops = {
614static int ptmx_open(struct inode *inode, struct file *filp) 621static int ptmx_open(struct inode *inode, struct file *filp)
615{ 622{
616 struct tty_struct *tty; 623 struct tty_struct *tty;
624 struct inode *slave_inode;
617 int retval; 625 int retval;
618 int index; 626 int index;
619 627
@@ -650,15 +658,21 @@ static int ptmx_open(struct inode *inode, struct file *filp)
650 658
651 tty_add_file(tty, filp); 659 tty_add_file(tty, filp);
652 660
653 retval = devpts_pty_new(inode, tty->link); 661 slave_inode = devpts_pty_new(inode,
654 if (retval) 662 MKDEV(UNIX98_PTY_SLAVE_MAJOR, index), index,
663 tty->link);
664 if (IS_ERR(slave_inode)) {
665 retval = PTR_ERR(slave_inode);
655 goto err_release; 666 goto err_release;
667 }
656 668
657 retval = ptm_driver->ops->open(tty, filp); 669 retval = ptm_driver->ops->open(tty, filp);
658 if (retval) 670 if (retval)
659 goto err_release; 671 goto err_release;
660 672
661 tty_unlock(tty); 673 tty_unlock(tty);
674 tty->driver_data = inode;
675 tty->link->driver_data = slave_inode;
662 return 0; 676 return 0;
663err_release: 677err_release:
664 tty_unlock(tty); 678 tty_unlock(tty);
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 3ba4234592bc..5ccbd90540cf 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -2349,16 +2349,14 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2349 serial_port_out(port, UART_EFR, efr); 2349 serial_port_out(port, UART_EFR, efr);
2350 } 2350 }
2351 2351
2352#ifdef CONFIG_ARCH_OMAP1
2353 /* Workaround to enable 115200 baud on OMAP1510 internal ports */ 2352 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2354 if (cpu_is_omap1510() && is_omap_port(up)) { 2353 if (is_omap1510_8250(up)) {
2355 if (baud == 115200) { 2354 if (baud == 115200) {
2356 quot = 1; 2355 quot = 1;
2357 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1); 2356 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2358 } else 2357 } else
2359 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0); 2358 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2360 } 2359 }
2361#endif
2362 2360
2363 /* 2361 /*
2364 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2, 2362 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
@@ -2439,10 +2437,9 @@ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2439{ 2437{
2440 if (pt->port.iotype == UPIO_AU) 2438 if (pt->port.iotype == UPIO_AU)
2441 return 0x1000; 2439 return 0x1000;
2442#ifdef CONFIG_ARCH_OMAP1 2440 if (is_omap1_8250(pt))
2443 if (is_omap_port(pt))
2444 return 0x16 << pt->port.regshift; 2441 return 0x16 << pt->port.regshift;
2445#endif 2442
2446 return 8 << pt->port.regshift; 2443 return 8 << pt->port.regshift;
2447} 2444}
2448 2445
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index 5a76f9c8d36b..3b4ea84898c2 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -106,3 +106,39 @@ static inline int serial8250_pnp_init(void) { return 0; }
106static inline void serial8250_pnp_exit(void) { } 106static inline void serial8250_pnp_exit(void) { }
107#endif 107#endif
108 108
109#ifdef CONFIG_ARCH_OMAP1
110static inline int is_omap1_8250(struct uart_8250_port *pt)
111{
112 int res;
113
114 switch (pt->port.mapbase) {
115 case OMAP1_UART1_BASE:
116 case OMAP1_UART2_BASE:
117 case OMAP1_UART3_BASE:
118 res = 1;
119 break;
120 default:
121 res = 0;
122 break;
123 }
124
125 return res;
126}
127
128static inline int is_omap1510_8250(struct uart_8250_port *pt)
129{
130 if (!cpu_is_omap1510())
131 return 0;
132
133 return is_omap1_8250(pt);
134}
135#else
136static inline int is_omap1_8250(struct uart_8250_port *pt)
137{
138 return 0;
139}
140static inline int is_omap1510_8250(struct uart_8250_port *pt)
141{
142 return 0;
143}
144#endif
diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
index eaafb98debed..843a150ba105 100644
--- a/drivers/tty/serial/8250/8250_early.c
+++ b/drivers/tty/serial/8250/8250_early.c
@@ -140,7 +140,7 @@ static void __init init_port(struct early_serial8250_device *device)
140 serial_out(port, UART_FCR, 0); /* no fifo */ 140 serial_out(port, UART_FCR, 0); /* no fifo */
141 serial_out(port, UART_MCR, 0x3); /* DTR + RTS */ 141 serial_out(port, UART_MCR, 0x3); /* DTR + RTS */
142 142
143 divisor = port->uartclk / (16 * device->baud); 143 divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
144 c = serial_in(port, UART_LCR); 144 c = serial_in(port, UART_LCR);
145 serial_out(port, UART_LCR, c | UART_LCR_DLAB); 145 serial_out(port, UART_LCR, c | UART_LCR_DLAB);
146 serial_out(port, UART_DLL, divisor & 0xff); 146 serial_out(port, UART_DLL, divisor & 0xff);
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 7f04717176aa..740458ca62cc 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -530,16 +530,16 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
530 switch (level) { 530 switch (level) {
531 case 3: 531 case 3:
532 if (!IS_ERR(ourport->baudclk)) 532 if (!IS_ERR(ourport->baudclk))
533 clk_disable(ourport->baudclk); 533 clk_disable_unprepare(ourport->baudclk);
534 534
535 clk_disable(ourport->clk); 535 clk_disable_unprepare(ourport->clk);
536 break; 536 break;
537 537
538 case 0: 538 case 0:
539 clk_enable(ourport->clk); 539 clk_prepare_enable(ourport->clk);
540 540
541 if (!IS_ERR(ourport->baudclk)) 541 if (!IS_ERR(ourport->baudclk))
542 clk_enable(ourport->baudclk); 542 clk_prepare_enable(ourport->baudclk);
543 543
544 break; 544 break;
545 default: 545 default:
@@ -713,11 +713,11 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
713 s3c24xx_serial_setsource(port, clk_sel); 713 s3c24xx_serial_setsource(port, clk_sel);
714 714
715 if (!IS_ERR(ourport->baudclk)) { 715 if (!IS_ERR(ourport->baudclk)) {
716 clk_disable(ourport->baudclk); 716 clk_disable_unprepare(ourport->baudclk);
717 ourport->baudclk = ERR_PTR(-EINVAL); 717 ourport->baudclk = ERR_PTR(-EINVAL);
718 } 718 }
719 719
720 clk_enable(clk); 720 clk_prepare_enable(clk);
721 721
722 ourport->baudclk = clk; 722 ourport->baudclk = clk;
723 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; 723 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
@@ -1287,9 +1287,9 @@ static int s3c24xx_serial_resume(struct device *dev)
1287 struct s3c24xx_uart_port *ourport = to_ourport(port); 1287 struct s3c24xx_uart_port *ourport = to_ourport(port);
1288 1288
1289 if (port) { 1289 if (port) {
1290 clk_enable(ourport->clk); 1290 clk_prepare_enable(ourport->clk);
1291 s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); 1291 s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
1292 clk_disable(ourport->clk); 1292 clk_disable_unprepare(ourport->clk);
1293 1293
1294 uart_resume_port(&s3c24xx_uart_drv, port); 1294 uart_resume_port(&s3c24xx_uart_drv, port);
1295 } 1295 }
diff --git a/drivers/tty/tty_audit.c b/drivers/tty/tty_audit.c
index b0b39b823ccf..6953dc82850c 100644
--- a/drivers/tty/tty_audit.c
+++ b/drivers/tty/tty_audit.c
@@ -23,7 +23,7 @@ struct tty_audit_buf {
23}; 23};
24 24
25static struct tty_audit_buf *tty_audit_buf_alloc(int major, int minor, 25static struct tty_audit_buf *tty_audit_buf_alloc(int major, int minor,
26 int icanon) 26 unsigned icanon)
27{ 27{
28 struct tty_audit_buf *buf; 28 struct tty_audit_buf *buf;
29 29
@@ -239,7 +239,8 @@ int tty_audit_push_task(struct task_struct *tsk, kuid_t loginuid, u32 sessionid)
239 * if TTY auditing is disabled or out of memory. Otherwise, return a new 239 * if TTY auditing is disabled or out of memory. Otherwise, return a new
240 * reference to the buffer. 240 * reference to the buffer.
241 */ 241 */
242static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty) 242static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty,
243 unsigned icanon)
243{ 244{
244 struct tty_audit_buf *buf, *buf2; 245 struct tty_audit_buf *buf, *buf2;
245 246
@@ -257,7 +258,7 @@ static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty)
257 258
258 buf2 = tty_audit_buf_alloc(tty->driver->major, 259 buf2 = tty_audit_buf_alloc(tty->driver->major,
259 tty->driver->minor_start + tty->index, 260 tty->driver->minor_start + tty->index,
260 tty->icanon); 261 icanon);
261 if (buf2 == NULL) { 262 if (buf2 == NULL) {
262 audit_log_lost("out of memory in TTY auditing"); 263 audit_log_lost("out of memory in TTY auditing");
263 return NULL; 264 return NULL;
@@ -287,7 +288,7 @@ static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty)
287 * Audit @data of @size from @tty, if necessary. 288 * Audit @data of @size from @tty, if necessary.
288 */ 289 */
289void tty_audit_add_data(struct tty_struct *tty, unsigned char *data, 290void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
290 size_t size) 291 size_t size, unsigned icanon)
291{ 292{
292 struct tty_audit_buf *buf; 293 struct tty_audit_buf *buf;
293 int major, minor; 294 int major, minor;
@@ -299,7 +300,7 @@ void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
299 && tty->driver->subtype == PTY_TYPE_MASTER) 300 && tty->driver->subtype == PTY_TYPE_MASTER)
300 return; 301 return;
301 302
302 buf = tty_audit_buf_get(tty); 303 buf = tty_audit_buf_get(tty, icanon);
303 if (!buf) 304 if (!buf)
304 return; 305 return;
305 306
@@ -307,11 +308,11 @@ void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
307 major = tty->driver->major; 308 major = tty->driver->major;
308 minor = tty->driver->minor_start + tty->index; 309 minor = tty->driver->minor_start + tty->index;
309 if (buf->major != major || buf->minor != minor 310 if (buf->major != major || buf->minor != minor
310 || buf->icanon != tty->icanon) { 311 || buf->icanon != icanon) {
311 tty_audit_buf_push_current(buf); 312 tty_audit_buf_push_current(buf);
312 buf->major = major; 313 buf->major = major;
313 buf->minor = minor; 314 buf->minor = minor;
314 buf->icanon = tty->icanon; 315 buf->icanon = icanon;
315 } 316 }
316 do { 317 do {
317 size_t run; 318 size_t run;
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c
index 91e326ffe7db..6cf87d7afb7e 100644
--- a/drivers/tty/tty_buffer.c
+++ b/drivers/tty/tty_buffer.c
@@ -27,19 +27,21 @@
27 * Locking: none 27 * Locking: none
28 */ 28 */
29 29
30void tty_buffer_free_all(struct tty_struct *tty) 30void tty_buffer_free_all(struct tty_port *port)
31{ 31{
32 struct tty_bufhead *buf = &port->buf;
32 struct tty_buffer *thead; 33 struct tty_buffer *thead;
33 while ((thead = tty->buf.head) != NULL) { 34
34 tty->buf.head = thead->next; 35 while ((thead = buf->head) != NULL) {
36 buf->head = thead->next;
35 kfree(thead); 37 kfree(thead);
36 } 38 }
37 while ((thead = tty->buf.free) != NULL) { 39 while ((thead = buf->free) != NULL) {
38 tty->buf.free = thead->next; 40 buf->free = thead->next;
39 kfree(thead); 41 kfree(thead);
40 } 42 }
41 tty->buf.tail = NULL; 43 buf->tail = NULL;
42 tty->buf.memory_used = 0; 44 buf->memory_used = 0;
43} 45}
44 46
45/** 47/**
@@ -54,11 +56,11 @@ void tty_buffer_free_all(struct tty_struct *tty)
54 * Locking: Caller must hold tty->buf.lock 56 * Locking: Caller must hold tty->buf.lock
55 */ 57 */
56 58
57static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size) 59static struct tty_buffer *tty_buffer_alloc(struct tty_port *port, size_t size)
58{ 60{
59 struct tty_buffer *p; 61 struct tty_buffer *p;
60 62
61 if (tty->buf.memory_used + size > 65536) 63 if (port->buf.memory_used + size > 65536)
62 return NULL; 64 return NULL;
63 p = kmalloc(sizeof(struct tty_buffer) + 2 * size, GFP_ATOMIC); 65 p = kmalloc(sizeof(struct tty_buffer) + 2 * size, GFP_ATOMIC);
64 if (p == NULL) 66 if (p == NULL)
@@ -70,7 +72,7 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
70 p->read = 0; 72 p->read = 0;
71 p->char_buf_ptr = (char *)(p->data); 73 p->char_buf_ptr = (char *)(p->data);
72 p->flag_buf_ptr = (unsigned char *)p->char_buf_ptr + size; 74 p->flag_buf_ptr = (unsigned char *)p->char_buf_ptr + size;
73 tty->buf.memory_used += size; 75 port->buf.memory_used += size;
74 return p; 76 return p;
75} 77}
76 78
@@ -85,17 +87,19 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
85 * Locking: Caller must hold tty->buf.lock 87 * Locking: Caller must hold tty->buf.lock
86 */ 88 */
87 89
88static void tty_buffer_free(struct tty_struct *tty, struct tty_buffer *b) 90static void tty_buffer_free(struct tty_port *port, struct tty_buffer *b)
89{ 91{
92 struct tty_bufhead *buf = &port->buf;
93
90 /* Dumb strategy for now - should keep some stats */ 94 /* Dumb strategy for now - should keep some stats */
91 tty->buf.memory_used -= b->size; 95 buf->memory_used -= b->size;
92 WARN_ON(tty->buf.memory_used < 0); 96 WARN_ON(buf->memory_used < 0);
93 97
94 if (b->size >= 512) 98 if (b->size >= 512)
95 kfree(b); 99 kfree(b);
96 else { 100 else {
97 b->next = tty->buf.free; 101 b->next = buf->free;
98 tty->buf.free = b; 102 buf->free = b;
99 } 103 }
100} 104}
101 105
@@ -110,15 +114,16 @@ static void tty_buffer_free(struct tty_struct *tty, struct tty_buffer *b)
110 * Locking: Caller must hold tty->buf.lock 114 * Locking: Caller must hold tty->buf.lock
111 */ 115 */
112 116
113static void __tty_buffer_flush(struct tty_struct *tty) 117static void __tty_buffer_flush(struct tty_port *port)
114{ 118{
119 struct tty_bufhead *buf = &port->buf;
115 struct tty_buffer *thead; 120 struct tty_buffer *thead;
116 121
117 while ((thead = tty->buf.head) != NULL) { 122 while ((thead = buf->head) != NULL) {
118 tty->buf.head = thead->next; 123 buf->head = thead->next;
119 tty_buffer_free(tty, thead); 124 tty_buffer_free(port, thead);
120 } 125 }
121 tty->buf.tail = NULL; 126 buf->tail = NULL;
122} 127}
123 128
124/** 129/**
@@ -134,21 +139,24 @@ static void __tty_buffer_flush(struct tty_struct *tty)
134 139
135void tty_buffer_flush(struct tty_struct *tty) 140void tty_buffer_flush(struct tty_struct *tty)
136{ 141{
142 struct tty_port *port = tty->port;
143 struct tty_bufhead *buf = &port->buf;
137 unsigned long flags; 144 unsigned long flags;
138 spin_lock_irqsave(&tty->buf.lock, flags); 145
146 spin_lock_irqsave(&buf->lock, flags);
139 147
140 /* If the data is being pushed to the tty layer then we can't 148 /* If the data is being pushed to the tty layer then we can't
141 process it here. Instead set a flag and the flush_to_ldisc 149 process it here. Instead set a flag and the flush_to_ldisc
142 path will process the flush request before it exits */ 150 path will process the flush request before it exits */
143 if (test_bit(TTY_FLUSHING, &tty->flags)) { 151 if (test_bit(TTYP_FLUSHING, &port->iflags)) {
144 set_bit(TTY_FLUSHPENDING, &tty->flags); 152 set_bit(TTYP_FLUSHPENDING, &port->iflags);
145 spin_unlock_irqrestore(&tty->buf.lock, flags); 153 spin_unlock_irqrestore(&buf->lock, flags);
146 wait_event(tty->read_wait, 154 wait_event(tty->read_wait,
147 test_bit(TTY_FLUSHPENDING, &tty->flags) == 0); 155 test_bit(TTYP_FLUSHPENDING, &port->iflags) == 0);
148 return; 156 return;
149 } else 157 } else
150 __tty_buffer_flush(tty); 158 __tty_buffer_flush(port);
151 spin_unlock_irqrestore(&tty->buf.lock, flags); 159 spin_unlock_irqrestore(&buf->lock, flags);
152} 160}
153 161
154/** 162/**
@@ -163,9 +171,9 @@ void tty_buffer_flush(struct tty_struct *tty)
163 * Locking: Caller must hold tty->buf.lock 171 * Locking: Caller must hold tty->buf.lock
164 */ 172 */
165 173
166static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size) 174static struct tty_buffer *tty_buffer_find(struct tty_port *port, size_t size)
167{ 175{
168 struct tty_buffer **tbh = &tty->buf.free; 176 struct tty_buffer **tbh = &port->buf.free;
169 while ((*tbh) != NULL) { 177 while ((*tbh) != NULL) {
170 struct tty_buffer *t = *tbh; 178 struct tty_buffer *t = *tbh;
171 if (t->size >= size) { 179 if (t->size >= size) {
@@ -174,14 +182,14 @@ static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
174 t->used = 0; 182 t->used = 0;
175 t->commit = 0; 183 t->commit = 0;
176 t->read = 0; 184 t->read = 0;
177 tty->buf.memory_used += t->size; 185 port->buf.memory_used += t->size;
178 return t; 186 return t;
179 } 187 }
180 tbh = &((*tbh)->next); 188 tbh = &((*tbh)->next);
181 } 189 }
182 /* Round the buffer size out */ 190 /* Round the buffer size out */
183 size = (size + 0xFF) & ~0xFF; 191 size = (size + 0xFF) & ~0xFF;
184 return tty_buffer_alloc(tty, size); 192 return tty_buffer_alloc(port, size);
185 /* Should possibly check if this fails for the largest buffer we 193 /* Should possibly check if this fails for the largest buffer we
186 have queued and recycle that ? */ 194 have queued and recycle that ? */
187} 195}
@@ -192,29 +200,31 @@ static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
192 * 200 *
193 * Make at least size bytes of linear space available for the tty 201 * Make at least size bytes of linear space available for the tty
194 * buffer. If we fail return the size we managed to find. 202 * buffer. If we fail return the size we managed to find.
195 * Locking: Caller must hold tty->buf.lock 203 * Locking: Caller must hold port->buf.lock
196 */ 204 */
197static int __tty_buffer_request_room(struct tty_struct *tty, size_t size) 205static int __tty_buffer_request_room(struct tty_port *port, size_t size)
198{ 206{
207 struct tty_bufhead *buf = &port->buf;
199 struct tty_buffer *b, *n; 208 struct tty_buffer *b, *n;
200 int left; 209 int left;
201 /* OPTIMISATION: We could keep a per tty "zero" sized buffer to 210 /* OPTIMISATION: We could keep a per tty "zero" sized buffer to
202 remove this conditional if its worth it. This would be invisible 211 remove this conditional if its worth it. This would be invisible
203 to the callers */ 212 to the callers */
204 if ((b = tty->buf.tail) != NULL) 213 b = buf->tail;
214 if (b != NULL)
205 left = b->size - b->used; 215 left = b->size - b->used;
206 else 216 else
207 left = 0; 217 left = 0;
208 218
209 if (left < size) { 219 if (left < size) {
210 /* This is the slow path - looking for new buffers to use */ 220 /* This is the slow path - looking for new buffers to use */
211 if ((n = tty_buffer_find(tty, size)) != NULL) { 221 if ((n = tty_buffer_find(port, size)) != NULL) {
212 if (b != NULL) { 222 if (b != NULL) {
213 b->next = n; 223 b->next = n;
214 b->commit = b->used; 224 b->commit = b->used;
215 } else 225 } else
216 tty->buf.head = n; 226 buf->head = n;
217 tty->buf.tail = n; 227 buf->tail = n;
218 } else 228 } else
219 size = left; 229 size = left;
220 } 230 }
@@ -231,16 +241,17 @@ static int __tty_buffer_request_room(struct tty_struct *tty, size_t size)
231 * Make at least size bytes of linear space available for the tty 241 * Make at least size bytes of linear space available for the tty
232 * buffer. If we fail return the size we managed to find. 242 * buffer. If we fail return the size we managed to find.
233 * 243 *
234 * Locking: Takes tty->buf.lock 244 * Locking: Takes port->buf.lock
235 */ 245 */
236int tty_buffer_request_room(struct tty_struct *tty, size_t size) 246int tty_buffer_request_room(struct tty_struct *tty, size_t size)
237{ 247{
248 struct tty_port *port = tty->port;
238 unsigned long flags; 249 unsigned long flags;
239 int length; 250 int length;
240 251
241 spin_lock_irqsave(&tty->buf.lock, flags); 252 spin_lock_irqsave(&port->buf.lock, flags);
242 length = __tty_buffer_request_room(tty, size); 253 length = __tty_buffer_request_room(port, size);
243 spin_unlock_irqrestore(&tty->buf.lock, flags); 254 spin_unlock_irqrestore(&port->buf.lock, flags);
244 return length; 255 return length;
245} 256}
246EXPORT_SYMBOL_GPL(tty_buffer_request_room); 257EXPORT_SYMBOL_GPL(tty_buffer_request_room);
@@ -255,12 +266,13 @@ EXPORT_SYMBOL_GPL(tty_buffer_request_room);
255 * Queue a series of bytes to the tty buffering. All the characters 266 * Queue a series of bytes to the tty buffering. All the characters
256 * passed are marked with the supplied flag. Returns the number added. 267 * passed are marked with the supplied flag. Returns the number added.
257 * 268 *
258 * Locking: Called functions may take tty->buf.lock 269 * Locking: Called functions may take port->buf.lock
259 */ 270 */
260 271
261int tty_insert_flip_string_fixed_flag(struct tty_struct *tty, 272int tty_insert_flip_string_fixed_flag(struct tty_struct *tty,
262 const unsigned char *chars, char flag, size_t size) 273 const unsigned char *chars, char flag, size_t size)
263{ 274{
275 struct tty_bufhead *buf = &tty->port->buf;
264 int copied = 0; 276 int copied = 0;
265 do { 277 do {
266 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); 278 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE);
@@ -268,18 +280,18 @@ int tty_insert_flip_string_fixed_flag(struct tty_struct *tty,
268 unsigned long flags; 280 unsigned long flags;
269 struct tty_buffer *tb; 281 struct tty_buffer *tb;
270 282
271 spin_lock_irqsave(&tty->buf.lock, flags); 283 spin_lock_irqsave(&buf->lock, flags);
272 space = __tty_buffer_request_room(tty, goal); 284 space = __tty_buffer_request_room(tty->port, goal);
273 tb = tty->buf.tail; 285 tb = buf->tail;
274 /* If there is no space then tb may be NULL */ 286 /* If there is no space then tb may be NULL */
275 if (unlikely(space == 0)) { 287 if (unlikely(space == 0)) {
276 spin_unlock_irqrestore(&tty->buf.lock, flags); 288 spin_unlock_irqrestore(&buf->lock, flags);
277 break; 289 break;
278 } 290 }
279 memcpy(tb->char_buf_ptr + tb->used, chars, space); 291 memcpy(tb->char_buf_ptr + tb->used, chars, space);
280 memset(tb->flag_buf_ptr + tb->used, flag, space); 292 memset(tb->flag_buf_ptr + tb->used, flag, space);
281 tb->used += space; 293 tb->used += space;
282 spin_unlock_irqrestore(&tty->buf.lock, flags); 294 spin_unlock_irqrestore(&buf->lock, flags);
283 copied += space; 295 copied += space;
284 chars += space; 296 chars += space;
285 /* There is a small chance that we need to split the data over 297 /* There is a small chance that we need to split the data over
@@ -300,12 +312,13 @@ EXPORT_SYMBOL(tty_insert_flip_string_fixed_flag);
300 * the flags array indicates the status of the character. Returns the 312 * the flags array indicates the status of the character. Returns the
301 * number added. 313 * number added.
302 * 314 *
303 * Locking: Called functions may take tty->buf.lock 315 * Locking: Called functions may take port->buf.lock
304 */ 316 */
305 317
306int tty_insert_flip_string_flags(struct tty_struct *tty, 318int tty_insert_flip_string_flags(struct tty_struct *tty,
307 const unsigned char *chars, const char *flags, size_t size) 319 const unsigned char *chars, const char *flags, size_t size)
308{ 320{
321 struct tty_bufhead *buf = &tty->port->buf;
309 int copied = 0; 322 int copied = 0;
310 do { 323 do {
311 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); 324 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE);
@@ -313,18 +326,18 @@ int tty_insert_flip_string_flags(struct tty_struct *tty,
313 unsigned long __flags; 326 unsigned long __flags;
314 struct tty_buffer *tb; 327 struct tty_buffer *tb;
315 328
316 spin_lock_irqsave(&tty->buf.lock, __flags); 329 spin_lock_irqsave(&buf->lock, __flags);
317 space = __tty_buffer_request_room(tty, goal); 330 space = __tty_buffer_request_room(tty->port, goal);
318 tb = tty->buf.tail; 331 tb = buf->tail;
319 /* If there is no space then tb may be NULL */ 332 /* If there is no space then tb may be NULL */
320 if (unlikely(space == 0)) { 333 if (unlikely(space == 0)) {
321 spin_unlock_irqrestore(&tty->buf.lock, __flags); 334 spin_unlock_irqrestore(&buf->lock, __flags);
322 break; 335 break;
323 } 336 }
324 memcpy(tb->char_buf_ptr + tb->used, chars, space); 337 memcpy(tb->char_buf_ptr + tb->used, chars, space);
325 memcpy(tb->flag_buf_ptr + tb->used, flags, space); 338 memcpy(tb->flag_buf_ptr + tb->used, flags, space);
326 tb->used += space; 339 tb->used += space;
327 spin_unlock_irqrestore(&tty->buf.lock, __flags); 340 spin_unlock_irqrestore(&buf->lock, __flags);
328 copied += space; 341 copied += space;
329 chars += space; 342 chars += space;
330 flags += space; 343 flags += space;
@@ -342,18 +355,23 @@ EXPORT_SYMBOL(tty_insert_flip_string_flags);
342 * Takes any pending buffers and transfers their ownership to the 355 * Takes any pending buffers and transfers their ownership to the
343 * ldisc side of the queue. It then schedules those characters for 356 * ldisc side of the queue. It then schedules those characters for
344 * processing by the line discipline. 357 * processing by the line discipline.
358 * Note that this function can only be used when the low_latency flag
359 * is unset. Otherwise the workqueue won't be flushed.
345 * 360 *
346 * Locking: Takes tty->buf.lock 361 * Locking: Takes port->buf.lock
347 */ 362 */
348 363
349void tty_schedule_flip(struct tty_struct *tty) 364void tty_schedule_flip(struct tty_struct *tty)
350{ 365{
366 struct tty_bufhead *buf = &tty->port->buf;
351 unsigned long flags; 367 unsigned long flags;
352 spin_lock_irqsave(&tty->buf.lock, flags); 368 WARN_ON(tty->low_latency);
353 if (tty->buf.tail != NULL) 369
354 tty->buf.tail->commit = tty->buf.tail->used; 370 spin_lock_irqsave(&buf->lock, flags);
355 spin_unlock_irqrestore(&tty->buf.lock, flags); 371 if (buf->tail != NULL)
356 schedule_work(&tty->buf.work); 372 buf->tail->commit = buf->tail->used;
373 spin_unlock_irqrestore(&buf->lock, flags);
374 schedule_work(&buf->work);
357} 375}
358EXPORT_SYMBOL(tty_schedule_flip); 376EXPORT_SYMBOL(tty_schedule_flip);
359 377
@@ -369,26 +387,27 @@ EXPORT_SYMBOL(tty_schedule_flip);
369 * that need their own block copy routines into the buffer. There is no 387 * that need their own block copy routines into the buffer. There is no
370 * guarantee the buffer is a DMA target! 388 * guarantee the buffer is a DMA target!
371 * 389 *
372 * Locking: May call functions taking tty->buf.lock 390 * Locking: May call functions taking port->buf.lock
373 */ 391 */
374 392
375int tty_prepare_flip_string(struct tty_struct *tty, unsigned char **chars, 393int tty_prepare_flip_string(struct tty_struct *tty, unsigned char **chars,
376 size_t size) 394 size_t size)
377{ 395{
396 struct tty_bufhead *buf = &tty->port->buf;
378 int space; 397 int space;
379 unsigned long flags; 398 unsigned long flags;
380 struct tty_buffer *tb; 399 struct tty_buffer *tb;
381 400
382 spin_lock_irqsave(&tty->buf.lock, flags); 401 spin_lock_irqsave(&buf->lock, flags);
383 space = __tty_buffer_request_room(tty, size); 402 space = __tty_buffer_request_room(tty->port, size);
384 403
385 tb = tty->buf.tail; 404 tb = buf->tail;
386 if (likely(space)) { 405 if (likely(space)) {
387 *chars = tb->char_buf_ptr + tb->used; 406 *chars = tb->char_buf_ptr + tb->used;
388 memset(tb->flag_buf_ptr + tb->used, TTY_NORMAL, space); 407 memset(tb->flag_buf_ptr + tb->used, TTY_NORMAL, space);
389 tb->used += space; 408 tb->used += space;
390 } 409 }
391 spin_unlock_irqrestore(&tty->buf.lock, flags); 410 spin_unlock_irqrestore(&buf->lock, flags);
392 return space; 411 return space;
393} 412}
394EXPORT_SYMBOL_GPL(tty_prepare_flip_string); 413EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
@@ -406,26 +425,27 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
406 * that need their own block copy routines into the buffer. There is no 425 * that need their own block copy routines into the buffer. There is no
407 * guarantee the buffer is a DMA target! 426 * guarantee the buffer is a DMA target!
408 * 427 *
409 * Locking: May call functions taking tty->buf.lock 428 * Locking: May call functions taking port->buf.lock
410 */ 429 */
411 430
412int tty_prepare_flip_string_flags(struct tty_struct *tty, 431int tty_prepare_flip_string_flags(struct tty_struct *tty,
413 unsigned char **chars, char **flags, size_t size) 432 unsigned char **chars, char **flags, size_t size)
414{ 433{
434 struct tty_bufhead *buf = &tty->port->buf;
415 int space; 435 int space;
416 unsigned long __flags; 436 unsigned long __flags;
417 struct tty_buffer *tb; 437 struct tty_buffer *tb;
418 438
419 spin_lock_irqsave(&tty->buf.lock, __flags); 439 spin_lock_irqsave(&buf->lock, __flags);
420 space = __tty_buffer_request_room(tty, size); 440 space = __tty_buffer_request_room(tty->port, size);
421 441
422 tb = tty->buf.tail; 442 tb = buf->tail;
423 if (likely(space)) { 443 if (likely(space)) {
424 *chars = tb->char_buf_ptr + tb->used; 444 *chars = tb->char_buf_ptr + tb->used;
425 *flags = tb->flag_buf_ptr + tb->used; 445 *flags = tb->flag_buf_ptr + tb->used;
426 tb->used += space; 446 tb->used += space;
427 } 447 }
428 spin_unlock_irqrestore(&tty->buf.lock, __flags); 448 spin_unlock_irqrestore(&buf->lock, __flags);
429 return space; 449 return space;
430} 450}
431EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags); 451EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags);
@@ -446,20 +466,25 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags);
446 466
447static void flush_to_ldisc(struct work_struct *work) 467static void flush_to_ldisc(struct work_struct *work)
448{ 468{
449 struct tty_struct *tty = 469 struct tty_port *port = container_of(work, struct tty_port, buf.work);
450 container_of(work, struct tty_struct, buf.work); 470 struct tty_bufhead *buf = &port->buf;
471 struct tty_struct *tty;
451 unsigned long flags; 472 unsigned long flags;
452 struct tty_ldisc *disc; 473 struct tty_ldisc *disc;
453 474
475 tty = port->itty;
476 if (WARN_RATELIMIT(tty == NULL, "tty is NULL"))
477 return;
478
454 disc = tty_ldisc_ref(tty); 479 disc = tty_ldisc_ref(tty);
455 if (disc == NULL) /* !TTY_LDISC */ 480 if (disc == NULL) /* !TTY_LDISC */
456 return; 481 return;
457 482
458 spin_lock_irqsave(&tty->buf.lock, flags); 483 spin_lock_irqsave(&buf->lock, flags);
459 484
460 if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) { 485 if (!test_and_set_bit(TTYP_FLUSHING, &port->iflags)) {
461 struct tty_buffer *head; 486 struct tty_buffer *head;
462 while ((head = tty->buf.head) != NULL) { 487 while ((head = buf->head) != NULL) {
463 int count; 488 int count;
464 char *char_buf; 489 char *char_buf;
465 unsigned char *flag_buf; 490 unsigned char *flag_buf;
@@ -468,14 +493,14 @@ static void flush_to_ldisc(struct work_struct *work)
468 if (!count) { 493 if (!count) {
469 if (head->next == NULL) 494 if (head->next == NULL)
470 break; 495 break;
471 tty->buf.head = head->next; 496 buf->head = head->next;
472 tty_buffer_free(tty, head); 497 tty_buffer_free(port, head);
473 continue; 498 continue;
474 } 499 }
475 /* Ldisc or user is trying to flush the buffers 500 /* Ldisc or user is trying to flush the buffers
476 we are feeding to the ldisc, stop feeding the 501 we are feeding to the ldisc, stop feeding the
477 line discipline as we want to empty the queue */ 502 line discipline as we want to empty the queue */
478 if (test_bit(TTY_FLUSHPENDING, &tty->flags)) 503 if (test_bit(TTYP_FLUSHPENDING, &port->iflags))
479 break; 504 break;
480 if (!tty->receive_room) 505 if (!tty->receive_room)
481 break; 506 break;
@@ -484,22 +509,22 @@ static void flush_to_ldisc(struct work_struct *work)
484 char_buf = head->char_buf_ptr + head->read; 509 char_buf = head->char_buf_ptr + head->read;
485 flag_buf = head->flag_buf_ptr + head->read; 510 flag_buf = head->flag_buf_ptr + head->read;
486 head->read += count; 511 head->read += count;
487 spin_unlock_irqrestore(&tty->buf.lock, flags); 512 spin_unlock_irqrestore(&buf->lock, flags);
488 disc->ops->receive_buf(tty, char_buf, 513 disc->ops->receive_buf(tty, char_buf,
489 flag_buf, count); 514 flag_buf, count);
490 spin_lock_irqsave(&tty->buf.lock, flags); 515 spin_lock_irqsave(&buf->lock, flags);
491 } 516 }
492 clear_bit(TTY_FLUSHING, &tty->flags); 517 clear_bit(TTYP_FLUSHING, &port->iflags);
493 } 518 }
494 519
495 /* We may have a deferred request to flush the input buffer, 520 /* We may have a deferred request to flush the input buffer,
496 if so pull the chain under the lock and empty the queue */ 521 if so pull the chain under the lock and empty the queue */
497 if (test_bit(TTY_FLUSHPENDING, &tty->flags)) { 522 if (test_bit(TTYP_FLUSHPENDING, &port->iflags)) {
498 __tty_buffer_flush(tty); 523 __tty_buffer_flush(port);
499 clear_bit(TTY_FLUSHPENDING, &tty->flags); 524 clear_bit(TTYP_FLUSHPENDING, &port->iflags);
500 wake_up(&tty->read_wait); 525 wake_up(&tty->read_wait);
501 } 526 }
502 spin_unlock_irqrestore(&tty->buf.lock, flags); 527 spin_unlock_irqrestore(&buf->lock, flags);
503 528
504 tty_ldisc_deref(disc); 529 tty_ldisc_deref(disc);
505} 530}
@@ -514,7 +539,8 @@ static void flush_to_ldisc(struct work_struct *work)
514 */ 539 */
515void tty_flush_to_ldisc(struct tty_struct *tty) 540void tty_flush_to_ldisc(struct tty_struct *tty)
516{ 541{
517 flush_work(&tty->buf.work); 542 if (!tty->low_latency)
543 flush_work(&tty->port->buf.work);
518} 544}
519 545
520/** 546/**
@@ -532,16 +558,18 @@ void tty_flush_to_ldisc(struct tty_struct *tty)
532 558
533void tty_flip_buffer_push(struct tty_struct *tty) 559void tty_flip_buffer_push(struct tty_struct *tty)
534{ 560{
561 struct tty_bufhead *buf = &tty->port->buf;
535 unsigned long flags; 562 unsigned long flags;
536 spin_lock_irqsave(&tty->buf.lock, flags); 563
537 if (tty->buf.tail != NULL) 564 spin_lock_irqsave(&buf->lock, flags);
538 tty->buf.tail->commit = tty->buf.tail->used; 565 if (buf->tail != NULL)
539 spin_unlock_irqrestore(&tty->buf.lock, flags); 566 buf->tail->commit = buf->tail->used;
567 spin_unlock_irqrestore(&buf->lock, flags);
540 568
541 if (tty->low_latency) 569 if (tty->low_latency)
542 flush_to_ldisc(&tty->buf.work); 570 flush_to_ldisc(&buf->work);
543 else 571 else
544 schedule_work(&tty->buf.work); 572 schedule_work(&buf->work);
545} 573}
546EXPORT_SYMBOL(tty_flip_buffer_push); 574EXPORT_SYMBOL(tty_flip_buffer_push);
547 575
@@ -555,13 +583,15 @@ EXPORT_SYMBOL(tty_flip_buffer_push);
555 * Locking: none 583 * Locking: none
556 */ 584 */
557 585
558void tty_buffer_init(struct tty_struct *tty) 586void tty_buffer_init(struct tty_port *port)
559{ 587{
560 spin_lock_init(&tty->buf.lock); 588 struct tty_bufhead *buf = &port->buf;
561 tty->buf.head = NULL; 589
562 tty->buf.tail = NULL; 590 spin_lock_init(&buf->lock);
563 tty->buf.free = NULL; 591 buf->head = NULL;
564 tty->buf.memory_used = 0; 592 buf->tail = NULL;
565 INIT_WORK(&tty->buf.work, flush_to_ldisc); 593 buf->free = NULL;
594 buf->memory_used = 0;
595 INIT_WORK(&buf->work, flush_to_ldisc);
566} 596}
567 597
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 2ea176b2280e..a3eba7f359ed 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -186,7 +186,6 @@ void free_tty_struct(struct tty_struct *tty)
186 if (tty->dev) 186 if (tty->dev)
187 put_device(tty->dev); 187 put_device(tty->dev);
188 kfree(tty->write_buf); 188 kfree(tty->write_buf);
189 tty_buffer_free_all(tty);
190 tty->magic = 0xDEADDEAD; 189 tty->magic = 0xDEADDEAD;
191 kfree(tty); 190 kfree(tty);
192} 191}
@@ -1417,6 +1416,8 @@ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx)
1417 "%s: %s driver does not set tty->port. This will crash the kernel later. Fix the driver!\n", 1416 "%s: %s driver does not set tty->port. This will crash the kernel later. Fix the driver!\n",
1418 __func__, tty->driver->name); 1417 __func__, tty->driver->name);
1419 1418
1419 tty->port->itty = tty;
1420
1420 /* 1421 /*
1421 * Structures all installed ... call the ldisc open routines. 1422 * Structures all installed ... call the ldisc open routines.
1422 * If we fail here just call release_tty to clean up. No need 1423 * If we fail here just call release_tty to clean up. No need
@@ -1552,6 +1553,7 @@ static void release_tty(struct tty_struct *tty, int idx)
1552 tty->ops->shutdown(tty); 1553 tty->ops->shutdown(tty);
1553 tty_free_termios(tty); 1554 tty_free_termios(tty);
1554 tty_driver_remove_tty(tty->driver, tty); 1555 tty_driver_remove_tty(tty->driver, tty);
1556 tty->port->itty = NULL;
1555 1557
1556 if (tty->link) 1558 if (tty->link)
1557 tty_kref_put(tty->link); 1559 tty_kref_put(tty->link);
@@ -1625,7 +1627,6 @@ int tty_release(struct inode *inode, struct file *filp)
1625 struct tty_struct *tty = file_tty(filp); 1627 struct tty_struct *tty = file_tty(filp);
1626 struct tty_struct *o_tty; 1628 struct tty_struct *o_tty;
1627 int pty_master, tty_closing, o_tty_closing, do_sleep; 1629 int pty_master, tty_closing, o_tty_closing, do_sleep;
1628 int devpts;
1629 int idx; 1630 int idx;
1630 char buf[64]; 1631 char buf[64];
1631 1632
@@ -1640,7 +1641,6 @@ int tty_release(struct inode *inode, struct file *filp)
1640 idx = tty->index; 1641 idx = tty->index;
1641 pty_master = (tty->driver->type == TTY_DRIVER_TYPE_PTY && 1642 pty_master = (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
1642 tty->driver->subtype == PTY_TYPE_MASTER); 1643 tty->driver->subtype == PTY_TYPE_MASTER);
1643 devpts = (tty->driver->flags & TTY_DRIVER_DEVPTS_MEM) != 0;
1644 /* Review: parallel close */ 1644 /* Review: parallel close */
1645 o_tty = tty->link; 1645 o_tty = tty->link;
1646 1646
@@ -1799,9 +1799,6 @@ int tty_release(struct inode *inode, struct file *filp)
1799 release_tty(tty, idx); 1799 release_tty(tty, idx);
1800 mutex_unlock(&tty_mutex); 1800 mutex_unlock(&tty_mutex);
1801 1801
1802 /* Make this pty number available for reallocation */
1803 if (devpts)
1804 devpts_kill_index(inode, idx);
1805 return 0; 1802 return 0;
1806} 1803}
1807 1804
@@ -2937,19 +2934,13 @@ void initialize_tty_struct(struct tty_struct *tty,
2937 tty_ldisc_init(tty); 2934 tty_ldisc_init(tty);
2938 tty->session = NULL; 2935 tty->session = NULL;
2939 tty->pgrp = NULL; 2936 tty->pgrp = NULL;
2940 tty->overrun_time = jiffies;
2941 tty_buffer_init(tty);
2942 mutex_init(&tty->legacy_mutex); 2937 mutex_init(&tty->legacy_mutex);
2943 mutex_init(&tty->termios_mutex); 2938 mutex_init(&tty->termios_mutex);
2944 mutex_init(&tty->ldisc_mutex); 2939 mutex_init(&tty->ldisc_mutex);
2945 init_waitqueue_head(&tty->write_wait); 2940 init_waitqueue_head(&tty->write_wait);
2946 init_waitqueue_head(&tty->read_wait); 2941 init_waitqueue_head(&tty->read_wait);
2947 INIT_WORK(&tty->hangup_work, do_tty_hangup); 2942 INIT_WORK(&tty->hangup_work, do_tty_hangup);
2948 mutex_init(&tty->atomic_read_lock);
2949 mutex_init(&tty->atomic_write_lock); 2943 mutex_init(&tty->atomic_write_lock);
2950 mutex_init(&tty->output_lock);
2951 mutex_init(&tty->echo_lock);
2952 spin_lock_init(&tty->read_lock);
2953 spin_lock_init(&tty->ctrl_lock); 2944 spin_lock_init(&tty->ctrl_lock);
2954 INIT_LIST_HEAD(&tty->tty_files); 2945 INIT_LIST_HEAD(&tty->tty_files);
2955 INIT_WORK(&tty->SAK_work, do_SAK_work); 2946 INIT_WORK(&tty->SAK_work, do_SAK_work);
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
index 0f2a2c5e704c..f4e6754525dc 100644
--- a/drivers/tty/tty_ldisc.c
+++ b/drivers/tty/tty_ldisc.c
@@ -512,7 +512,7 @@ static void tty_ldisc_restore(struct tty_struct *tty, struct tty_ldisc *old)
512static int tty_ldisc_halt(struct tty_struct *tty) 512static int tty_ldisc_halt(struct tty_struct *tty)
513{ 513{
514 clear_bit(TTY_LDISC, &tty->flags); 514 clear_bit(TTY_LDISC, &tty->flags);
515 return cancel_work_sync(&tty->buf.work); 515 return cancel_work_sync(&tty->port->buf.work);
516} 516}
517 517
518/** 518/**
@@ -525,7 +525,7 @@ static void tty_ldisc_flush_works(struct tty_struct *tty)
525{ 525{
526 flush_work(&tty->hangup_work); 526 flush_work(&tty->hangup_work);
527 flush_work(&tty->SAK_work); 527 flush_work(&tty->SAK_work);
528 flush_work(&tty->buf.work); 528 flush_work(&tty->port->buf.work);
529} 529}
530 530
531/** 531/**
@@ -704,9 +704,9 @@ enable:
704 /* Restart the work queue in case no characters kick it off. Safe if 704 /* Restart the work queue in case no characters kick it off. Safe if
705 already running */ 705 already running */
706 if (work) 706 if (work)
707 schedule_work(&tty->buf.work); 707 schedule_work(&tty->port->buf.work);
708 if (o_work) 708 if (o_work)
709 schedule_work(&o_tty->buf.work); 709 schedule_work(&o_tty->port->buf.work);
710 mutex_unlock(&tty->ldisc_mutex); 710 mutex_unlock(&tty->ldisc_mutex);
711 tty_unlock(tty); 711 tty_unlock(tty);
712 return retval; 712 return retval;
@@ -817,7 +817,7 @@ void tty_ldisc_hangup(struct tty_struct *tty)
817 */ 817 */
818 clear_bit(TTY_LDISC, &tty->flags); 818 clear_bit(TTY_LDISC, &tty->flags);
819 tty_unlock(tty); 819 tty_unlock(tty);
820 cancel_work_sync(&tty->buf.work); 820 cancel_work_sync(&tty->port->buf.work);
821 mutex_unlock(&tty->ldisc_mutex); 821 mutex_unlock(&tty->ldisc_mutex);
822retry: 822retry:
823 tty_lock(tty); 823 tty_lock(tty);
@@ -897,6 +897,11 @@ int tty_ldisc_setup(struct tty_struct *tty, struct tty_struct *o_tty)
897 897
898static void tty_ldisc_kill(struct tty_struct *tty) 898static void tty_ldisc_kill(struct tty_struct *tty)
899{ 899{
900 /* There cannot be users from userspace now. But there still might be
901 * drivers holding a reference via tty_ldisc_ref. Do not steal them the
902 * ldisc until they are done. */
903 tty_ldisc_wait_idle(tty, MAX_SCHEDULE_TIMEOUT);
904
900 mutex_lock(&tty->ldisc_mutex); 905 mutex_lock(&tty->ldisc_mutex);
901 /* 906 /*
902 * Now kill off the ldisc 907 * Now kill off the ldisc
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c
index d7bdd8d0c23f..416b42f7c346 100644
--- a/drivers/tty/tty_port.c
+++ b/drivers/tty/tty_port.c
@@ -21,6 +21,7 @@
21void tty_port_init(struct tty_port *port) 21void tty_port_init(struct tty_port *port)
22{ 22{
23 memset(port, 0, sizeof(*port)); 23 memset(port, 0, sizeof(*port));
24 tty_buffer_init(port);
24 init_waitqueue_head(&port->open_wait); 25 init_waitqueue_head(&port->open_wait);
25 init_waitqueue_head(&port->close_wait); 26 init_waitqueue_head(&port->close_wait);
26 init_waitqueue_head(&port->delta_msr_wait); 27 init_waitqueue_head(&port->delta_msr_wait);
@@ -126,6 +127,7 @@ static void tty_port_destructor(struct kref *kref)
126 struct tty_port *port = container_of(kref, struct tty_port, kref); 127 struct tty_port *port = container_of(kref, struct tty_port, kref);
127 if (port->xmit_buf) 128 if (port->xmit_buf)
128 free_page((unsigned long)port->xmit_buf); 129 free_page((unsigned long)port->xmit_buf);
130 tty_buffer_free_all(port);
129 if (port->ops->destruct) 131 if (port->ops->destruct)
130 port->ops->destruct(port); 132 port->ops->destruct(port);
131 else 133 else
diff --git a/drivers/tty/vt/selection.c b/drivers/tty/vt/selection.c
index 8e9b4be97a2d..60b7b6926059 100644
--- a/drivers/tty/vt/selection.c
+++ b/drivers/tty/vt/selection.c
@@ -341,15 +341,11 @@ int paste_selection(struct tty_struct *tty)
341 struct tty_ldisc *ld; 341 struct tty_ldisc *ld;
342 DECLARE_WAITQUEUE(wait, current); 342 DECLARE_WAITQUEUE(wait, current);
343 343
344
345 console_lock(); 344 console_lock();
346 poke_blanked_console(); 345 poke_blanked_console();
347 console_unlock(); 346 console_unlock();
348 347
349 /* FIXME: wtf is this supposed to achieve ? */ 348 ld = tty_ldisc_ref_wait(tty);
350 ld = tty_ldisc_ref(tty);
351 if (!ld)
352 ld = tty_ldisc_ref_wait(tty);
353 349
354 /* FIXME: this is completely unsafe */ 350 /* FIXME: this is completely unsafe */
355 add_wait_queue(&vc->paste_wait, &wait); 351 add_wait_queue(&vc->paste_wait, &wait);
@@ -361,8 +357,7 @@ int paste_selection(struct tty_struct *tty)
361 } 357 }
362 count = sel_buffer_lth - pasted; 358 count = sel_buffer_lth - pasted;
363 count = min(count, tty->receive_room); 359 count = min(count, tty->receive_room);
364 tty->ldisc->ops->receive_buf(tty, sel_buffer + pasted, 360 ld->ops->receive_buf(tty, sel_buffer + pasted, NULL, count);
365 NULL, count);
366 pasted += count; 361 pasted += count;
367 } 362 }
368 remove_wait_queue(&vc->paste_wait, &wait); 363 remove_wait_queue(&vc->paste_wait, &wait);
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 2a4749c3eb3f..23afa06b65a4 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -44,7 +44,7 @@
44#include <asm/unaligned.h> 44#include <asm/unaligned.h>
45#include <asm/mach-types.h> 45#include <asm/mach-types.h>
46 46
47#include <plat/dma.h> 47#include <plat-omap/dma-omap.h>
48 48
49#include <mach/usb.h> 49#include <mach/usb.h>
50 50
@@ -61,6 +61,8 @@
61#define DRIVER_DESC "OMAP UDC driver" 61#define DRIVER_DESC "OMAP UDC driver"
62#define DRIVER_VERSION "4 October 2004" 62#define DRIVER_VERSION "4 October 2004"
63 63
64#define OMAP_DMA_USB_W2FC_TX0 29
65
64/* 66/*
65 * The OMAP UDC needs _very_ early endpoint setup: before enabling the 67 * The OMAP UDC needs _very_ early endpoint setup: before enabling the
66 * D+ pullup to allow enumeration. That's too early for the gadget 68 * D+ pullup to allow enumeration. That's too early for the gadget
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index d7fe287d0678..0d5ac36fdf47 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -39,12 +39,13 @@
39#include <linux/platform_device.h> 39#include <linux/platform_device.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
41#include <linux/usb/ulpi.h> 41#include <linux/usb/ulpi.h>
42#include <plat/usb.h>
43#include <linux/regulator/consumer.h> 42#include <linux/regulator/consumer.h>
44#include <linux/pm_runtime.h> 43#include <linux/pm_runtime.h>
45#include <linux/gpio.h> 44#include <linux/gpio.h>
46#include <linux/clk.h> 45#include <linux/clk.h>
47 46
47#include <linux/platform_data/usb-omap.h>
48
48/* EHCI Register Set */ 49/* EHCI Register Set */
49#define EHCI_INSNREG04 (0xA0) 50#define EHCI_INSNREG04 (0xA0)
50#define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5) 51#define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 4531d03503c3..439e6e4f2d6b 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -25,7 +25,6 @@
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26 26
27#include <mach/mux.h> 27#include <mach/mux.h>
28#include <plat/fpga.h>
29 28
30#include <mach/hardware.h> 29#include <mach/hardware.h>
31#include <mach/irqs.h> 30#include <mach/irqs.h>
@@ -93,14 +92,14 @@ static int omap_ohci_transceiver_power(int on)
93{ 92{
94 if (on) { 93 if (on) {
95 if (machine_is_omap_innovator() && cpu_is_omap1510()) 94 if (machine_is_omap_innovator() && cpu_is_omap1510())
96 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) 95 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
97 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), 96 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
98 INNOVATOR_FPGA_CAM_USB_CONTROL); 97 INNOVATOR_FPGA_CAM_USB_CONTROL);
99 else if (machine_is_omap_osk()) 98 else if (machine_is_omap_osk())
100 tps65010_set_gpio_out_value(GPIO1, LOW); 99 tps65010_set_gpio_out_value(GPIO1, LOW);
101 } else { 100 } else {
102 if (machine_is_omap_innovator() && cpu_is_omap1510()) 101 if (machine_is_omap_innovator() && cpu_is_omap1510())
103 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) 102 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
104 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), 103 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
105 INNOVATOR_FPGA_CAM_USB_CONTROL); 104 INNOVATOR_FPGA_CAM_USB_CONTROL);
106 else if (machine_is_omap_osk()) 105 else if (machine_is_omap_osk())
diff --git a/drivers/usb/host/ohci-omap3.c b/drivers/usb/host/ohci-omap3.c
index 1b8133b6e451..bd7803dce9be 100644
--- a/drivers/usb/host/ohci-omap3.c
+++ b/drivers/usb/host/ohci-omap3.c
@@ -30,7 +30,6 @@
30 */ 30 */
31 31
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <plat/usb.h>
34#include <linux/pm_runtime.h> 33#include <linux/pm_runtime.h>
35 34
36/*-------------------------------------------------------------------------*/ 35/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index c964d6af178b..a87cdd2387cf 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -34,8 +34,7 @@
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
36#include <linux/usb/nop-usb-xceiv.h> 36#include <linux/usb/nop-usb-xceiv.h>
37 37#include <linux/platform_data/usb-omap.h>
38#include <plat/usb.h>
39 38
40#include "musb_core.h" 39#include "musb_core.h"
41 40
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index ff5f112053d2..aa34f22181c1 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -38,13 +38,12 @@
38#include <linux/pm_runtime.h> 38#include <linux/pm_runtime.h>
39#include <linux/module.h> 39#include <linux/module.h>
40#include <linux/usb/nop-usb-xceiv.h> 40#include <linux/usb/nop-usb-xceiv.h>
41#include <linux/platform_data/usb-omap.h>
41 42
42#include <linux/of.h> 43#include <linux/of.h>
43#include <linux/of_device.h> 44#include <linux/of_device.h>
44#include <linux/of_address.h> 45#include <linux/of_address.h>
45 46
46#include <plat/usb.h>
47
48#include "musb_core.h" 47#include "musb_core.h"
49 48
50#ifdef CONFIG_OF 49#ifdef CONFIG_OF
diff --git a/drivers/usb/musb/omap2430.h b/drivers/usb/musb/omap2430.h
index b85f3973e78c..8ef656659fcb 100644
--- a/drivers/usb/musb/omap2430.h
+++ b/drivers/usb/musb/omap2430.h
@@ -10,7 +10,7 @@
10#ifndef __MUSB_OMAP243X_H__ 10#ifndef __MUSB_OMAP243X_H__
11#define __MUSB_OMAP243X_H__ 11#define __MUSB_OMAP243X_H__
12 12
13#include <plat/usb.h> 13#include <linux/platform_data/usb-omap.h>
14 14
15/* 15/*
16 * OMAP2430-specific definitions 16 * OMAP2430-specific definitions
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index 7a62b95dac24..bfca114f7c56 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -16,7 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <plat/dma.h> 19#include <plat-omap/dma-omap.h>
20 20
21#include "musb_core.h" 21#include "musb_core.h"
22#include "tusb6010.h" 22#include "tusb6010.h"
@@ -25,6 +25,13 @@
25 25
26#define MAX_DMAREQ 5 /* REVISIT: Really 6, but req5 not OK */ 26#define MAX_DMAREQ 5 /* REVISIT: Really 6, but req5 not OK */
27 27
28#define OMAP24XX_DMA_EXT_DMAREQ0 2
29#define OMAP24XX_DMA_EXT_DMAREQ1 3
30#define OMAP242X_DMA_EXT_DMAREQ2 14
31#define OMAP242X_DMA_EXT_DMAREQ3 15
32#define OMAP242X_DMA_EXT_DMAREQ4 16
33#define OMAP242X_DMA_EXT_DMAREQ5 64
34
28struct tusb_omap_dma_ch { 35struct tusb_omap_dma_ch {
29 struct musb *musb; 36 struct musb *musb;
30 void __iomem *tbase; 37 void __iomem *tbase;
diff --git a/drivers/video/omap/lcd_inn1510.c b/drivers/video/omap/lcd_inn1510.c
index b38b1dd15ce3..2ee423279e35 100644
--- a/drivers/video/omap/lcd_inn1510.c
+++ b/drivers/video/omap/lcd_inn1510.c
@@ -23,7 +23,8 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/fpga.h> 26#include <mach/hardware.h>
27
27#include "omapfb.h" 28#include "omapfb.h"
28 29
29static int innovator1510_panel_init(struct lcd_panel *panel, 30static int innovator1510_panel_init(struct lcd_panel *panel,
@@ -38,13 +39,13 @@ static void innovator1510_panel_cleanup(struct lcd_panel *panel)
38 39
39static int innovator1510_panel_enable(struct lcd_panel *panel) 40static int innovator1510_panel_enable(struct lcd_panel *panel)
40{ 41{
41 fpga_write(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL); 42 __raw_writeb(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL);
42 return 0; 43 return 0;
43} 44}
44 45
45static void innovator1510_panel_disable(struct lcd_panel *panel) 46static void innovator1510_panel_disable(struct lcd_panel *panel)
46{ 47{
47 fpga_write(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL); 48 __raw_writeb(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL);
48} 49}
49 50
50static unsigned long innovator1510_panel_get_caps(struct lcd_panel *panel) 51static unsigned long innovator1510_panel_get_caps(struct lcd_panel *panel)
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index 7767338f8b14..c39d6e46f8c5 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -31,7 +31,7 @@
31#include <linux/gfp.h> 31#include <linux/gfp.h>
32 32
33#include <mach/lcdc.h> 33#include <mach/lcdc.h>
34#include <plat/dma.h> 34#include <plat-omap/dma-omap.h>
35 35
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37 37
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 4351c438b76f..1b5ee8ec192a 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -30,7 +30,7 @@
30#include <linux/uaccess.h> 30#include <linux/uaccess.h>
31#include <linux/module.h> 31#include <linux/module.h>
32 32
33#include <plat/dma.h> 33#include <plat-omap/dma-omap.h>
34 34
35#include "omapfb.h" 35#include "omapfb.h"
36#include "lcdc.h" 36#include "lcdc.h"
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index f79c137753d7..c510a4457398 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -25,7 +25,7 @@
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27 27
28#include <plat/dma.h> 28#include <plat-omap/dma-omap.h>
29 29
30#include "omapfb.h" 30#include "omapfb.h"
31#include "lcdc.h" 31#include "lcdc.h"
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index b2af72dc20bd..d94ef9e31a35 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -237,7 +237,7 @@ static int __init omap_dss_probe(struct platform_device *pdev)
237 237
238 core.pdev = pdev; 238 core.pdev = pdev;
239 239
240 dss_features_init(); 240 dss_features_init(pdata->version);
241 241
242 dss_apply_init(); 242 dss_apply_init();
243 243
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index b43477a5fae8..a5ab354f267a 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -37,8 +37,6 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/pm_runtime.h> 38#include <linux/pm_runtime.h>
39 39
40#include <plat/cpu.h>
41
42#include <video/omapdss.h> 40#include <video/omapdss.h>
43 41
44#include "dss.h" 42#include "dss.h"
@@ -4042,29 +4040,44 @@ static const struct dispc_features omap44xx_dispc_feats __initconst = {
4042 .gfx_fifo_workaround = true, 4040 .gfx_fifo_workaround = true,
4043}; 4041};
4044 4042
4045static int __init dispc_init_features(struct device *dev) 4043static int __init dispc_init_features(struct platform_device *pdev)
4046{ 4044{
4045 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
4047 const struct dispc_features *src; 4046 const struct dispc_features *src;
4048 struct dispc_features *dst; 4047 struct dispc_features *dst;
4049 4048
4050 dst = devm_kzalloc(dev, sizeof(*dst), GFP_KERNEL); 4049 dst = devm_kzalloc(&pdev->dev, sizeof(*dst), GFP_KERNEL);
4051 if (!dst) { 4050 if (!dst) {
4052 dev_err(dev, "Failed to allocate DISPC Features\n"); 4051 dev_err(&pdev->dev, "Failed to allocate DISPC Features\n");
4053 return -ENOMEM; 4052 return -ENOMEM;
4054 } 4053 }
4055 4054
4056 if (cpu_is_omap24xx()) { 4055 switch (pdata->version) {
4056 case OMAPDSS_VER_OMAP24xx:
4057 src = &omap24xx_dispc_feats; 4057 src = &omap24xx_dispc_feats;
4058 } else if (cpu_is_omap34xx()) { 4058 break;
4059 if (omap_rev() < OMAP3430_REV_ES3_0) 4059
4060 src = &omap34xx_rev1_0_dispc_feats; 4060 case OMAPDSS_VER_OMAP34xx_ES1:
4061 else 4061 src = &omap34xx_rev1_0_dispc_feats;
4062 src = &omap34xx_rev3_0_dispc_feats; 4062 break;
4063 } else if (cpu_is_omap44xx()) { 4063
4064 case OMAPDSS_VER_OMAP34xx_ES3:
4065 case OMAPDSS_VER_OMAP3630:
4066 case OMAPDSS_VER_AM35xx:
4067 src = &omap34xx_rev3_0_dispc_feats;
4068 break;
4069
4070 case OMAPDSS_VER_OMAP4430_ES1:
4071 case OMAPDSS_VER_OMAP4430_ES2:
4072 case OMAPDSS_VER_OMAP4:
4064 src = &omap44xx_dispc_feats; 4073 src = &omap44xx_dispc_feats;
4065 } else if (soc_is_omap54xx()) { 4074 break;
4075
4076 case OMAPDSS_VER_OMAP5:
4066 src = &omap44xx_dispc_feats; 4077 src = &omap44xx_dispc_feats;
4067 } else { 4078 break;
4079
4080 default:
4068 return -ENODEV; 4081 return -ENODEV;
4069 } 4082 }
4070 4083
@@ -4084,7 +4097,7 @@ static int __init omap_dispchw_probe(struct platform_device *pdev)
4084 4097
4085 dispc.pdev = pdev; 4098 dispc.pdev = pdev;
4086 4099
4087 r = dispc_init_features(&dispc.pdev->dev); 4100 r = dispc_init_features(dispc.pdev);
4088 if (r) 4101 if (r)
4089 return r; 4102 return r;
4090 4103
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 2ab1c3e96553..363852a0f764 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -35,8 +35,6 @@
35 35
36#include <video/omapdss.h> 36#include <video/omapdss.h>
37 37
38#include <plat/cpu.h>
39
40#include "dss.h" 38#include "dss.h"
41#include "dss_features.h" 39#include "dss_features.h"
42 40
@@ -792,29 +790,46 @@ static const struct dss_features omap54xx_dss_feats __initconst = {
792 .dpi_select_source = &dss_dpi_select_source_omap5, 790 .dpi_select_source = &dss_dpi_select_source_omap5,
793}; 791};
794 792
795static int __init dss_init_features(struct device *dev) 793static int __init dss_init_features(struct platform_device *pdev)
796{ 794{
795 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
797 const struct dss_features *src; 796 const struct dss_features *src;
798 struct dss_features *dst; 797 struct dss_features *dst;
799 798
800 dst = devm_kzalloc(dev, sizeof(*dst), GFP_KERNEL); 799 dst = devm_kzalloc(&pdev->dev, sizeof(*dst), GFP_KERNEL);
801 if (!dst) { 800 if (!dst) {
802 dev_err(dev, "Failed to allocate local DSS Features\n"); 801 dev_err(&pdev->dev, "Failed to allocate local DSS Features\n");
803 return -ENOMEM; 802 return -ENOMEM;
804 } 803 }
805 804
806 if (cpu_is_omap24xx()) 805 switch (pdata->version) {
806 case OMAPDSS_VER_OMAP24xx:
807 src = &omap24xx_dss_feats; 807 src = &omap24xx_dss_feats;
808 else if (cpu_is_omap34xx()) 808 break;
809
810 case OMAPDSS_VER_OMAP34xx_ES1:
811 case OMAPDSS_VER_OMAP34xx_ES3:
812 case OMAPDSS_VER_AM35xx:
809 src = &omap34xx_dss_feats; 813 src = &omap34xx_dss_feats;
810 else if (cpu_is_omap3630()) 814 break;
815
816 case OMAPDSS_VER_OMAP3630:
811 src = &omap3630_dss_feats; 817 src = &omap3630_dss_feats;
812 else if (cpu_is_omap44xx()) 818 break;
819
820 case OMAPDSS_VER_OMAP4430_ES1:
821 case OMAPDSS_VER_OMAP4430_ES2:
822 case OMAPDSS_VER_OMAP4:
813 src = &omap44xx_dss_feats; 823 src = &omap44xx_dss_feats;
814 else if (soc_is_omap54xx()) 824 break;
825
826 case OMAPDSS_VER_OMAP5:
815 src = &omap54xx_dss_feats; 827 src = &omap54xx_dss_feats;
816 else 828 break;
829
830 default:
817 return -ENODEV; 831 return -ENODEV;
832 }
818 833
819 memcpy(dst, src, sizeof(*dst)); 834 memcpy(dst, src, sizeof(*dst));
820 dss.feat = dst; 835 dss.feat = dst;
@@ -831,7 +846,7 @@ static int __init omap_dsshw_probe(struct platform_device *pdev)
831 846
832 dss.pdev = pdev; 847 dss.pdev = pdev;
833 848
834 r = dss_init_features(&dss.pdev->dev); 849 r = dss_init_features(dss.pdev);
835 if (r) 850 if (r)
836 return r; 851 return r;
837 852
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index acbc1e1efba3..3e8287c8709d 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -23,7 +23,6 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24 24
25#include <video/omapdss.h> 25#include <video/omapdss.h>
26#include <plat/cpu.h>
27 26
28#include "dss.h" 27#include "dss.h"
29#include "dss_features.h" 28#include "dss_features.h"
@@ -825,10 +824,20 @@ static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
825 824
826}; 825};
827 826
828void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data) 827void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
828 enum omapdss_version version)
829{ 829{
830 if (cpu_is_omap44xx()) 830 switch (version) {
831 case OMAPDSS_VER_OMAP4430_ES1:
832 case OMAPDSS_VER_OMAP4430_ES2:
833 case OMAPDSS_VER_OMAP4:
831 ip_data->ops = &omap4_hdmi_functions; 834 ip_data->ops = &omap4_hdmi_functions;
835 break;
836 default:
837 ip_data->ops = NULL;
838 }
839
840 WARN_ON(ip_data->ops == NULL);
832} 841}
833#endif 842#endif
834 843
@@ -929,29 +938,44 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
929 return omap_current_dss_features->supported_rotation_types & rot_type; 938 return omap_current_dss_features->supported_rotation_types & rot_type;
930} 939}
931 940
932void dss_features_init(void) 941void dss_features_init(enum omapdss_version version)
933{ 942{
934 if (cpu_is_omap24xx()) 943 switch (version) {
944 case OMAPDSS_VER_OMAP24xx:
935 omap_current_dss_features = &omap2_dss_features; 945 omap_current_dss_features = &omap2_dss_features;
936 else if (cpu_is_omap3630()) 946 break;
947
948 case OMAPDSS_VER_OMAP34xx_ES1:
949 case OMAPDSS_VER_OMAP34xx_ES3:
950 omap_current_dss_features = &omap3430_dss_features;
951 break;
952
953 case OMAPDSS_VER_OMAP3630:
937 omap_current_dss_features = &omap3630_dss_features; 954 omap_current_dss_features = &omap3630_dss_features;
938 else if (cpu_is_omap34xx()) { 955 break;
939 if (soc_is_am35xx()) { 956
940 omap_current_dss_features = &am35xx_dss_features; 957 case OMAPDSS_VER_OMAP4430_ES1:
941 } else {
942 omap_current_dss_features = &omap3430_dss_features;
943 }
944 }
945 else if (omap_rev() == OMAP4430_REV_ES1_0)
946 omap_current_dss_features = &omap4430_es1_0_dss_features; 958 omap_current_dss_features = &omap4430_es1_0_dss_features;
947 else if (omap_rev() == OMAP4430_REV_ES2_0 || 959 break;
948 omap_rev() == OMAP4430_REV_ES2_1 || 960
949 omap_rev() == OMAP4430_REV_ES2_2) 961 case OMAPDSS_VER_OMAP4430_ES2:
950 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features; 962 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
951 else if (cpu_is_omap44xx()) 963 break;
964
965 case OMAPDSS_VER_OMAP4:
952 omap_current_dss_features = &omap4_dss_features; 966 omap_current_dss_features = &omap4_dss_features;
953 else if (soc_is_omap54xx()) 967 break;
968
969 case OMAPDSS_VER_OMAP5:
954 omap_current_dss_features = &omap5_dss_features; 970 omap_current_dss_features = &omap5_dss_features;
955 else 971 break;
972
973 case OMAPDSS_VER_AM35xx:
974 omap_current_dss_features = &am35xx_dss_features;
975 break;
976
977 default:
956 DSSWARN("Unsupported OMAP version"); 978 DSSWARN("Unsupported OMAP version");
979 break;
980 }
957} 981}
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 9218113b5e88..fc492ef72a51 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -123,8 +123,9 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
123 123
124bool dss_has_feature(enum dss_feat_id id); 124bool dss_has_feature(enum dss_feat_id id);
125void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); 125void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
126void dss_features_init(void); 126void dss_features_init(enum omapdss_version version);
127#if defined(CONFIG_OMAP4_DSS_HDMI) 127#if defined(CONFIG_OMAP4_DSS_HDMI)
128void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data); 128void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
129 enum omapdss_version version);
129#endif 130#endif
130#endif 131#endif
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index a48a7dd75b33..adcc906d12f8 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -323,6 +323,7 @@ static void hdmi_runtime_put(void)
323 323
324static int __init hdmi_init_display(struct omap_dss_device *dssdev) 324static int __init hdmi_init_display(struct omap_dss_device *dssdev)
325{ 325{
326 struct omap_dss_board_info *pdata = hdmi.pdev->dev.platform_data;
326 int r; 327 int r;
327 328
328 struct gpio gpios[] = { 329 struct gpio gpios[] = {
@@ -333,7 +334,7 @@ static int __init hdmi_init_display(struct omap_dss_device *dssdev)
333 334
334 DSSDBG("init_display\n"); 335 DSSDBG("init_display\n");
335 336
336 dss_init_hdmi_ip_ops(&hdmi.ip_data); 337 dss_init_hdmi_ip_ops(&hdmi.ip_data, pdata->version);
337 338
338 if (hdmi.vdda_hdmi_dac_reg == NULL) { 339 if (hdmi.vdda_hdmi_dac_reg == NULL) {
339 struct regulator *reg; 340 struct regulator *reg;
diff --git a/drivers/video/omap2/omapfb/omapfb-ioctl.c b/drivers/video/omap2/omapfb/omapfb-ioctl.c
index 606b89f12351..55a39be694a5 100644
--- a/drivers/video/omap2/omapfb/omapfb-ioctl.c
+++ b/drivers/video/omap2/omapfb/omapfb-ioctl.c
@@ -30,7 +30,7 @@
30#include <linux/export.h> 30#include <linux/export.h>
31 31
32#include <video/omapdss.h> 32#include <video/omapdss.h>
33#include <plat/vrfb.h> 33#include <video/omapvrfb.h>
34#include <plat/vram.h> 34#include <plat/vram.h>
35 35
36#include "omapfb.h" 36#include "omapfb.h"
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index 16db1589bd91..bc225e46fdd2 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -31,9 +31,8 @@
31#include <linux/omapfb.h> 31#include <linux/omapfb.h>
32 32
33#include <video/omapdss.h> 33#include <video/omapdss.h>
34#include <plat/cpu.h>
35#include <plat/vram.h> 34#include <plat/vram.h>
36#include <plat/vrfb.h> 35#include <video/omapvrfb.h>
37 36
38#include "omapfb.h" 37#include "omapfb.h"
39 38
@@ -2396,10 +2395,7 @@ static int __init omapfb_probe(struct platform_device *pdev)
2396 goto err0; 2395 goto err0;
2397 } 2396 }
2398 2397
2399 /* TODO : Replace cpu check with omap_has_vrfb once HAS_FEATURE 2398 if (def_vrfb && !omap_vrfb_supported()) {
2400 * available for OMAP2 and OMAP3
2401 */
2402 if (def_vrfb && !cpu_is_omap24xx() && !cpu_is_omap34xx()) {
2403 def_vrfb = 0; 2399 def_vrfb = 0;
2404 dev_warn(&pdev->dev, "VRFB is not supported on this hardware, " 2400 dev_warn(&pdev->dev, "VRFB is not supported on this hardware, "
2405 "ignoring the module parameter vrfb=y\n"); 2401 "ignoring the module parameter vrfb=y\n");
diff --git a/drivers/video/omap2/omapfb/omapfb-sysfs.c b/drivers/video/omap2/omapfb/omapfb-sysfs.c
index e8d8cc76a435..17aa174e187c 100644
--- a/drivers/video/omap2/omapfb/omapfb-sysfs.c
+++ b/drivers/video/omap2/omapfb/omapfb-sysfs.c
@@ -30,7 +30,7 @@
30#include <linux/omapfb.h> 30#include <linux/omapfb.h>
31 31
32#include <video/omapdss.h> 32#include <video/omapdss.h>
33#include <plat/vrfb.h> 33#include <video/omapvrfb.h>
34 34
35#include "omapfb.h" 35#include "omapfb.h"
36 36
diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c
index 7e990220ad2a..5d8fdac3b800 100644
--- a/drivers/video/omap2/vrfb.c
+++ b/drivers/video/omap2/vrfb.c
@@ -26,9 +26,9 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/bitops.h> 27#include <linux/bitops.h>
28#include <linux/mutex.h> 28#include <linux/mutex.h>
29#include <linux/platform_device.h>
29 30
30#include <plat/vrfb.h> 31#include <video/omapvrfb.h>
31#include <plat/sdrc.h>
32 32
33#ifdef DEBUG 33#ifdef DEBUG
34#define DBG(format, ...) pr_debug("VRFB: " format, ## __VA_ARGS__) 34#define DBG(format, ...) pr_debug("VRFB: " format, ## __VA_ARGS__)
@@ -36,10 +36,10 @@
36#define DBG(format, ...) 36#define DBG(format, ...)
37#endif 37#endif
38 38
39#define SMS_ROT_VIRT_BASE(context, rot) \ 39#define SMS_ROT_CONTROL(context) (0x0 + 0x10 * context)
40 (((context >= 4) ? 0xD0000000 : 0x70000000) \ 40#define SMS_ROT_SIZE(context) (0x4 + 0x10 * context)
41 + (0x4000000 * (context)) \ 41#define SMS_ROT_PHYSICAL_BA(context) (0x8 + 0x10 * context)
42 + (0x1000000 * (rot))) 42#define SMS_ROT_VIRT_BASE(rot) (0x1000000 * (rot))
43 43
44#define OMAP_VRFB_SIZE (2048 * 2048 * 4) 44#define OMAP_VRFB_SIZE (2048 * 2048 * 4)
45 45
@@ -53,10 +53,16 @@
53#define SMS_PW_OFFSET 4 53#define SMS_PW_OFFSET 4
54#define SMS_PS_OFFSET 0 54#define SMS_PS_OFFSET 0
55 55
56#define VRFB_NUM_CTXS 12
57/* bitmap of reserved contexts */ 56/* bitmap of reserved contexts */
58static unsigned long ctx_map; 57static unsigned long ctx_map;
59 58
59struct vrfb_ctx {
60 u32 base;
61 u32 physical_ba;
62 u32 control;
63 u32 size;
64};
65
60static DEFINE_MUTEX(ctx_lock); 66static DEFINE_MUTEX(ctx_lock);
61 67
62/* 68/*
@@ -65,17 +71,34 @@ static DEFINE_MUTEX(ctx_lock);
65 * we don't need locking, since no drivers will run until after the wake-up 71 * we don't need locking, since no drivers will run until after the wake-up
66 * has finished. 72 * has finished.
67 */ 73 */
68static struct { 74
69 u32 physical_ba; 75static void __iomem *vrfb_base;
70 u32 control; 76
71 u32 size; 77static int num_ctxs;
72} vrfb_hw_context[VRFB_NUM_CTXS]; 78static struct vrfb_ctx *ctxs;
79
80static bool vrfb_loaded;
81
82static void omap2_sms_write_rot_control(u32 val, unsigned ctx)
83{
84 __raw_writel(val, vrfb_base + SMS_ROT_CONTROL(ctx));
85}
86
87static void omap2_sms_write_rot_size(u32 val, unsigned ctx)
88{
89 __raw_writel(val, vrfb_base + SMS_ROT_SIZE(ctx));
90}
91
92static void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
93{
94 __raw_writel(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx));
95}
73 96
74static inline void restore_hw_context(int ctx) 97static inline void restore_hw_context(int ctx)
75{ 98{
76 omap2_sms_write_rot_control(vrfb_hw_context[ctx].control, ctx); 99 omap2_sms_write_rot_control(ctxs[ctx].control, ctx);
77 omap2_sms_write_rot_size(vrfb_hw_context[ctx].size, ctx); 100 omap2_sms_write_rot_size(ctxs[ctx].size, ctx);
78 omap2_sms_write_rot_physical_ba(vrfb_hw_context[ctx].physical_ba, ctx); 101 omap2_sms_write_rot_physical_ba(ctxs[ctx].physical_ba, ctx);
79} 102}
80 103
81static u32 get_image_width_roundup(u16 width, u8 bytespp) 104static u32 get_image_width_roundup(u16 width, u8 bytespp)
@@ -196,9 +219,9 @@ void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr,
196 control |= VRFB_PAGE_WIDTH_EXP << SMS_PW_OFFSET; 219 control |= VRFB_PAGE_WIDTH_EXP << SMS_PW_OFFSET;
197 control |= VRFB_PAGE_HEIGHT_EXP << SMS_PH_OFFSET; 220 control |= VRFB_PAGE_HEIGHT_EXP << SMS_PH_OFFSET;
198 221
199 vrfb_hw_context[ctx].physical_ba = paddr; 222 ctxs[ctx].physical_ba = paddr;
200 vrfb_hw_context[ctx].size = size; 223 ctxs[ctx].size = size;
201 vrfb_hw_context[ctx].control = control; 224 ctxs[ctx].control = control;
202 225
203 omap2_sms_write_rot_physical_ba(paddr, ctx); 226 omap2_sms_write_rot_physical_ba(paddr, ctx);
204 omap2_sms_write_rot_size(size, ctx); 227 omap2_sms_write_rot_size(size, ctx);
@@ -274,11 +297,11 @@ int omap_vrfb_request_ctx(struct vrfb *vrfb)
274 297
275 mutex_lock(&ctx_lock); 298 mutex_lock(&ctx_lock);
276 299
277 for (ctx = 0; ctx < VRFB_NUM_CTXS; ++ctx) 300 for (ctx = 0; ctx < num_ctxs; ++ctx)
278 if ((ctx_map & (1 << ctx)) == 0) 301 if ((ctx_map & (1 << ctx)) == 0)
279 break; 302 break;
280 303
281 if (ctx == VRFB_NUM_CTXS) { 304 if (ctx == num_ctxs) {
282 pr_err("vrfb: no free contexts\n"); 305 pr_err("vrfb: no free contexts\n");
283 r = -EBUSY; 306 r = -EBUSY;
284 goto out; 307 goto out;
@@ -293,7 +316,7 @@ int omap_vrfb_request_ctx(struct vrfb *vrfb)
293 vrfb->context = ctx; 316 vrfb->context = ctx;
294 317
295 for (rot = 0; rot < 4; ++rot) { 318 for (rot = 0; rot < 4; ++rot) {
296 paddr = SMS_ROT_VIRT_BASE(ctx, rot); 319 paddr = ctxs[ctx].base + SMS_ROT_VIRT_BASE(rot);
297 if (!request_mem_region(paddr, OMAP_VRFB_SIZE, "vrfb")) { 320 if (!request_mem_region(paddr, OMAP_VRFB_SIZE, "vrfb")) {
298 pr_err("vrfb: failed to reserve VRFB " 321 pr_err("vrfb: failed to reserve VRFB "
299 "area for ctx %d, rotation %d\n", 322 "area for ctx %d, rotation %d\n",
@@ -314,3 +337,80 @@ out:
314 return r; 337 return r;
315} 338}
316EXPORT_SYMBOL(omap_vrfb_request_ctx); 339EXPORT_SYMBOL(omap_vrfb_request_ctx);
340
341bool omap_vrfb_supported(void)
342{
343 return vrfb_loaded;
344}
345EXPORT_SYMBOL(omap_vrfb_supported);
346
347static int __init vrfb_probe(struct platform_device *pdev)
348{
349 struct resource *mem;
350 int i;
351
352 /* first resource is the register res, the rest are vrfb contexts */
353
354 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
355 if (!mem) {
356 dev_err(&pdev->dev, "can't get vrfb base address\n");
357 return -EINVAL;
358 }
359
360 vrfb_base = devm_request_and_ioremap(&pdev->dev, mem);
361 if (!vrfb_base) {
362 dev_err(&pdev->dev, "can't ioremap vrfb memory\n");
363 return -ENOMEM;
364 }
365
366 num_ctxs = pdev->num_resources - 1;
367
368 ctxs = devm_kzalloc(&pdev->dev,
369 sizeof(struct vrfb_ctx) * num_ctxs,
370 GFP_KERNEL);
371
372 if (!ctxs)
373 return -ENOMEM;
374
375 for (i = 0; i < num_ctxs; ++i) {
376 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1 + i);
377 if (!mem) {
378 dev_err(&pdev->dev, "can't get vrfb ctx %d address\n",
379 i);
380 return -EINVAL;
381 }
382
383 ctxs[i].base = mem->start;
384 }
385
386 vrfb_loaded = true;
387
388 return 0;
389}
390
391static void __exit vrfb_remove(struct platform_device *pdev)
392{
393 vrfb_loaded = false;
394}
395
396static struct platform_driver vrfb_driver = {
397 .driver.name = "omapvrfb",
398 .remove = __exit_p(vrfb_remove),
399};
400
401static int __init vrfb_init(void)
402{
403 return platform_driver_probe(&vrfb_driver, &vrfb_probe);
404}
405
406static void __exit vrfb_exit(void)
407{
408 platform_driver_unregister(&vrfb_driver);
409}
410
411module_init(vrfb_init);
412module_exit(vrfb_exit);
413
414MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
415MODULE_DESCRIPTION("OMAP VRFB");
416MODULE_LICENSE("GPL v2");
diff --git a/fs/devpts/inode.c b/fs/devpts/inode.c
index 14afbabe6546..472e6befc54d 100644
--- a/fs/devpts/inode.c
+++ b/fs/devpts/inode.c
@@ -545,37 +545,38 @@ void devpts_kill_index(struct inode *ptmx_inode, int idx)
545 mutex_unlock(&allocated_ptys_lock); 545 mutex_unlock(&allocated_ptys_lock);
546} 546}
547 547
548int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty) 548/**
549 * devpts_pty_new -- create a new inode in /dev/pts/
550 * @ptmx_inode: inode of the master
551 * @device: major+minor of the node to be created
552 * @index: used as a name of the node
553 * @priv: what's given back by devpts_get_priv
554 *
555 * The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.
556 */
557struct inode *devpts_pty_new(struct inode *ptmx_inode, dev_t device, int index,
558 void *priv)
549{ 559{
550 /* tty layer puts index from devpts_new_index() in here */
551 int number = tty->index;
552 struct tty_driver *driver = tty->driver;
553 dev_t device = MKDEV(driver->major, driver->minor_start+number);
554 struct dentry *dentry; 560 struct dentry *dentry;
555 struct super_block *sb = pts_sb_from_inode(ptmx_inode); 561 struct super_block *sb = pts_sb_from_inode(ptmx_inode);
556 struct inode *inode = new_inode(sb); 562 struct inode *inode;
557 struct dentry *root = sb->s_root; 563 struct dentry *root = sb->s_root;
558 struct pts_fs_info *fsi = DEVPTS_SB(sb); 564 struct pts_fs_info *fsi = DEVPTS_SB(sb);
559 struct pts_mount_opts *opts = &fsi->mount_opts; 565 struct pts_mount_opts *opts = &fsi->mount_opts;
560 int ret = 0;
561 char s[12]; 566 char s[12];
562 567
563 /* We're supposed to be given the slave end of a pty */ 568 inode = new_inode(sb);
564 BUG_ON(driver->type != TTY_DRIVER_TYPE_PTY);
565 BUG_ON(driver->subtype != PTY_TYPE_SLAVE);
566
567 if (!inode) 569 if (!inode)
568 return -ENOMEM; 570 return ERR_PTR(-ENOMEM);
569 571
570 inode->i_ino = number + 3; 572 inode->i_ino = index + 3;
571 inode->i_uid = opts->setuid ? opts->uid : current_fsuid(); 573 inode->i_uid = opts->setuid ? opts->uid : current_fsuid();
572 inode->i_gid = opts->setgid ? opts->gid : current_fsgid(); 574 inode->i_gid = opts->setgid ? opts->gid : current_fsgid();
573 inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME; 575 inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
574 init_special_inode(inode, S_IFCHR|opts->mode, device); 576 init_special_inode(inode, S_IFCHR|opts->mode, device);
575 inode->i_private = tty; 577 inode->i_private = priv;
576 tty->driver_data = inode;
577 578
578 sprintf(s, "%d", number); 579 sprintf(s, "%d", index);
579 580
580 mutex_lock(&root->d_inode->i_mutex); 581 mutex_lock(&root->d_inode->i_mutex);
581 582
@@ -585,18 +586,24 @@ int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty)
585 fsnotify_create(root->d_inode, dentry); 586 fsnotify_create(root->d_inode, dentry);
586 } else { 587 } else {
587 iput(inode); 588 iput(inode);
588 ret = -ENOMEM; 589 inode = ERR_PTR(-ENOMEM);
589 } 590 }
590 591
591 mutex_unlock(&root->d_inode->i_mutex); 592 mutex_unlock(&root->d_inode->i_mutex);
592 593
593 return ret; 594 return inode;
594} 595}
595 596
596struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number) 597/**
598 * devpts_get_priv -- get private data for a slave
599 * @pts_inode: inode of the slave
600 *
601 * Returns whatever was passed as priv in devpts_pty_new for a given inode.
602 */
603void *devpts_get_priv(struct inode *pts_inode)
597{ 604{
598 struct dentry *dentry; 605 struct dentry *dentry;
599 struct tty_struct *tty; 606 void *priv = NULL;
600 607
601 BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR)); 608 BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
602 609
@@ -605,18 +612,22 @@ struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number)
605 if (!dentry) 612 if (!dentry)
606 return NULL; 613 return NULL;
607 614
608 tty = NULL;
609 if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC) 615 if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
610 tty = (struct tty_struct *)pts_inode->i_private; 616 priv = pts_inode->i_private;
611 617
612 dput(dentry); 618 dput(dentry);
613 619
614 return tty; 620 return priv;
615} 621}
616 622
617void devpts_pty_kill(struct tty_struct *tty) 623/**
624 * devpts_pty_kill -- remove inode form /dev/pts/
625 * @inode: inode of the slave to be removed
626 *
627 * This is an inverse operation of devpts_pty_new.
628 */
629void devpts_pty_kill(struct inode *inode)
618{ 630{
619 struct inode *inode = tty->driver_data;
620 struct super_block *sb = pts_sb_from_inode(inode); 631 struct super_block *sb = pts_sb_from_inode(inode);
621 struct dentry *root = sb->s_root; 632 struct dentry *root = sb->s_root;
622 struct dentry *dentry; 633 struct dentry *dentry;
diff --git a/include/linux/devpts_fs.h b/include/linux/devpts_fs.h
index 5ce0e5fd712e..251a2090a554 100644
--- a/include/linux/devpts_fs.h
+++ b/include/linux/devpts_fs.h
@@ -20,28 +20,28 @@
20int devpts_new_index(struct inode *ptmx_inode); 20int devpts_new_index(struct inode *ptmx_inode);
21void devpts_kill_index(struct inode *ptmx_inode, int idx); 21void devpts_kill_index(struct inode *ptmx_inode, int idx);
22/* mknod in devpts */ 22/* mknod in devpts */
23int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty); 23struct inode *devpts_pty_new(struct inode *ptmx_inode, dev_t device, int index,
24/* get tty structure */ 24 void *priv);
25struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number); 25/* get private structure */
26void *devpts_get_priv(struct inode *pts_inode);
26/* unlink */ 27/* unlink */
27void devpts_pty_kill(struct tty_struct *tty); 28void devpts_pty_kill(struct inode *inode);
28 29
29#else 30#else
30 31
31/* Dummy stubs in the no-pty case */ 32/* Dummy stubs in the no-pty case */
32static inline int devpts_new_index(struct inode *ptmx_inode) { return -EINVAL; } 33static inline int devpts_new_index(struct inode *ptmx_inode) { return -EINVAL; }
33static inline void devpts_kill_index(struct inode *ptmx_inode, int idx) { } 34static inline void devpts_kill_index(struct inode *ptmx_inode, int idx) { }
34static inline int devpts_pty_new(struct inode *ptmx_inode, 35static inline struct inode *devpts_pty_new(struct inode *ptmx_inode,
35 struct tty_struct *tty) 36 dev_t device, int index, void *priv)
36{ 37{
37 return -EINVAL; 38 return ERR_PTR(-EINVAL);
38} 39}
39static inline struct tty_struct *devpts_get_tty(struct inode *pts_inode, 40static inline void *devpts_get_priv(struct inode *pts_inode)
40 int number)
41{ 41{
42 return NULL; 42 return NULL;
43} 43}
44static inline void devpts_pty_kill(struct tty_struct *tty) { } 44static inline void devpts_pty_kill(struct inode *inode) { }
45 45
46#endif 46#endif
47 47
diff --git a/arch/arm/plat-omap/include/plat/menelaus.h b/include/linux/mfd/menelaus.h
index 4a970ec62dd1..f097e89134cb 100644
--- a/arch/arm/plat-omap/include/plat/menelaus.h
+++ b/include/linux/mfd/menelaus.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/menelaus.h
3 *
4 * Functions to access Menelaus power management chip 2 * Functions to access Menelaus power management chip
5 */ 3 */
6 4
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index e8741c2678d5..5d50b25a73d7 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -26,7 +26,6 @@
26 26
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <mach/irqs.h>
30 29
31#define OMAP1_MPUIO_BASE 0xfffb5000 30#define OMAP1_MPUIO_BASE 0xfffb5000
32 31
diff --git a/arch/arm/plat-omap/include/plat/led.h b/include/linux/platform_data/leds-omap.h
index 25e451e7e2fd..56c9b2a0ada5 100644
--- a/arch/arm/plat-omap/include/plat/led.h
+++ b/include/linux/platform_data/leds-omap.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/led.h
3 *
4 * Copyright (C) 2006 Samsung Electronics 2 * Copyright (C) 2006 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com> 3 * Kyungmin Park <kyungmin.park@samsung.com>
6 * 4 *
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/include/linux/platform_data/mmc-omap.h
index 8b4e4f2da2f5..2bf6ea82ff94 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/include/linux/platform_data/mmc-omap.h
@@ -8,27 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef __OMAP2_MMC_H
12#define __OMAP2_MMC_H
13
14#include <linux/types.h>
15#include <linux/device.h>
16#include <linux/mmc/host.h>
17
18#include <plat/omap_hwmod.h>
19
20#define OMAP15XX_NR_MMC 1
21#define OMAP16XX_NR_MMC 2
22#define OMAP1_MMC_SIZE 0x080
23#define OMAP1_MMC1_BASE 0xfffb7800
24#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
25
26#define OMAP24XX_NR_MMC 2
27#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
28#define OMAP2_MMC1_BASE 0x4809c000
29
30#define OMAP4_MMC_REG_OFFSET 0x100
31
32#define OMAP_MMC_MAX_SLOTS 2 11#define OMAP_MMC_MAX_SLOTS 2
33 12
34/* 13/*
@@ -50,6 +29,8 @@
50#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0) 29#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
51#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1) 30#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
52 31
32struct mmc_card;
33
53struct omap_mmc_dev_attr { 34struct omap_mmc_dev_attr {
54 u8 flags; 35 u8 flags;
55}; 36};
@@ -126,6 +107,9 @@ struct omap_mmc_platform_data {
126 /* we can put the features above into this variable */ 107 /* we can put the features above into this variable */
127#define HSMMC_HAS_PBIAS (1 << 0) 108#define HSMMC_HAS_PBIAS (1 << 0)
128#define HSMMC_HAS_UPDATED_RESET (1 << 1) 109#define HSMMC_HAS_UPDATED_RESET (1 << 1)
110#define MMC_OMAP7XX (1 << 2)
111#define MMC_OMAP15XX (1 << 3)
112#define MMC_OMAP16XX (1 << 4)
129 unsigned features; 113 unsigned features;
130 114
131 int switch_pin; /* gpio (card detect) */ 115 int switch_pin; /* gpio (card detect) */
@@ -164,25 +148,3 @@ struct omap_mmc_platform_data {
164 148
165 } slots[OMAP_MMC_MAX_SLOTS]; 149 } slots[OMAP_MMC_MAX_SLOTS];
166}; 150};
167
168/* called from board-specific card detection service routine */
169extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
170 int is_closed);
171
172#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
173void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
174 int nr_controllers);
175void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
176#else
177static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
178 int nr_controllers)
179{
180}
181static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
182{
183}
184#endif
185
186extern int omap_msdi_reset(struct omap_hwmod *oh);
187
188#endif
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 1a68c1e5fe53..24d32ca34bef 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -8,9 +8,13 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <plat/gpmc.h> 11#ifndef _MTD_NAND_OMAP2_H
12#define _MTD_NAND_OMAP2_H
13
12#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
13 15
16#define GPMC_BCH_NUM_REMAINDER 8
17
14enum nand_io { 18enum nand_io {
15 NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ 19 NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
16 NAND_OMAP_POLLED, /* polled mode, without prefetch */ 20 NAND_OMAP_POLLED, /* polled mode, without prefetch */
@@ -18,10 +22,38 @@ enum nand_io {
18 NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ 22 NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
19}; 23};
20 24
25enum omap_ecc {
26 /* 1-bit ecc: stored at end of spare area */
27 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
28 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
29 /* 1-bit ecc: stored at beginning of spare area as romcode */
30 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
31 OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
32 OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
33};
34
35struct gpmc_nand_regs {
36 void __iomem *gpmc_status;
37 void __iomem *gpmc_nand_command;
38 void __iomem *gpmc_nand_address;
39 void __iomem *gpmc_nand_data;
40 void __iomem *gpmc_prefetch_config1;
41 void __iomem *gpmc_prefetch_config2;
42 void __iomem *gpmc_prefetch_control;
43 void __iomem *gpmc_prefetch_status;
44 void __iomem *gpmc_ecc_config;
45 void __iomem *gpmc_ecc_control;
46 void __iomem *gpmc_ecc_size_config;
47 void __iomem *gpmc_ecc1_result;
48 void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
49 void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
50 void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
51 void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
52};
53
21struct omap_nand_platform_data { 54struct omap_nand_platform_data {
22 int cs; 55 int cs;
23 struct mtd_partition *parts; 56 struct mtd_partition *parts;
24 struct gpmc_timings *gpmc_t;
25 int nr_parts; 57 int nr_parts;
26 bool dev_ready; 58 bool dev_ready;
27 enum nand_io xfer_type; 59 enum nand_io xfer_type;
@@ -30,14 +62,4 @@ struct omap_nand_platform_data {
30 struct gpmc_nand_regs reg; 62 struct gpmc_nand_regs reg;
31}; 63};
32 64
33/* minimum size for IO mapping */
34#define NAND_IO_SIZE 4
35
36#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
37extern int gpmc_nand_init(struct omap_nand_platform_data *d);
38#else
39static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
40{
41 return 0;
42}
43#endif 65#endif
diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h
index 2858667d2e4f..685af7e8b120 100644
--- a/include/linux/platform_data/mtd-onenand-omap2.h
+++ b/include/linux/platform_data/mtd-onenand-omap2.h
@@ -9,17 +9,15 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#ifndef __MTD_ONENAND_OMAP2_H
13#define __MTD_ONENAND_OMAP2_H
14
12#include <linux/mtd/mtd.h> 15#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h> 16#include <linux/mtd/partitions.h>
14 17
15#define ONENAND_SYNC_READ (1 << 0) 18#define ONENAND_SYNC_READ (1 << 0)
16#define ONENAND_SYNC_READWRITE (1 << 1) 19#define ONENAND_SYNC_READWRITE (1 << 1)
17 20#define ONENAND_IN_OMAP34XX (1 << 2)
18struct onenand_freq_info {
19 u16 maf_id;
20 u16 dev_id;
21 u16 ver_id;
22};
23 21
24struct omap_onenand_platform_data { 22struct omap_onenand_platform_data {
25 int cs; 23 int cs;
@@ -27,27 +25,9 @@ struct omap_onenand_platform_data {
27 struct mtd_partition *parts; 25 struct mtd_partition *parts;
28 int nr_parts; 26 int nr_parts;
29 int (*onenand_setup)(void __iomem *, int *freq_ptr); 27 int (*onenand_setup)(void __iomem *, int *freq_ptr);
30 int (*get_freq)(const struct onenand_freq_info *freq_info,
31 bool *clk_dep);
32 int dma_channel; 28 int dma_channel;
33 u8 flags; 29 u8 flags;
34 u8 regulator_can_sleep; 30 u8 regulator_can_sleep;
35 u8 skip_initial_unlocking; 31 u8 skip_initial_unlocking;
36}; 32};
37
38#define ONENAND_MAX_PARTITIONS 8
39
40#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
41 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
42
43extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
44
45#else
46
47#define board_onenand_data NULL
48
49static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
50{
51}
52
53#endif 33#endif
diff --git a/include/linux/platform_data/usb-omap.h b/include/linux/platform_data/usb-omap.h
new file mode 100644
index 000000000000..8570bcfe6311
--- /dev/null
+++ b/include/linux/platform_data/usb-omap.h
@@ -0,0 +1,80 @@
1/*
2 * usb-omap.h - Platform data for the various OMAP USB IPs
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * This software is distributed under the terms of the GNU General Public
7 * License ("GPL") version 2, as published by the Free Software Foundation.
8 *
9 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
11 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
12 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
13 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
14 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
18 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19 * POSSIBILITY OF SUCH DAMAGE.
20 */
21
22#define OMAP3_HS_USB_PORTS 3
23
24enum usbhs_omap_port_mode {
25 OMAP_USBHS_PORT_MODE_UNUSED,
26 OMAP_EHCI_PORT_MODE_PHY,
27 OMAP_EHCI_PORT_MODE_TLL,
28 OMAP_EHCI_PORT_MODE_HSIC,
29 OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
30 OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
31 OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
32 OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
33 OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
34 OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
35 OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
36 OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
37 OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
38 OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
39};
40
41struct usbtll_omap_platform_data {
42 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
43};
44
45struct ehci_hcd_omap_platform_data {
46 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
47 int reset_gpio_port[OMAP3_HS_USB_PORTS];
48 struct regulator *regulator[OMAP3_HS_USB_PORTS];
49 unsigned phy_reset:1;
50};
51
52struct ohci_hcd_omap_platform_data {
53 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
54 unsigned es2_compatibility:1;
55};
56
57struct usbhs_omap_platform_data {
58 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
59
60 struct ehci_hcd_omap_platform_data *ehci_data;
61 struct ohci_hcd_omap_platform_data *ohci_data;
62};
63
64/*-------------------------------------------------------------------------*/
65
66struct omap_musb_board_data {
67 u8 interface_type;
68 u8 mode;
69 u16 power;
70 unsigned extvbus:1;
71 void (*set_phy_power)(u8 on);
72 void (*clear_irq)(void);
73 void (*set_mode)(u8 mode);
74 void (*reset)(void);
75};
76
77enum musb_interface {
78 MUSB_INTERFACE_ULPI,
79 MUSB_INTERFACE_UTMI
80};
diff --git a/include/linux/tty.h b/include/linux/tty.h
index f0b4eb47297c..d7ff88fb8967 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -188,7 +188,9 @@ struct tty_port_operations {
188}; 188};
189 189
190struct tty_port { 190struct tty_port {
191 struct tty_bufhead buf; /* Locked internally */
191 struct tty_struct *tty; /* Back pointer */ 192 struct tty_struct *tty; /* Back pointer */
193 struct tty_struct *itty; /* internal back ptr */
192 const struct tty_port_operations *ops; /* Port operations */ 194 const struct tty_port_operations *ops; /* Port operations */
193 spinlock_t lock; /* Lock protecting tty field */ 195 spinlock_t lock; /* Lock protecting tty field */
194 int blocked_open; /* Waiting to open */ 196 int blocked_open; /* Waiting to open */
@@ -197,6 +199,9 @@ struct tty_port {
197 wait_queue_head_t close_wait; /* Close waiters */ 199 wait_queue_head_t close_wait; /* Close waiters */
198 wait_queue_head_t delta_msr_wait; /* Modem status change */ 200 wait_queue_head_t delta_msr_wait; /* Modem status change */
199 unsigned long flags; /* TTY flags ASY_*/ 201 unsigned long flags; /* TTY flags ASY_*/
202 unsigned long iflags; /* TTYP_ internal flags */
203#define TTYP_FLUSHING 1 /* Flushing to ldisc in progress */
204#define TTYP_FLUSHPENDING 2 /* Queued buffer flush pending */
200 unsigned char console:1; /* port is a console */ 205 unsigned char console:1; /* port is a console */
201 struct mutex mutex; /* Locking */ 206 struct mutex mutex; /* Locking */
202 struct mutex buf_mutex; /* Buffer alloc lock */ 207 struct mutex buf_mutex; /* Buffer alloc lock */
@@ -235,6 +240,7 @@ struct tty_struct {
235 struct mutex ldisc_mutex; 240 struct mutex ldisc_mutex;
236 struct tty_ldisc *ldisc; 241 struct tty_ldisc *ldisc;
237 242
243 struct mutex atomic_write_lock;
238 struct mutex legacy_mutex; 244 struct mutex legacy_mutex;
239 struct mutex termios_mutex; 245 struct mutex termios_mutex;
240 spinlock_t ctrl_lock; 246 spinlock_t ctrl_lock;
@@ -254,7 +260,6 @@ struct tty_struct {
254 260
255 struct tty_struct *link; 261 struct tty_struct *link;
256 struct fasync_struct *fasync; 262 struct fasync_struct *fasync;
257 struct tty_bufhead buf; /* Locked internally */
258 int alt_speed; /* For magic substitution of 38400 bps */ 263 int alt_speed; /* For magic substitution of 38400 bps */
259 wait_queue_head_t write_wait; 264 wait_queue_head_t write_wait;
260 wait_queue_head_t read_wait; 265 wait_queue_head_t read_wait;
@@ -265,37 +270,10 @@ struct tty_struct {
265 270
266#define N_TTY_BUF_SIZE 4096 271#define N_TTY_BUF_SIZE 4096
267 272
268 /*
269 * The following is data for the N_TTY line discipline. For
270 * historical reasons, this is included in the tty structure.
271 * Mostly locked by the BKL.
272 */
273 unsigned int column;
274 unsigned char lnext:1, erasing:1, raw:1, real_raw:1, icanon:1;
275 unsigned char closing:1; 273 unsigned char closing:1;
276 unsigned char echo_overrun:1;
277 unsigned short minimum_to_wake; 274 unsigned short minimum_to_wake;
278 unsigned long overrun_time;
279 int num_overrun;
280 unsigned long process_char_map[256/(8*sizeof(unsigned long))];
281 char *read_buf;
282 int read_head;
283 int read_tail;
284 int read_cnt;
285 unsigned long read_flags[N_TTY_BUF_SIZE/(8*sizeof(unsigned long))];
286 unsigned char *echo_buf;
287 unsigned int echo_pos;
288 unsigned int echo_cnt;
289 int canon_data;
290 unsigned long canon_head;
291 unsigned int canon_column;
292 struct mutex atomic_read_lock;
293 struct mutex atomic_write_lock;
294 struct mutex output_lock;
295 struct mutex echo_lock;
296 unsigned char *write_buf; 275 unsigned char *write_buf;
297 int write_cnt; 276 int write_cnt;
298 spinlock_t read_lock;
299 /* If the tty has a pending do_SAK, queue it here - akpm */ 277 /* If the tty has a pending do_SAK, queue it here - akpm */
300 struct work_struct SAK_work; 278 struct work_struct SAK_work;
301 struct tty_port *port; 279 struct tty_port *port;
@@ -335,8 +313,6 @@ struct tty_file_private {
335#define TTY_PTY_LOCK 16 /* pty private */ 313#define TTY_PTY_LOCK 16 /* pty private */
336#define TTY_NO_WRITE_SPLIT 17 /* Preserve write boundaries to driver */ 314#define TTY_NO_WRITE_SPLIT 17 /* Preserve write boundaries to driver */
337#define TTY_HUPPED 18 /* Post driver->hangup() */ 315#define TTY_HUPPED 18 /* Post driver->hangup() */
338#define TTY_FLUSHING 19 /* Flushing to ldisc in progress */
339#define TTY_FLUSHPENDING 20 /* Queued buffer flush pending */
340#define TTY_HUPPING 21 /* ->hangup() in progress */ 316#define TTY_HUPPING 21 /* ->hangup() in progress */
341 317
342#define TTY_WRITE_FLUSH(tty) tty_write_flush((tty)) 318#define TTY_WRITE_FLUSH(tty) tty_write_flush((tty))
@@ -412,9 +388,9 @@ extern void disassociate_ctty(int priv);
412extern void no_tty(void); 388extern void no_tty(void);
413extern void tty_flip_buffer_push(struct tty_struct *tty); 389extern void tty_flip_buffer_push(struct tty_struct *tty);
414extern void tty_flush_to_ldisc(struct tty_struct *tty); 390extern void tty_flush_to_ldisc(struct tty_struct *tty);
415extern void tty_buffer_free_all(struct tty_struct *tty); 391extern void tty_buffer_free_all(struct tty_port *port);
416extern void tty_buffer_flush(struct tty_struct *tty); 392extern void tty_buffer_flush(struct tty_struct *tty);
417extern void tty_buffer_init(struct tty_struct *tty); 393extern void tty_buffer_init(struct tty_port *port);
418extern speed_t tty_get_baud_rate(struct tty_struct *tty); 394extern speed_t tty_get_baud_rate(struct tty_struct *tty);
419extern speed_t tty_termios_baud_rate(struct ktermios *termios); 395extern speed_t tty_termios_baud_rate(struct ktermios *termios);
420extern speed_t tty_termios_input_baud_rate(struct ktermios *termios); 396extern speed_t tty_termios_input_baud_rate(struct ktermios *termios);
@@ -535,7 +511,7 @@ extern void n_tty_inherit_ops(struct tty_ldisc_ops *ops);
535/* tty_audit.c */ 511/* tty_audit.c */
536#ifdef CONFIG_AUDIT 512#ifdef CONFIG_AUDIT
537extern void tty_audit_add_data(struct tty_struct *tty, unsigned char *data, 513extern void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
538 size_t size); 514 size_t size, unsigned icanon);
539extern void tty_audit_exit(void); 515extern void tty_audit_exit(void);
540extern void tty_audit_fork(struct signal_struct *sig); 516extern void tty_audit_fork(struct signal_struct *sig);
541extern void tty_audit_tiocsti(struct tty_struct *tty, char ch); 517extern void tty_audit_tiocsti(struct tty_struct *tty, char ch);
@@ -544,7 +520,7 @@ extern int tty_audit_push_task(struct task_struct *tsk,
544 kuid_t loginuid, u32 sessionid); 520 kuid_t loginuid, u32 sessionid);
545#else 521#else
546static inline void tty_audit_add_data(struct tty_struct *tty, 522static inline void tty_audit_add_data(struct tty_struct *tty,
547 unsigned char *data, size_t size) 523 unsigned char *data, size_t size, unsigned icanon)
548{ 524{
549} 525}
550static inline void tty_audit_tiocsti(struct tty_struct *tty, char ch) 526static inline void tty_audit_tiocsti(struct tty_struct *tty, char ch)
diff --git a/include/linux/tty_flip.h b/include/linux/tty_flip.h
index 9239d033a0a3..2002344ed36a 100644
--- a/include/linux/tty_flip.h
+++ b/include/linux/tty_flip.h
@@ -11,7 +11,7 @@ void tty_schedule_flip(struct tty_struct *tty);
11static inline int tty_insert_flip_char(struct tty_struct *tty, 11static inline int tty_insert_flip_char(struct tty_struct *tty,
12 unsigned char ch, char flag) 12 unsigned char ch, char flag)
13{ 13{
14 struct tty_buffer *tb = tty->buf.tail; 14 struct tty_buffer *tb = tty->port->buf.tail;
15 if (tb && tb->used < tb->size) { 15 if (tb && tb->used < tb->size) {
16 tb->flag_buf_ptr[tb->used] = flag; 16 tb->flag_buf_ptr[tb->used] = flag;
17 tb->char_buf_ptr[tb->used++] = ch; 17 tb->char_buf_ptr[tb->used++] = ch;
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 3729173b7fbc..88c829466fc1 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -314,6 +314,19 @@ int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
314int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel); 314int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
315void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel); 315void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
316 316
317enum omapdss_version {
318 OMAPDSS_VER_UNKNOWN = 0,
319 OMAPDSS_VER_OMAP24xx,
320 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
321 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
322 OMAPDSS_VER_OMAP3630,
323 OMAPDSS_VER_AM35xx,
324 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
325 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
326 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
327 OMAPDSS_VER_OMAP5,
328};
329
317/* Board specific data */ 330/* Board specific data */
318struct omap_dss_board_info { 331struct omap_dss_board_info {
319 int (*get_context_loss_count)(struct device *dev); 332 int (*get_context_loss_count)(struct device *dev);
@@ -323,6 +336,7 @@ struct omap_dss_board_info {
323 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask); 336 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
324 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask); 337 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
325 int (*set_min_bus_tput)(struct device *dev, unsigned long r); 338 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
339 enum omapdss_version version;
326}; 340};
327 341
328/* Init with the board info */ 342/* Init with the board info */
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/include/video/omapvrfb.h
index 3792bdea2f6d..bb0bd89f8bc6 100644
--- a/arch/arm/plat-omap/include/plat/vrfb.h
+++ b/include/video/omapvrfb.h
@@ -36,6 +36,7 @@ struct vrfb {
36}; 36};
37 37
38#ifdef CONFIG_OMAP2_VRFB 38#ifdef CONFIG_OMAP2_VRFB
39extern bool omap_vrfb_supported(void);
39extern int omap_vrfb_request_ctx(struct vrfb *vrfb); 40extern int omap_vrfb_request_ctx(struct vrfb *vrfb);
40extern void omap_vrfb_release_ctx(struct vrfb *vrfb); 41extern void omap_vrfb_release_ctx(struct vrfb *vrfb);
41extern void omap_vrfb_adjust_size(u16 *width, u16 *height, 42extern void omap_vrfb_adjust_size(u16 *width, u16 *height,
@@ -49,6 +50,7 @@ extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
49extern void omap_vrfb_restore_context(void); 50extern void omap_vrfb_restore_context(void);
50 51
51#else 52#else
53static inline bool omap_vrfb_supported(void) { return false; }
52static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; } 54static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; }
53static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {} 55static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {}
54static inline void omap_vrfb_adjust_size(u16 *width, u16 *height, 56static inline void omap_vrfb_adjust_size(u16 *width, u16 *height,
diff --git a/kernel/printk.c b/kernel/printk.c
index 2d607f4d1797..22e070f3470a 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -87,6 +87,12 @@ static DEFINE_SEMAPHORE(console_sem);
87struct console *console_drivers; 87struct console *console_drivers;
88EXPORT_SYMBOL_GPL(console_drivers); 88EXPORT_SYMBOL_GPL(console_drivers);
89 89
90#ifdef CONFIG_LOCKDEP
91static struct lockdep_map console_lock_dep_map = {
92 .name = "console_lock"
93};
94#endif
95
90/* 96/*
91 * This is used for debugging the mess that is the VT code by 97 * This is used for debugging the mess that is the VT code by
92 * keeping track if we have the console semaphore held. It's 98 * keeping track if we have the console semaphore held. It's
@@ -1908,12 +1914,14 @@ static int __cpuinit console_cpu_notify(struct notifier_block *self,
1908 */ 1914 */
1909void console_lock(void) 1915void console_lock(void)
1910{ 1916{
1911 BUG_ON(in_interrupt()); 1917 might_sleep();
1918
1912 down(&console_sem); 1919 down(&console_sem);
1913 if (console_suspended) 1920 if (console_suspended)
1914 return; 1921 return;
1915 console_locked = 1; 1922 console_locked = 1;
1916 console_may_schedule = 1; 1923 console_may_schedule = 1;
1924 mutex_acquire(&console_lock_dep_map, 0, 0, _RET_IP_);
1917} 1925}
1918EXPORT_SYMBOL(console_lock); 1926EXPORT_SYMBOL(console_lock);
1919 1927
@@ -1935,6 +1943,7 @@ int console_trylock(void)
1935 } 1943 }
1936 console_locked = 1; 1944 console_locked = 1;
1937 console_may_schedule = 0; 1945 console_may_schedule = 0;
1946 mutex_acquire(&console_lock_dep_map, 0, 1, _RET_IP_);
1938 return 1; 1947 return 1;
1939} 1948}
1940EXPORT_SYMBOL(console_trylock); 1949EXPORT_SYMBOL(console_trylock);
@@ -2095,6 +2104,7 @@ skip:
2095 local_irq_restore(flags); 2104 local_irq_restore(flags);
2096 } 2105 }
2097 console_locked = 0; 2106 console_locked = 0;
2107 mutex_release(&console_lock_dep_map, 1, _RET_IP_);
2098 2108
2099 /* Release the exclusive_console once it is used */ 2109 /* Release the exclusive_console once it is used */
2100 if (unlikely(exclusive_console)) 2110 if (unlikely(exclusive_console))
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index fad350682ca2..c1900b2a6f28 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -25,8 +25,6 @@
25#include <sound/soc.h> 25#include <sound/soc.h>
26 26
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28#include <mach/hardware.h>
29#include <mach/gpio.h>
30#include <linux/platform_data/asoc-ti-mcbsp.h> 28#include <linux/platform_data/asoc-ti-mcbsp.h>
31 29
32#include "omap-mcbsp.h" 30#include "omap-mcbsp.h"
diff --git a/sound/soc/omap/n810.c b/sound/soc/omap/n810.c
index 521bfc3d2b2b..230b8c144848 100644
--- a/sound/soc/omap/n810.c
+++ b/sound/soc/omap/n810.c
@@ -29,7 +29,6 @@
29#include <sound/soc.h> 29#include <sound/soc.h>
30 30
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <mach/hardware.h>
33#include <linux/gpio.h> 32#include <linux/gpio.h>
34#include <linux/module.h> 33#include <linux/module.h>
35#include <linux/platform_data/asoc-ti-mcbsp.h> 34#include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 340874ebf9ae..52977aa30355 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -32,9 +32,14 @@
32#include <sound/dmaengine_pcm.h> 32#include <sound/dmaengine_pcm.h>
33#include <sound/soc.h> 33#include <sound/soc.h>
34 34
35#include <plat/cpu.h>
36#include "omap-pcm.h" 35#include "omap-pcm.h"
37 36
37#ifdef CONFIG_ARCH_OMAP1
38#define pcm_omap1510() cpu_is_omap1510()
39#else
40#define pcm_omap1510() 0
41#endif
42
38static const struct snd_pcm_hardware omap_pcm_hardware = { 43static const struct snd_pcm_hardware omap_pcm_hardware = {
39 .info = SNDRV_PCM_INFO_MMAP | 44 .info = SNDRV_PCM_INFO_MMAP |
40 SNDRV_PCM_INFO_MMAP_VALID | 45 SNDRV_PCM_INFO_MMAP_VALID |
@@ -159,7 +164,7 @@ static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
159{ 164{
160 snd_pcm_uframes_t offset; 165 snd_pcm_uframes_t offset;
161 166
162 if (cpu_is_omap1510()) 167 if (pcm_omap1510())
163 offset = snd_dmaengine_pcm_pointer_no_residue(substream); 168 offset = snd_dmaengine_pcm_pointer_no_residue(substream);
164 else 169 else
165 offset = snd_dmaengine_pcm_pointer(substream); 170 offset = snd_dmaengine_pcm_pointer(substream);
diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c
index 3960e8df9c76..06ef8d67ed1c 100644
--- a/sound/soc/omap/osk5912.c
+++ b/sound/soc/omap/osk5912.c
@@ -28,7 +28,6 @@
28#include <sound/soc.h> 28#include <sound/soc.h>
29 29
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <mach/hardware.h>
32#include <linux/gpio.h> 31#include <linux/gpio.h>
33#include <linux/module.h> 32#include <linux/module.h>
34#include <linux/platform_data/asoc-ti-mcbsp.h> 33#include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/sdp3430.c b/sound/soc/omap/sdp3430.c
index 597cae769cea..b462a2c9385f 100644
--- a/sound/soc/omap/sdp3430.c
+++ b/sound/soc/omap/sdp3430.c
@@ -31,8 +31,6 @@
31#include <sound/jack.h> 31#include <sound/jack.h>
32 32
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <mach/hardware.h>
35#include <mach/gpio.h>
36#include <linux/platform_data/gpio-omap.h> 34#include <linux/platform_data/gpio-omap.h>
37#include <linux/platform_data/asoc-ti-mcbsp.h> 35#include <linux/platform_data/asoc-ti-mcbsp.h>
38 36