diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2010-09-08 06:21:23 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-18 05:33:03 -0400 |
commit | e661faa488450786e295ac9b40e89abce8141e92 (patch) | |
tree | c331e53fdd50146e1426933416c48c9d7f6a87bb | |
parent | 8c14482b8a64755322484bea6fc66e8b1fd91fe0 (diff) |
ARM: S5P64X0: Update Audio support
This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
-rw-r--r-- | arch/arm/mach-s5p6440/dev-audio.c | 127 | ||||
-rw-r--r-- | arch/arm/mach-s5p6440/dev-spi.c | 176 | ||||
-rw-r--r-- | arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-audio.c | 164 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-spi.c | 232 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 5 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 2 |
8 files changed, 422 insertions, 321 deletions
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c deleted file mode 100644 index 3ca0d2b8275d..000000000000 --- a/arch/arm/mach-s5p6440/dev-audio.c +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6440_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | /* configure GPIO for i2s port */ | ||
25 | switch (pdev->id) { | ||
26 | case -1: | ||
27 | s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); | ||
29 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); | ||
30 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); | ||
31 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); | ||
32 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); | ||
33 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static struct s3c_audio_pdata s3c_i2s_pdata = { | ||
45 | .cfg_gpio = s5p6440_cfg_i2s, | ||
46 | }; | ||
47 | |||
48 | static struct resource s5p6440_iis0_resource[] = { | ||
49 | [0] = { | ||
50 | .start = S5P6440_PA_I2S, | ||
51 | .end = S5P6440_PA_I2S + 0x100 - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | [1] = { | ||
55 | .start = DMACH_I2S0_TX, | ||
56 | .end = DMACH_I2S0_TX, | ||
57 | .flags = IORESOURCE_DMA, | ||
58 | }, | ||
59 | [2] = { | ||
60 | .start = DMACH_I2S0_RX, | ||
61 | .end = DMACH_I2S0_RX, | ||
62 | .flags = IORESOURCE_DMA, | ||
63 | }, | ||
64 | }; | ||
65 | |||
66 | struct platform_device s5p6440_device_iis = { | ||
67 | .name = "s3c64xx-iis-v4", | ||
68 | .id = -1, | ||
69 | .num_resources = ARRAY_SIZE(s5p6440_iis0_resource), | ||
70 | .resource = s5p6440_iis0_resource, | ||
71 | .dev = { | ||
72 | .platform_data = &s3c_i2s_pdata, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | /* PCM Controller platform_devices */ | ||
77 | |||
78 | static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) | ||
79 | { | ||
80 | switch (pdev->id) { | ||
81 | case 0: | ||
82 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); | ||
83 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); | ||
84 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); | ||
85 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); | ||
86 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); | ||
87 | break; | ||
88 | |||
89 | default: | ||
90 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
91 | return -EINVAL; | ||
92 | } | ||
93 | |||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
98 | .cfg_gpio = s5p6440_pcm_cfg_gpio, | ||
99 | }; | ||
100 | |||
101 | static struct resource s5p6440_pcm0_resource[] = { | ||
102 | [0] = { | ||
103 | .start = S5P6440_PA_PCM, | ||
104 | .end = S5P6440_PA_PCM + 0x100 - 1, | ||
105 | .flags = IORESOURCE_MEM, | ||
106 | }, | ||
107 | [1] = { | ||
108 | .start = DMACH_PCM0_TX, | ||
109 | .end = DMACH_PCM0_TX, | ||
110 | .flags = IORESOURCE_DMA, | ||
111 | }, | ||
112 | [2] = { | ||
113 | .start = DMACH_PCM0_RX, | ||
114 | .end = DMACH_PCM0_RX, | ||
115 | .flags = IORESOURCE_DMA, | ||
116 | }, | ||
117 | }; | ||
118 | |||
119 | struct platform_device s5p6440_device_pcm = { | ||
120 | .name = "samsung-pcm", | ||
121 | .id = 0, | ||
122 | .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), | ||
123 | .resource = s5p6440_pcm0_resource, | ||
124 | .dev = { | ||
125 | .platform_data = &s3c_pcm_pdata, | ||
126 | }, | ||
127 | }; | ||
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c deleted file mode 100644 index 510af44d180c..000000000000 --- a/arch/arm/mach-s5p6440/dev-spi.c +++ /dev/null | |||
@@ -1,176 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5P6440_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | switch (pdev->id) { | ||
39 | case 0: | ||
40 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
42 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
43 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
44 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
45 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
46 | break; | ||
47 | |||
48 | case 1: | ||
49 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
50 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
51 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
52 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
53 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
55 | break; | ||
56 | |||
57 | default: | ||
58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
59 | return -EINVAL; | ||
60 | } | ||
61 | |||
62 | return 0; | ||
63 | } | ||
64 | |||
65 | static struct resource s5p6440_spi0_resource[] = { | ||
66 | [0] = { | ||
67 | .start = S5P6440_PA_SPI0, | ||
68 | .end = S5P6440_PA_SPI0 + 0x100 - 1, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }, | ||
71 | [1] = { | ||
72 | .start = DMACH_SPI0_TX, | ||
73 | .end = DMACH_SPI0_TX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [2] = { | ||
77 | .start = DMACH_SPI0_RX, | ||
78 | .end = DMACH_SPI0_RX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | [3] = { | ||
82 | .start = IRQ_SPI0, | ||
83 | .end = IRQ_SPI0, | ||
84 | .flags = IORESOURCE_IRQ, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
89 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
90 | .fifo_lvl_mask = 0x1ff, | ||
91 | .rx_lvl_offset = 15, | ||
92 | }; | ||
93 | |||
94 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
95 | |||
96 | struct platform_device s5p6440_device_spi0 = { | ||
97 | .name = "s3c64xx-spi", | ||
98 | .id = 0, | ||
99 | .num_resources = ARRAY_SIZE(s5p6440_spi0_resource), | ||
100 | .resource = s5p6440_spi0_resource, | ||
101 | .dev = { | ||
102 | .dma_mask = &spi_dmamask, | ||
103 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
104 | .platform_data = &s5p6440_spi0_pdata, | ||
105 | }, | ||
106 | }; | ||
107 | |||
108 | static struct resource s5p6440_spi1_resource[] = { | ||
109 | [0] = { | ||
110 | .start = S5P6440_PA_SPI1, | ||
111 | .end = S5P6440_PA_SPI1 + 0x100 - 1, | ||
112 | .flags = IORESOURCE_MEM, | ||
113 | }, | ||
114 | [1] = { | ||
115 | .start = DMACH_SPI1_TX, | ||
116 | .end = DMACH_SPI1_TX, | ||
117 | .flags = IORESOURCE_DMA, | ||
118 | }, | ||
119 | [2] = { | ||
120 | .start = DMACH_SPI1_RX, | ||
121 | .end = DMACH_SPI1_RX, | ||
122 | .flags = IORESOURCE_DMA, | ||
123 | }, | ||
124 | [3] = { | ||
125 | .start = IRQ_SPI1, | ||
126 | .end = IRQ_SPI1, | ||
127 | .flags = IORESOURCE_IRQ, | ||
128 | }, | ||
129 | }; | ||
130 | |||
131 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
132 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
133 | .fifo_lvl_mask = 0x7f, | ||
134 | .rx_lvl_offset = 15, | ||
135 | }; | ||
136 | |||
137 | struct platform_device s5p6440_device_spi1 = { | ||
138 | .name = "s3c64xx-spi", | ||
139 | .id = 1, | ||
140 | .num_resources = ARRAY_SIZE(s5p6440_spi1_resource), | ||
141 | .resource = s5p6440_spi1_resource, | ||
142 | .dev = { | ||
143 | .dma_mask = &spi_dmamask, | ||
144 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
145 | .platform_data = &s5p6440_spi1_pdata, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
150 | { | ||
151 | struct s3c64xx_spi_info *pd; | ||
152 | |||
153 | /* Reject invalid configuration */ | ||
154 | if (!num_cs || src_clk_nr < 0 | ||
155 | || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { | ||
156 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
157 | return; | ||
158 | } | ||
159 | |||
160 | switch (cntrlr) { | ||
161 | case 0: | ||
162 | pd = &s5p6440_spi0_pdata; | ||
163 | break; | ||
164 | case 1: | ||
165 | pd = &s5p6440_spi1_pdata; | ||
166 | break; | ||
167 | default: | ||
168 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
169 | __func__, cntrlr); | ||
170 | return; | ||
171 | } | ||
172 | |||
173 | pd->num_cs = num_cs; | ||
174 | pd->src_clk_nr = src_clk_nr; | ||
175 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
176 | } | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h deleted file mode 100644 index 5fbca50d1cfb..000000000000 --- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5P6440_PLAT_SPI_CLKS_H | ||
12 | #define __S5P6440_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5P6440_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5P6440_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5P6440_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c new file mode 100644 index 000000000000..fa097bd68ca4 --- /dev/null +++ b/arch/arm/mach-s5p64x0/dev-audio.c | |||
@@ -0,0 +1,164 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6440_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | /* configure GPIO for i2s port */ | ||
25 | switch (pdev->id) { | ||
26 | case -1: | ||
27 | s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); | ||
28 | s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); | ||
29 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); | ||
30 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); | ||
31 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); | ||
32 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); | ||
33 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | return 0; | ||
42 | } | ||
43 | |||
44 | static int s5p6450_cfg_i2s(struct platform_device *pdev) | ||
45 | { | ||
46 | /* configure GPIO for i2s port */ | ||
47 | switch (pdev->id) { | ||
48 | case -1: | ||
49 | s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); | ||
50 | s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); | ||
51 | s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); | ||
52 | s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); | ||
53 | s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5)); | ||
54 | s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5)); | ||
55 | s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5)); | ||
56 | s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5)); | ||
57 | break; | ||
58 | |||
59 | default: | ||
60 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
61 | return -EINVAL; | ||
62 | } | ||
63 | |||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | static struct s3c_audio_pdata s5p6440_i2s_pdata = { | ||
68 | .cfg_gpio = s5p6440_cfg_i2s, | ||
69 | }; | ||
70 | |||
71 | static struct s3c_audio_pdata s5p6450_i2s_pdata = { | ||
72 | .cfg_gpio = s5p6450_cfg_i2s, | ||
73 | }; | ||
74 | |||
75 | static struct resource s5p64x0_iis0_resource[] = { | ||
76 | [0] = { | ||
77 | .start = S5P64X0_PA_I2S, | ||
78 | .end = S5P64X0_PA_I2S + 0x100 - 1, | ||
79 | .flags = IORESOURCE_MEM, | ||
80 | }, | ||
81 | [1] = { | ||
82 | .start = DMACH_I2S0_TX, | ||
83 | .end = DMACH_I2S0_TX, | ||
84 | .flags = IORESOURCE_DMA, | ||
85 | }, | ||
86 | [2] = { | ||
87 | .start = DMACH_I2S0_RX, | ||
88 | .end = DMACH_I2S0_RX, | ||
89 | .flags = IORESOURCE_DMA, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | struct platform_device s5p6440_device_iis = { | ||
94 | .name = "s3c64xx-iis-v4", | ||
95 | .id = -1, | ||
96 | .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), | ||
97 | .resource = s5p64x0_iis0_resource, | ||
98 | .dev = { | ||
99 | .platform_data = &s5p6440_i2s_pdata, | ||
100 | }, | ||
101 | }; | ||
102 | |||
103 | struct platform_device s5p6450_device_iis0 = { | ||
104 | .name = "s3c64xx-iis-v4", | ||
105 | .id = -1, | ||
106 | .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), | ||
107 | .resource = s5p64x0_iis0_resource, | ||
108 | .dev = { | ||
109 | .platform_data = &s5p6450_i2s_pdata, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | /* PCM Controller platform_devices */ | ||
114 | |||
115 | static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) | ||
116 | { | ||
117 | switch (pdev->id) { | ||
118 | case 0: | ||
119 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); | ||
120 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); | ||
121 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); | ||
122 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); | ||
123 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); | ||
124 | break; | ||
125 | |||
126 | default: | ||
127 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
128 | return -EINVAL; | ||
129 | } | ||
130 | |||
131 | return 0; | ||
132 | } | ||
133 | |||
134 | static struct s3c_audio_pdata s5p6440_pcm_pdata = { | ||
135 | .cfg_gpio = s5p6440_pcm_cfg_gpio, | ||
136 | }; | ||
137 | |||
138 | static struct resource s5p6440_pcm0_resource[] = { | ||
139 | [0] = { | ||
140 | .start = S5P64X0_PA_PCM, | ||
141 | .end = S5P64X0_PA_PCM + 0x100 - 1, | ||
142 | .flags = IORESOURCE_MEM, | ||
143 | }, | ||
144 | [1] = { | ||
145 | .start = DMACH_PCM0_TX, | ||
146 | .end = DMACH_PCM0_TX, | ||
147 | .flags = IORESOURCE_DMA, | ||
148 | }, | ||
149 | [2] = { | ||
150 | .start = DMACH_PCM0_RX, | ||
151 | .end = DMACH_PCM0_RX, | ||
152 | .flags = IORESOURCE_DMA, | ||
153 | }, | ||
154 | }; | ||
155 | |||
156 | struct platform_device s5p6440_device_pcm = { | ||
157 | .name = "samsung-pcm", | ||
158 | .id = 0, | ||
159 | .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), | ||
160 | .resource = s5p6440_pcm0_resource, | ||
161 | .dev = { | ||
162 | .platform_data = &s5p6440_pcm_pdata, | ||
163 | }, | ||
164 | }; | ||
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c new file mode 100644 index 000000000000..5b69ec4c8af3 --- /dev/null +++ b/arch/arm/mach-s5p64x0/dev-spi.c | |||
@@ -0,0 +1,232 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/dev-spi.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/gpio.h> | ||
17 | |||
18 | #include <mach/dma.h> | ||
19 | #include <mach/map.h> | ||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/regs-clock.h> | ||
22 | #include <mach/spi-clocks.h> | ||
23 | |||
24 | #include <plat/s3c64xx-spi.h> | ||
25 | #include <plat/gpio-cfg.h> | ||
26 | |||
27 | static char *s5p64x0_spi_src_clks[] = { | ||
28 | [S5P64X0_SPI_SRCCLK_PCLK] = "pclk", | ||
29 | [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
30 | }; | ||
31 | |||
32 | /* SPI Controller platform_devices */ | ||
33 | |||
34 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
35 | * The emulated CS is toggled by board specific mechanism, as it can | ||
36 | * be either some immediate GPIO or some signal out of some other | ||
37 | * chip in between ... or some yet another way. | ||
38 | * We simply do not assume anything about CS. | ||
39 | */ | ||
40 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
41 | { | ||
42 | switch (pdev->id) { | ||
43 | case 0: | ||
44 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
45 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
46 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
47 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
48 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
49 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
50 | break; | ||
51 | |||
52 | case 1: | ||
53 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
54 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
55 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
56 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
57 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
58 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
59 | break; | ||
60 | |||
61 | default: | ||
62 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
63 | return -EINVAL; | ||
64 | } | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) | ||
70 | { | ||
71 | switch (pdev->id) { | ||
72 | case 0: | ||
73 | s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); | ||
74 | s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2)); | ||
75 | s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2)); | ||
76 | s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); | ||
77 | s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); | ||
78 | s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); | ||
79 | break; | ||
80 | |||
81 | case 1: | ||
82 | s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); | ||
83 | s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2)); | ||
84 | s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2)); | ||
85 | s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); | ||
86 | s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); | ||
87 | s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); | ||
88 | break; | ||
89 | |||
90 | default: | ||
91 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
92 | return -EINVAL; | ||
93 | } | ||
94 | |||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | static struct resource s5p64x0_spi0_resource[] = { | ||
99 | [0] = { | ||
100 | .start = S5P64X0_PA_SPI0, | ||
101 | .end = S5P64X0_PA_SPI0 + 0x100 - 1, | ||
102 | .flags = IORESOURCE_MEM, | ||
103 | }, | ||
104 | [1] = { | ||
105 | .start = DMACH_SPI0_TX, | ||
106 | .end = DMACH_SPI0_TX, | ||
107 | .flags = IORESOURCE_DMA, | ||
108 | }, | ||
109 | [2] = { | ||
110 | .start = DMACH_SPI0_RX, | ||
111 | .end = DMACH_SPI0_RX, | ||
112 | .flags = IORESOURCE_DMA, | ||
113 | }, | ||
114 | [3] = { | ||
115 | .start = IRQ_SPI0, | ||
116 | .end = IRQ_SPI0, | ||
117 | .flags = IORESOURCE_IRQ, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
122 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
123 | .fifo_lvl_mask = 0x1ff, | ||
124 | .rx_lvl_offset = 15, | ||
125 | }; | ||
126 | |||
127 | static struct s3c64xx_spi_info s5p6450_spi0_pdata = { | ||
128 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
129 | .fifo_lvl_mask = 0x1ff, | ||
130 | .rx_lvl_offset = 15, | ||
131 | }; | ||
132 | |||
133 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
134 | |||
135 | struct platform_device s5p64x0_device_spi0 = { | ||
136 | .name = "s3c64xx-spi", | ||
137 | .id = 0, | ||
138 | .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource), | ||
139 | .resource = s5p64x0_spi0_resource, | ||
140 | .dev = { | ||
141 | .dma_mask = &spi_dmamask, | ||
142 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
143 | }, | ||
144 | }; | ||
145 | |||
146 | static struct resource s5p64x0_spi1_resource[] = { | ||
147 | [0] = { | ||
148 | .start = S5P64X0_PA_SPI1, | ||
149 | .end = S5P64X0_PA_SPI1 + 0x100 - 1, | ||
150 | .flags = IORESOURCE_MEM, | ||
151 | }, | ||
152 | [1] = { | ||
153 | .start = DMACH_SPI1_TX, | ||
154 | .end = DMACH_SPI1_TX, | ||
155 | .flags = IORESOURCE_DMA, | ||
156 | }, | ||
157 | [2] = { | ||
158 | .start = DMACH_SPI1_RX, | ||
159 | .end = DMACH_SPI1_RX, | ||
160 | .flags = IORESOURCE_DMA, | ||
161 | }, | ||
162 | [3] = { | ||
163 | .start = IRQ_SPI1, | ||
164 | .end = IRQ_SPI1, | ||
165 | .flags = IORESOURCE_IRQ, | ||
166 | }, | ||
167 | }; | ||
168 | |||
169 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
170 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
171 | .fifo_lvl_mask = 0x7f, | ||
172 | .rx_lvl_offset = 15, | ||
173 | }; | ||
174 | |||
175 | static struct s3c64xx_spi_info s5p6450_spi1_pdata = { | ||
176 | .cfg_gpio = s5p6450_spi_cfg_gpio, | ||
177 | .fifo_lvl_mask = 0x7f, | ||
178 | .rx_lvl_offset = 15, | ||
179 | }; | ||
180 | |||
181 | struct platform_device s5p64x0_device_spi1 = { | ||
182 | .name = "s3c64xx-spi", | ||
183 | .id = 1, | ||
184 | .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource), | ||
185 | .resource = s5p64x0_spi1_resource, | ||
186 | .dev = { | ||
187 | .dma_mask = &spi_dmamask, | ||
188 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
189 | }, | ||
190 | }; | ||
191 | |||
192 | void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
193 | { | ||
194 | unsigned int id; | ||
195 | struct s3c64xx_spi_info *pd; | ||
196 | |||
197 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
198 | |||
199 | /* Reject invalid configuration */ | ||
200 | if (!num_cs || src_clk_nr < 0 | ||
201 | || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { | ||
202 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
203 | return; | ||
204 | } | ||
205 | |||
206 | switch (cntrlr) { | ||
207 | case 0: | ||
208 | if (id == 0x50000) | ||
209 | pd = &s5p6450_spi0_pdata; | ||
210 | else | ||
211 | pd = &s5p6440_spi0_pdata; | ||
212 | |||
213 | s5p64x0_device_spi0.dev.platform_data = pd; | ||
214 | break; | ||
215 | case 1: | ||
216 | if (id == 0x50000) | ||
217 | pd = &s5p6450_spi1_pdata; | ||
218 | else | ||
219 | pd = &s5p6440_spi1_pdata; | ||
220 | |||
221 | s5p64x0_device_spi1.dev.platform_data = pd; | ||
222 | break; | ||
223 | default: | ||
224 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
225 | __func__, cntrlr); | ||
226 | return; | ||
227 | } | ||
228 | |||
229 | pd->num_cs = num_cs; | ||
230 | pd->src_clk_nr = src_clk_nr; | ||
231 | pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr]; | ||
232 | } | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h new file mode 100644 index 000000000000..170a20a9643a --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
7 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SPI_CLKS_H | ||
15 | #define __ASM_ARCH_SPI_CLKS_H __FILE__ | ||
16 | |||
17 | #define S5P64X0_SPI_SRCCLK_PCLK 0 | ||
18 | #define S5P64X0_SPI_SRCCLK_SCLK 1 | ||
19 | |||
20 | #endif /* __ASM_ARCH_SPI_CLKS_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index cb12102fcdce..7d448e138792 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0; | |||
67 | extern struct platform_device s5pv210_device_spi1; | 67 | extern struct platform_device s5pv210_device_spi1; |
68 | extern struct platform_device s5p6440_device_spi0; | 68 | extern struct platform_device s5p6440_device_spi0; |
69 | extern struct platform_device s5p6440_device_spi1; | 69 | extern struct platform_device s5p6440_device_spi1; |
70 | extern struct platform_device s5p6450_device_spi0; | ||
71 | extern struct platform_device s5p6450_device_spi1; | ||
70 | 72 | ||
71 | extern struct platform_device s3c_device_hwmon; | 73 | extern struct platform_device s3c_device_hwmon; |
72 | 74 | ||
@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi; | |||
95 | extern struct platform_device s5p6440_device_pcm; | 97 | extern struct platform_device s5p6440_device_pcm; |
96 | extern struct platform_device s5p6440_device_iis; | 98 | extern struct platform_device s5p6440_device_iis; |
97 | 99 | ||
100 | extern struct platform_device s5p6450_device_iis0; | ||
101 | extern struct platform_device s5p6450_device_pcm0; | ||
102 | |||
98 | extern struct platform_device s5pc100_device_ac97; | 103 | extern struct platform_device s5pc100_device_ac97; |
99 | extern struct platform_device s5pc100_device_pcm0; | 104 | extern struct platform_device s5pc100_device_pcm0; |
100 | extern struct platform_device s5pc100_device_pcm1; | 105 | extern struct platform_device s5pc100_device_pcm1; |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index e5aba8f95b79..ae8e802bdca8 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -65,7 +65,7 @@ struct s3c64xx_spi_info { | |||
65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
68 | extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 68 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
70 | 70 | ||
71 | #endif /* __S3C64XX_PLAT_SPI_H */ | 71 | #endif /* __S3C64XX_PLAT_SPI_H */ |