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authorAlan Cox <alan@linux.intel.com>2012-05-03 10:06:18 -0400
committerDave Airlie <airlied@redhat.com>2012-05-07 05:58:20 -0400
commitd839ede47a56ff5f316c88391818488f8e5913af (patch)
tree3c874685ccfa8eb690be547b805166372e592c83
parent9aba9d3a2ca42572c9c196e8be6cab59b7c078b6 (diff)
gma500: opregion and ACPI
Add the opregion support and bring us in line with the opregion functionality in the reference driver code. We can't share this with i915 currently because there are hardcoded assumptions about dev_priv etc in both versions. [airlied: include opregion.h fix] Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat
-rw-r--r--drivers/gpu/drm/gma500/Makefile2
-rw-r--r--drivers/gpu/drm/gma500/cdv_device.c4
-rw-r--r--drivers/gpu/drm/gma500/intel_opregion.c178
-rw-r--r--drivers/gpu/drm/gma500/oaktrail_device.c2
-rw-r--r--drivers/gpu/drm/gma500/opregion.c350
-rw-r--r--drivers/gpu/drm/gma500/opregion.h29
-rw-r--r--drivers/gpu/drm/gma500/psb_device.c2
-rw-r--r--drivers/gpu/drm/gma500/psb_drv.c8
-rw-r--r--drivers/gpu/drm/gma500/psb_drv.h4
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_reg.h1
-rw-r--r--drivers/gpu/drm/gma500/psb_irq.c4
11 files changed, 396 insertions, 188 deletions
diff --git a/drivers/gpu/drm/gma500/Makefile b/drivers/gpu/drm/gma500/Makefile
index 1583982917ce..efdad010b4e3 100644
--- a/drivers/gpu/drm/gma500/Makefile
+++ b/drivers/gpu/drm/gma500/Makefile
@@ -12,8 +12,8 @@ gma500_gfx-y += gem_glue.o \
12 intel_bios.o \ 12 intel_bios.o \
13 intel_i2c.o \ 13 intel_i2c.o \
14 intel_gmbus.o \ 14 intel_gmbus.o \
15 intel_opregion.o \
16 mmu.o \ 15 mmu.o \
16 opregion.o \
17 power.o \ 17 power.o \
18 psb_drv.o \ 18 psb_drv.o \
19 psb_intel_display.o \ 19 psb_intel_display.o \
diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c
index 726bfb7375fc..c10f02068d11 100644
--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -157,7 +157,7 @@ static int cdv_backlight_init(struct drm_device *dev)
157 157
158 cdv_backlight_device->props.brightness = 158 cdv_backlight_device->props.brightness =
159 cdv_get_brightness(cdv_backlight_device); 159 cdv_get_brightness(cdv_backlight_device);
160 cdv_backlight_device->props.max_brightness = cdv_get_max_brightness; 160 cdv_backlight_device->props.max_brightness = cdv_get_max_backlight(dev);
161 backlight_update_status(cdv_backlight_device); 161 backlight_update_status(cdv_backlight_device);
162 dev_priv->backlight_device = cdv_backlight_device; 162 dev_priv->backlight_device = cdv_backlight_device;
163 return 0; 163 return 0;
@@ -490,7 +490,7 @@ static int cdv_chip_setup(struct drm_device *dev)
490 struct drm_psb_private *dev_priv = dev->dev_private; 490 struct drm_psb_private *dev_priv = dev->dev_private;
491 INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func); 491 INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func);
492 cdv_get_core_freq(dev); 492 cdv_get_core_freq(dev);
493 gma_intel_opregion_init(dev); 493 psb_intel_opregion_init(dev);
494 psb_intel_init_bios(dev); 494 psb_intel_init_bios(dev);
495 cdv_hotplug_enable(dev, false); 495 cdv_hotplug_enable(dev, false);
496 return 0; 496 return 0;
diff --git a/drivers/gpu/drm/gma500/intel_opregion.c b/drivers/gpu/drm/gma500/intel_opregion.c
deleted file mode 100644
index 7041f40affff..000000000000
--- a/drivers/gpu/drm/gma500/intel_opregion.c
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * Copyright 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * FIXME: resolve with the i915 version
24 */
25
26#include "psb_drv.h"
27
28#define PCI_ASLE 0xe4
29#define PCI_ASLS 0xfc
30
31#define OPREGION_HEADER_OFFSET 0
32#define OPREGION_ACPI_OFFSET 0x100
33#define ACPI_CLID 0x01ac /* current lid state indicator */
34#define ACPI_CDCK 0x01b0 /* current docking state indicator */
35#define OPREGION_SWSCI_OFFSET 0x200
36#define OPREGION_ASLE_OFFSET 0x300
37#define OPREGION_VBT_OFFSET 0x400
38
39#define OPREGION_SIGNATURE "IntelGraphicsMem"
40#define MBOX_ACPI (1<<0)
41#define MBOX_SWSCI (1<<1)
42#define MBOX_ASLE (1<<2)
43
44struct opregion_header {
45 u8 signature[16];
46 u32 size;
47 u32 opregion_ver;
48 u8 bios_ver[32];
49 u8 vbios_ver[16];
50 u8 driver_ver[16];
51 u32 mboxes;
52 u8 reserved[164];
53} __packed;
54
55/* OpRegion mailbox #1: public ACPI methods */
56struct opregion_acpi {
57 u32 drdy; /* driver readiness */
58 u32 csts; /* notification status */
59 u32 cevt; /* current event */
60 u8 rsvd1[20];
61 u32 didl[8]; /* supported display devices ID list */
62 u32 cpdl[8]; /* currently presented display list */
63 u32 cadl[8]; /* currently active display list */
64 u32 nadl[8]; /* next active devices list */
65 u32 aslp; /* ASL sleep time-out */
66 u32 tidx; /* toggle table index */
67 u32 chpd; /* current hotplug enable indicator */
68 u32 clid; /* current lid state*/
69 u32 cdck; /* current docking state */
70 u32 sxsw; /* Sx state resume */
71 u32 evts; /* ASL supported events */
72 u32 cnot; /* current OS notification */
73 u32 nrdy; /* driver status */
74 u8 rsvd2[60];
75} __attribute__((packed));
76
77/* OpRegion mailbox #2: SWSCI */
78struct opregion_swsci {
79 u32 scic; /* SWSCI command|status|data */
80 u32 parm; /* command parameters */
81 u32 dslp; /* driver sleep time-out */
82 u8 rsvd[244];
83} __attribute__((packed));
84
85/* OpRegion mailbox #3: ASLE */
86struct opregion_asle {
87 u32 ardy; /* driver readiness */
88 u32 aslc; /* ASLE interrupt command */
89 u32 tche; /* technology enabled indicator */
90 u32 alsi; /* current ALS illuminance reading */
91 u32 bclp; /* backlight brightness to set */
92 u32 pfit; /* panel fitting state */
93 u32 cblv; /* current brightness level */
94 u16 bclm[20]; /* backlight level duty cycle mapping table */
95 u32 cpfm; /* current panel fitting mode */
96 u32 epfm; /* enabled panel fitting modes */
97 u8 plut[74]; /* panel LUT and identifier */
98 u32 pfmb; /* PWM freq and min brightness */
99 u8 rsvd[102];
100} __attribute__((packed));
101
102/* ASLE irq request bits */
103#define ASLE_SET_ALS_ILLUM (1 << 0)
104#define ASLE_SET_BACKLIGHT (1 << 1)
105#define ASLE_SET_PFIT (1 << 2)
106#define ASLE_SET_PWM_FREQ (1 << 3)
107#define ASLE_REQ_MSK 0xf
108
109/* response bits of ASLE irq request */
110#define ASLE_ALS_ILLUM_FAILED (1<<10)
111#define ASLE_BACKLIGHT_FAILED (1<<12)
112#define ASLE_PFIT_FAILED (1<<14)
113#define ASLE_PWM_FREQ_FAILED (1<<16)
114
115/* ASLE backlight brightness to set */
116#define ASLE_BCLP_VALID (1<<31)
117#define ASLE_BCLP_MSK (~(1<<31))
118
119/* ASLE panel fitting request */
120#define ASLE_PFIT_VALID (1<<31)
121#define ASLE_PFIT_CENTER (1<<0)
122#define ASLE_PFIT_STRETCH_TEXT (1<<1)
123#define ASLE_PFIT_STRETCH_GFX (1<<2)
124
125/* PWM frequency and minimum brightness */
126#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
127#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
128#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
129#define ASLE_PFMB_PWM_VALID (1<<31)
130
131#define ASLE_CBLV_VALID (1<<31)
132
133#define ACPI_OTHER_OUTPUT (0<<8)
134#define ACPI_VGA_OUTPUT (1<<8)
135#define ACPI_TV_OUTPUT (2<<8)
136#define ACPI_DIGITAL_OUTPUT (3<<8)
137#define ACPI_LVDS_OUTPUT (4<<8)
138
139int gma_intel_opregion_init(struct drm_device *dev)
140{
141 struct drm_psb_private *dev_priv = dev->dev_private;
142 struct psb_intel_opregion *opregion = &dev_priv->opregion;
143 u32 opregion_phy;
144 void *base;
145 u32 *lid_state;
146
147 dev_priv->lid_state = NULL;
148
149 pci_read_config_dword(dev->pdev, 0xfc, &opregion_phy);
150 if (opregion_phy == 0)
151 return -ENOTSUPP;
152
153 base = ioremap(opregion_phy, 8*1024);
154 if (!base)
155 return -ENOMEM;
156 /* FIXME: should use _io ops - ditto on i915 */
157 if (memcmp(base, OPREGION_SIGNATURE, 16)) {
158 DRM_ERROR("opregion signature mismatch\n");
159 iounmap(base);
160 return -EINVAL;
161 }
162
163 lid_state = base + 0x01ac;
164
165 dev_priv->lid_state = lid_state;
166 dev_priv->lid_last_state = readl(lid_state);
167 opregion->header = base;
168 opregion->vbt = base + OPREGION_VBT_OFFSET;
169 return 0;
170}
171
172int gma_intel_opregion_exit(struct drm_device *dev)
173{
174 struct drm_psb_private *dev_priv = dev->dev_private;
175 if (dev_priv->opregion.header)
176 iounmap(dev_priv->opregion.header);
177 return 0;
178}
diff --git a/drivers/gpu/drm/gma500/oaktrail_device.c b/drivers/gpu/drm/gma500/oaktrail_device.c
index d0b224408ba1..b152134a6ed4 100644
--- a/drivers/gpu/drm/gma500/oaktrail_device.c
+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
@@ -466,7 +466,7 @@ static int oaktrail_chip_setup(struct drm_device *dev)
466 return ret; 466 return ret;
467 if (vbt->size == 0) { 467 if (vbt->size == 0) {
468 /* Now pull the BIOS data */ 468 /* Now pull the BIOS data */
469 gma_intel_opregion_init(dev); 469 psb_intel_opregion_init(dev);
470 psb_intel_init_bios(dev); 470 psb_intel_init_bios(dev);
471 } 471 }
472 oaktrail_hdmi_setup(dev); 472 oaktrail_hdmi_setup(dev);
diff --git a/drivers/gpu/drm/gma500/opregion.c b/drivers/gpu/drm/gma500/opregion.c
new file mode 100644
index 000000000000..483e0b28c7aa
--- /dev/null
+++ b/drivers/gpu/drm/gma500/opregion.c
@@ -0,0 +1,350 @@
1/*
2 * Copyright 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24#ifdef CONFIG_ACPI
25#include <linux/acpi.h>
26#include <linux/acpi_io.h>
27#endif
28#include "psb_drv.h"
29#include "psb_intel_reg.h"
30
31#define PCI_ASLE 0xe4
32#define PCI_ASLS 0xfc
33
34#define OPREGION_HEADER_OFFSET 0
35#define OPREGION_ACPI_OFFSET 0x100
36#define ACPI_CLID 0x01ac /* current lid state indicator */
37#define ACPI_CDCK 0x01b0 /* current docking state indicator */
38#define OPREGION_SWSCI_OFFSET 0x200
39#define OPREGION_ASLE_OFFSET 0x300
40#define OPREGION_VBT_OFFSET 0x400
41
42#define OPREGION_SIGNATURE "IntelGraphicsMem"
43#define MBOX_ACPI (1<<0)
44#define MBOX_SWSCI (1<<1)
45#define MBOX_ASLE (1<<2)
46
47struct opregion_header {
48 u8 signature[16];
49 u32 size;
50 u32 opregion_ver;
51 u8 bios_ver[32];
52 u8 vbios_ver[16];
53 u8 driver_ver[16];
54 u32 mboxes;
55 u8 reserved[164];
56} __packed;
57
58/* OpRegion mailbox #1: public ACPI methods */
59struct opregion_acpi {
60 u32 drdy; /* driver readiness */
61 u32 csts; /* notification status */
62 u32 cevt; /* current event */
63 u8 rsvd1[20];
64 u32 didl[8]; /* supported display devices ID list */
65 u32 cpdl[8]; /* currently presented display list */
66 u32 cadl[8]; /* currently active display list */
67 u32 nadl[8]; /* next active devices list */
68 u32 aslp; /* ASL sleep time-out */
69 u32 tidx; /* toggle table index */
70 u32 chpd; /* current hotplug enable indicator */
71 u32 clid; /* current lid state*/
72 u32 cdck; /* current docking state */
73 u32 sxsw; /* Sx state resume */
74 u32 evts; /* ASL supported events */
75 u32 cnot; /* current OS notification */
76 u32 nrdy; /* driver status */
77 u8 rsvd2[60];
78} __packed;
79
80/* OpRegion mailbox #2: SWSCI */
81struct opregion_swsci {
82 /*FIXME: add it later*/
83} __packed;
84
85/* OpRegion mailbox #3: ASLE */
86struct opregion_asle {
87 u32 ardy; /* driver readiness */
88 u32 aslc; /* ASLE interrupt command */
89 u32 tche; /* technology enabled indicator */
90 u32 alsi; /* current ALS illuminance reading */
91 u32 bclp; /* backlight brightness to set */
92 u32 pfit; /* panel fitting state */
93 u32 cblv; /* current brightness level */
94 u16 bclm[20]; /* backlight level duty cycle mapping table */
95 u32 cpfm; /* current panel fitting mode */
96 u32 epfm; /* enabled panel fitting modes */
97 u8 plut[74]; /* panel LUT and identifier */
98 u32 pfmb; /* PWM freq and min brightness */
99 u8 rsvd[102];
100} __packed;
101
102/* ASLE irq request bits */
103#define ASLE_SET_ALS_ILLUM (1 << 0)
104#define ASLE_SET_BACKLIGHT (1 << 1)
105#define ASLE_SET_PFIT (1 << 2)
106#define ASLE_SET_PWM_FREQ (1 << 3)
107#define ASLE_REQ_MSK 0xf
108
109/* response bits of ASLE irq request */
110#define ASLE_ALS_ILLUM_FAILED (1<<10)
111#define ASLE_BACKLIGHT_FAILED (1<<12)
112#define ASLE_PFIT_FAILED (1<<14)
113#define ASLE_PWM_FREQ_FAILED (1<<16)
114
115/* ASLE backlight brightness to set */
116#define ASLE_BCLP_VALID (1<<31)
117#define ASLE_BCLP_MSK (~(1<<31))
118
119/* ASLE panel fitting request */
120#define ASLE_PFIT_VALID (1<<31)
121#define ASLE_PFIT_CENTER (1<<0)
122#define ASLE_PFIT_STRETCH_TEXT (1<<1)
123#define ASLE_PFIT_STRETCH_GFX (1<<2)
124
125/* response bits of ASLE irq request */
126#define ASLE_ALS_ILLUM_FAILED (1<<10)
127#define ASLE_BACKLIGHT_FAILED (1<<12)
128#define ASLE_PFIT_FAILED (1<<14)
129#define ASLE_PWM_FREQ_FAILED (1<<16)
130
131/* ASLE backlight brightness to set */
132#define ASLE_BCLP_VALID (1<<31)
133#define ASLE_BCLP_MSK (~(1<<31))
134
135/* ASLE panel fitting request */
136#define ASLE_PFIT_VALID (1<<31)
137#define ASLE_PFIT_CENTER (1<<0)
138#define ASLE_PFIT_STRETCH_TEXT (1<<1)
139#define ASLE_PFIT_STRETCH_GFX (1<<2)
140
141/* PWM frequency and minimum brightness */
142#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
143#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
144#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
145#define ASLE_PFMB_PWM_VALID (1<<31)
146
147#define ASLE_CBLV_VALID (1<<31)
148
149static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
150{
151 struct drm_psb_private *dev_priv = dev->dev_private;
152 struct opregion_asle *asle = dev_priv->opregion.asle;
153 struct backlight_device *bd = dev_priv->backlight_device;
154 u32 max;
155
156 DRM_DEBUG_DRIVER("asle set backlight %x\n", bclp);
157
158 if (!(bclp & ASLE_BCLP_VALID))
159 return ASLE_BACKLIGHT_FAILED;
160
161 if (bd == NULL)
162 return ASLE_BACKLIGHT_FAILED;
163
164 bclp &= ASLE_BCLP_MSK;
165 if (bclp > 255)
166 return ASLE_BACKLIGHT_FAILED;
167
168#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
169 max = bd->props.max_brightness;
170 bd->props.brightness = bclp * max / 255;
171 backlight_update_status(bd);
172#endif
173 asle->cblv = (bclp * 0x64) / 0xff | ASLE_CBLV_VALID;
174
175 return 0;
176}
177
178void psb_intel_opregion_asle_intr(struct drm_device *dev)
179{
180 struct drm_psb_private *dev_priv = dev->dev_private;
181 struct opregion_asle *asle = dev_priv->opregion.asle;
182 u32 asle_stat = 0;
183 u32 asle_req;
184
185 if (!asle)
186 return;
187
188 asle_req = asle->aslc & ASLE_REQ_MSK;
189 if (!asle_req) {
190 DRM_DEBUG_DRIVER("non asle set request??\n");
191 return;
192 }
193
194 if (asle_req & ASLE_SET_BACKLIGHT)
195 asle_stat |= asle_set_backlight(dev, asle->bclp);
196
197 asle->aslc = asle_stat;
198}
199
200#define ASLE_ALS_EN (1<<0)
201#define ASLE_BLC_EN (1<<1)
202#define ASLE_PFIT_EN (1<<2)
203#define ASLE_PFMB_EN (1<<3)
204
205void psb_intel_opregion_enable_asle(struct drm_device *dev)
206{
207 struct drm_psb_private *dev_priv = dev->dev_private;
208 struct opregion_asle *asle = dev_priv->opregion.asle;
209
210 if (asle) {
211 /* Don't do this on Medfield or other non PC like devices, they
212 use the bit for something different altogether */
213 psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
214 psb_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
215
216 asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN
217 | ASLE_PFMB_EN;
218 asle->ardy = 1;
219 }
220}
221
222#define ACPI_EV_DISPLAY_SWITCH (1<<0)
223#define ACPI_EV_LID (1<<1)
224#define ACPI_EV_DOCK (1<<2)
225
226static struct psb_intel_opregion *system_opregion;
227
228static int psb_intel_opregion_video_event(struct notifier_block *nb,
229 unsigned long val, void *data)
230{
231 /* The only video events relevant to opregion are 0x80. These indicate
232 either a docking event, lid switch or display switch request. In
233 Linux, these are handled by the dock, button and video drivers.
234 We might want to fix the video driver to be opregion-aware in
235 future, but right now we just indicate to the firmware that the
236 request has been handled */
237
238 struct opregion_acpi *acpi;
239
240 if (!system_opregion)
241 return NOTIFY_DONE;
242
243 acpi = system_opregion->acpi;
244 acpi->csts = 0;
245
246 return NOTIFY_OK;
247}
248
249static struct notifier_block psb_intel_opregion_notifier = {
250 .notifier_call = psb_intel_opregion_video_event,
251};
252
253void psb_intel_opregion_init(struct drm_device *dev)
254{
255 struct drm_psb_private *dev_priv = dev->dev_private;
256 struct psb_intel_opregion *opregion = &dev_priv->opregion;
257
258 if (!opregion->header)
259 return;
260
261 if (opregion->acpi) {
262 /* Notify BIOS we are ready to handle ACPI video ext notifs.
263 * Right now, all the events are handled by the ACPI video
264 * module. We don't actually need to do anything with them. */
265 opregion->acpi->csts = 0;
266 opregion->acpi->drdy = 1;
267
268 system_opregion = opregion;
269 register_acpi_notifier(&psb_intel_opregion_notifier);
270 }
271
272 if (opregion->asle)
273 psb_intel_opregion_enable_asle(dev);
274}
275
276void psb_intel_opregion_fini(struct drm_device *dev)
277{
278 struct drm_psb_private *dev_priv = dev->dev_private;
279 struct psb_intel_opregion *opregion = &dev_priv->opregion;
280
281 if (!opregion->header)
282 return;
283
284 if (opregion->acpi) {
285 opregion->acpi->drdy = 0;
286
287 system_opregion = NULL;
288 unregister_acpi_notifier(&psb_intel_opregion_notifier);
289 }
290
291 /* just clear all opregion memory pointers now */
292 iounmap(opregion->header);
293 opregion->header = NULL;
294 opregion->acpi = NULL;
295 opregion->swsci = NULL;
296 opregion->asle = NULL;
297 opregion->vbt = NULL;
298}
299
300int psb_intel_opregion_setup(struct drm_device *dev)
301{
302 struct drm_psb_private *dev_priv = dev->dev_private;
303 struct psb_intel_opregion *opregion = &dev_priv->opregion;
304 u32 opregion_phy, mboxes;
305 void *base;
306 int err = 0;
307
308 pci_read_config_dword(dev->pdev, PCI_ASLS, &opregion_phy);
309 if (opregion_phy == 0) {
310 DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");
311 return -ENOTSUPP;
312 }
313 DRM_DEBUG("OpRegion detected at 0x%8x\n", opregion_phy);
314#ifdef CONFIG_ACPI
315 base = acpi_os_ioremap(opregion_phy, 8*1024);
316#else
317 base = ioremap(opregion_phy, 8*1024);
318#endif
319 if (!base)
320 return -ENOMEM;
321
322 if (memcmp(base, OPREGION_SIGNATURE, 16)) {
323 DRM_DEBUG_DRIVER("opregion signature mismatch\n");
324 err = -EINVAL;
325 goto err_out;
326 }
327
328 opregion->header = base;
329 opregion->vbt = base + OPREGION_VBT_OFFSET;
330
331 opregion->lid_state = base + ACPI_CLID;
332
333 mboxes = opregion->header->mboxes;
334 if (mboxes & MBOX_ACPI) {
335 DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
336 opregion->acpi = base + OPREGION_ACPI_OFFSET;
337 }
338
339 if (mboxes & MBOX_ASLE) {
340 DRM_DEBUG_DRIVER("ASLE supported\n");
341 opregion->asle = base + OPREGION_ASLE_OFFSET;
342 }
343
344 return 0;
345
346err_out:
347 iounmap(base);
348 return err;
349}
350
diff --git a/drivers/gpu/drm/gma500/opregion.h b/drivers/gpu/drm/gma500/opregion.h
new file mode 100644
index 000000000000..a392ea8908b7
--- /dev/null
+++ b/drivers/gpu/drm/gma500/opregion.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25extern void psb_intel_opregion_asle_intr(struct drm_device *dev);
26extern void psb_intel_opregion_enable_asle(struct drm_device *dev);
27extern void psb_intel_opregion_init(struct drm_device *dev);
28extern void psb_intel_opregion_fini(struct drm_device *dev);
29extern int psb_intel_opregion_setup(struct drm_device *dev);
diff --git a/drivers/gpu/drm/gma500/psb_device.c b/drivers/gpu/drm/gma500/psb_device.c
index 34e6866a73b2..e95cddbceb60 100644
--- a/drivers/gpu/drm/gma500/psb_device.c
+++ b/drivers/gpu/drm/gma500/psb_device.c
@@ -293,7 +293,7 @@ static int psb_chip_setup(struct drm_device *dev)
293{ 293{
294 psb_get_core_freq(dev); 294 psb_get_core_freq(dev);
295 gma_intel_setup_gmbus(dev); 295 gma_intel_setup_gmbus(dev);
296 gma_intel_opregion_init(dev); 296 psb_intel_opregion_init(dev);
297 psb_intel_init_bios(dev); 297 psb_intel_init_bios(dev);
298 return 0; 298 return 0;
299} 299}
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index 45bd0c78035d..fc6045f926d6 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -215,12 +215,11 @@ static int psb_driver_unload(struct drm_device *dev)
215 /* Kill vblank etc here */ 215 /* Kill vblank etc here */
216 216
217 gma_backlight_exit(dev); 217 gma_backlight_exit(dev);
218
219 psb_modeset_cleanup(dev); 218 psb_modeset_cleanup(dev);
220 219
221 if (dev_priv) { 220 if (dev_priv) {
221 psb_intel_opregion_fini(dev);
222 psb_lid_timer_takedown(dev_priv); 222 psb_lid_timer_takedown(dev_priv);
223 gma_intel_opregion_exit(dev);
224 223
225 if (dev_priv->ops->chip_teardown) 224 if (dev_priv->ops->chip_teardown)
226 dev_priv->ops->chip_teardown(dev); 225 dev_priv->ops->chip_teardown(dev);
@@ -310,6 +309,8 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
310 if (!dev_priv->sgx_reg) 309 if (!dev_priv->sgx_reg)
311 goto out_err; 310 goto out_err;
312 311
312 psb_intel_opregion_setup(dev);
313
313 ret = dev_priv->ops->chip_setup(dev); 314 ret = dev_priv->ops->chip_setup(dev);
314 if (ret) 315 if (ret)
315 goto out_err; 316 goto out_err;
@@ -349,8 +350,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
349 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 350 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
350 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 351 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
351 352
352/* igd_opregion_init(&dev_priv->opregion_dev); */ 353 acpi_video_register();
353/* acpi_video_register(); */
354 if (dev_priv->lid_state) 354 if (dev_priv->lid_state)
355 psb_lid_timer_init(dev_priv); 355 psb_lid_timer_init(dev_priv);
356 356
diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index d3528a694206..377393686a12 100644
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -30,6 +30,7 @@
30#include "psb_intel_drv.h" 30#include "psb_intel_drv.h"
31#include "gtt.h" 31#include "gtt.h"
32#include "power.h" 32#include "power.h"
33#include "opregion.h"
33#include "oaktrail.h" 34#include "oaktrail.h"
34 35
35/* Append new drm mode definition here, align with libdrm definition */ 36/* Append new drm mode definition here, align with libdrm definition */
@@ -120,6 +121,7 @@ enum {
120#define PSB_HWSTAM 0x2098 121#define PSB_HWSTAM 0x2098
121#define PSB_INSTPM 0x20C0 122#define PSB_INSTPM 0x20C0
122#define PSB_INT_IDENTITY_R 0x20A4 123#define PSB_INT_IDENTITY_R 0x20A4
124#define _PSB_IRQ_ASLE (1<<0)
123#define _MDFLD_PIPEC_EVENT_FLAG (1<<2) 125#define _MDFLD_PIPEC_EVENT_FLAG (1<<2)
124#define _MDFLD_PIPEC_VBLANK_FLAG (1<<3) 126#define _MDFLD_PIPEC_VBLANK_FLAG (1<<3)
125#define _PSB_DPST_PIPEB_FLAG (1<<4) 127#define _PSB_DPST_PIPEB_FLAG (1<<4)
@@ -259,7 +261,7 @@ struct psb_intel_opregion {
259 struct opregion_swsci *swsci; 261 struct opregion_swsci *swsci;
260 struct opregion_asle *asle; 262 struct opregion_asle *asle;
261 void *vbt; 263 void *vbt;
262 int enabled; 264 u32 __iomem *lid_state;
263}; 265};
264 266
265struct sdvo_device_mapping { 267struct sdvo_device_mapping {
diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h
index 519a9cd9ffbc..8e8c8efb0a89 100644
--- a/drivers/gpu/drm/gma500/psb_intel_reg.h
+++ b/drivers/gpu/drm/gma500/psb_intel_reg.h
@@ -507,6 +507,7 @@
507#define PIPE_VBLANK_INTERRUPT_ENABLE (1UL << 17) 507#define PIPE_VBLANK_INTERRUPT_ENABLE (1UL << 17)
508#define PIPE_START_VBLANK_INTERRUPT_ENABLE (1UL << 18) 508#define PIPE_START_VBLANK_INTERRUPT_ENABLE (1UL << 18)
509#define PIPE_TE_ENABLE (1UL << 22) 509#define PIPE_TE_ENABLE (1UL << 22)
510#define PIPE_LEGACY_BLC_EVENT_ENABLE (1UL << 22)
510#define PIPE_DPST_EVENT_ENABLE (1UL << 23) 511#define PIPE_DPST_EVENT_ENABLE (1UL << 23)
511#define PIPE_VSYNC_ENABL (1UL << 25) 512#define PIPE_VSYNC_ENABL (1UL << 25)
512#define PIPE_HDMI_AUDIO_UNDERRUN (1UL << 26) 513#define PIPE_HDMI_AUDIO_UNDERRUN (1UL << 26)
diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c
index 2fcdffdc9063..4ffb2a062098 100644
--- a/drivers/gpu/drm/gma500/psb_irq.c
+++ b/drivers/gpu/drm/gma500/psb_irq.c
@@ -190,6 +190,9 @@ static void mid_pipe_event_handler(struct drm_device *dev, int pipe)
190 */ 190 */
191static void psb_vdc_interrupt(struct drm_device *dev, uint32_t vdc_stat) 191static void psb_vdc_interrupt(struct drm_device *dev, uint32_t vdc_stat)
192{ 192{
193 if (vdc_stat & _PSB_IRQ_ASLE)
194 psb_intel_opregion_asle_intr(dev);
195
193 if (vdc_stat & _PSB_VSYNC_PIPEA_FLAG) 196 if (vdc_stat & _PSB_VSYNC_PIPEA_FLAG)
194 mid_pipe_event_handler(dev, 0); 197 mid_pipe_event_handler(dev, 0);
195 198
@@ -283,6 +286,7 @@ void psb_irq_preinstall(struct drm_device *dev)
283 /* Revisit this area - want per device masks ? */ 286 /* Revisit this area - want per device masks ? */
284 if (dev_priv->ops->hotplug) 287 if (dev_priv->ops->hotplug)
285 dev_priv->vdc_irq_mask |= _PSB_IRQ_DISP_HOTSYNC; 288 dev_priv->vdc_irq_mask |= _PSB_IRQ_DISP_HOTSYNC;
289 dev_priv->vdc_irq_mask |= _PSB_IRQ_ASLE;
286 290
287 /* This register is safe even if display island is off */ 291 /* This register is safe even if display island is off */
288 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); 292 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R);
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-10 13:46:01 -0400