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authorShawn Guo <shawn.guo@linaro.org>2012-12-30 22:32:48 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-02-10 10:25:42 -0500
commitbe4ccfcec3e958ef1eae59430e9962a514f34681 (patch)
treea46936784c1fb1b040469b126052c7432805887f
parent8ba472357a87503df2214ddc0270706ae34da4a1 (diff)
ARM: dts: imx: use nodes label in board dts
Following omap3-evm.dts way, it changes all imx dts files to use label in board dts to refer to nodes defined by soc dtsi. Thus, the board dts files become easier to read and edit with the least indentation levels. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat
-rw-r--r--arch/arm/boot/dts/imx25-karo-tx25.dts30
-rw-r--r--arch/arm/boot/dts/imx25.dtsi2
-rw-r--r--arch/arm/boot/dts/imx27-apf27.dts82
-rw-r--r--arch/arm/boot/dts/imx27-pdk.dts20
-rw-r--r--arch/arm/boot/dts/imx31-bug.dts12
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts456
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts126
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts194
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts380
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts294
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts124
-rw-r--r--arch/arm/boot/dts/imx6q-sabreauto.dts64
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts216
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts102
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi2
15 files changed, 1008 insertions, 1096 deletions
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
index d81f8a0b9794..eb9b9d1c8349 100644
--- a/arch/arm/boot/dts/imx25-karo-tx25.dts
+++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
@@ -19,26 +19,18 @@
19 memory { 19 memory {
20 reg = <0x80000000 0x02000000 0x90000000 0x02000000>; 20 reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
21 }; 21 };
22};
22 23
23 soc { 24&uart1 {
24 aips@43f00000 { 25 status = "okay";
25 uart1: serial@43f90000 { 26};
26 status = "okay";
27 };
28 };
29 27
30 spba@50000000 { 28&fec {
31 fec: ethernet@50038000 { 29 status = "okay";
32 status = "okay"; 30 phy-mode = "rmii";
33 phy-mode = "rmii"; 31};
34 };
35 };
36 32
37 emi@80000000 { 33&nfc {
38 nand@bb000000 { 34 nand-on-flash-bbt;
39 nand-on-flash-bbt; 35 status = "okay";
40 status = "okay";
41 };
42 };
43 };
44}; 36};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e1b13ebc96d6..94f33059158a 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -499,7 +499,7 @@
499 reg = <0x80000000 0x3b002000>; 499 reg = <0x80000000 0x3b002000>;
500 ranges; 500 ranges;
501 501
502 nand@bb000000 { 502 nfc: nand@bb000000 {
503 #address-cells = <1>; 503 #address-cells = <1>;
504 #size-cells = <1>; 504 #size-cells = <1>;
505 505
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
index c0327c054de2..b464c807d8d9 100644
--- a/arch/arm/boot/dts/imx27-apf27.dts
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -32,58 +32,54 @@
32 clock-frequency = <0>; 32 clock-frequency = <0>;
33 }; 33 };
34 }; 34 };
35};
35 36
36 soc { 37&uart1 {
37 aipi@10000000 { 38 status = "okay";
38 serial@1000a000 { 39};
39 status = "okay";
40 };
41 40
42 ethernet@1002b000 { 41&fec {
43 status = "okay"; 42 status = "okay";
44 }; 43};
45 };
46 44
47 nand@d8000000 { 45&nfc {
48 status = "okay"; 46 status = "okay";
49 nand-bus-width = <16>; 47 nand-bus-width = <16>;
50 nand-ecc-mode = "hw"; 48 nand-ecc-mode = "hw";
51 nand-on-flash-bbt; 49 nand-on-flash-bbt;
52 50
53 partition@0 { 51 partition@0 {
54 label = "u-boot"; 52 label = "u-boot";
55 reg = <0x0 0x100000>; 53 reg = <0x0 0x100000>;
56 }; 54 };
57 55
58 partition@100000 { 56 partition@100000 {
59 label = "env"; 57 label = "env";
60 reg = <0x100000 0x80000>; 58 reg = <0x100000 0x80000>;
61 }; 59 };
62 60
63 partition@180000 { 61 partition@180000 {
64 label = "env2"; 62 label = "env2";
65 reg = <0x180000 0x80000>; 63 reg = <0x180000 0x80000>;
66 }; 64 };
67 65
68 partition@200000 { 66 partition@200000 {
69 label = "firmware"; 67 label = "firmware";
70 reg = <0x200000 0x80000>; 68 reg = <0x200000 0x80000>;
71 }; 69 };
72 70
73 partition@280000 { 71 partition@280000 {
74 label = "dtb"; 72 label = "dtb";
75 reg = <0x280000 0x80000>; 73 reg = <0x280000 0x80000>;
76 }; 74 };
77 75
78 partition@300000 { 76 partition@300000 {
79 label = "kernel"; 77 label = "kernel";
80 reg = <0x300000 0x500000>; 78 reg = <0x300000 0x500000>;
81 }; 79 };
82 80
83 partition@800000 { 81 partition@800000 {
84 label = "rootfs"; 82 label = "rootfs";
85 reg = <0x800000 0xf800000>; 83 reg = <0x800000 0xf800000>;
86 };
87 };
88 }; 84 };
89}; 85};
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts
index 0290978f080b..41cd1105608e 100644
--- a/arch/arm/boot/dts/imx27-pdk.dts
+++ b/arch/arm/boot/dts/imx27-pdk.dts
@@ -19,19 +19,13 @@
19 memory { 19 memory {
20 reg = <0x0 0x0>; 20 reg = <0x0 0x0>;
21 }; 21 };
22};
22 23
23 soc { 24&uart1 {
24 aipi@10000000 { /* aipi1 */ 25 fsl,uart-has-rtscts;
25 uart1: serial@1000a000 { 26 status = "okay";
26 fsl,uart-has-rtscts; 27};
27 status = "okay";
28 };
29 };
30 28
31 aipi@10020000 { /* aipi2 */ 29&fec {
32 ethernet@1002b000 { 30 status = "okay";
33 status = "okay";
34 };
35 };
36 };
37}; 31};
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts
index 7f67402328d3..9ac6f6ba1d64 100644
--- a/arch/arm/boot/dts/imx31-bug.dts
+++ b/arch/arm/boot/dts/imx31-bug.dts
@@ -19,13 +19,9 @@
19 memory { 19 memory {
20 reg = <0x80000000 0x8000000>; /* 128M */ 20 reg = <0x80000000 0x8000000>; /* 128M */
21 }; 21 };
22};
22 23
23 soc { 24&uart5 {
24 aips@43f00000 { /* AIPS1 */ 25 fsl,uart-has-rtscts;
25 uart5: serial@43fb4000 { 26 status = "okay";
26 fsl,uart-has-rtscts;
27 status = "okay";
28 };
29 };
30 };
31}; 27};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 567e7ee72f91..fb33aff5b4b9 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -21,239 +21,20 @@
21 reg = <0x90000000 0x20000000>; 21 reg = <0x90000000 0x20000000>;
22 }; 22 };
23 23
24 soc { 24 display@di0 {
25 display@di0 { 25 compatible = "fsl,imx-parallel-display";
26 compatible = "fsl,imx-parallel-display"; 26 crtcs = <&ipu 0>;
27 crtcs = <&ipu 0>; 27 interface-pix-fmt = "rgb24";
28 interface-pix-fmt = "rgb24"; 28 pinctrl-names = "default";
29 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
30 pinctrl-0 = <&pinctrl_ipu_disp1_1>; 30 };
31 };
32
33 display@di1 {
34 compatible = "fsl,imx-parallel-display";
35 crtcs = <&ipu 1>;
36 interface-pix-fmt = "rgb565";
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
39 };
40
41 aips@70000000 { /* aips-1 */
42 spba@70000000 {
43 esdhc@70004000 { /* ESDHC1 */
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_esdhc1_1>;
46 fsl,cd-controller;
47 fsl,wp-controller;
48 status = "okay";
49 };
50
51 esdhc@70008000 { /* ESDHC2 */
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_esdhc2_1>;
54 cd-gpios = <&gpio1 6 0>;
55 wp-gpios = <&gpio1 5 0>;
56 status = "okay";
57 };
58
59 uart3: serial@7000c000 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_uart3_1>;
62 fsl,uart-has-rtscts;
63 status = "okay";
64 };
65
66 ecspi@70010000 { /* ECSPI1 */
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_ecspi1_1>;
69 fsl,spi-num-chipselects = <2>;
70 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
71 status = "okay";
72
73 pmic: mc13892@0 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "fsl,mc13892";
77 spi-max-frequency = <6000000>;
78 reg = <0>;
79 interrupt-parent = <&gpio1>;
80 interrupts = <8 0x4>;
81
82 regulators {
83 sw1_reg: sw1 {
84 regulator-min-microvolt = <600000>;
85 regulator-max-microvolt = <1375000>;
86 regulator-boot-on;
87 regulator-always-on;
88 };
89
90 sw2_reg: sw2 {
91 regulator-min-microvolt = <900000>;
92 regulator-max-microvolt = <1850000>;
93 regulator-boot-on;
94 regulator-always-on;
95 };
96
97 sw3_reg: sw3 {
98 regulator-min-microvolt = <1100000>;
99 regulator-max-microvolt = <1850000>;
100 regulator-boot-on;
101 regulator-always-on;
102 };
103
104 sw4_reg: sw4 {
105 regulator-min-microvolt = <1100000>;
106 regulator-max-microvolt = <1850000>;
107 regulator-boot-on;
108 regulator-always-on;
109 };
110
111 vpll_reg: vpll {
112 regulator-min-microvolt = <1050000>;
113 regulator-max-microvolt = <1800000>;
114 regulator-boot-on;
115 regulator-always-on;
116 };
117
118 vdig_reg: vdig {
119 regulator-min-microvolt = <1650000>;
120 regulator-max-microvolt = <1650000>;
121 regulator-boot-on;
122 };
123
124 vsd_reg: vsd {
125 regulator-min-microvolt = <1800000>;
126 regulator-max-microvolt = <3150000>;
127 };
128
129 vusb2_reg: vusb2 {
130 regulator-min-microvolt = <2400000>;
131 regulator-max-microvolt = <2775000>;
132 regulator-boot-on;
133 regulator-always-on;
134 };
135
136 vvideo_reg: vvideo {
137 regulator-min-microvolt = <2775000>;
138 regulator-max-microvolt = <2775000>;
139 };
140
141 vaudio_reg: vaudio {
142 regulator-min-microvolt = <2300000>;
143 regulator-max-microvolt = <3000000>;
144 };
145
146 vcam_reg: vcam {
147 regulator-min-microvolt = <2500000>;
148 regulator-max-microvolt = <3000000>;
149 };
150
151 vgen1_reg: vgen1 {
152 regulator-min-microvolt = <1200000>;
153 regulator-max-microvolt = <1200000>;
154 };
155
156 vgen2_reg: vgen2 {
157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <3150000>;
159 regulator-always-on;
160 };
161
162 vgen3_reg: vgen3 {
163 regulator-min-microvolt = <1800000>;
164 regulator-max-microvolt = <2900000>;
165 regulator-always-on;
166 };
167 };
168 };
169
170 flash: at45db321d@1 {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
174 spi-max-frequency = <25000000>;
175 reg = <1>;
176
177 partition@0 {
178 label = "U-Boot";
179 reg = <0x0 0x40000>;
180 read-only;
181 };
182
183 partition@40000 {
184 label = "Kernel";
185 reg = <0x40000 0x3c0000>;
186 };
187 };
188 };
189
190 ssi2: ssi@70014000 {
191 fsl,mode = "i2s-slave";
192 status = "okay";
193 };
194 };
195
196 iomuxc@73fa8000 {
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_hog>;
199
200 hog {
201 pinctrl_hog: hoggrp {
202 fsl,pins = <
203 694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
204 697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
205 737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
206 740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
207 121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
208 402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
209 405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
210 >;
211 };
212 };
213 };
214
215 uart1: serial@73fbc000 {
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_uart1_1>;
218 fsl,uart-has-rtscts;
219 status = "okay";
220 };
221
222 uart2: serial@73fc0000 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_uart2_1>;
225 status = "okay";
226 };
227 };
228
229 aips@80000000 { /* aips-2 */
230 i2c@83fc4000 { /* I2C2 */
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_i2c2_1>;
233 status = "okay";
234
235 sgtl5000: codec@0a {
236 compatible = "fsl,sgtl5000";
237 reg = <0x0a>;
238 clock-frequency = <26000000>;
239 VDDA-supply = <&vdig_reg>;
240 VDDIO-supply = <&vvideo_reg>;
241 };
242 };
243
244 audmux@83fd0000 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_audmux_1>;
247 status = "okay";
248 };
249 31
250 ethernet@83fec000 { 32 display@di1 {
251 pinctrl-names = "default"; 33 compatible = "fsl,imx-parallel-display";
252 pinctrl-0 = <&pinctrl_fec_1>; 34 crtcs = <&ipu 1>;
253 phy-mode = "mii"; 35 interface-pix-fmt = "rgb565";
254 status = "okay"; 36 pinctrl-names = "default";
255 }; 37 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
256 };
257 }; 38 };
258 39
259 gpio-keys { 40 gpio-keys {
@@ -281,3 +62,214 @@
281 mux-ext-port = <3>; 62 mux-ext-port = <3>;
282 }; 63 };
283}; 64};
65
66&esdhc1 {
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_esdhc1_1>;
69 fsl,cd-controller;
70 fsl,wp-controller;
71 status = "okay";
72};
73
74&esdhc2 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_esdhc2_1>;
77 cd-gpios = <&gpio1 6 0>;
78 wp-gpios = <&gpio1 5 0>;
79 status = "okay";
80};
81
82&uart3 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_uart3_1>;
85 fsl,uart-has-rtscts;
86 status = "okay";
87};
88
89&ecspi1 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_ecspi1_1>;
92 fsl,spi-num-chipselects = <2>;
93 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
94 status = "okay";
95
96 pmic: mc13892@0 {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 compatible = "fsl,mc13892";
100 spi-max-frequency = <6000000>;
101 reg = <0>;
102 interrupt-parent = <&gpio1>;
103 interrupts = <8 0x4>;
104
105 regulators {
106 sw1_reg: sw1 {
107 regulator-min-microvolt = <600000>;
108 regulator-max-microvolt = <1375000>;
109 regulator-boot-on;
110 regulator-always-on;
111 };
112
113 sw2_reg: sw2 {
114 regulator-min-microvolt = <900000>;
115 regulator-max-microvolt = <1850000>;
116 regulator-boot-on;
117 regulator-always-on;
118 };
119
120 sw3_reg: sw3 {
121 regulator-min-microvolt = <1100000>;
122 regulator-max-microvolt = <1850000>;
123 regulator-boot-on;
124 regulator-always-on;
125 };
126
127 sw4_reg: sw4 {
128 regulator-min-microvolt = <1100000>;
129 regulator-max-microvolt = <1850000>;
130 regulator-boot-on;
131 regulator-always-on;
132 };
133
134 vpll_reg: vpll {
135 regulator-min-microvolt = <1050000>;
136 regulator-max-microvolt = <1800000>;
137 regulator-boot-on;
138 regulator-always-on;
139 };
140
141 vdig_reg: vdig {
142 regulator-min-microvolt = <1650000>;
143 regulator-max-microvolt = <1650000>;
144 regulator-boot-on;
145 };
146
147 vsd_reg: vsd {
148 regulator-min-microvolt = <1800000>;
149 regulator-max-microvolt = <3150000>;
150 };
151
152 vusb2_reg: vusb2 {
153 regulator-min-microvolt = <2400000>;
154 regulator-max-microvolt = <2775000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 vvideo_reg: vvideo {
160 regulator-min-microvolt = <2775000>;
161 regulator-max-microvolt = <2775000>;
162 };
163
164 vaudio_reg: vaudio {
165 regulator-min-microvolt = <2300000>;
166 regulator-max-microvolt = <3000000>;
167 };
168
169 vcam_reg: vcam {
170 regulator-min-microvolt = <2500000>;
171 regulator-max-microvolt = <3000000>;
172 };
173
174 vgen1_reg: vgen1 {
175 regulator-min-microvolt = <1200000>;
176 regulator-max-microvolt = <1200000>;
177 };
178
179 vgen2_reg: vgen2 {
180 regulator-min-microvolt = <1200000>;
181 regulator-max-microvolt = <3150000>;
182 regulator-always-on;
183 };
184
185 vgen3_reg: vgen3 {
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <2900000>;
188 regulator-always-on;
189 };
190 };
191 };
192
193 flash: at45db321d@1 {
194 #address-cells = <1>;
195 #size-cells = <1>;
196 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
197 spi-max-frequency = <25000000>;
198 reg = <1>;
199
200 partition@0 {
201 label = "U-Boot";
202 reg = <0x0 0x40000>;
203 read-only;
204 };
205
206 partition@40000 {
207 label = "Kernel";
208 reg = <0x40000 0x3c0000>;
209 };
210 };
211};
212
213&ssi2 {
214 fsl,mode = "i2s-slave";
215 status = "okay";
216};
217
218&iomuxc {
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_hog>;
221
222 hog {
223 pinctrl_hog: hoggrp {
224 fsl,pins = <
225 694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
226 697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
227 737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
228 740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
229 121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
230 402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
231 405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
232 >;
233 };
234 };
235};
236
237&uart1 {
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_uart1_1>;
240 fsl,uart-has-rtscts;
241 status = "okay";
242};
243
244&uart2 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_uart2_1>;
247 status = "okay";
248};
249
250&i2c2 {
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_i2c2_1>;
253 status = "okay";
254
255 sgtl5000: codec@0a {
256 compatible = "fsl,sgtl5000";
257 reg = <0x0a>;
258 clock-frequency = <26000000>;
259 VDDA-supply = <&vdig_reg>;
260 VDDIO-supply = <&vvideo_reg>;
261 };
262};
263
264&audmux {
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_audmux_1>;
267 status = "okay";
268};
269
270&fec {
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_fec_1>;
273 phy-mode = "mii";
274 status = "okay";
275};
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 4be76f223526..e049fd0319e8 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -21,72 +21,6 @@
21 reg = <0x70000000 0x40000000>; 21 reg = <0x70000000 0x40000000>;
22 }; 22 };
23 23
24 soc {
25 aips@50000000 { /* AIPS1 */
26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_2>;
30 cd-gpios = <&gpio1 1 0>;
31 wp-gpios = <&gpio1 9 0>;
32 status = "okay";
33 };
34 };
35
36 iomuxc@53fa8000 {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_hog>;
39
40 hog {
41 pinctrl_hog: hoggrp {
42 fsl,pins = <
43 1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
44 1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
45 486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
46 739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
47 218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
48 226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
49 233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
50 241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
51 429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
52 435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
53 441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
54 448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
55 456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
56 464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
57 471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
58 477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
59 492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
60 500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
61 508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
62 516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
63 524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
64 532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
65 540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
66 548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
67 637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
68 642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
69 647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
70 652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
71 657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
72 662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
73 667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
74 611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
75 616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
76 607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
77 >;
78 };
79 };
80 };
81
82 uart1: serial@53fbc000 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_uart1_2>;
85 status = "okay";
86 };
87 };
88 };
89
90 eim-cs1@f4000000 { 24 eim-cs1@f4000000 {
91 #address-cells = <1>; 25 #address-cells = <1>;
92 #size-cells = <1>; 26 #size-cells = <1>;
@@ -162,3 +96,63 @@
162 }; 96 };
163 }; 97 };
164}; 98};
99
100&esdhc1 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_esdhc1_2>;
103 cd-gpios = <&gpio1 1 0>;
104 wp-gpios = <&gpio1 9 0>;
105 status = "okay";
106};
107
108&iomuxc {
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_hog>;
111
112 hog {
113 pinctrl_hog: hoggrp {
114 fsl,pins = <
115 1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
116 1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
117 486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
118 739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
119 218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
120 226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
121 233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
122 241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
123 429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
124 435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
125 441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
126 448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
127 456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
128 464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
129 471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
130 477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
131 492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
132 500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
133 508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
134 516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
135 524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
136 532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
137 540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
138 548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
139 637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
140 642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
141 647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
142 652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
143 657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
144 662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
145 667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
146 611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
147 616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
148 607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
149 >;
150 };
151 };
152};
153
154&uart1 {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_uart1_2>;
157 status = "okay";
158};
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index a124d1e25258..85a89b52f9b8 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -21,107 +21,6 @@
21 reg = <0x70000000 0x80000000>; 21 reg = <0x70000000 0x80000000>;
22 }; 22 };
23 23
24 soc {
25 aips@50000000 { /* AIPS1 */
26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_1>;
30 cd-gpios = <&gpio3 13 0>;
31 wp-gpios = <&gpio3 14 0>;
32 status = "okay";
33 };
34
35 ecspi@50010000 { /* ECSPI1 */
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_ecspi1_1>;
38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
40 status = "okay";
41
42 flash: at45db321d@1 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
46 spi-max-frequency = <25000000>;
47 reg = <1>;
48
49 partition@0 {
50 label = "U-Boot";
51 reg = <0x0 0x40000>;
52 read-only;
53 };
54
55 partition@40000 {
56 label = "Kernel";
57 reg = <0x40000 0x3c0000>;
58 };
59 };
60 };
61
62 esdhc@50020000 { /* ESDHC3 */
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_esdhc3_1>;
65 cd-gpios = <&gpio3 11 0>;
66 wp-gpios = <&gpio3 12 0>;
67 status = "okay";
68 };
69 };
70
71 iomuxc@53fa8000 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_hog>;
74
75 hog {
76 pinctrl_hog: hoggrp {
77 fsl,pins = <
78 424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
79 449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
80 693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
81 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
82 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
83 705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
84 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
85 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
86 >;
87 };
88 };
89 };
90
91 uart1: serial@53fbc000 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_uart1_1>;
94 status = "okay";
95 };
96 };
97
98 aips@60000000 { /* AIPS2 */
99 i2c@63fc4000 { /* I2C2 */
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_i2c2_1>;
102 status = "okay";
103
104 pmic: mc13892@08 {
105 compatible = "fsl,mc13892", "fsl,mc13xxx";
106 reg = <0x08>;
107 };
108
109 codec: sgtl5000@0a {
110 compatible = "fsl,sgtl5000";
111 reg = <0x0a>;
112 };
113 };
114
115 ethernet@63fec000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_fec_1>;
118 phy-mode = "rmii";
119 phy-reset-gpios = <&gpio7 6 0>;
120 status = "okay";
121 };
122 };
123 };
124
125 leds { 24 leds {
126 compatible = "gpio-leds"; 25 compatible = "gpio-leds";
127 26
@@ -132,3 +31,96 @@
132 }; 31 };
133 }; 32 };
134}; 33};
34
35&esdhc1 {
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_esdhc1_1>;
38 cd-gpios = <&gpio3 13 0>;
39 wp-gpios = <&gpio3 14 0>;
40 status = "okay";
41};
42
43&ecspi1 {
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_ecspi1_1>;
46 fsl,spi-num-chipselects = <2>;
47 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
48 status = "okay";
49
50 flash: at45db321d@1 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
54 spi-max-frequency = <25000000>;
55 reg = <1>;
56
57 partition@0 {
58 label = "U-Boot";
59 reg = <0x0 0x40000>;
60 read-only;
61 };
62
63 partition@40000 {
64 label = "Kernel";
65 reg = <0x40000 0x3c0000>;
66 };
67 };
68};
69
70&esdhc3 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_esdhc3_1>;
73 cd-gpios = <&gpio3 11 0>;
74 wp-gpios = <&gpio3 12 0>;
75 status = "okay";
76};
77
78&iomuxc {
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_hog>;
81
82 hog {
83 pinctrl_hog: hoggrp {
84 fsl,pins = <
85 424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
86 449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
87 693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
88 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
89 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
90 705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
91 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
92 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
93 >;
94 };
95 };
96};
97
98&uart1 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_uart1_1>;
101 status = "okay";
102};
103
104&i2c2 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_i2c2_1>;
107 status = "okay";
108
109 pmic: mc13892@08 {
110 compatible = "fsl,mc13892", "fsl,mc13xxx";
111 reg = <0x08>;
112 };
113
114 codec: sgtl5000@0a {
115 compatible = "fsl,sgtl5000";
116 reg = <0x0a>;
117 };
118};
119
120&fec {
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_fec_1>;
123 phy-mode = "rmii";
124 phy-reset-gpios = <&gpio7 6 0>;
125 status = "okay";
126};
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index b0075537195b..05cc5620436b 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -21,200 +21,6 @@
21 reg = <0x70000000 0x40000000>; 21 reg = <0x70000000 0x40000000>;
22 }; 22 };
23 23
24 soc {
25 aips@50000000 { /* AIPS1 */
26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_1>;
30 cd-gpios = <&gpio3 13 0>;
31 status = "okay";
32 };
33
34 ssi2: ssi@50014000 {
35 fsl,mode = "i2s-slave";
36 status = "okay";
37 };
38
39 esdhc@50020000 { /* ESDHC3 */
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_esdhc3_1>;
42 cd-gpios = <&gpio3 11 0>;
43 wp-gpios = <&gpio3 12 0>;
44 status = "okay";
45 };
46 };
47
48 iomuxc@53fa8000 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_hog>;
51
52 hog {
53 pinctrl_hog: hoggrp {
54 fsl,pins = <
55 1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
56 1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
57 982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
58 989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
59 693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
63 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
64 >;
65 };
66
67 led_pin_gpio7_7: led_gpio7_7@0 {
68 fsl,pins = <
69 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
70 >;
71 };
72 };
73
74 };
75
76 uart1: serial@53fbc000 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_uart1_1>;
79 status = "okay";
80 };
81 };
82
83 aips@60000000 { /* AIPS2 */
84 i2c@63fc4000 { /* I2C2 */
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_i2c2_1>;
87 status = "okay";
88
89 sgtl5000: codec@0a {
90 compatible = "fsl,sgtl5000";
91 reg = <0x0a>;
92 VDDA-supply = <&reg_3p2v>;
93 VDDIO-supply = <&reg_3p2v>;
94 };
95 };
96
97 i2c@63fc8000 { /* I2C1 */
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_i2c1_1>;
100 status = "okay";
101
102 accelerometer: mma8450@1c {
103 compatible = "fsl,mma8450";
104 reg = <0x1c>;
105 };
106
107 pmic: dialog@48 {
108 compatible = "dlg,da9053-aa", "dlg,da9052";
109 reg = <0x48>;
110 interrupt-parent = <&gpio7>;
111 interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
112
113 regulators {
114 buck1_reg: buck1 {
115 regulator-min-microvolt = <500000>;
116 regulator-max-microvolt = <2075000>;
117 regulator-always-on;
118 };
119
120 buck2_reg: buck2 {
121 regulator-min-microvolt = <500000>;
122 regulator-max-microvolt = <2075000>;
123 regulator-always-on;
124 };
125
126 buck3_reg: buck3 {
127 regulator-min-microvolt = <925000>;
128 regulator-max-microvolt = <2500000>;
129 regulator-always-on;
130 };
131
132 buck4_reg: buck4 {
133 regulator-min-microvolt = <925000>;
134 regulator-max-microvolt = <2500000>;
135 regulator-always-on;
136 };
137
138 ldo1_reg: ldo1 {
139 regulator-min-microvolt = <600000>;
140 regulator-max-microvolt = <1800000>;
141 regulator-boot-on;
142 regulator-always-on;
143 };
144
145 ldo2_reg: ldo2 {
146 regulator-min-microvolt = <600000>;
147 regulator-max-microvolt = <1800000>;
148 regulator-always-on;
149 };
150
151 ldo3_reg: ldo3 {
152 regulator-min-microvolt = <600000>;
153 regulator-max-microvolt = <1800000>;
154 regulator-always-on;
155 };
156
157 ldo4_reg: ldo4 {
158 regulator-min-microvolt = <1725000>;
159 regulator-max-microvolt = <3300000>;
160 regulator-always-on;
161 };
162
163 ldo5_reg: ldo5 {
164 regulator-min-microvolt = <1725000>;
165 regulator-max-microvolt = <3300000>;
166 regulator-always-on;
167 };
168
169 ldo6_reg: ldo6 {
170 regulator-min-microvolt = <1200000>;
171 regulator-max-microvolt = <3600000>;
172 regulator-always-on;
173 };
174
175 ldo7_reg: ldo7 {
176 regulator-min-microvolt = <1200000>;
177 regulator-max-microvolt = <3600000>;
178 regulator-always-on;
179 };
180
181 ldo8_reg: ldo8 {
182 regulator-min-microvolt = <1200000>;
183 regulator-max-microvolt = <3600000>;
184 regulator-always-on;
185 };
186
187 ldo9_reg: ldo9 {
188 regulator-min-microvolt = <1200000>;
189 regulator-max-microvolt = <3600000>;
190 regulator-always-on;
191 };
192
193 ldo10_reg: ldo10 {
194 regulator-min-microvolt = <1250000>;
195 regulator-max-microvolt = <3650000>;
196 regulator-always-on;
197 };
198 };
199 };
200 };
201
202 audmux@63fd0000 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_audmux_1>;
205 status = "okay";
206 };
207
208 ethernet@63fec000 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_fec_1>;
211 phy-mode = "rmii";
212 phy-reset-gpios = <&gpio7 6 0>;
213 status = "okay";
214 };
215 };
216 };
217
218 gpio-keys { 24 gpio-keys {
219 compatible = "gpio-keys"; 25 compatible = "gpio-keys";
220 26
@@ -276,3 +82,189 @@
276 mux-ext-port = <5>; 82 mux-ext-port = <5>;
277 }; 83 };
278}; 84};
85
86&esdhc1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_esdhc1_1>;
89 cd-gpios = <&gpio3 13 0>;
90 status = "okay";
91};
92
93&ssi2 {
94 fsl,mode = "i2s-slave";
95 status = "okay";
96};
97
98&esdhc3 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_esdhc3_1>;
101 cd-gpios = <&gpio3 11 0>;
102 wp-gpios = <&gpio3 12 0>;
103 status = "okay";
104};
105
106&iomuxc {
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_hog>;
109
110 hog {
111 pinctrl_hog: hoggrp {
112 fsl,pins = <
113 1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
114 1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
115 982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
116 989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
117 693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
118 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
119 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
120 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
121 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
122 >;
123 };
124
125 led_pin_gpio7_7: led_gpio7_7@0 {
126 fsl,pins = <
127 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
128 >;
129 };
130 };
131
132};
133
134&uart1 {
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_uart1_1>;
137 status = "okay";
138};
139
140&i2c2 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c2_1>;
143 status = "okay";
144
145 sgtl5000: codec@0a {
146 compatible = "fsl,sgtl5000";
147 reg = <0x0a>;
148 VDDA-supply = <&reg_3p2v>;
149 VDDIO-supply = <&reg_3p2v>;
150 };
151};
152
153&i2c1 {
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c1_1>;
156 status = "okay";
157
158 accelerometer: mma8450@1c {
159 compatible = "fsl,mma8450";
160 reg = <0x1c>;
161 };
162
163 pmic: dialog@48 {
164 compatible = "dlg,da9053-aa", "dlg,da9052";
165 reg = <0x48>;
166 interrupt-parent = <&gpio7>;
167 interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
168
169 regulators {
170 buck1_reg: buck1 {
171 regulator-min-microvolt = <500000>;
172 regulator-max-microvolt = <2075000>;
173 regulator-always-on;
174 };
175
176 buck2_reg: buck2 {
177 regulator-min-microvolt = <500000>;
178 regulator-max-microvolt = <2075000>;
179 regulator-always-on;
180 };
181
182 buck3_reg: buck3 {
183 regulator-min-microvolt = <925000>;
184 regulator-max-microvolt = <2500000>;
185 regulator-always-on;
186 };
187
188 buck4_reg: buck4 {
189 regulator-min-microvolt = <925000>;
190 regulator-max-microvolt = <2500000>;
191 regulator-always-on;
192 };
193
194 ldo1_reg: ldo1 {
195 regulator-min-microvolt = <600000>;
196 regulator-max-microvolt = <1800000>;
197 regulator-boot-on;
198 regulator-always-on;
199 };
200
201 ldo2_reg: ldo2 {
202 regulator-min-microvolt = <600000>;
203 regulator-max-microvolt = <1800000>;
204 regulator-always-on;
205 };
206
207 ldo3_reg: ldo3 {
208 regulator-min-microvolt = <600000>;
209 regulator-max-microvolt = <1800000>;
210 regulator-always-on;
211 };
212
213 ldo4_reg: ldo4 {
214 regulator-min-microvolt = <1725000>;
215 regulator-max-microvolt = <3300000>;
216 regulator-always-on;
217 };
218
219 ldo5_reg: ldo5 {
220 regulator-min-microvolt = <1725000>;
221 regulator-max-microvolt = <3300000>;
222 regulator-always-on;
223 };
224
225 ldo6_reg: ldo6 {
226 regulator-min-microvolt = <1200000>;
227 regulator-max-microvolt = <3600000>;
228 regulator-always-on;
229 };
230
231 ldo7_reg: ldo7 {
232 regulator-min-microvolt = <1200000>;
233 regulator-max-microvolt = <3600000>;
234 regulator-always-on;
235 };
236
237 ldo8_reg: ldo8 {
238 regulator-min-microvolt = <1200000>;
239 regulator-max-microvolt = <3600000>;
240 regulator-always-on;
241 };
242
243 ldo9_reg: ldo9 {
244 regulator-min-microvolt = <1200000>;
245 regulator-max-microvolt = <3600000>;
246 regulator-always-on;
247 };
248
249 ldo10_reg: ldo10 {
250 regulator-min-microvolt = <1250000>;
251 regulator-max-microvolt = <3650000>;
252 regulator-always-on;
253 };
254 };
255 };
256};
257
258&audmux {
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_audmux_1>;
261 status = "okay";
262};
263
264&fec {
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_fec_1>;
267 phy-mode = "rmii";
268 phy-reset-gpios = <&gpio7 6 0>;
269 status = "okay";
270};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 06c68580c842..995554c324b8 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -21,157 +21,6 @@
21 reg = <0x70000000 0x40000000>; 21 reg = <0x70000000 0x40000000>;
22 }; 22 };
23 23
24 soc {
25 aips@50000000 { /* AIPS1 */
26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_1>;
30 cd-gpios = <&gpio3 13 0>;
31 wp-gpios = <&gpio4 11 0>;
32 status = "okay";
33 };
34
35 esdhc@50008000 { /* ESDHC2 */
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_esdhc2_1>;
38 non-removable;
39 status = "okay";
40 };
41
42 uart3: serial@5000c000 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_uart3_1>;
45 fsl,uart-has-rtscts;
46 status = "okay";
47 };
48
49 ecspi@50010000 { /* ECSPI1 */
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_ecspi1_1>;
52 fsl,spi-num-chipselects = <2>;
53 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
54 status = "okay";
55
56 zigbee: mc1323@0 {
57 compatible = "fsl,mc1323";
58 spi-max-frequency = <8000000>;
59 reg = <0>;
60 };
61
62 flash: m25p32@1 {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "st,m25p32", "st,m25p";
66 spi-max-frequency = <20000000>;
67 reg = <1>;
68
69 partition@0 {
70 label = "U-Boot";
71 reg = <0x0 0x40000>;
72 read-only;
73 };
74
75 partition@40000 {
76 label = "Kernel";
77 reg = <0x40000 0x3c0000>;
78 };
79 };
80 };
81
82 esdhc@50020000 { /* ESDHC3 */
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_esdhc3_1>;
85 non-removable;
86 status = "okay";
87 };
88 };
89
90 iomuxc@53fa8000 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_hog>;
93
94 hog {
95 pinctrl_hog: hoggrp {
96 fsl,pins = <
97 982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
98 989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
99 424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
100 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
101 449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
102 43 0x80000000 /* MX53_PAD_KEY_ROW2__GPIO4_11 */
103 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
104 >;
105 };
106 };
107 };
108
109 uart1: serial@53fbc000 {
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_uart1_1>;
112 status = "okay";
113 };
114
115 uart2: serial@53fc0000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_uart2_1>;
118 status = "okay";
119 };
120 };
121
122 aips@60000000 { /* AIPS2 */
123 i2c@63fc4000 { /* I2C2 */
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_i2c2_1>;
126 status = "okay";
127
128 codec: sgtl5000@0a {
129 compatible = "fsl,sgtl5000";
130 reg = <0x0a>;
131 };
132
133 magnetometer: mag3110@0e {
134 compatible = "fsl,mag3110";
135 reg = <0x0e>;
136 };
137
138 touchkey: mpr121@5a {
139 compatible = "fsl,mpr121";
140 reg = <0x5a>;
141 };
142 };
143
144 i2c@63fc8000 { /* I2C1 */
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_i2c1_1>;
147 status = "okay";
148
149 accelerometer: mma8450@1c {
150 compatible = "fsl,mma8450";
151 reg = <0x1c>;
152 };
153
154 camera: ov5642@3c {
155 compatible = "ovti,ov5642";
156 reg = <0x3c>;
157 };
158
159 pmic: dialog@48 {
160 compatible = "dialog,da9053", "dialog,da9052";
161 reg = <0x48>;
162 };
163 };
164
165 ethernet@63fec000 {
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_fec_1>;
168 phy-mode = "rmii";
169 phy-reset-gpios = <&gpio7 6 0>;
170 status = "okay";
171 };
172 };
173 };
174
175 gpio-keys { 24 gpio-keys {
176 compatible = "gpio-keys"; 25 compatible = "gpio-keys";
177 26
@@ -188,3 +37,146 @@
188 }; 37 };
189 }; 38 };
190}; 39};
40
41&esdhc1 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_esdhc1_1>;
44 cd-gpios = <&gpio3 13 0>;
45 wp-gpios = <&gpio4 11 0>;
46 status = "okay";
47};
48
49&esdhc2 {
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_esdhc2_1>;
52 non-removable;
53 status = "okay";
54};
55
56&uart3 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_uart3_1>;
59 fsl,uart-has-rtscts;
60 status = "okay";
61};
62
63&ecspi1 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_ecspi1_1>;
66 fsl,spi-num-chipselects = <2>;
67 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
68 status = "okay";
69
70 zigbee: mc1323@0 {
71 compatible = "fsl,mc1323";
72 spi-max-frequency = <8000000>;
73 reg = <0>;
74 };
75
76 flash: m25p32@1 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "st,m25p32", "st,m25p";
80 spi-max-frequency = <20000000>;
81 reg = <1>;
82
83 partition@0 {
84 label = "U-Boot";
85 reg = <0x0 0x40000>;
86 read-only;
87 };
88
89 partition@40000 {
90 label = "Kernel";
91 reg = <0x40000 0x3c0000>;
92 };
93 };
94};
95
96&esdhc3 {
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_esdhc3_1>;
99 non-removable;
100 status = "okay";
101};
102
103&iomuxc {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_hog>;
106
107 hog {
108 pinctrl_hog: hoggrp {
109 fsl,pins = <
110 982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
111 989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
112 424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
113 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
114 449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
115 43 0x80000000 /* MX53_PAD_KEY_ROW2__GPIO4_11 */
116 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
117 >;
118 };
119 };
120};
121
122&uart1 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart1_1>;
125 status = "okay";
126};
127
128&uart2 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_uart2_1>;
131 status = "okay";
132};
133
134&i2c2 {
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_i2c2_1>;
137 status = "okay";
138
139 codec: sgtl5000@0a {
140 compatible = "fsl,sgtl5000";
141 reg = <0x0a>;
142 };
143
144 magnetometer: mag3110@0e {
145 compatible = "fsl,mag3110";
146 reg = <0x0e>;
147 };
148
149 touchkey: mpr121@5a {
150 compatible = "fsl,mpr121";
151 reg = <0x5a>;
152 };
153};
154
155&i2c1 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_i2c1_1>;
158 status = "okay";
159
160 accelerometer: mma8450@1c {
161 compatible = "fsl,mma8450";
162 reg = <0x1c>;
163 };
164
165 camera: ov5642@3c {
166 compatible = "ovti,ov5642";
167 reg = <0x3c>;
168 };
169
170 pmic: dialog@48 {
171 compatible = "dialog,da9053", "dialog,da9052";
172 reg = <0x48>;
173 };
174};
175
176&fec {
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_fec_1>;
179 phy-mode = "rmii";
180 phy-reset-gpios = <&gpio7 6 0>;
181 status = "okay";
182};
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 5bfa02a3f85c..53eb241fa5ad 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -21,71 +21,6 @@
21 reg = <0x10000000 0x80000000>; 21 reg = <0x10000000 0x80000000>;
22 }; 22 };
23 23
24 soc {
25 gpmi-nand@00112000 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpmi_nand_1>;
28 status = "disabled"; /* gpmi nand conflicts with SD */
29 };
30
31 aips-bus@02000000 { /* AIPS1 */
32 iomuxc@020e0000 {
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_hog>;
35
36 hog {
37 pinctrl_hog: hoggrp {
38 fsl,pins = <
39 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */
40 >;
41 };
42 };
43
44 arm2 {
45 pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
46 fsl,pins = <
47 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */
48 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */
49 >;
50 };
51 };
52 };
53 };
54
55 aips-bus@02100000 { /* AIPS2 */
56 ethernet@02188000 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_enet_2>;
59 phy-mode = "rgmii";
60 status = "okay";
61 };
62
63 usdhc@02198000 { /* uSDHC3 */
64 cd-gpios = <&gpio6 11 0>;
65 wp-gpios = <&gpio6 14 0>;
66 vmmc-supply = <&reg_3p3v>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_usdhc3_1
69 &pinctrl_usdhc3_arm2>;
70 status = "okay";
71 };
72
73 usdhc@0219c000 { /* uSDHC4 */
74 non-removable;
75 vmmc-supply = <&reg_3p3v>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_usdhc4_1>;
78 status = "okay";
79 };
80
81 uart4: serial@021f0000 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_uart4_1>;
84 status = "okay";
85 };
86 };
87 };
88
89 regulators { 24 regulators {
90 compatible = "simple-bus"; 25 compatible = "simple-bus";
91 26
@@ -108,3 +43,62 @@
108 }; 43 };
109 }; 44 };
110}; 45};
46
47&gpmi {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_gpmi_nand_1>;
50 status = "disabled"; /* gpmi nand conflicts with SD */
51};
52
53&iomuxc {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_hog>;
56
57 hog {
58 pinctrl_hog: hoggrp {
59 fsl,pins = <
60 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */
61 >;
62 };
63 };
64
65 arm2 {
66 pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
67 fsl,pins = <
68 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */
69 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */
70 >;
71 };
72 };
73};
74
75&fec {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_enet_2>;
78 phy-mode = "rgmii";
79 status = "okay";
80};
81
82&usdhc3 {
83 cd-gpios = <&gpio6 11 0>;
84 wp-gpios = <&gpio6 14 0>;
85 vmmc-supply = <&reg_3p3v>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_usdhc3_1
88 &pinctrl_usdhc3_arm2>;
89 status = "okay";
90};
91
92&usdhc4 {
93 non-removable;
94 vmmc-supply = <&reg_3p3v>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_usdhc4_1>;
97 status = "okay";
98};
99
100&uart4 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart4_1>;
103 status = "okay";
104};
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
index 826e4ad1477e..656d489122fe 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -20,45 +20,39 @@
20 memory { 20 memory {
21 reg = <0x10000000 0x80000000>; 21 reg = <0x10000000 0x80000000>;
22 }; 22 };
23};
23 24
24 soc { 25&iomuxc {
25 aips-bus@02000000 { /* AIPS1 */ 26 pinctrl-names = "default";
26 iomuxc@020e0000 { 27 pinctrl-0 = <&pinctrl_hog>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_hog>;
29 28
30 hog { 29 hog {
31 pinctrl_hog: hoggrp { 30 pinctrl_hog: hoggrp {
32 fsl,pins = < 31 fsl,pins = <
33 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */ 32 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
34 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */ 33 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
35 >; 34 >;
36 };
37 };
38 };
39 }; 35 };
36 };
37};
40 38
41 aips-bus@02100000 { /* AIPS2 */ 39&uart4 {
42 uart4: serial@021f0000 { 40 pinctrl-names = "default";
43 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_uart4_1>;
44 pinctrl-0 = <&pinctrl_uart4_1>; 42 status = "okay";
45 status = "okay"; 43};
46 };
47 44
48 ethernet@02188000 { 45&fec {
49 pinctrl-names = "default"; 46 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_enet_2>; 47 pinctrl-0 = <&pinctrl_enet_2>;
51 phy-mode = "rgmii"; 48 phy-mode = "rgmii";
52 status = "okay"; 49 status = "okay";
53 }; 50};
54 51
55 usdhc@02198000 { /* uSDHC3 */ 52&usdhc3 {
56 pinctrl-names = "default"; 53 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_usdhc3_1>; 54 pinctrl-0 = <&pinctrl_usdhc3_1>;
58 cd-gpios = <&gpio6 15 0>; 55 cd-gpios = <&gpio6 15 0>;
59 wp-gpios = <&gpio1 13 0>; 56 wp-gpios = <&gpio1 13 0>;
60 status = "okay"; 57 status = "okay";
61 };
62 };
63 };
64}; 58};
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index d152328285a1..2ce355cd05e5 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -21,118 +21,6 @@
21 reg = <0x10000000 0x40000000>; 21 reg = <0x10000000 0x40000000>;
22 }; 22 };
23 23
24 soc {
25 aips-bus@02000000 { /* AIPS1 */
26 spba-bus@02000000 {
27 ecspi@02008000 { /* eCSPI1 */
28 fsl,spi-num-chipselects = <1>;
29 cs-gpios = <&gpio3 19 0>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_ecspi1_1>;
32 status = "okay";
33
34 flash: m25p80@0 {
35 compatible = "sst,sst25vf016b";
36 spi-max-frequency = <20000000>;
37 reg = <0>;
38 };
39 };
40
41 ssi1: ssi@02028000 {
42 fsl,mode = "i2s-slave";
43 status = "okay";
44 };
45 };
46
47 iomuxc@020e0000 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_hog>;
50
51 hog {
52 pinctrl_hog: hoggrp {
53 fsl,pins = <
54 1450 0x80000000 /* MX6Q_PAD_NANDF_D6__GPIO_2_6 */
55 1458 0x80000000 /* MX6Q_PAD_NANDF_D7__GPIO_2_7 */
56 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
57 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
58 152 0x80000000 /* MX6Q_PAD_EIM_D23__GPIO_3_23 */
59 1262 0x80000000 /* MX6Q_PAD_SD3_DAT5__GPIO_7_0 */
60 1270 0x1f0b0 /* MX6Q_PAD_SD3_DAT4__GPIO_7_1 */
61 953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
62 >;
63 };
64 };
65 };
66 };
67
68 aips-bus@02100000 { /* AIPS2 */
69 usb@02184000 { /* USB OTG */
70 vbus-supply = <&reg_usb_otg_vbus>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_usbotg_1>;
73 disable-over-current;
74 status = "okay";
75 };
76
77 usb@02184200 { /* USB1 */
78 status = "okay";
79 };
80
81 ethernet@02188000 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_enet_1>;
84 phy-mode = "rgmii";
85 phy-reset-gpios = <&gpio3 23 0>;
86 status = "okay";
87 };
88
89 usdhc@02198000 { /* uSDHC3 */
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_usdhc3_2>;
92 cd-gpios = <&gpio7 0 0>;
93 wp-gpios = <&gpio7 1 0>;
94 vmmc-supply = <&reg_3p3v>;
95 status = "okay";
96 };
97
98 usdhc@0219c000 { /* uSDHC4 */
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_usdhc4_2>;
101 cd-gpios = <&gpio2 6 0>;
102 wp-gpios = <&gpio2 7 0>;
103 vmmc-supply = <&reg_3p3v>;
104 status = "okay";
105 };
106
107 audmux@021d8000 {
108 status = "okay";
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_audmux_1>;
111 };
112
113 uart2: serial@021e8000 {
114 status = "okay";
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_uart2_1>;
117 };
118
119 i2c@021a0000 { /* I2C1 */
120 status = "okay";
121 clock-frequency = <100000>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_i2c1_1>;
124
125 codec: sgtl5000@0a {
126 compatible = "fsl,sgtl5000";
127 reg = <0x0a>;
128 clocks = <&clks 169>;
129 VDDA-supply = <&reg_2p5v>;
130 VDDIO-supply = <&reg_3p3v>;
131 };
132 };
133 };
134 };
135
136 regulators { 24 regulators {
137 compatible = "simple-bus"; 25 compatible = "simple-bus";
138 26
@@ -176,3 +64,107 @@
176 mux-ext-port = <4>; 64 mux-ext-port = <4>;
177 }; 65 };
178}; 66};
67
68&ecspi1 {
69 fsl,spi-num-chipselects = <1>;
70 cs-gpios = <&gpio3 19 0>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_ecspi1_1>;
73 status = "okay";
74
75 flash: m25p80@0 {
76 compatible = "sst,sst25vf016b";
77 spi-max-frequency = <20000000>;
78 reg = <0>;
79 };
80};
81
82&ssi1 {
83 fsl,mode = "i2s-slave";
84 status = "okay";
85};
86
87&iomuxc {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_hog>;
90
91 hog {
92 pinctrl_hog: hoggrp {
93 fsl,pins = <
94 1450 0x80000000 /* MX6Q_PAD_NANDF_D6__GPIO_2_6 */
95 1458 0x80000000 /* MX6Q_PAD_NANDF_D7__GPIO_2_7 */
96 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
97 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
98 152 0x80000000 /* MX6Q_PAD_EIM_D23__GPIO_3_23 */
99 1262 0x80000000 /* MX6Q_PAD_SD3_DAT5__GPIO_7_0 */
100 1270 0x1f0b0 /* MX6Q_PAD_SD3_DAT4__GPIO_7_1 */
101 953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
102 >;
103 };
104 };
105};
106
107&usbotg {
108 vbus-supply = <&reg_usb_otg_vbus>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_usbotg_1>;
111 disable-over-current;
112 status = "okay";
113};
114
115&usbh1 {
116 status = "okay";
117};
118
119&fec {
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_enet_1>;
122 phy-mode = "rgmii";
123 phy-reset-gpios = <&gpio3 23 0>;
124 status = "okay";
125};
126
127&usdhc3 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_usdhc3_2>;
130 cd-gpios = <&gpio7 0 0>;
131 wp-gpios = <&gpio7 1 0>;
132 vmmc-supply = <&reg_3p3v>;
133 status = "okay";
134};
135
136&usdhc4 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_usdhc4_2>;
139 cd-gpios = <&gpio2 6 0>;
140 wp-gpios = <&gpio2 7 0>;
141 vmmc-supply = <&reg_3p3v>;
142 status = "okay";
143};
144
145&audmux {
146 status = "okay";
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_audmux_1>;
149};
150
151&uart2 {
152 status = "okay";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_uart2_1>;
155};
156
157&i2c1 {
158 status = "okay";
159 clock-frequency = <100000>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_i2c1_1>;
162
163 codec: sgtl5000@0a {
164 compatible = "fsl,sgtl5000";
165 reg = <0x0a>;
166 clocks = <&clks 169>;
167 VDDA-supply = <&reg_2p5v>;
168 VDDIO-supply = <&reg_3p3v>;
169 };
170};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index a42402562b7b..2dea304a7980 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -21,61 +21,6 @@
21 reg = <0x10000000 0x40000000>; 21 reg = <0x10000000 0x40000000>;
22 }; 22 };
23 23
24 soc {
25 aips-bus@02000000 { /* AIPS1 */
26 spba-bus@02000000 {
27 uart1: serial@02020000 {
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_uart1_1>;
30 status = "okay";
31 };
32 };
33
34 iomuxc@020e0000 {
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_hog>;
37
38 hog {
39 pinctrl_hog: hoggrp {
40 fsl,pins = <
41 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
42 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
43 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
44 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
45 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
46 1426 0x80000000 /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */
47 >;
48 };
49 };
50 };
51 };
52
53 aips-bus@02100000 { /* AIPS2 */
54 ethernet@02188000 {
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_enet_1>;
57 phy-mode = "rgmii";
58 status = "okay";
59 };
60
61 usdhc@02194000 { /* uSDHC2 */
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_usdhc2_1>;
64 cd-gpios = <&gpio2 2 0>;
65 wp-gpios = <&gpio2 3 0>;
66 status = "okay";
67 };
68
69 usdhc@02198000 { /* uSDHC3 */
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_usdhc3_1>;
72 cd-gpios = <&gpio2 0 0>;
73 wp-gpios = <&gpio2 1 0>;
74 status = "okay";
75 };
76 };
77 };
78
79 gpio-keys { 24 gpio-keys {
80 compatible = "gpio-keys"; 25 compatible = "gpio-keys";
81 26
@@ -92,3 +37,50 @@
92 }; 37 };
93 }; 38 };
94}; 39};
40
41&uart1 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_uart1_1>;
44 status = "okay";
45};
46
47&iomuxc {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_hog>;
50
51 hog {
52 pinctrl_hog: hoggrp {
53 fsl,pins = <
54 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
55 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
56 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
57 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
58 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
59 1426 0x80000000 /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */
60 >;
61 };
62 };
63};
64
65&fec {
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_enet_1>;
68 phy-mode = "rgmii";
69 status = "okay";
70};
71
72&usdhc2 {
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_usdhc2_1>;
75 cd-gpios = <&gpio2 2 0>;
76 wp-gpios = <&gpio2 3 0>;
77 status = "okay";
78};
79
80&usdhc3 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_usdhc3_1>;
83 cd-gpios = <&gpio2 0 0>;
84 wp-gpios = <&gpio2 1 0>;
85 status = "okay";
86};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index ff1205ea5719..2d6064775630 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -108,7 +108,7 @@
108 clocks = <&clks 106>; 108 clocks = <&clks 106>;
109 }; 109 };
110 110
111 nfc: gpmi-nand@00112000 { 111 gpmi: gpmi-nand@00112000 {
112 compatible = "fsl,imx6q-gpmi-nand"; 112 compatible = "fsl,imx6q-gpmi-nand";
113 #address-cells = <1>; 113 #address-cells = <1>;
114 #size-cells = <1>; 114 #size-cells = <1>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 02:38:11 -0500