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authorChanghwan Youn <chaos.youn@samsung.com>2010-11-29 02:58:29 -0500
committerKukjin Kim <kgene.kim@samsung.com>2010-12-08 04:11:37 -0500
commitb45756f65d90dca10cbe3e9ef04ecf96c01124a2 (patch)
tree7f8e7dd4c8a94ac5581c58ae7ac820e741aa6e7c
parentcf7d7e5a1980d1116ee152d25dac382b112b9c17 (diff)
ARM: S5PV310: Add Interrupt of MCT
This patch adds IRQ_MCT0, IRQ_MCT1, IRQ_MCT_L0, and IRQ_MCT_L1. (MCT: Multi-Core Timer). And updated MAX_COMBINER_NR. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-s5pv310/include/mach/irqs.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
index 99e7dad8a85a..f9a2830620d8 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -25,6 +25,8 @@
25 25
26#define IRQ_SPI(x) S5P_IRQ(x+32) 26#define IRQ_SPI(x) S5P_IRQ(x+32)
27 27
28#define IRQ_MCT1 IRQ_SPI(35)
29
28#define IRQ_EINT0 IRQ_SPI(40) 30#define IRQ_EINT0 IRQ_SPI(40)
29#define IRQ_EINT1 IRQ_SPI(41) 31#define IRQ_EINT1 IRQ_SPI(41)
30#define IRQ_EINT2 IRQ_SPI(42) 32#define IRQ_EINT2 IRQ_SPI(42)
@@ -36,9 +38,8 @@
36#define IRQ_JPEG IRQ_SPI(48) 38#define IRQ_JPEG IRQ_SPI(48)
37#define IRQ_2D IRQ_SPI(49) 39#define IRQ_2D IRQ_SPI(49)
38#define IRQ_PCIE IRQ_SPI(50) 40#define IRQ_PCIE IRQ_SPI(50)
39#define IRQ_SYSTEM_TIMER IRQ_SPI(51) 41#define IRQ_MCT0 IRQ_SPI(51)
40#define IRQ_MFC IRQ_SPI(52) 42#define IRQ_MFC IRQ_SPI(52)
41#define IRQ_WDT IRQ_SPI(53)
42#define IRQ_AUDIO_SS IRQ_SPI(54) 43#define IRQ_AUDIO_SS IRQ_SPI(54)
43#define IRQ_AC97 IRQ_SPI(55) 44#define IRQ_AC97 IRQ_SPI(55)
44#define IRQ_SPDIF IRQ_SPI(56) 45#define IRQ_SPDIF IRQ_SPI(56)
@@ -85,6 +86,8 @@
85 86
86#define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) 87#define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0)
87 88
89#define IRQ_MCT_L1 COMBINER_IRQ(35, 3)
90
88#define IRQ_EINT4 COMBINER_IRQ(37, 0) 91#define IRQ_EINT4 COMBINER_IRQ(37, 0)
89#define IRQ_EINT5 COMBINER_IRQ(37, 1) 92#define IRQ_EINT5 COMBINER_IRQ(37, 1)
90#define IRQ_EINT6 COMBINER_IRQ(37, 2) 93#define IRQ_EINT6 COMBINER_IRQ(37, 2)
@@ -101,7 +104,11 @@
101 104
102#define IRQ_EINT16_31 COMBINER_IRQ(39, 0) 105#define IRQ_EINT16_31 COMBINER_IRQ(39, 0)
103 106
104#define MAX_COMBINER_NR 40 107#define IRQ_MCT_L0 COMBINER_IRQ(51, 0)
108
109#define IRQ_WDT COMBINER_IRQ(53, 0)
110
111#define MAX_COMBINER_NR 54
105 112
106#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0) 113#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0)
107 114