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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-08-24 00:36:45 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-08-24 00:36:45 -0400
commitb1515af2911c4339ed34865a0594f4ad3392921a (patch)
treecae6a1367452d4dcef76e5e7711511c2fc4087c3
parentd1b113bb028999e82a8528e1484be8c23fb5a7d9 (diff)
parent32412aa214e05308833a89e6090406294833f989 (diff)
Merge remote branch 'jwb/merge' into merge
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts8
-rw-r--r--arch/powerpc/kernel/cputable.c1
-rw-r--r--arch/powerpc/kernel/head_44x.S4
-rw-r--r--arch/powerpc/kernel/irq.c16
-rw-r--r--arch/powerpc/kernel/setup_32.c9
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S1
6 files changed, 27 insertions, 12 deletions
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 5806ef0b860b..a30370396250 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
163 interrupts = <0x1e 4>; 163 interrupts = <0x1e 4>;
164 }; 164 };
165 165
166 SATA0: sata@bffd1000 {
167 compatible = "amcc,sata-460ex";
168 reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;
169 interrupt-parent = <&UIC3>;
170 interrupts = <0x0 0x4 /* SATA */
171 0x5 0x4>; /* AHBDMA */
172 };
173
166 POB0: opb { 174 POB0: opb {
167 compatible = "ibm,opb-460ex", "ibm,opb"; 175 compatible = "ibm,opb-460ex", "ibm,opb";
168 #address-cells = <1>; 176 #address-cells = <1>;
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 65e2b4e10f97..1f9123f412ec 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1826,7 +1826,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
1826 .cpu_features = CPU_FTRS_47X, 1826 .cpu_features = CPU_FTRS_47X,
1827 .cpu_user_features = COMMON_USER_BOOKE | 1827 .cpu_user_features = COMMON_USER_BOOKE |
1828 PPC_FEATURE_HAS_FPU, 1828 PPC_FEATURE_HAS_FPU,
1829 .cpu_user_features = COMMON_USER_BOOKE,
1830 .mmu_features = MMU_FTR_TYPE_47x | 1829 .mmu_features = MMU_FTR_TYPE_47x |
1831 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1830 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1832 .icache_bsize = 32, 1831 .icache_bsize = 32,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 5ab484ef06a7..562305b40a8e 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -113,6 +113,10 @@ _ENTRY(_start);
113 stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */ 113 stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
114 stw r6, 0(r5) 114 stw r6, 0(r5)
115 115
116 /* Clear the Machine Check Syndrome Register */
117 li r0,0
118 mtspr SPRN_MCSR,r0
119
116 /* Let's move on */ 120 /* Let's move on */
117 lis r4,start_kernel@h 121 lis r4,start_kernel@h
118 ori r4,r4,start_kernel@l 122 ori r4,r4,start_kernel@l
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index d3ce67cf03be..4a65386995d7 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -67,6 +67,7 @@
67#include <asm/machdep.h> 67#include <asm/machdep.h>
68#include <asm/udbg.h> 68#include <asm/udbg.h>
69#include <asm/dbell.h> 69#include <asm/dbell.h>
70#include <asm/smp.h>
70 71
71#ifdef CONFIG_PPC64 72#ifdef CONFIG_PPC64
72#include <asm/paca.h> 73#include <asm/paca.h>
@@ -446,22 +447,23 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
446void exc_lvl_ctx_init(void) 447void exc_lvl_ctx_init(void)
447{ 448{
448 struct thread_info *tp; 449 struct thread_info *tp;
449 int i; 450 int i, hw_cpu;
450 451
451 for_each_possible_cpu(i) { 452 for_each_possible_cpu(i) {
452 memset((void *)critirq_ctx[i], 0, THREAD_SIZE); 453 hw_cpu = get_hard_smp_processor_id(i);
453 tp = critirq_ctx[i]; 454 memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE);
455 tp = critirq_ctx[hw_cpu];
454 tp->cpu = i; 456 tp->cpu = i;
455 tp->preempt_count = 0; 457 tp->preempt_count = 0;
456 458
457#ifdef CONFIG_BOOKE 459#ifdef CONFIG_BOOKE
458 memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); 460 memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE);
459 tp = dbgirq_ctx[i]; 461 tp = dbgirq_ctx[hw_cpu];
460 tp->cpu = i; 462 tp->cpu = i;
461 tp->preempt_count = 0; 463 tp->preempt_count = 0;
462 464
463 memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); 465 memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE);
464 tp = mcheckirq_ctx[i]; 466 tp = mcheckirq_ctx[hw_cpu];
465 tp->cpu = i; 467 tp->cpu = i;
466 tp->preempt_count = HARDIRQ_OFFSET; 468 tp->preempt_count = HARDIRQ_OFFSET;
467#endif 469#endif
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index a10ffc85ada7..93666f9cabf1 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -258,17 +258,18 @@ static void __init irqstack_early_init(void)
258#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 258#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
259static void __init exc_lvl_early_init(void) 259static void __init exc_lvl_early_init(void)
260{ 260{
261 unsigned int i; 261 unsigned int i, hw_cpu;
262 262
263 /* interrupt stacks must be in lowmem, we get that for free on ppc32 263 /* interrupt stacks must be in lowmem, we get that for free on ppc32
264 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */ 264 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
265 for_each_possible_cpu(i) { 265 for_each_possible_cpu(i) {
266 critirq_ctx[i] = (struct thread_info *) 266 hw_cpu = get_hard_smp_processor_id(i);
267 critirq_ctx[hw_cpu] = (struct thread_info *)
267 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 268 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
268#ifdef CONFIG_BOOKE 269#ifdef CONFIG_BOOKE
269 dbgirq_ctx[i] = (struct thread_info *) 270 dbgirq_ctx[hw_cpu] = (struct thread_info *)
270 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 271 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
271 mcheckirq_ctx[i] = (struct thread_info *) 272 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
272 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 273 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
273#endif 274#endif
274 } 275 }
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index cfa768203d08..b9d9fed8f36e 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -200,6 +200,7 @@ _GLOBAL(_tlbivax_bcast)
200 rlwimi r5,r4,0,16,31 200 rlwimi r5,r4,0,16,31
201 wrteei 0 201 wrteei 0
202 mtspr SPRN_MMUCR,r5 202 mtspr SPRN_MMUCR,r5
203 isync
203/* tlbivax 0,r3 - use .long to avoid binutils deps */ 204/* tlbivax 0,r3 - use .long to avoid binutils deps */
204 .long 0x7c000624 | (r3 << 11) 205 .long 0x7c000624 | (r3 << 11)
205 isync 206 isync