diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-09-20 16:24:58 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-09-20 16:24:58 -0400 |
commit | ae2249e41af5b795e7869c2995c950b48d39cc35 (patch) | |
tree | c9192dd408be0e22ff3b664901ed3838fc2a01d3 | |
parent | 72787aa866bfa6bcbd259e7a39b2f9a2f412794e (diff) | |
parent | 2520123382e97271e932377c83bca010c265be55 (diff) |
Merge branch 'samsung/board' into next/board
147 files changed, 2592 insertions, 1197 deletions
diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml index 85164016ed26..23fdf79f8cf3 100644 --- a/Documentation/DocBook/media/v4l/controls.xml +++ b/Documentation/DocBook/media/v4l/controls.xml | |||
@@ -1455,7 +1455,7 @@ Applicable to the H264 encoder.</entry> | |||
1455 | </row> | 1455 | </row> |
1456 | 1456 | ||
1457 | <row><entry></entry></row> | 1457 | <row><entry></entry></row> |
1458 | <row> | 1458 | <row id="v4l2-mpeg-video-h264-vui-sar-idc"> |
1459 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC</constant> </entry> | 1459 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC</constant> </entry> |
1460 | <entry>enum v4l2_mpeg_video_h264_vui_sar_idc</entry> | 1460 | <entry>enum v4l2_mpeg_video_h264_vui_sar_idc</entry> |
1461 | </row> | 1461 | </row> |
@@ -1561,7 +1561,7 @@ Applicable to the H264 encoder.</entry> | |||
1561 | </row> | 1561 | </row> |
1562 | 1562 | ||
1563 | <row><entry></entry></row> | 1563 | <row><entry></entry></row> |
1564 | <row> | 1564 | <row id="v4l2-mpeg-video-h264-level"> |
1565 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LEVEL</constant> </entry> | 1565 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LEVEL</constant> </entry> |
1566 | <entry>enum v4l2_mpeg_video_h264_level</entry> | 1566 | <entry>enum v4l2_mpeg_video_h264_level</entry> |
1567 | </row> | 1567 | </row> |
@@ -1641,7 +1641,7 @@ Possible values are:</entry> | |||
1641 | </row> | 1641 | </row> |
1642 | 1642 | ||
1643 | <row><entry></entry></row> | 1643 | <row><entry></entry></row> |
1644 | <row> | 1644 | <row id="v4l2-mpeg-video-mpeg4-level"> |
1645 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL</constant> </entry> | 1645 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL</constant> </entry> |
1646 | <entry>enum v4l2_mpeg_video_mpeg4_level</entry> | 1646 | <entry>enum v4l2_mpeg_video_mpeg4_level</entry> |
1647 | </row> | 1647 | </row> |
@@ -1689,9 +1689,9 @@ Possible values are:</entry> | |||
1689 | </row> | 1689 | </row> |
1690 | 1690 | ||
1691 | <row><entry></entry></row> | 1691 | <row><entry></entry></row> |
1692 | <row> | 1692 | <row id="v4l2-mpeg-video-h264-profile"> |
1693 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_PROFILE</constant> </entry> | 1693 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_PROFILE</constant> </entry> |
1694 | <entry>enum v4l2_mpeg_h264_profile</entry> | 1694 | <entry>enum v4l2_mpeg_video_h264_profile</entry> |
1695 | </row> | 1695 | </row> |
1696 | <row><entry spanname="descr">The profile information for H264. | 1696 | <row><entry spanname="descr">The profile information for H264. |
1697 | Applicable to the H264 encoder. | 1697 | Applicable to the H264 encoder. |
@@ -1774,9 +1774,9 @@ Possible values are:</entry> | |||
1774 | </row> | 1774 | </row> |
1775 | 1775 | ||
1776 | <row><entry></entry></row> | 1776 | <row><entry></entry></row> |
1777 | <row> | 1777 | <row id="v4l2-mpeg-video-mpeg4-profile"> |
1778 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE</constant> </entry> | 1778 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE</constant> </entry> |
1779 | <entry>enum v4l2_mpeg_mpeg4_profile</entry> | 1779 | <entry>enum v4l2_mpeg_video_mpeg4_profile</entry> |
1780 | </row> | 1780 | </row> |
1781 | <row><entry spanname="descr">The profile information for MPEG4. | 1781 | <row><entry spanname="descr">The profile information for MPEG4. |
1782 | Applicable to the MPEG4 encoder. | 1782 | Applicable to the MPEG4 encoder. |
@@ -1820,9 +1820,9 @@ Applicable to the encoder. | |||
1820 | </row> | 1820 | </row> |
1821 | 1821 | ||
1822 | <row><entry></entry></row> | 1822 | <row><entry></entry></row> |
1823 | <row> | 1823 | <row id="v4l2-mpeg-video-multi-slice-mode"> |
1824 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE</constant> </entry> | 1824 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE</constant> </entry> |
1825 | <entry>enum v4l2_mpeg_multi_slice_mode</entry> | 1825 | <entry>enum v4l2_mpeg_video_multi_slice_mode</entry> |
1826 | </row> | 1826 | </row> |
1827 | <row><entry spanname="descr">Determines how the encoder should handle division of frame into slices. | 1827 | <row><entry spanname="descr">Determines how the encoder should handle division of frame into slices. |
1828 | Applicable to the encoder. | 1828 | Applicable to the encoder. |
@@ -1868,9 +1868,9 @@ Applicable to the encoder.</entry> | |||
1868 | </row> | 1868 | </row> |
1869 | 1869 | ||
1870 | <row><entry></entry></row> | 1870 | <row><entry></entry></row> |
1871 | <row> | 1871 | <row id="v4l2-mpeg-video-h264-loop-filter-mode"> |
1872 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE</constant> </entry> | 1872 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE</constant> </entry> |
1873 | <entry>enum v4l2_mpeg_h264_loop_filter_mode</entry> | 1873 | <entry>enum v4l2_mpeg_video_h264_loop_filter_mode</entry> |
1874 | </row> | 1874 | </row> |
1875 | <row><entry spanname="descr">Loop filter mode for H264 encoder. | 1875 | <row><entry spanname="descr">Loop filter mode for H264 encoder. |
1876 | Possible values are:</entry> | 1876 | Possible values are:</entry> |
@@ -1913,9 +1913,9 @@ Applicable to the H264 encoder.</entry> | |||
1913 | </row> | 1913 | </row> |
1914 | 1914 | ||
1915 | <row><entry></entry></row> | 1915 | <row><entry></entry></row> |
1916 | <row> | 1916 | <row id="v4l2-mpeg-video-h264-entropy-mode"> |
1917 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE</constant> </entry> | 1917 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE</constant> </entry> |
1918 | <entry>enum v4l2_mpeg_h264_symbol_mode</entry> | 1918 | <entry>enum v4l2_mpeg_video_h264_entropy_mode</entry> |
1919 | </row> | 1919 | </row> |
1920 | <row><entry spanname="descr">Entropy coding mode for H264 - CABAC/CAVALC. | 1920 | <row><entry spanname="descr">Entropy coding mode for H264 - CABAC/CAVALC. |
1921 | Applicable to the H264 encoder. | 1921 | Applicable to the H264 encoder. |
@@ -2140,9 +2140,9 @@ previous frames. Applicable to the H264 encoder.</entry> | |||
2140 | </row> | 2140 | </row> |
2141 | 2141 | ||
2142 | <row><entry></entry></row> | 2142 | <row><entry></entry></row> |
2143 | <row> | 2143 | <row id="v4l2-mpeg-video-header-mode"> |
2144 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_HEADER_MODE</constant> </entry> | 2144 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_HEADER_MODE</constant> </entry> |
2145 | <entry>enum v4l2_mpeg_header_mode</entry> | 2145 | <entry>enum v4l2_mpeg_video_header_mode</entry> |
2146 | </row> | 2146 | </row> |
2147 | <row><entry spanname="descr">Determines whether the header is returned as the first buffer or is | 2147 | <row><entry spanname="descr">Determines whether the header is returned as the first buffer or is |
2148 | it returned together with the first frame. Applicable to encoders. | 2148 | it returned together with the first frame. Applicable to encoders. |
@@ -2320,9 +2320,9 @@ Valid only when H.264 and macroblock level RC is enabled (<constant>V4L2_CID_MPE | |||
2320 | Applicable to the H264 encoder.</entry> | 2320 | Applicable to the H264 encoder.</entry> |
2321 | </row> | 2321 | </row> |
2322 | <row><entry></entry></row> | 2322 | <row><entry></entry></row> |
2323 | <row> | 2323 | <row id="v4l2-mpeg-mfc51-video-frame-skip-mode"> |
2324 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE</constant> </entry> | 2324 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE</constant> </entry> |
2325 | <entry>enum v4l2_mpeg_mfc51_frame_skip_mode</entry> | 2325 | <entry>enum v4l2_mpeg_mfc51_video_frame_skip_mode</entry> |
2326 | </row> | 2326 | </row> |
2327 | <row><entry spanname="descr"> | 2327 | <row><entry spanname="descr"> |
2328 | Indicates in what conditions the encoder should skip frames. If encoding a frame would cause the encoded stream to be larger then | 2328 | Indicates in what conditions the encoder should skip frames. If encoding a frame would cause the encoded stream to be larger then |
@@ -2361,9 +2361,9 @@ the stream will meet tight bandwidth contraints. Applicable to encoders. | |||
2361 | </entry> | 2361 | </entry> |
2362 | </row> | 2362 | </row> |
2363 | <row><entry></entry></row> | 2363 | <row><entry></entry></row> |
2364 | <row> | 2364 | <row id="v4l2-mpeg-mfc51-video-force-frame-type"> |
2365 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE</constant> </entry> | 2365 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE</constant> </entry> |
2366 | <entry>enum v4l2_mpeg_mfc51_force_frame_type</entry> | 2366 | <entry>enum v4l2_mpeg_mfc51_video_force_frame_type</entry> |
2367 | </row> | 2367 | </row> |
2368 | <row><entry spanname="descr">Force a frame type for the next queued buffer. Applicable to encoders. | 2368 | <row><entry spanname="descr">Force a frame type for the next queued buffer. Applicable to encoders. |
2369 | Possible values are:</entry> | 2369 | Possible values are:</entry> |
diff --git a/Documentation/hwmon/max16065 b/Documentation/hwmon/max16065 index 44b4f61e04f9..c11f64a1f2ad 100644 --- a/Documentation/hwmon/max16065 +++ b/Documentation/hwmon/max16065 | |||
@@ -62,6 +62,13 @@ can be safely used to identify the chip. You will have to instantiate | |||
62 | the devices explicitly. Please see Documentation/i2c/instantiating-devices for | 62 | the devices explicitly. Please see Documentation/i2c/instantiating-devices for |
63 | details. | 63 | details. |
64 | 64 | ||
65 | WARNING: Do not access chip registers using the i2cdump command, and do not use | ||
66 | any of the i2ctools commands on a command register (0xa5 to 0xac). The chips | ||
67 | supported by this driver interpret any access to a command register (including | ||
68 | read commands) as request to execute the command in question. This may result in | ||
69 | power loss, board resets, and/or Flash corruption. Worst case, your board may | ||
70 | turn into a brick. | ||
71 | |||
65 | 72 | ||
66 | Sysfs entries | 73 | Sysfs entries |
67 | ------------- | 74 | ------------- |
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt index 845a191004b1..54078ed96b37 100644 --- a/Documentation/ioctl/ioctl-number.txt +++ b/Documentation/ioctl/ioctl-number.txt | |||
@@ -319,4 +319,6 @@ Code Seq#(hex) Include File Comments | |||
319 | <mailto:thomas@winischhofer.net> | 319 | <mailto:thomas@winischhofer.net> |
320 | 0xF4 00-1F video/mbxfb.h mbxfb | 320 | 0xF4 00-1F video/mbxfb.h mbxfb |
321 | <mailto:raph@8d.com> | 321 | <mailto:raph@8d.com> |
322 | 0xF6 all LTTng Linux Trace Toolkit Next Generation | ||
323 | <mailto:mathieu.desnoyers@efficios.com> | ||
322 | 0xFD all linux/dm-ioctl.h | 324 | 0xFD all linux/dm-ioctl.h |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 3 | 1 | VERSION = 3 |
2 | PATCHLEVEL = 1 | 2 | PATCHLEVEL = 1 |
3 | SUBLEVEL = 0 | 3 | SUBLEVEL = 0 |
4 | EXTRAVERSION = -rc5 | 4 | EXTRAVERSION = -rc6 |
5 | NAME = "Divemaster Edition" | 5 | NAME = "Divemaster Edition" |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig index da53ff3b4d70..cd40bb56e568 100644 --- a/arch/arm/configs/exynos4_defconfig +++ b/arch/arm/configs/exynos4_defconfig | |||
@@ -11,6 +11,7 @@ CONFIG_MACH_SMDKV310=y | |||
11 | CONFIG_MACH_ARMLEX4210=y | 11 | CONFIG_MACH_ARMLEX4210=y |
12 | CONFIG_MACH_UNIVERSAL_C210=y | 12 | CONFIG_MACH_UNIVERSAL_C210=y |
13 | CONFIG_MACH_NURI=y | 13 | CONFIG_MACH_NURI=y |
14 | CONFIG_MACH_ORIGEN=y | ||
14 | CONFIG_NO_HZ=y | 15 | CONFIG_NO_HZ=y |
15 | CONFIG_HIGH_RES_TIMERS=y | 16 | CONFIG_HIGH_RES_TIMERS=y |
16 | CONFIG_SMP=y | 17 | CONFIG_SMP=y |
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index bfa706ffd968..99a6ed7e1bfd 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h | |||
@@ -45,8 +45,13 @@ | |||
45 | #define L2X0_CLEAN_INV_LINE_PA 0x7F0 | 45 | #define L2X0_CLEAN_INV_LINE_PA 0x7F0 |
46 | #define L2X0_CLEAN_INV_LINE_IDX 0x7F8 | 46 | #define L2X0_CLEAN_INV_LINE_IDX 0x7F8 |
47 | #define L2X0_CLEAN_INV_WAY 0x7FC | 47 | #define L2X0_CLEAN_INV_WAY 0x7FC |
48 | #define L2X0_LOCKDOWN_WAY_D 0x900 | 48 | /* |
49 | #define L2X0_LOCKDOWN_WAY_I 0x904 | 49 | * The lockdown registers repeat 8 times for L310, the L210 has only one |
50 | * D and one I lockdown register at 0x0900 and 0x0904. | ||
51 | */ | ||
52 | #define L2X0_LOCKDOWN_WAY_D_BASE 0x900 | ||
53 | #define L2X0_LOCKDOWN_WAY_I_BASE 0x904 | ||
54 | #define L2X0_LOCKDOWN_STRIDE 0x08 | ||
50 | #define L2X0_TEST_OPERATION 0xF00 | 55 | #define L2X0_TEST_OPERATION 0xF00 |
51 | #define L2X0_LINE_DATA 0xF10 | 56 | #define L2X0_LINE_DATA 0xF10 |
52 | #define L2X0_LINE_TAG 0xF30 | 57 | #define L2X0_LINE_TAG 0xF30 |
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index 6bd83ed90afe..d87bfc397d39 100644 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S | |||
@@ -8,7 +8,6 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <mach/hardware.h> | ||
12 | #include <asm/hardware/entry-macro-gic.S> | 11 | #include <asm/hardware/entry-macro-gic.S> |
13 | 12 | ||
14 | .macro disable_fiq | 13 | .macro disable_fiq |
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h index 58bb03ae3cf4..4f16c9b79f78 100644 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ b/arch/arm/mach-cns3xxx/include/mach/system.h | |||
@@ -13,7 +13,6 @@ | |||
13 | 13 | ||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <asm/proc-fns.h> | 15 | #include <asm/proc-fns.h> |
16 | #include <mach/hardware.h> | ||
17 | 16 | ||
18 | static inline void arch_idle(void) | 17 | static inline void arch_idle(void) |
19 | { | 18 | { |
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h index de8ead9b91f7..a91b6058ab4f 100644 --- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h +++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h | |||
@@ -8,7 +8,6 @@ | |||
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <asm/mach-types.h> | 10 | #include <asm/mach-types.h> |
11 | #include <mach/hardware.h> | ||
12 | #include <mach/cns3xxx.h> | 11 | #include <mach/cns3xxx.h> |
13 | 12 | ||
14 | #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) | 13 | #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) |
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 06fd25d70aec..0f8fca48a5ed 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c | |||
@@ -49,7 +49,7 @@ static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata) | |||
49 | return &cns3xxx_pcie[root->domain]; | 49 | return &cns3xxx_pcie[root->domain]; |
50 | } | 50 | } |
51 | 51 | ||
52 | static struct cns3xxx_pcie *pdev_to_cnspci(struct pci_dev *dev) | 52 | static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev) |
53 | { | 53 | { |
54 | return sysdata_to_cnspci(dev->sysdata); | 54 | return sysdata_to_cnspci(dev->sysdata); |
55 | } | 55 | } |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index bd5394537c88..008d51407cd7 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -115,6 +115,32 @@ static struct spi_board_info da850evm_spi_info[] = { | |||
115 | }, | 115 | }, |
116 | }; | 116 | }; |
117 | 117 | ||
118 | #ifdef CONFIG_MTD | ||
119 | static void da850_evm_m25p80_notify_add(struct mtd_info *mtd) | ||
120 | { | ||
121 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; | ||
122 | size_t retlen; | ||
123 | |||
124 | if (!strcmp(mtd->name, "MAC-Address")) { | ||
125 | mtd->read(mtd, 0, ETH_ALEN, &retlen, mac_addr); | ||
126 | if (retlen == ETH_ALEN) | ||
127 | pr_info("Read MAC addr from SPI Flash: %pM\n", | ||
128 | mac_addr); | ||
129 | } | ||
130 | } | ||
131 | |||
132 | static struct mtd_notifier da850evm_spi_notifier = { | ||
133 | .add = da850_evm_m25p80_notify_add, | ||
134 | }; | ||
135 | |||
136 | static void da850_evm_setup_mac_addr(void) | ||
137 | { | ||
138 | register_mtd_user(&da850evm_spi_notifier); | ||
139 | } | ||
140 | #else | ||
141 | static void da850_evm_setup_mac_addr(void) { } | ||
142 | #endif | ||
143 | |||
118 | static struct mtd_partition da850_evm_norflash_partition[] = { | 144 | static struct mtd_partition da850_evm_norflash_partition[] = { |
119 | { | 145 | { |
120 | .name = "bootloaders + env", | 146 | .name = "bootloaders + env", |
@@ -1244,6 +1270,8 @@ static __init void da850_evm_init(void) | |||
1244 | if (ret) | 1270 | if (ret) |
1245 | pr_warning("da850_evm_init: sata registration failed: %d\n", | 1271 | pr_warning("da850_evm_init: sata registration failed: %d\n", |
1246 | ret); | 1272 | ret); |
1273 | |||
1274 | da850_evm_setup_mac_addr(); | ||
1247 | } | 1275 | } |
1248 | 1276 | ||
1249 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 1277 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 47fd0bc3d3e7..fa59c097223d 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -243,7 +243,7 @@ | |||
243 | #define PSC_STATE_DISABLE 2 | 243 | #define PSC_STATE_DISABLE 2 |
244 | #define PSC_STATE_ENABLE 3 | 244 | #define PSC_STATE_ENABLE 3 |
245 | 245 | ||
246 | #define MDSTAT_STATE_MASK 0x1f | 246 | #define MDSTAT_STATE_MASK 0x3f |
247 | #define MDCTL_FORCE BIT(31) | 247 | #define MDCTL_FORCE BIT(31) |
248 | 248 | ||
249 | #ifndef __ASSEMBLER__ | 249 | #ifndef __ASSEMBLER__ |
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S index fb5e72b532b0..5f1e045a3ad1 100644 --- a/arch/arm/mach-davinci/sleep.S +++ b/arch/arm/mach-davinci/sleep.S | |||
@@ -217,7 +217,11 @@ ddr2clk_stop_done: | |||
217 | ENDPROC(davinci_ddr_psc_config) | 217 | ENDPROC(davinci_ddr_psc_config) |
218 | 218 | ||
219 | CACHE_FLUSH: | 219 | CACHE_FLUSH: |
220 | .word arm926_flush_kern_cache_all | 220 | #ifdef CONFIG_CPU_V6 |
221 | .word v6_flush_kern_cache_all | ||
222 | #else | ||
223 | .word arm926_flush_kern_cache_all | ||
224 | #endif | ||
221 | 225 | ||
222 | ENTRY(davinci_cpu_suspend_sz) | 226 | ENTRY(davinci_cpu_suspend_sz) |
223 | .word . - davinci_cpu_suspend | 227 | .word . - davinci_cpu_suspend |
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig index 0c77ab99fa16..c595bb03f417 100644 --- a/arch/arm/mach-exynos4/Kconfig +++ b/arch/arm/mach-exynos4/Kconfig | |||
@@ -15,6 +15,11 @@ config CPU_EXYNOS4210 | |||
15 | help | 15 | help |
16 | Enable EXYNOS4210 CPU support | 16 | Enable EXYNOS4210 CPU support |
17 | 17 | ||
18 | config SOC_EXYNOS4212 | ||
19 | bool | ||
20 | help | ||
21 | Enable EXYNOS4212 SoC support | ||
22 | |||
18 | config EXYNOS4_MCT | 23 | config EXYNOS4_MCT |
19 | bool | 24 | bool |
20 | default y | 25 | default y |
@@ -111,24 +116,11 @@ config EXYNOS4_SETUP_USB_PHY | |||
111 | 116 | ||
112 | menu "EXYNOS4 Machines" | 117 | menu "EXYNOS4 Machines" |
113 | 118 | ||
119 | comment "EXYNOS4210 Boards" | ||
120 | |||
114 | config MACH_SMDKC210 | 121 | config MACH_SMDKC210 |
115 | bool "SMDKC210" | 122 | bool "SMDKC210" |
116 | select CPU_EXYNOS4210 | 123 | select MACH_SMDKV310 |
117 | select S5P_DEV_FIMD0 | ||
118 | select S3C_DEV_RTC | ||
119 | select S3C_DEV_WDT | ||
120 | select S3C_DEV_I2C1 | ||
121 | select S3C_DEV_HSMMC | ||
122 | select S3C_DEV_HSMMC1 | ||
123 | select S3C_DEV_HSMMC2 | ||
124 | select S3C_DEV_HSMMC3 | ||
125 | select SAMSUNG_DEV_PWM | ||
126 | select SAMSUNG_DEV_BACKLIGHT | ||
127 | select EXYNOS4_DEV_PD | ||
128 | select EXYNOS4_DEV_SYSMMU | ||
129 | select EXYNOS4_SETUP_FIMD0 | ||
130 | select EXYNOS4_SETUP_I2C1 | ||
131 | select EXYNOS4_SETUP_SDHCI | ||
132 | help | 124 | help |
133 | Machine support for Samsung SMDKC210 | 125 | Machine support for Samsung SMDKC210 |
134 | 126 | ||
@@ -218,6 +210,39 @@ config MACH_NURI | |||
218 | help | 210 | help |
219 | Machine support for Samsung Mobile NURI Board. | 211 | Machine support for Samsung Mobile NURI Board. |
220 | 212 | ||
213 | config MACH_ORIGEN | ||
214 | bool "ORIGEN" | ||
215 | select CPU_EXYNOS4210 | ||
216 | select S3C_DEV_RTC | ||
217 | select S3C_DEV_WDT | ||
218 | select S3C_DEV_HSMMC2 | ||
219 | select EXYNOS4_SETUP_SDHCI | ||
220 | help | ||
221 | Machine support for ORIGEN based on Samsung EXYNOS4210 | ||
222 | |||
223 | comment "EXYNOS4212 Boards" | ||
224 | |||
225 | config MACH_SMDK4212 | ||
226 | bool "SMDK4212" | ||
227 | select SOC_EXYNOS4212 | ||
228 | select S3C_DEV_HSMMC2 | ||
229 | select S3C_DEV_HSMMC3 | ||
230 | select S3C_DEV_I2C1 | ||
231 | select S3C_DEV_I2C3 | ||
232 | select S3C_DEV_I2C7 | ||
233 | select S3C_DEV_RTC | ||
234 | select S3C_DEV_WDT | ||
235 | select SAMSUNG_DEV_BACKLIGHT | ||
236 | select SAMSUNG_DEV_KEYPAD | ||
237 | select SAMSUNG_DEV_PWM | ||
238 | select EXYNOS4_SETUP_I2C1 | ||
239 | select EXYNOS4_SETUP_I2C3 | ||
240 | select EXYNOS4_SETUP_I2C7 | ||
241 | select EXYNOS4_SETUP_KEYPAD | ||
242 | select EXYNOS4_SETUP_SDHCI | ||
243 | help | ||
244 | Machine support for Samsung SMDK4212 | ||
245 | |||
221 | endmenu | 246 | endmenu |
222 | 247 | ||
223 | comment "Configuration for HSMMC bus width" | 248 | comment "Configuration for HSMMC bus width" |
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile index b7fe1d7b0b1f..e19cd12d264e 100644 --- a/arch/arm/mach-exynos4/Makefile +++ b/arch/arm/mach-exynos4/Makefile | |||
@@ -12,8 +12,10 @@ obj- := | |||
12 | 12 | ||
13 | # Core support for EXYNOS4 system | 13 | # Core support for EXYNOS4 system |
14 | 14 | ||
15 | obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o | 15 | obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o |
16 | obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o | 16 | obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o irq-eint.o dma.o pmu.o |
17 | obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o | ||
18 | obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o | ||
17 | obj-$(CONFIG_PM) += pm.o sleep.o | 19 | obj-$(CONFIG_PM) += pm.o sleep.o |
18 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 20 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
19 | 21 | ||
@@ -25,11 +27,14 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | |||
25 | 27 | ||
26 | # machine support | 28 | # machine support |
27 | 29 | ||
28 | obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o | 30 | obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o |
29 | obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o | 31 | obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o |
30 | obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o | 32 | obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o |
31 | obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o | 33 | obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o |
32 | obj-$(CONFIG_MACH_NURI) += mach-nuri.o | 34 | obj-$(CONFIG_MACH_NURI) += mach-nuri.o |
35 | obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o | ||
36 | |||
37 | obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4212.o | ||
33 | 38 | ||
34 | # device support | 39 | # device support |
35 | 40 | ||
diff --git a/arch/arm/mach-exynos4/clock-exynos4210.c b/arch/arm/mach-exynos4/clock-exynos4210.c new file mode 100644 index 000000000000..b9d5ef670eb4 --- /dev/null +++ b/arch/arm/mach-exynos4/clock-exynos4210.c | |||
@@ -0,0 +1,139 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/clock-exynos4210.c | ||
3 | * | ||
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * EXYNOS4210 - Clock support | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/clk.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/syscore_ops.h> | ||
19 | |||
20 | #include <plat/cpu-freq.h> | ||
21 | #include <plat/clock.h> | ||
22 | #include <plat/cpu.h> | ||
23 | #include <plat/pll.h> | ||
24 | #include <plat/s5p-clock.h> | ||
25 | #include <plat/clock-clksrc.h> | ||
26 | #include <plat/exynos4.h> | ||
27 | #include <plat/pm.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/map.h> | ||
31 | #include <mach/regs-clock.h> | ||
32 | #include <mach/exynos4-clock.h> | ||
33 | |||
34 | static struct sleep_save exynos4210_clock_save[] = { | ||
35 | SAVE_ITEM(S5P_CLKSRC_IMAGE), | ||
36 | SAVE_ITEM(S5P_CLKSRC_LCD1), | ||
37 | SAVE_ITEM(S5P_CLKDIV_IMAGE), | ||
38 | SAVE_ITEM(S5P_CLKDIV_LCD1), | ||
39 | SAVE_ITEM(S5P_CLKSRC_MASK_LCD1), | ||
40 | SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4210), | ||
41 | SAVE_ITEM(S5P_CLKGATE_IP_LCD1), | ||
42 | SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210), | ||
43 | }; | ||
44 | |||
45 | static struct clksrc_clk *sysclks[] = { | ||
46 | /* nothing here yet */ | ||
47 | }; | ||
48 | |||
49 | static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) | ||
50 | { | ||
51 | return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable); | ||
52 | } | ||
53 | |||
54 | static struct clksrc_clk clksrcs[] = { | ||
55 | { | ||
56 | .clk = { | ||
57 | .name = "sclk_sata", | ||
58 | .id = -1, | ||
59 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
60 | .ctrlbit = (1 << 24), | ||
61 | }, | ||
62 | .sources = &clkset_mout_corebus, | ||
63 | .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 24, .size = 1 }, | ||
64 | .reg_div = { .reg = S5P_CLKDIV_FSYS0, .shift = 20, .size = 4 }, | ||
65 | }, { | ||
66 | .clk = { | ||
67 | .name = "sclk_fimd", | ||
68 | .devname = "exynos4-fb.1", | ||
69 | .enable = exynos4_clksrc_mask_lcd1_ctrl, | ||
70 | .ctrlbit = (1 << 0), | ||
71 | }, | ||
72 | .sources = &clkset_group, | ||
73 | .reg_src = { .reg = S5P_CLKSRC_LCD1, .shift = 0, .size = 4 }, | ||
74 | .reg_div = { .reg = S5P_CLKDIV_LCD1, .shift = 0, .size = 4 }, | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static struct clk init_clocks_off[] = { | ||
79 | { | ||
80 | .name = "sataphy", | ||
81 | .id = -1, | ||
82 | .parent = &clk_aclk_133.clk, | ||
83 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
84 | .ctrlbit = (1 << 3), | ||
85 | }, { | ||
86 | .name = "sata", | ||
87 | .id = -1, | ||
88 | .parent = &clk_aclk_133.clk, | ||
89 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
90 | .ctrlbit = (1 << 10), | ||
91 | }, { | ||
92 | .name = "fimd", | ||
93 | .devname = "exynos4-fb.1", | ||
94 | .enable = exynos4_clk_ip_lcd1_ctrl, | ||
95 | .ctrlbit = (1 << 0), | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | #ifdef CONFIG_PM_SLEEP | ||
100 | static int exynos4210_clock_suspend(void) | ||
101 | { | ||
102 | s3c_pm_do_save(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); | ||
103 | |||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | static void exynos4210_clock_resume(void) | ||
108 | { | ||
109 | s3c_pm_do_restore_core(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); | ||
110 | } | ||
111 | |||
112 | #else | ||
113 | #define exynos4210_clock_suspend NULL | ||
114 | #define exynos4210_clock_resume NULL | ||
115 | #endif | ||
116 | |||
117 | struct syscore_ops exynos4210_clock_syscore_ops = { | ||
118 | .suspend = exynos4210_clock_suspend, | ||
119 | .resume = exynos4210_clock_resume, | ||
120 | }; | ||
121 | |||
122 | void __init exynos4210_register_clocks(void) | ||
123 | { | ||
124 | int ptr; | ||
125 | |||
126 | clk_mout_mpll.reg_src.reg = S5P_CLKSRC_CPU; | ||
127 | clk_mout_mpll.reg_src.shift = 8; | ||
128 | clk_mout_mpll.reg_src.size = 1; | ||
129 | |||
130 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
131 | s3c_register_clksrc(sysclks[ptr], 1); | ||
132 | |||
133 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
134 | |||
135 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
136 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
137 | |||
138 | register_syscore_ops(&exynos4210_clock_syscore_ops); | ||
139 | } | ||
diff --git a/arch/arm/mach-exynos4/clock-exynos4212.c b/arch/arm/mach-exynos4/clock-exynos4212.c new file mode 100644 index 000000000000..77d5decb34fd --- /dev/null +++ b/arch/arm/mach-exynos4/clock-exynos4212.c | |||
@@ -0,0 +1,118 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/clock-exynos4212.c | ||
3 | * | ||
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * EXYNOS4212 - Clock support | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/clk.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/syscore_ops.h> | ||
19 | |||
20 | #include <plat/cpu-freq.h> | ||
21 | #include <plat/clock.h> | ||
22 | #include <plat/cpu.h> | ||
23 | #include <plat/pll.h> | ||
24 | #include <plat/s5p-clock.h> | ||
25 | #include <plat/clock-clksrc.h> | ||
26 | #include <plat/exynos4.h> | ||
27 | #include <plat/pm.h> | ||
28 | |||
29 | #include <mach/hardware.h> | ||
30 | #include <mach/map.h> | ||
31 | #include <mach/regs-clock.h> | ||
32 | #include <mach/exynos4-clock.h> | ||
33 | |||
34 | static struct sleep_save exynos4212_clock_save[] = { | ||
35 | SAVE_ITEM(S5P_CLKSRC_IMAGE), | ||
36 | SAVE_ITEM(S5P_CLKDIV_IMAGE), | ||
37 | SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212), | ||
38 | SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212), | ||
39 | }; | ||
40 | |||
41 | static struct clk *clk_src_mpll_user_list[] = { | ||
42 | [0] = &clk_fin_mpll, | ||
43 | [1] = &clk_mout_mpll.clk, | ||
44 | }; | ||
45 | |||
46 | static struct clksrc_sources clk_src_mpll_user = { | ||
47 | .sources = clk_src_mpll_user_list, | ||
48 | .nr_sources = ARRAY_SIZE(clk_src_mpll_user_list), | ||
49 | }; | ||
50 | |||
51 | static struct clksrc_clk clk_mout_mpll_user = { | ||
52 | .clk = { | ||
53 | .name = "mout_mpll_user", | ||
54 | }, | ||
55 | .sources = &clk_src_mpll_user, | ||
56 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 24, .size = 1 }, | ||
57 | }; | ||
58 | |||
59 | static struct clksrc_clk *sysclks[] = { | ||
60 | &clk_mout_mpll_user, | ||
61 | }; | ||
62 | |||
63 | static struct clksrc_clk clksrcs[] = { | ||
64 | /* nothing here yet */ | ||
65 | }; | ||
66 | |||
67 | static struct clk init_clocks_off[] = { | ||
68 | /* nothing here yet */ | ||
69 | }; | ||
70 | |||
71 | #ifdef CONFIG_PM_SLEEP | ||
72 | static int exynos4212_clock_suspend(void) | ||
73 | { | ||
74 | s3c_pm_do_save(exynos4212_clock_save, ARRAY_SIZE(exynos4212_clock_save)); | ||
75 | |||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | static void exynos4212_clock_resume(void) | ||
80 | { | ||
81 | s3c_pm_do_restore_core(exynos4212_clock_save, ARRAY_SIZE(exynos4212_clock_save)); | ||
82 | } | ||
83 | |||
84 | #else | ||
85 | #define exynos4212_clock_suspend NULL | ||
86 | #define exynos4212_clock_resume NULL | ||
87 | #endif | ||
88 | |||
89 | struct syscore_ops exynos4212_clock_syscore_ops = { | ||
90 | .suspend = exynos4212_clock_suspend, | ||
91 | .resume = exynos4212_clock_resume, | ||
92 | }; | ||
93 | |||
94 | void __init exynos4212_register_clocks(void) | ||
95 | { | ||
96 | int ptr; | ||
97 | |||
98 | /* usbphy1 is removed */ | ||
99 | clkset_group_list[4] = NULL; | ||
100 | |||
101 | /* mout_mpll_user is used */ | ||
102 | clkset_group_list[6] = &clk_mout_mpll_user.clk; | ||
103 | clkset_aclk_top_list[0] = &clk_mout_mpll_user.clk; | ||
104 | |||
105 | clk_mout_mpll.reg_src.reg = S5P_CLKSRC_DMC; | ||
106 | clk_mout_mpll.reg_src.shift = 12; | ||
107 | clk_mout_mpll.reg_src.size = 1; | ||
108 | |||
109 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | ||
110 | s3c_register_clksrc(sysclks[ptr], 1); | ||
111 | |||
112 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
113 | |||
114 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
115 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
116 | |||
117 | register_syscore_ops(&exynos4212_clock_syscore_ops); | ||
118 | } | ||
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c index 1561b036a9bf..f26aea3e1bbf 100644 --- a/arch/arm/mach-exynos4/clock.c +++ b/arch/arm/mach-exynos4/clock.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/err.h> | 14 | #include <linux/err.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/syscore_ops.h> | ||
16 | 17 | ||
17 | #include <plat/cpu-freq.h> | 18 | #include <plat/cpu-freq.h> |
18 | #include <plat/clock.h> | 19 | #include <plat/clock.h> |
@@ -20,26 +21,93 @@ | |||
20 | #include <plat/pll.h> | 21 | #include <plat/pll.h> |
21 | #include <plat/s5p-clock.h> | 22 | #include <plat/s5p-clock.h> |
22 | #include <plat/clock-clksrc.h> | 23 | #include <plat/clock-clksrc.h> |
24 | #include <plat/exynos4.h> | ||
25 | #include <plat/pm.h> | ||
23 | 26 | ||
24 | #include <mach/map.h> | 27 | #include <mach/map.h> |
25 | #include <mach/regs-clock.h> | 28 | #include <mach/regs-clock.h> |
26 | #include <mach/sysmmu.h> | 29 | #include <mach/sysmmu.h> |
27 | 30 | #include <mach/exynos4-clock.h> | |
28 | static struct clk clk_sclk_hdmi27m = { | 31 | |
32 | static struct sleep_save exynos4_clock_save[] = { | ||
33 | SAVE_ITEM(S5P_CLKDIV_LEFTBUS), | ||
34 | SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), | ||
35 | SAVE_ITEM(S5P_CLKDIV_RIGHTBUS), | ||
36 | SAVE_ITEM(S5P_CLKGATE_IP_RIGHTBUS), | ||
37 | SAVE_ITEM(S5P_CLKSRC_TOP0), | ||
38 | SAVE_ITEM(S5P_CLKSRC_TOP1), | ||
39 | SAVE_ITEM(S5P_CLKSRC_CAM), | ||
40 | SAVE_ITEM(S5P_CLKSRC_TV), | ||
41 | SAVE_ITEM(S5P_CLKSRC_MFC), | ||
42 | SAVE_ITEM(S5P_CLKSRC_G3D), | ||
43 | SAVE_ITEM(S5P_CLKSRC_LCD0), | ||
44 | SAVE_ITEM(S5P_CLKSRC_MAUDIO), | ||
45 | SAVE_ITEM(S5P_CLKSRC_FSYS), | ||
46 | SAVE_ITEM(S5P_CLKSRC_PERIL0), | ||
47 | SAVE_ITEM(S5P_CLKSRC_PERIL1), | ||
48 | SAVE_ITEM(S5P_CLKDIV_CAM), | ||
49 | SAVE_ITEM(S5P_CLKDIV_TV), | ||
50 | SAVE_ITEM(S5P_CLKDIV_MFC), | ||
51 | SAVE_ITEM(S5P_CLKDIV_G3D), | ||
52 | SAVE_ITEM(S5P_CLKDIV_LCD0), | ||
53 | SAVE_ITEM(S5P_CLKDIV_MAUDIO), | ||
54 | SAVE_ITEM(S5P_CLKDIV_FSYS0), | ||
55 | SAVE_ITEM(S5P_CLKDIV_FSYS1), | ||
56 | SAVE_ITEM(S5P_CLKDIV_FSYS2), | ||
57 | SAVE_ITEM(S5P_CLKDIV_FSYS3), | ||
58 | SAVE_ITEM(S5P_CLKDIV_PERIL0), | ||
59 | SAVE_ITEM(S5P_CLKDIV_PERIL1), | ||
60 | SAVE_ITEM(S5P_CLKDIV_PERIL2), | ||
61 | SAVE_ITEM(S5P_CLKDIV_PERIL3), | ||
62 | SAVE_ITEM(S5P_CLKDIV_PERIL4), | ||
63 | SAVE_ITEM(S5P_CLKDIV_PERIL5), | ||
64 | SAVE_ITEM(S5P_CLKDIV_TOP), | ||
65 | SAVE_ITEM(S5P_CLKSRC_MASK_TOP), | ||
66 | SAVE_ITEM(S5P_CLKSRC_MASK_CAM), | ||
67 | SAVE_ITEM(S5P_CLKSRC_MASK_TV), | ||
68 | SAVE_ITEM(S5P_CLKSRC_MASK_LCD0), | ||
69 | SAVE_ITEM(S5P_CLKSRC_MASK_MAUDIO), | ||
70 | SAVE_ITEM(S5P_CLKSRC_MASK_FSYS), | ||
71 | SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0), | ||
72 | SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1), | ||
73 | SAVE_ITEM(S5P_CLKDIV2_RATIO), | ||
74 | SAVE_ITEM(S5P_CLKGATE_SCLKCAM), | ||
75 | SAVE_ITEM(S5P_CLKGATE_IP_CAM), | ||
76 | SAVE_ITEM(S5P_CLKGATE_IP_TV), | ||
77 | SAVE_ITEM(S5P_CLKGATE_IP_MFC), | ||
78 | SAVE_ITEM(S5P_CLKGATE_IP_G3D), | ||
79 | SAVE_ITEM(S5P_CLKGATE_IP_LCD0), | ||
80 | SAVE_ITEM(S5P_CLKGATE_IP_FSYS), | ||
81 | SAVE_ITEM(S5P_CLKGATE_IP_GPS), | ||
82 | SAVE_ITEM(S5P_CLKGATE_IP_PERIL), | ||
83 | SAVE_ITEM(S5P_CLKGATE_BLOCK), | ||
84 | SAVE_ITEM(S5P_CLKSRC_MASK_DMC), | ||
85 | SAVE_ITEM(S5P_CLKSRC_DMC), | ||
86 | SAVE_ITEM(S5P_CLKDIV_DMC0), | ||
87 | SAVE_ITEM(S5P_CLKDIV_DMC1), | ||
88 | SAVE_ITEM(S5P_CLKGATE_IP_DMC), | ||
89 | SAVE_ITEM(S5P_CLKSRC_CPU), | ||
90 | SAVE_ITEM(S5P_CLKDIV_CPU), | ||
91 | SAVE_ITEM(S5P_CLKDIV_CPU + 0x4), | ||
92 | SAVE_ITEM(S5P_CLKGATE_SCLKCPU), | ||
93 | SAVE_ITEM(S5P_CLKGATE_IP_CPU), | ||
94 | }; | ||
95 | |||
96 | struct clk clk_sclk_hdmi27m = { | ||
29 | .name = "sclk_hdmi27m", | 97 | .name = "sclk_hdmi27m", |
30 | .rate = 27000000, | 98 | .rate = 27000000, |
31 | }; | 99 | }; |
32 | 100 | ||
33 | static struct clk clk_sclk_hdmiphy = { | 101 | struct clk clk_sclk_hdmiphy = { |
34 | .name = "sclk_hdmiphy", | 102 | .name = "sclk_hdmiphy", |
35 | }; | 103 | }; |
36 | 104 | ||
37 | static struct clk clk_sclk_usbphy0 = { | 105 | struct clk clk_sclk_usbphy0 = { |
38 | .name = "sclk_usbphy0", | 106 | .name = "sclk_usbphy0", |
39 | .rate = 27000000, | 107 | .rate = 27000000, |
40 | }; | 108 | }; |
41 | 109 | ||
42 | static struct clk clk_sclk_usbphy1 = { | 110 | struct clk clk_sclk_usbphy1 = { |
43 | .name = "sclk_usbphy1", | 111 | .name = "sclk_usbphy1", |
44 | }; | 112 | }; |
45 | 113 | ||
@@ -58,12 +126,7 @@ static int exynos4_clksrc_mask_lcd0_ctrl(struct clk *clk, int enable) | |||
58 | return s5p_gatectrl(S5P_CLKSRC_MASK_LCD0, clk, enable); | 126 | return s5p_gatectrl(S5P_CLKSRC_MASK_LCD0, clk, enable); |
59 | } | 127 | } |
60 | 128 | ||
61 | static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) | 129 | int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) |
62 | { | ||
63 | return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable); | ||
64 | } | ||
65 | |||
66 | static int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) | ||
67 | { | 130 | { |
68 | return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable); | 131 | return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable); |
69 | } | 132 | } |
@@ -103,12 +166,12 @@ static int exynos4_clk_ip_lcd0_ctrl(struct clk *clk, int enable) | |||
103 | return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable); | 166 | return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable); |
104 | } | 167 | } |
105 | 168 | ||
106 | static int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable) | 169 | int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable) |
107 | { | 170 | { |
108 | return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable); | 171 | return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable); |
109 | } | 172 | } |
110 | 173 | ||
111 | static int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable) | 174 | int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable) |
112 | { | 175 | { |
113 | return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable); | 176 | return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable); |
114 | } | 177 | } |
@@ -133,7 +196,7 @@ static struct clksrc_clk clk_mout_apll = { | |||
133 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, | 196 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, |
134 | }; | 197 | }; |
135 | 198 | ||
136 | static struct clksrc_clk clk_sclk_apll = { | 199 | struct clksrc_clk clk_sclk_apll = { |
137 | .clk = { | 200 | .clk = { |
138 | .name = "sclk_apll", | 201 | .name = "sclk_apll", |
139 | .parent = &clk_mout_apll.clk, | 202 | .parent = &clk_mout_apll.clk, |
@@ -141,7 +204,7 @@ static struct clksrc_clk clk_sclk_apll = { | |||
141 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, | 204 | .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, |
142 | }; | 205 | }; |
143 | 206 | ||
144 | static struct clksrc_clk clk_mout_epll = { | 207 | struct clksrc_clk clk_mout_epll = { |
145 | .clk = { | 208 | .clk = { |
146 | .name = "mout_epll", | 209 | .name = "mout_epll", |
147 | }, | 210 | }, |
@@ -149,12 +212,13 @@ static struct clksrc_clk clk_mout_epll = { | |||
149 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 }, | 212 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 }, |
150 | }; | 213 | }; |
151 | 214 | ||
152 | static struct clksrc_clk clk_mout_mpll = { | 215 | struct clksrc_clk clk_mout_mpll = { |
153 | .clk = { | 216 | .clk = { |
154 | .name = "mout_mpll", | 217 | .name = "mout_mpll", |
155 | }, | 218 | }, |
156 | .sources = &clk_src_mpll, | 219 | .sources = &clk_src_mpll, |
157 | .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 }, | 220 | |
221 | /* reg_src will be added in each SoCs' clock */ | ||
158 | }; | 222 | }; |
159 | 223 | ||
160 | static struct clk *clkset_moutcore_list[] = { | 224 | static struct clk *clkset_moutcore_list[] = { |
@@ -224,12 +288,12 @@ static struct clksrc_clk clk_periphclk = { | |||
224 | 288 | ||
225 | /* Core list of CMU_CORE side */ | 289 | /* Core list of CMU_CORE side */ |
226 | 290 | ||
227 | static struct clk *clkset_corebus_list[] = { | 291 | struct clk *clkset_corebus_list[] = { |
228 | [0] = &clk_mout_mpll.clk, | 292 | [0] = &clk_mout_mpll.clk, |
229 | [1] = &clk_sclk_apll.clk, | 293 | [1] = &clk_sclk_apll.clk, |
230 | }; | 294 | }; |
231 | 295 | ||
232 | static struct clksrc_sources clkset_mout_corebus = { | 296 | struct clksrc_sources clkset_mout_corebus = { |
233 | .sources = clkset_corebus_list, | 297 | .sources = clkset_corebus_list, |
234 | .nr_sources = ARRAY_SIZE(clkset_corebus_list), | 298 | .nr_sources = ARRAY_SIZE(clkset_corebus_list), |
235 | }; | 299 | }; |
@@ -284,12 +348,12 @@ static struct clksrc_clk clk_pclk_acp = { | |||
284 | 348 | ||
285 | /* Core list of CMU_TOP side */ | 349 | /* Core list of CMU_TOP side */ |
286 | 350 | ||
287 | static struct clk *clkset_aclk_top_list[] = { | 351 | struct clk *clkset_aclk_top_list[] = { |
288 | [0] = &clk_mout_mpll.clk, | 352 | [0] = &clk_mout_mpll.clk, |
289 | [1] = &clk_sclk_apll.clk, | 353 | [1] = &clk_sclk_apll.clk, |
290 | }; | 354 | }; |
291 | 355 | ||
292 | static struct clksrc_sources clkset_aclk = { | 356 | struct clksrc_sources clkset_aclk = { |
293 | .sources = clkset_aclk_top_list, | 357 | .sources = clkset_aclk_top_list, |
294 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), | 358 | .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), |
295 | }; | 359 | }; |
@@ -321,7 +385,7 @@ static struct clksrc_clk clk_aclk_160 = { | |||
321 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 }, | 385 | .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 }, |
322 | }; | 386 | }; |
323 | 387 | ||
324 | static struct clksrc_clk clk_aclk_133 = { | 388 | struct clksrc_clk clk_aclk_133 = { |
325 | .clk = { | 389 | .clk = { |
326 | .name = "aclk_133", | 390 | .name = "aclk_133", |
327 | }, | 391 | }, |
@@ -360,7 +424,7 @@ static struct clksrc_sources clkset_sclk_vpll = { | |||
360 | .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), | 424 | .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), |
361 | }; | 425 | }; |
362 | 426 | ||
363 | static struct clksrc_clk clk_sclk_vpll = { | 427 | struct clksrc_clk clk_sclk_vpll = { |
364 | .clk = { | 428 | .clk = { |
365 | .name = "sclk_vpll", | 429 | .name = "sclk_vpll", |
366 | }, | 430 | }, |
@@ -410,16 +474,6 @@ static struct clk init_clocks_off[] = { | |||
410 | .enable = exynos4_clk_ip_lcd0_ctrl, | 474 | .enable = exynos4_clk_ip_lcd0_ctrl, |
411 | .ctrlbit = (1 << 0), | 475 | .ctrlbit = (1 << 0), |
412 | }, { | 476 | }, { |
413 | .name = "fimd", | ||
414 | .devname = "exynos4-fb.1", | ||
415 | .enable = exynos4_clk_ip_lcd1_ctrl, | ||
416 | .ctrlbit = (1 << 0), | ||
417 | }, { | ||
418 | .name = "sataphy", | ||
419 | .parent = &clk_aclk_133.clk, | ||
420 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
421 | .ctrlbit = (1 << 3), | ||
422 | }, { | ||
423 | .name = "hsmmc", | 477 | .name = "hsmmc", |
424 | .devname = "s3c-sdhci.0", | 478 | .devname = "s3c-sdhci.0", |
425 | .parent = &clk_aclk_133.clk, | 479 | .parent = &clk_aclk_133.clk, |
@@ -449,11 +503,6 @@ static struct clk init_clocks_off[] = { | |||
449 | .enable = exynos4_clk_ip_fsys_ctrl, | 503 | .enable = exynos4_clk_ip_fsys_ctrl, |
450 | .ctrlbit = (1 << 9), | 504 | .ctrlbit = (1 << 9), |
451 | }, { | 505 | }, { |
452 | .name = "sata", | ||
453 | .parent = &clk_aclk_133.clk, | ||
454 | .enable = exynos4_clk_ip_fsys_ctrl, | ||
455 | .ctrlbit = (1 << 10), | ||
456 | }, { | ||
457 | .name = "pdma", | 506 | .name = "pdma", |
458 | .devname = "s3c-pl330.0", | 507 | .devname = "s3c-pl330.0", |
459 | .enable = exynos4_clk_ip_fsys_ctrl, | 508 | .enable = exynos4_clk_ip_fsys_ctrl, |
@@ -673,7 +722,7 @@ static struct clk init_clocks[] = { | |||
673 | } | 722 | } |
674 | }; | 723 | }; |
675 | 724 | ||
676 | static struct clk *clkset_group_list[] = { | 725 | struct clk *clkset_group_list[] = { |
677 | [0] = &clk_ext_xtal_mux, | 726 | [0] = &clk_ext_xtal_mux, |
678 | [1] = &clk_xusbxti, | 727 | [1] = &clk_xusbxti, |
679 | [2] = &clk_sclk_hdmi27m, | 728 | [2] = &clk_sclk_hdmi27m, |
@@ -685,7 +734,7 @@ static struct clk *clkset_group_list[] = { | |||
685 | [8] = &clk_sclk_vpll.clk, | 734 | [8] = &clk_sclk_vpll.clk, |
686 | }; | 735 | }; |
687 | 736 | ||
688 | static struct clksrc_sources clkset_group = { | 737 | struct clksrc_sources clkset_group = { |
689 | .sources = clkset_group_list, | 738 | .sources = clkset_group_list, |
690 | .nr_sources = ARRAY_SIZE(clkset_group_list), | 739 | .nr_sources = ARRAY_SIZE(clkset_group_list), |
691 | }; | 740 | }; |
@@ -969,25 +1018,6 @@ static struct clksrc_clk clksrcs[] = { | |||
969 | .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, | 1018 | .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, |
970 | }, { | 1019 | }, { |
971 | .clk = { | 1020 | .clk = { |
972 | .name = "sclk_fimd", | ||
973 | .devname = "exynos4-fb.1", | ||
974 | .enable = exynos4_clksrc_mask_lcd1_ctrl, | ||
975 | .ctrlbit = (1 << 0), | ||
976 | }, | ||
977 | .sources = &clkset_group, | ||
978 | .reg_src = { .reg = S5P_CLKSRC_LCD1, .shift = 0, .size = 4 }, | ||
979 | .reg_div = { .reg = S5P_CLKDIV_LCD1, .shift = 0, .size = 4 }, | ||
980 | }, { | ||
981 | .clk = { | ||
982 | .name = "sclk_sata", | ||
983 | .enable = exynos4_clksrc_mask_fsys_ctrl, | ||
984 | .ctrlbit = (1 << 24), | ||
985 | }, | ||
986 | .sources = &clkset_mout_corebus, | ||
987 | .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 24, .size = 1 }, | ||
988 | .reg_div = { .reg = S5P_CLKDIV_FSYS0, .shift = 20, .size = 4 }, | ||
989 | }, { | ||
990 | .clk = { | ||
991 | .name = "sclk_spi", | 1021 | .name = "sclk_spi", |
992 | .devname = "s3c64xx-spi.0", | 1022 | .devname = "s3c64xx-spi.0", |
993 | .enable = exynos4_clksrc_mask_peril1_ctrl, | 1023 | .enable = exynos4_clksrc_mask_peril1_ctrl, |
@@ -1116,7 +1146,13 @@ static int xtal_rate; | |||
1116 | 1146 | ||
1117 | static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) | 1147 | static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) |
1118 | { | 1148 | { |
1119 | return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508); | 1149 | if (soc_is_exynos4210()) |
1150 | return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), | ||
1151 | pll_4508); | ||
1152 | else if (soc_is_exynos4212()) | ||
1153 | return s5p_get_pll35xx(xtal_rate, __raw_readl(S5P_APLL_CON0)); | ||
1154 | else | ||
1155 | return 0; | ||
1120 | } | 1156 | } |
1121 | 1157 | ||
1122 | static struct clk_ops exynos4_fout_apll_ops = { | 1158 | static struct clk_ops exynos4_fout_apll_ops = { |
@@ -1126,10 +1162,10 @@ static struct clk_ops exynos4_fout_apll_ops = { | |||
1126 | void __init_or_cpufreq exynos4_setup_clocks(void) | 1162 | void __init_or_cpufreq exynos4_setup_clocks(void) |
1127 | { | 1163 | { |
1128 | struct clk *xtal_clk; | 1164 | struct clk *xtal_clk; |
1129 | unsigned long apll; | 1165 | unsigned long apll = 0; |
1130 | unsigned long mpll; | 1166 | unsigned long mpll = 0; |
1131 | unsigned long epll; | 1167 | unsigned long epll = 0; |
1132 | unsigned long vpll; | 1168 | unsigned long vpll = 0; |
1133 | unsigned long vpllsrc; | 1169 | unsigned long vpllsrc; |
1134 | unsigned long xtal; | 1170 | unsigned long xtal; |
1135 | unsigned long armclk; | 1171 | unsigned long armclk; |
@@ -1153,14 +1189,29 @@ void __init_or_cpufreq exynos4_setup_clocks(void) | |||
1153 | 1189 | ||
1154 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | 1190 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); |
1155 | 1191 | ||
1156 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); | 1192 | if (soc_is_exynos4210()) { |
1157 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); | 1193 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), |
1158 | epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), | 1194 | pll_4508); |
1159 | __raw_readl(S5P_EPLL_CON1), pll_4600); | 1195 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), |
1160 | 1196 | pll_4508); | |
1161 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | 1197 | epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), |
1162 | vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), | 1198 | __raw_readl(S5P_EPLL_CON1), pll_4600); |
1163 | __raw_readl(S5P_VPLL_CON1), pll_4650); | 1199 | |
1200 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | ||
1201 | vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), | ||
1202 | __raw_readl(S5P_VPLL_CON1), pll_4650c); | ||
1203 | } else if (soc_is_exynos4212()) { | ||
1204 | apll = s5p_get_pll35xx(xtal, __raw_readl(S5P_APLL_CON0)); | ||
1205 | mpll = s5p_get_pll35xx(xtal, __raw_readl(S5P_MPLL_CON0)); | ||
1206 | epll = s5p_get_pll36xx(xtal, __raw_readl(S5P_EPLL_CON0), | ||
1207 | __raw_readl(S5P_EPLL_CON1)); | ||
1208 | |||
1209 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | ||
1210 | vpll = s5p_get_pll36xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), | ||
1211 | __raw_readl(S5P_VPLL_CON1)); | ||
1212 | } else { | ||
1213 | /* nothing */ | ||
1214 | } | ||
1164 | 1215 | ||
1165 | clk_fout_apll.ops = &exynos4_fout_apll_ops; | 1216 | clk_fout_apll.ops = &exynos4_fout_apll_ops; |
1166 | clk_fout_mpll.rate = mpll; | 1217 | clk_fout_mpll.rate = mpll; |
@@ -1195,6 +1246,28 @@ static struct clk *clks[] __initdata = { | |||
1195 | /* Nothing here yet */ | 1246 | /* Nothing here yet */ |
1196 | }; | 1247 | }; |
1197 | 1248 | ||
1249 | #ifdef CONFIG_PM_SLEEP | ||
1250 | static int exynos4_clock_suspend(void) | ||
1251 | { | ||
1252 | s3c_pm_do_save(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save)); | ||
1253 | return 0; | ||
1254 | } | ||
1255 | |||
1256 | static void exynos4_clock_resume(void) | ||
1257 | { | ||
1258 | s3c_pm_do_restore_core(exynos4_clock_save, ARRAY_SIZE(exynos4_clock_save)); | ||
1259 | } | ||
1260 | |||
1261 | #else | ||
1262 | #define exynos4_clock_suspend NULL | ||
1263 | #define exynos4_clock_resume NULL | ||
1264 | #endif | ||
1265 | |||
1266 | struct syscore_ops exynos4_clock_syscore_ops = { | ||
1267 | .suspend = exynos4_clock_suspend, | ||
1268 | .resume = exynos4_clock_resume, | ||
1269 | }; | ||
1270 | |||
1198 | void __init exynos4_register_clocks(void) | 1271 | void __init exynos4_register_clocks(void) |
1199 | { | 1272 | { |
1200 | int ptr; | 1273 | int ptr; |
@@ -1210,5 +1283,6 @@ void __init exynos4_register_clocks(void) | |||
1210 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1283 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1211 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1284 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1212 | 1285 | ||
1286 | register_syscore_ops(&exynos4_clock_syscore_ops); | ||
1213 | s3c_pwmclk_init(); | 1287 | s3c_pwmclk_init(); |
1214 | } | 1288 | } |
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c index 746d6fc6d397..02ec52a99274 100644 --- a/arch/arm/mach-exynos4/cpu.c +++ b/arch/arm/mach-exynos4/cpu.c | |||
@@ -44,11 +44,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { | |||
44 | .length = SZ_4K, | 44 | .length = SZ_4K, |
45 | .type = MT_DEVICE, | 45 | .type = MT_DEVICE, |
46 | }, { | 46 | }, { |
47 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
48 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM), | ||
49 | .length = SZ_4K, | ||
50 | .type = MT_DEVICE, | ||
51 | }, { | ||
52 | .virtual = (unsigned long)S5P_VA_CMU, | 47 | .virtual = (unsigned long)S5P_VA_CMU, |
53 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), | 48 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), |
54 | .length = SZ_128K, | 49 | .length = SZ_128K, |
@@ -121,6 +116,24 @@ static struct map_desc exynos4_iodesc[] __initdata = { | |||
121 | }, | 116 | }, |
122 | }; | 117 | }; |
123 | 118 | ||
119 | static struct map_desc exynos4_iodesc0[] __initdata = { | ||
120 | { | ||
121 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
122 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), | ||
123 | .length = SZ_4K, | ||
124 | .type = MT_DEVICE, | ||
125 | }, | ||
126 | }; | ||
127 | |||
128 | static struct map_desc exynos4_iodesc1[] __initdata = { | ||
129 | { | ||
130 | .virtual = (unsigned long)S5P_VA_SYSRAM, | ||
131 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), | ||
132 | .length = SZ_4K, | ||
133 | .type = MT_DEVICE, | ||
134 | }, | ||
135 | }; | ||
136 | |||
124 | static void exynos4_idle(void) | 137 | static void exynos4_idle(void) |
125 | { | 138 | { |
126 | if (!need_resched()) | 139 | if (!need_resched()) |
@@ -143,6 +156,11 @@ void __init exynos4_map_io(void) | |||
143 | { | 156 | { |
144 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | 157 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); |
145 | 158 | ||
159 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) | ||
160 | iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); | ||
161 | else | ||
162 | iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); | ||
163 | |||
146 | /* initialize device information early */ | 164 | /* initialize device information early */ |
147 | exynos4_default_sdhci0(); | 165 | exynos4_default_sdhci0(); |
148 | exynos4_default_sdhci1(); | 166 | exynos4_default_sdhci1(); |
@@ -170,6 +188,12 @@ void __init exynos4_init_clocks(int xtal) | |||
170 | 188 | ||
171 | s3c24xx_register_baseclocks(xtal); | 189 | s3c24xx_register_baseclocks(xtal); |
172 | s5p_register_clocks(xtal); | 190 | s5p_register_clocks(xtal); |
191 | |||
192 | if (soc_is_exynos4210()) | ||
193 | exynos4210_register_clocks(); | ||
194 | else if (soc_is_exynos4212()) | ||
195 | exynos4212_register_clocks(); | ||
196 | |||
173 | exynos4_register_clocks(); | 197 | exynos4_register_clocks(); |
174 | exynos4_setup_clocks(); | 198 | exynos4_setup_clocks(); |
175 | } | 199 | } |
@@ -223,7 +247,11 @@ static int __init exynos4_l2x0_cache_init(void) | |||
223 | { | 247 | { |
224 | /* TAG, Data Latency Control: 2cycle */ | 248 | /* TAG, Data Latency Control: 2cycle */ |
225 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); | 249 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); |
226 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | 250 | |
251 | if (soc_is_exynos4210()) | ||
252 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
253 | else if (soc_is_exynos4212()) | ||
254 | __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); | ||
227 | 255 | ||
228 | /* L2X0 Prefetch Control */ | 256 | /* L2X0 Prefetch Control */ |
229 | __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); | 257 | __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); |
diff --git a/arch/arm/mach-exynos4/include/mach/exynos4-clock.h b/arch/arm/mach-exynos4/include/mach/exynos4-clock.h new file mode 100644 index 000000000000..a07fcbf55251 --- /dev/null +++ b/arch/arm/mach-exynos4/include/mach/exynos4-clock.h | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/include/mach/exynos4-clock.h | ||
3 | * | ||
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * Header file for exynos4 clock support | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_CLOCK_H | ||
15 | #define __ASM_ARCH_CLOCK_H __FILE__ | ||
16 | |||
17 | #include <linux/clk.h> | ||
18 | |||
19 | extern struct clk clk_sclk_hdmi27m; | ||
20 | extern struct clk clk_sclk_usbphy0; | ||
21 | extern struct clk clk_sclk_usbphy1; | ||
22 | extern struct clk clk_sclk_hdmiphy; | ||
23 | |||
24 | extern struct clksrc_clk clk_sclk_apll; | ||
25 | extern struct clksrc_clk clk_mout_mpll; | ||
26 | extern struct clksrc_clk clk_aclk_133; | ||
27 | extern struct clksrc_clk clk_mout_epll; | ||
28 | extern struct clksrc_clk clk_sclk_vpll; | ||
29 | |||
30 | extern struct clk *clkset_corebus_list[]; | ||
31 | extern struct clksrc_sources clkset_mout_corebus; | ||
32 | |||
33 | extern struct clk *clkset_aclk_top_list[]; | ||
34 | extern struct clksrc_sources clkset_aclk; | ||
35 | |||
36 | extern struct clk *clkset_group_list[]; | ||
37 | extern struct clksrc_sources clkset_group; | ||
38 | |||
39 | extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable); | ||
40 | extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable); | ||
41 | extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable); | ||
42 | |||
43 | #endif /* __ASM_ARCH_CLOCK_H */ | ||
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h index d32296dc65e2..7073ac730855 100644 --- a/arch/arm/mach-exynos4/include/mach/map.h +++ b/arch/arm/mach-exynos4/include/mach/map.h | |||
@@ -23,7 +23,8 @@ | |||
23 | 23 | ||
24 | #include <plat/map-s5p.h> | 24 | #include <plat/map-s5p.h> |
25 | 25 | ||
26 | #define EXYNOS4_PA_SYSRAM 0x02020000 | 26 | #define EXYNOS4_PA_SYSRAM0 0x02025000 |
27 | #define EXYNOS4_PA_SYSRAM1 0x02020000 | ||
27 | 28 | ||
28 | #define EXYNOS4_PA_FIMC0 0x11800000 | 29 | #define EXYNOS4_PA_FIMC0 0x11800000 |
29 | #define EXYNOS4_PA_FIMC1 0x11810000 | 30 | #define EXYNOS4_PA_FIMC1 0x11810000 |
diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h index d493fdb422ff..6c37ebe94829 100644 --- a/arch/arm/mach-exynos4/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | 13 | #ifndef __ASM_ARCH_REGS_CLOCK_H |
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | 14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ |
15 | 15 | ||
16 | #include <plat/cpu.h> | ||
16 | #include <mach/map.h> | 17 | #include <mach/map.h> |
17 | 18 | ||
18 | #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) | 19 | #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) |
@@ -41,12 +42,20 @@ | |||
41 | #define S5P_CLKSRC_G3D S5P_CLKREG(0x0C22C) | 42 | #define S5P_CLKSRC_G3D S5P_CLKREG(0x0C22C) |
42 | #define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) | 43 | #define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) |
43 | #define S5P_CLKSRC_LCD0 S5P_CLKREG(0x0C234) | 44 | #define S5P_CLKSRC_LCD0 S5P_CLKREG(0x0C234) |
44 | #define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) | ||
45 | #define S5P_CLKSRC_MAUDIO S5P_CLKREG(0x0C23C) | 45 | #define S5P_CLKSRC_MAUDIO S5P_CLKREG(0x0C23C) |
46 | #define S5P_CLKSRC_FSYS S5P_CLKREG(0x0C240) | 46 | #define S5P_CLKSRC_FSYS S5P_CLKREG(0x0C240) |
47 | #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) | 47 | #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) |
48 | #define S5P_CLKSRC_PERIL1 S5P_CLKREG(0x0C254) | 48 | #define S5P_CLKSRC_PERIL1 S5P_CLKREG(0x0C254) |
49 | 49 | ||
50 | #define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) | ||
51 | #define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) | ||
52 | #define S5P_CLKSRC_MASK_TV S5P_CLKREG(0x0C324) | ||
53 | #define S5P_CLKSRC_MASK_LCD0 S5P_CLKREG(0x0C334) | ||
54 | #define S5P_CLKSRC_MASK_MAUDIO S5P_CLKREG(0x0C33C) | ||
55 | #define S5P_CLKSRC_MASK_FSYS S5P_CLKREG(0x0C340) | ||
56 | #define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) | ||
57 | #define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) | ||
58 | |||
50 | #define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) | 59 | #define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) |
51 | #define S5P_CLKDIV_CAM S5P_CLKREG(0x0C520) | 60 | #define S5P_CLKDIV_CAM S5P_CLKREG(0x0C520) |
52 | #define S5P_CLKDIV_TV S5P_CLKREG(0x0C524) | 61 | #define S5P_CLKDIV_TV S5P_CLKREG(0x0C524) |
@@ -54,7 +63,6 @@ | |||
54 | #define S5P_CLKDIV_G3D S5P_CLKREG(0x0C52C) | 63 | #define S5P_CLKDIV_G3D S5P_CLKREG(0x0C52C) |
55 | #define S5P_CLKDIV_IMAGE S5P_CLKREG(0x0C530) | 64 | #define S5P_CLKDIV_IMAGE S5P_CLKREG(0x0C530) |
56 | #define S5P_CLKDIV_LCD0 S5P_CLKREG(0x0C534) | 65 | #define S5P_CLKDIV_LCD0 S5P_CLKREG(0x0C534) |
57 | #define S5P_CLKDIV_LCD1 S5P_CLKREG(0x0C538) | ||
58 | #define S5P_CLKDIV_MAUDIO S5P_CLKREG(0x0C53C) | 66 | #define S5P_CLKDIV_MAUDIO S5P_CLKREG(0x0C53C) |
59 | #define S5P_CLKDIV_FSYS0 S5P_CLKREG(0x0C540) | 67 | #define S5P_CLKDIV_FSYS0 S5P_CLKREG(0x0C540) |
60 | #define S5P_CLKDIV_FSYS1 S5P_CLKREG(0x0C544) | 68 | #define S5P_CLKDIV_FSYS1 S5P_CLKREG(0x0C544) |
@@ -68,16 +76,6 @@ | |||
68 | #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) | 76 | #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) |
69 | #define S5P_CLKDIV2_RATIO S5P_CLKREG(0x0C580) | 77 | #define S5P_CLKDIV2_RATIO S5P_CLKREG(0x0C580) |
70 | 78 | ||
71 | #define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) | ||
72 | #define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) | ||
73 | #define S5P_CLKSRC_MASK_TV S5P_CLKREG(0x0C324) | ||
74 | #define S5P_CLKSRC_MASK_LCD0 S5P_CLKREG(0x0C334) | ||
75 | #define S5P_CLKSRC_MASK_LCD1 S5P_CLKREG(0x0C338) | ||
76 | #define S5P_CLKSRC_MASK_MAUDIO S5P_CLKREG(0x0C33C) | ||
77 | #define S5P_CLKSRC_MASK_FSYS S5P_CLKREG(0x0C340) | ||
78 | #define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) | ||
79 | #define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) | ||
80 | |||
81 | #define S5P_CLKDIV_STAT_TOP S5P_CLKREG(0x0C610) | 79 | #define S5P_CLKDIV_STAT_TOP S5P_CLKREG(0x0C610) |
82 | 80 | ||
83 | #define S5P_CLKGATE_SCLKCAM S5P_CLKREG(0x0C820) | 81 | #define S5P_CLKGATE_SCLKCAM S5P_CLKREG(0x0C820) |
@@ -85,13 +83,20 @@ | |||
85 | #define S5P_CLKGATE_IP_TV S5P_CLKREG(0x0C924) | 83 | #define S5P_CLKGATE_IP_TV S5P_CLKREG(0x0C924) |
86 | #define S5P_CLKGATE_IP_MFC S5P_CLKREG(0x0C928) | 84 | #define S5P_CLKGATE_IP_MFC S5P_CLKREG(0x0C928) |
87 | #define S5P_CLKGATE_IP_G3D S5P_CLKREG(0x0C92C) | 85 | #define S5P_CLKGATE_IP_G3D S5P_CLKREG(0x0C92C) |
88 | #define S5P_CLKGATE_IP_IMAGE S5P_CLKREG(0x0C930) | 86 | #define S5P_CLKGATE_IP_IMAGE (soc_is_exynos4210() ? \ |
87 | S5P_CLKREG(0x0C930) : \ | ||
88 | S5P_CLKREG(0x04930)) | ||
89 | #define S5P_CLKGATE_IP_IMAGE_4210 S5P_CLKREG(0x0C930) | ||
90 | #define S5P_CLKGATE_IP_IMAGE_4212 S5P_CLKREG(0x04930) | ||
89 | #define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934) | 91 | #define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934) |
90 | #define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) | ||
91 | #define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940) | 92 | #define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940) |
92 | #define S5P_CLKGATE_IP_GPS S5P_CLKREG(0x0C94C) | 93 | #define S5P_CLKGATE_IP_GPS S5P_CLKREG(0x0C94C) |
93 | #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) | 94 | #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) |
94 | #define S5P_CLKGATE_IP_PERIR S5P_CLKREG(0x0C960) | 95 | #define S5P_CLKGATE_IP_PERIR (soc_is_exynos4210() ? \ |
96 | S5P_CLKREG(0x0C960) : \ | ||
97 | S5P_CLKREG(0x08960)) | ||
98 | #define S5P_CLKGATE_IP_PERIR_4210 S5P_CLKREG(0x0C960) | ||
99 | #define S5P_CLKGATE_IP_PERIR_4212 S5P_CLKREG(0x08960) | ||
95 | #define S5P_CLKGATE_BLOCK S5P_CLKREG(0x0C970) | 100 | #define S5P_CLKGATE_BLOCK S5P_CLKREG(0x0C970) |
96 | 101 | ||
97 | #define S5P_CLKSRC_MASK_DMC S5P_CLKREG(0x10300) | 102 | #define S5P_CLKSRC_MASK_DMC S5P_CLKREG(0x10300) |
@@ -102,11 +107,17 @@ | |||
102 | #define S5P_CLKGATE_IP_DMC S5P_CLKREG(0x10900) | 107 | #define S5P_CLKGATE_IP_DMC S5P_CLKREG(0x10900) |
103 | 108 | ||
104 | #define S5P_APLL_LOCK S5P_CLKREG(0x14000) | 109 | #define S5P_APLL_LOCK S5P_CLKREG(0x14000) |
105 | #define S5P_MPLL_LOCK S5P_CLKREG(0x14004) | 110 | #define S5P_MPLL_LOCK (soc_is_exynos4210() ? \ |
111 | S5P_CLKREG(0x14004) : \ | ||
112 | S5P_CLKREG(0x10008)) | ||
106 | #define S5P_APLL_CON0 S5P_CLKREG(0x14100) | 113 | #define S5P_APLL_CON0 S5P_CLKREG(0x14100) |
107 | #define S5P_APLL_CON1 S5P_CLKREG(0x14104) | 114 | #define S5P_APLL_CON1 S5P_CLKREG(0x14104) |
108 | #define S5P_MPLL_CON0 S5P_CLKREG(0x14108) | 115 | #define S5P_MPLL_CON0 (soc_is_exynos4210() ? \ |
109 | #define S5P_MPLL_CON1 S5P_CLKREG(0x1410C) | 116 | S5P_CLKREG(0x14108) : \ |
117 | S5P_CLKREG(0x10108)) | ||
118 | #define S5P_MPLL_CON1 (soc_is_exynos4210() ? \ | ||
119 | S5P_CLKREG(0x1410C) : \ | ||
120 | S5P_CLKREG(0x1010C)) | ||
110 | 121 | ||
111 | #define S5P_CLKSRC_CPU S5P_CLKREG(0x14200) | 122 | #define S5P_CLKSRC_CPU S5P_CLKREG(0x14200) |
112 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) | 123 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) |
@@ -183,6 +194,13 @@ | |||
183 | #define S5P_CLKDIV_BUS_GPLR_SHIFT (4) | 194 | #define S5P_CLKDIV_BUS_GPLR_SHIFT (4) |
184 | #define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT) | 195 | #define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT) |
185 | 196 | ||
197 | /* Only for EXYNOS4210 */ | ||
198 | |||
199 | #define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) | ||
200 | #define S5P_CLKSRC_MASK_LCD1 S5P_CLKREG(0x0C338) | ||
201 | #define S5P_CLKDIV_LCD1 S5P_CLKREG(0x0C538) | ||
202 | #define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) | ||
203 | |||
186 | /* Compatibility defines and inclusion */ | 204 | /* Compatibility defines and inclusion */ |
187 | 205 | ||
188 | #include <mach/regs-pmu.h> | 206 | #include <mach/regs-pmu.h> |
diff --git a/arch/arm/mach-exynos4/mach-origen.c b/arch/arm/mach-exynos4/mach-origen.c new file mode 100644 index 000000000000..ed59f86001ac --- /dev/null +++ b/arch/arm/mach-exynos4/mach-origen.c | |||
@@ -0,0 +1,108 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/mach-origen.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Insignal Co., Ltd. | ||
4 | * http://www.insignal.co.kr/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/mmc/host.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/input.h> | ||
17 | |||
18 | #include <asm/mach/arch.h> | ||
19 | #include <asm/mach-types.h> | ||
20 | |||
21 | #include <plat/regs-serial.h> | ||
22 | #include <plat/exynos4.h> | ||
23 | #include <plat/cpu.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/sdhci.h> | ||
26 | #include <plat/iic.h> | ||
27 | |||
28 | #include <mach/map.h> | ||
29 | |||
30 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
31 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
32 | S3C2410_UCON_RXILEVEL | \ | ||
33 | S3C2410_UCON_TXIRQMODE | \ | ||
34 | S3C2410_UCON_RXIRQMODE | \ | ||
35 | S3C2410_UCON_RXFIFO_TOI | \ | ||
36 | S3C2443_UCON_RXERR_IRQEN) | ||
37 | |||
38 | #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
39 | |||
40 | #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
41 | S5PV210_UFCON_TXTRIG4 | \ | ||
42 | S5PV210_UFCON_RXTRIG4) | ||
43 | |||
44 | static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { | ||
45 | [0] = { | ||
46 | .hwport = 0, | ||
47 | .flags = 0, | ||
48 | .ucon = ORIGEN_UCON_DEFAULT, | ||
49 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
50 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
51 | }, | ||
52 | [1] = { | ||
53 | .hwport = 1, | ||
54 | .flags = 0, | ||
55 | .ucon = ORIGEN_UCON_DEFAULT, | ||
56 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
57 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
58 | }, | ||
59 | [2] = { | ||
60 | .hwport = 2, | ||
61 | .flags = 0, | ||
62 | .ucon = ORIGEN_UCON_DEFAULT, | ||
63 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
64 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
65 | }, | ||
66 | [3] = { | ||
67 | .hwport = 3, | ||
68 | .flags = 0, | ||
69 | .ucon = ORIGEN_UCON_DEFAULT, | ||
70 | .ulcon = ORIGEN_ULCON_DEFAULT, | ||
71 | .ufcon = ORIGEN_UFCON_DEFAULT, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { | ||
76 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
77 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
78 | .ext_cd_gpio_invert = 1, | ||
79 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
80 | }; | ||
81 | |||
82 | static struct platform_device *origen_devices[] __initdata = { | ||
83 | &s3c_device_hsmmc2, | ||
84 | &s3c_device_rtc, | ||
85 | &s3c_device_wdt, | ||
86 | }; | ||
87 | |||
88 | static void __init origen_map_io(void) | ||
89 | { | ||
90 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
91 | s3c24xx_init_clocks(24000000); | ||
92 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | ||
93 | } | ||
94 | |||
95 | static void __init origen_machine_init(void) | ||
96 | { | ||
97 | s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); | ||
98 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); | ||
99 | } | ||
100 | |||
101 | MACHINE_START(ORIGEN, "ORIGEN") | ||
102 | /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ | ||
103 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
104 | .init_irq = exynos4_init_irq, | ||
105 | .map_io = origen_map_io, | ||
106 | .init_machine = origen_machine_init, | ||
107 | .timer = &exynos4_timer, | ||
108 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/mach-smdk4212.c b/arch/arm/mach-exynos4/mach-smdk4212.c new file mode 100644 index 000000000000..3479a933a6de --- /dev/null +++ b/arch/arm/mach-exynos4/mach-smdk4212.c | |||
@@ -0,0 +1,292 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/mach-smdk4212.c | ||
3 | * | ||
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/i2c.h> | ||
14 | #include <linux/input.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/mfd/max8997.h> | ||
17 | #include <linux/mmc/host.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/pwm_backlight.h> | ||
20 | #include <linux/regulator/machine.h> | ||
21 | #include <linux/serial_core.h> | ||
22 | |||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | |||
26 | #include <plat/backlight.h> | ||
27 | #include <plat/clock.h> | ||
28 | #include <plat/cpu.h> | ||
29 | #include <plat/devs.h> | ||
30 | #include <plat/exynos4.h> | ||
31 | #include <plat/gpio-cfg.h> | ||
32 | #include <plat/iic.h> | ||
33 | #include <plat/keypad.h> | ||
34 | #include <plat/regs-serial.h> | ||
35 | #include <plat/sdhci.h> | ||
36 | |||
37 | #include <mach/map.h> | ||
38 | |||
39 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
40 | #define SMDK4212_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
41 | S3C2410_UCON_RXILEVEL | \ | ||
42 | S3C2410_UCON_TXIRQMODE | \ | ||
43 | S3C2410_UCON_RXIRQMODE | \ | ||
44 | S3C2410_UCON_RXFIFO_TOI | \ | ||
45 | S3C2443_UCON_RXERR_IRQEN) | ||
46 | |||
47 | #define SMDK4212_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
48 | |||
49 | #define SMDK4212_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
50 | S5PV210_UFCON_TXTRIG4 | \ | ||
51 | S5PV210_UFCON_RXTRIG4) | ||
52 | |||
53 | static struct s3c2410_uartcfg smdk4212_uartcfgs[] __initdata = { | ||
54 | [0] = { | ||
55 | .hwport = 0, | ||
56 | .flags = 0, | ||
57 | .ucon = SMDK4212_UCON_DEFAULT, | ||
58 | .ulcon = SMDK4212_ULCON_DEFAULT, | ||
59 | .ufcon = SMDK4212_UFCON_DEFAULT, | ||
60 | }, | ||
61 | [1] = { | ||
62 | .hwport = 1, | ||
63 | .flags = 0, | ||
64 | .ucon = SMDK4212_UCON_DEFAULT, | ||
65 | .ulcon = SMDK4212_ULCON_DEFAULT, | ||
66 | .ufcon = SMDK4212_UFCON_DEFAULT, | ||
67 | }, | ||
68 | [2] = { | ||
69 | .hwport = 2, | ||
70 | .flags = 0, | ||
71 | .ucon = SMDK4212_UCON_DEFAULT, | ||
72 | .ulcon = SMDK4212_ULCON_DEFAULT, | ||
73 | .ufcon = SMDK4212_UFCON_DEFAULT, | ||
74 | }, | ||
75 | [3] = { | ||
76 | .hwport = 3, | ||
77 | .flags = 0, | ||
78 | .ucon = SMDK4212_UCON_DEFAULT, | ||
79 | .ulcon = SMDK4212_ULCON_DEFAULT, | ||
80 | .ufcon = SMDK4212_UFCON_DEFAULT, | ||
81 | }, | ||
82 | }; | ||
83 | |||
84 | static struct s3c_sdhci_platdata smdk4212_hsmmc2_pdata __initdata = { | ||
85 | .cd_type = S3C_SDHCI_CD_INTERNAL, | ||
86 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
87 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT | ||
88 | .max_width = 8, | ||
89 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
90 | #endif | ||
91 | }; | ||
92 | |||
93 | static struct s3c_sdhci_platdata smdk4212_hsmmc3_pdata __initdata = { | ||
94 | .cd_type = S3C_SDHCI_CD_INTERNAL, | ||
95 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
96 | }; | ||
97 | |||
98 | static struct regulator_consumer_supply max8997_buck1 = | ||
99 | REGULATOR_SUPPLY("vdd_arm", NULL); | ||
100 | |||
101 | static struct regulator_consumer_supply max8997_buck2 = | ||
102 | REGULATOR_SUPPLY("vdd_int", NULL); | ||
103 | |||
104 | static struct regulator_consumer_supply max8997_buck3 = | ||
105 | REGULATOR_SUPPLY("vdd_g3d", NULL); | ||
106 | |||
107 | static struct regulator_init_data max8997_buck1_data = { | ||
108 | .constraints = { | ||
109 | .name = "VDD_ARM_SMDK4212", | ||
110 | .min_uV = 925000, | ||
111 | .max_uV = 1350000, | ||
112 | .always_on = 1, | ||
113 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
114 | .state_mem = { | ||
115 | .disabled = 1, | ||
116 | }, | ||
117 | }, | ||
118 | .num_consumer_supplies = 1, | ||
119 | .consumer_supplies = &max8997_buck1, | ||
120 | }; | ||
121 | |||
122 | static struct regulator_init_data max8997_buck2_data = { | ||
123 | .constraints = { | ||
124 | .name = "VDD_INT_SMDK4212", | ||
125 | .min_uV = 950000, | ||
126 | .max_uV = 1150000, | ||
127 | .always_on = 1, | ||
128 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | ||
129 | .state_mem = { | ||
130 | .disabled = 1, | ||
131 | }, | ||
132 | }, | ||
133 | .num_consumer_supplies = 1, | ||
134 | .consumer_supplies = &max8997_buck2, | ||
135 | }; | ||
136 | |||
137 | static struct regulator_init_data max8997_buck3_data = { | ||
138 | .constraints = { | ||
139 | .name = "VDD_G3D_SMDK4212", | ||
140 | .min_uV = 950000, | ||
141 | .max_uV = 1150000, | ||
142 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
143 | REGULATOR_CHANGE_STATUS, | ||
144 | .state_mem = { | ||
145 | .disabled = 1, | ||
146 | }, | ||
147 | }, | ||
148 | .num_consumer_supplies = 1, | ||
149 | .consumer_supplies = &max8997_buck3, | ||
150 | }; | ||
151 | |||
152 | static struct max8997_regulator_data smdk4212_max8997_regulators[] = { | ||
153 | { MAX8997_BUCK1, &max8997_buck1_data }, | ||
154 | { MAX8997_BUCK2, &max8997_buck2_data }, | ||
155 | { MAX8997_BUCK3, &max8997_buck3_data }, | ||
156 | }; | ||
157 | |||
158 | static struct max8997_platform_data smdk4212_max8997_pdata = { | ||
159 | .num_regulators = ARRAY_SIZE(smdk4212_max8997_regulators), | ||
160 | .regulators = smdk4212_max8997_regulators, | ||
161 | |||
162 | .buck1_voltage[0] = 1100000, /* 1.1V */ | ||
163 | .buck1_voltage[1] = 1100000, /* 1.1V */ | ||
164 | .buck1_voltage[2] = 1100000, /* 1.1V */ | ||
165 | .buck1_voltage[3] = 1100000, /* 1.1V */ | ||
166 | .buck1_voltage[4] = 1100000, /* 1.1V */ | ||
167 | .buck1_voltage[5] = 1100000, /* 1.1V */ | ||
168 | .buck1_voltage[6] = 1000000, /* 1.0V */ | ||
169 | .buck1_voltage[7] = 950000, /* 0.95V */ | ||
170 | |||
171 | .buck2_voltage[0] = 1100000, /* 1.1V */ | ||
172 | .buck2_voltage[1] = 1000000, /* 1.0V */ | ||
173 | .buck2_voltage[2] = 950000, /* 0.95V */ | ||
174 | .buck2_voltage[3] = 900000, /* 0.9V */ | ||
175 | .buck2_voltage[4] = 1100000, /* 1.1V */ | ||
176 | .buck2_voltage[5] = 1000000, /* 1.0V */ | ||
177 | .buck2_voltage[6] = 950000, /* 0.95V */ | ||
178 | .buck2_voltage[7] = 900000, /* 0.9V */ | ||
179 | |||
180 | .buck5_voltage[0] = 1100000, /* 1.1V */ | ||
181 | .buck5_voltage[1] = 1100000, /* 1.1V */ | ||
182 | .buck5_voltage[2] = 1100000, /* 1.1V */ | ||
183 | .buck5_voltage[3] = 1100000, /* 1.1V */ | ||
184 | .buck5_voltage[4] = 1100000, /* 1.1V */ | ||
185 | .buck5_voltage[5] = 1100000, /* 1.1V */ | ||
186 | .buck5_voltage[6] = 1100000, /* 1.1V */ | ||
187 | .buck5_voltage[7] = 1100000, /* 1.1V */ | ||
188 | }; | ||
189 | |||
190 | static struct i2c_board_info smdk4212_i2c_devs0[] __initdata = { | ||
191 | { | ||
192 | I2C_BOARD_INFO("max8997", 0x66), | ||
193 | .platform_data = &smdk4212_max8997_pdata, | ||
194 | } | ||
195 | }; | ||
196 | |||
197 | static struct i2c_board_info smdk4212_i2c_devs1[] __initdata = { | ||
198 | { I2C_BOARD_INFO("wm8994", 0x1a), } | ||
199 | }; | ||
200 | |||
201 | static struct i2c_board_info smdk4212_i2c_devs3[] __initdata = { | ||
202 | /* nothing here yet */ | ||
203 | }; | ||
204 | |||
205 | static struct i2c_board_info smdk4212_i2c_devs7[] __initdata = { | ||
206 | /* nothing here yet */ | ||
207 | }; | ||
208 | |||
209 | static struct samsung_bl_gpio_info smdk4212_bl_gpio_info = { | ||
210 | .no = EXYNOS4_GPD0(1), | ||
211 | .func = S3C_GPIO_SFN(2), | ||
212 | }; | ||
213 | |||
214 | static struct platform_pwm_backlight_data smdk4212_bl_data = { | ||
215 | .pwm_id = 1, | ||
216 | .pwm_period_ns = 1000, | ||
217 | }; | ||
218 | |||
219 | static uint32_t smdk4212_keymap[] __initdata = { | ||
220 | /* KEY(row, col, keycode) */ | ||
221 | KEY(1, 0, KEY_D), KEY(1, 1, KEY_A), KEY(1, 2, KEY_B), | ||
222 | KEY(1, 3, KEY_E), KEY(1, 4, KEY_C) | ||
223 | }; | ||
224 | |||
225 | static struct matrix_keymap_data smdk4212_keymap_data __initdata = { | ||
226 | .keymap = smdk4212_keymap, | ||
227 | .keymap_size = ARRAY_SIZE(smdk4212_keymap), | ||
228 | }; | ||
229 | |||
230 | static struct samsung_keypad_platdata smdk4212_keypad_data __initdata = { | ||
231 | .keymap_data = &smdk4212_keymap_data, | ||
232 | .rows = 2, | ||
233 | .cols = 5, | ||
234 | }; | ||
235 | |||
236 | static struct platform_device *smdk4212_devices[] __initdata = { | ||
237 | &s3c_device_hsmmc2, | ||
238 | &s3c_device_hsmmc3, | ||
239 | &s3c_device_i2c0, | ||
240 | &s3c_device_i2c1, | ||
241 | &s3c_device_i2c3, | ||
242 | &s3c_device_i2c7, | ||
243 | &s3c_device_rtc, | ||
244 | &s3c_device_wdt, | ||
245 | &samsung_device_keypad, | ||
246 | }; | ||
247 | |||
248 | static void __init smdk4212_map_io(void) | ||
249 | { | ||
250 | clk_xusbxti.rate = 24000000; | ||
251 | |||
252 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
253 | s3c24xx_init_clocks(clk_xusbxti.rate); | ||
254 | s3c24xx_init_uarts(smdk4212_uartcfgs, ARRAY_SIZE(smdk4212_uartcfgs)); | ||
255 | } | ||
256 | |||
257 | static void __init smdk4212_machine_init(void) | ||
258 | { | ||
259 | s3c_i2c0_set_platdata(NULL); | ||
260 | i2c_register_board_info(0, smdk4212_i2c_devs0, | ||
261 | ARRAY_SIZE(smdk4212_i2c_devs0)); | ||
262 | |||
263 | s3c_i2c1_set_platdata(NULL); | ||
264 | i2c_register_board_info(1, smdk4212_i2c_devs1, | ||
265 | ARRAY_SIZE(smdk4212_i2c_devs1)); | ||
266 | |||
267 | s3c_i2c3_set_platdata(NULL); | ||
268 | i2c_register_board_info(3, smdk4212_i2c_devs3, | ||
269 | ARRAY_SIZE(smdk4212_i2c_devs3)); | ||
270 | |||
271 | s3c_i2c7_set_platdata(NULL); | ||
272 | i2c_register_board_info(7, smdk4212_i2c_devs7, | ||
273 | ARRAY_SIZE(smdk4212_i2c_devs7)); | ||
274 | |||
275 | samsung_bl_set(&smdk4212_bl_gpio_info, &smdk4212_bl_data); | ||
276 | |||
277 | samsung_keypad_set_platdata(&smdk4212_keypad_data); | ||
278 | |||
279 | s3c_sdhci2_set_platdata(&smdk4212_hsmmc2_pdata); | ||
280 | s3c_sdhci3_set_platdata(&smdk4212_hsmmc3_pdata); | ||
281 | |||
282 | platform_add_devices(smdk4212_devices, ARRAY_SIZE(smdk4212_devices)); | ||
283 | } | ||
284 | |||
285 | MACHINE_START(SMDK4212, "SMDK4212") | ||
286 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
287 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
288 | .init_irq = exynos4_init_irq, | ||
289 | .map_io = smdk4212_map_io, | ||
290 | .init_machine = smdk4212_machine_init, | ||
291 | .timer = &exynos4_timer, | ||
292 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c deleted file mode 100644 index a7c65e05c1eb..000000000000 --- a/arch/arm/mach-exynos4/mach-smdkc210.c +++ /dev/null | |||
@@ -1,309 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/mach-smdkc210.c | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/delay.h> | ||
13 | #include <linux/gpio.h> | ||
14 | #include <linux/lcd.h> | ||
15 | #include <linux/mmc/host.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/smsc911x.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <linux/pwm_backlight.h> | ||
21 | |||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | |||
25 | #include <video/platform_lcd.h> | ||
26 | |||
27 | #include <plat/regs-serial.h> | ||
28 | #include <plat/regs-srom.h> | ||
29 | #include <plat/regs-fb-v4.h> | ||
30 | #include <plat/exynos4.h> | ||
31 | #include <plat/cpu.h> | ||
32 | #include <plat/devs.h> | ||
33 | #include <plat/fb.h> | ||
34 | #include <plat/sdhci.h> | ||
35 | #include <plat/iic.h> | ||
36 | #include <plat/pd.h> | ||
37 | #include <plat/gpio-cfg.h> | ||
38 | #include <plat/backlight.h> | ||
39 | |||
40 | #include <mach/map.h> | ||
41 | |||
42 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
43 | #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
44 | S3C2410_UCON_RXILEVEL | \ | ||
45 | S3C2410_UCON_TXIRQMODE | \ | ||
46 | S3C2410_UCON_RXIRQMODE | \ | ||
47 | S3C2410_UCON_RXFIFO_TOI | \ | ||
48 | S3C2443_UCON_RXERR_IRQEN) | ||
49 | |||
50 | #define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
51 | |||
52 | #define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
53 | S5PV210_UFCON_TXTRIG4 | \ | ||
54 | S5PV210_UFCON_RXTRIG4) | ||
55 | |||
56 | static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = { | ||
57 | [0] = { | ||
58 | .hwport = 0, | ||
59 | .flags = 0, | ||
60 | .ucon = SMDKC210_UCON_DEFAULT, | ||
61 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
62 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
63 | }, | ||
64 | [1] = { | ||
65 | .hwport = 1, | ||
66 | .flags = 0, | ||
67 | .ucon = SMDKC210_UCON_DEFAULT, | ||
68 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
69 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
70 | }, | ||
71 | [2] = { | ||
72 | .hwport = 2, | ||
73 | .flags = 0, | ||
74 | .ucon = SMDKC210_UCON_DEFAULT, | ||
75 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
76 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
77 | }, | ||
78 | [3] = { | ||
79 | .hwport = 3, | ||
80 | .flags = 0, | ||
81 | .ucon = SMDKC210_UCON_DEFAULT, | ||
82 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
83 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = { | ||
88 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
89 | .ext_cd_gpio = EXYNOS4_GPK0(2), | ||
90 | .ext_cd_gpio_invert = 1, | ||
91 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
92 | #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT | ||
93 | .max_width = 8, | ||
94 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
95 | #endif | ||
96 | }; | ||
97 | |||
98 | static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = { | ||
99 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
100 | .ext_cd_gpio = EXYNOS4_GPK0(2), | ||
101 | .ext_cd_gpio_invert = 1, | ||
102 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
103 | }; | ||
104 | |||
105 | static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = { | ||
106 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
107 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
108 | .ext_cd_gpio_invert = 1, | ||
109 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
110 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT | ||
111 | .max_width = 8, | ||
112 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
113 | #endif | ||
114 | }; | ||
115 | |||
116 | static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = { | ||
117 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
118 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
119 | .ext_cd_gpio_invert = 1, | ||
120 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
121 | }; | ||
122 | |||
123 | static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, | ||
124 | unsigned int power) | ||
125 | { | ||
126 | if (power) { | ||
127 | #if !defined(CONFIG_BACKLIGHT_PWM) | ||
128 | gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0"); | ||
129 | gpio_free(EXYNOS4_GPD0(1)); | ||
130 | #endif | ||
131 | /* fire nRESET on power up */ | ||
132 | gpio_request(EXYNOS4_GPX0(6), "GPX0"); | ||
133 | |||
134 | gpio_direction_output(EXYNOS4_GPX0(6), 1); | ||
135 | mdelay(100); | ||
136 | |||
137 | gpio_set_value(EXYNOS4_GPX0(6), 0); | ||
138 | mdelay(10); | ||
139 | |||
140 | gpio_set_value(EXYNOS4_GPX0(6), 1); | ||
141 | mdelay(10); | ||
142 | |||
143 | gpio_free(EXYNOS4_GPX0(6)); | ||
144 | } else { | ||
145 | #if !defined(CONFIG_BACKLIGHT_PWM) | ||
146 | gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0"); | ||
147 | gpio_free(EXYNOS4_GPD0(1)); | ||
148 | #endif | ||
149 | } | ||
150 | } | ||
151 | |||
152 | static struct plat_lcd_data smdkc210_lcd_lte480wv_data = { | ||
153 | .set_power = lcd_lte480wv_set_power, | ||
154 | }; | ||
155 | |||
156 | static struct platform_device smdkc210_lcd_lte480wv = { | ||
157 | .name = "platform-lcd", | ||
158 | .dev.parent = &s5p_device_fimd0.dev, | ||
159 | .dev.platform_data = &smdkc210_lcd_lte480wv_data, | ||
160 | }; | ||
161 | |||
162 | static struct s3c_fb_pd_win smdkc210_fb_win0 = { | ||
163 | .win_mode = { | ||
164 | .left_margin = 13, | ||
165 | .right_margin = 8, | ||
166 | .upper_margin = 7, | ||
167 | .lower_margin = 5, | ||
168 | .hsync_len = 3, | ||
169 | .vsync_len = 1, | ||
170 | .xres = 800, | ||
171 | .yres = 480, | ||
172 | }, | ||
173 | .max_bpp = 32, | ||
174 | .default_bpp = 24, | ||
175 | }; | ||
176 | |||
177 | static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = { | ||
178 | .win[0] = &smdkc210_fb_win0, | ||
179 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
180 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
181 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
182 | }; | ||
183 | |||
184 | static struct resource smdkc210_smsc911x_resources[] = { | ||
185 | [0] = { | ||
186 | .start = EXYNOS4_PA_SROM_BANK(1), | ||
187 | .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1, | ||
188 | .flags = IORESOURCE_MEM, | ||
189 | }, | ||
190 | [1] = { | ||
191 | .start = IRQ_EINT(5), | ||
192 | .end = IRQ_EINT(5), | ||
193 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | static struct smsc911x_platform_config smsc9215_config = { | ||
198 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
199 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
200 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
201 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
202 | .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, | ||
203 | }; | ||
204 | |||
205 | static struct platform_device smdkc210_smsc911x = { | ||
206 | .name = "smsc911x", | ||
207 | .id = -1, | ||
208 | .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources), | ||
209 | .resource = smdkc210_smsc911x_resources, | ||
210 | .dev = { | ||
211 | .platform_data = &smsc9215_config, | ||
212 | }, | ||
213 | }; | ||
214 | |||
215 | static struct i2c_board_info i2c_devs1[] __initdata = { | ||
216 | {I2C_BOARD_INFO("wm8994", 0x1a),}, | ||
217 | }; | ||
218 | |||
219 | static struct platform_device *smdkc210_devices[] __initdata = { | ||
220 | &s3c_device_hsmmc0, | ||
221 | &s3c_device_hsmmc1, | ||
222 | &s3c_device_hsmmc2, | ||
223 | &s3c_device_hsmmc3, | ||
224 | &s3c_device_i2c1, | ||
225 | &s3c_device_rtc, | ||
226 | &s3c_device_wdt, | ||
227 | &exynos4_device_ac97, | ||
228 | &exynos4_device_i2s0, | ||
229 | &exynos4_device_pd[PD_MFC], | ||
230 | &exynos4_device_pd[PD_G3D], | ||
231 | &exynos4_device_pd[PD_LCD0], | ||
232 | &exynos4_device_pd[PD_LCD1], | ||
233 | &exynos4_device_pd[PD_CAM], | ||
234 | &exynos4_device_pd[PD_TV], | ||
235 | &exynos4_device_pd[PD_GPS], | ||
236 | &exynos4_device_sysmmu, | ||
237 | &samsung_asoc_dma, | ||
238 | &s5p_device_fimd0, | ||
239 | &smdkc210_lcd_lte480wv, | ||
240 | &smdkc210_smsc911x, | ||
241 | }; | ||
242 | |||
243 | static void __init smdkc210_smsc911x_init(void) | ||
244 | { | ||
245 | u32 cs1; | ||
246 | |||
247 | /* configure nCS1 width to 16 bits */ | ||
248 | cs1 = __raw_readl(S5P_SROM_BW) & | ||
249 | ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); | ||
250 | cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | | ||
251 | (1 << S5P_SROM_BW__WAITENABLE__SHIFT) | | ||
252 | (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << | ||
253 | S5P_SROM_BW__NCS1__SHIFT; | ||
254 | __raw_writel(cs1, S5P_SROM_BW); | ||
255 | |||
256 | /* set timing for nCS1 suitable for ethernet chip */ | ||
257 | __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | | ||
258 | (0x9 << S5P_SROM_BCX__TACP__SHIFT) | | ||
259 | (0xc << S5P_SROM_BCX__TCAH__SHIFT) | | ||
260 | (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | | ||
261 | (0x6 << S5P_SROM_BCX__TACC__SHIFT) | | ||
262 | (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | | ||
263 | (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); | ||
264 | } | ||
265 | |||
266 | /* LCD Backlight data */ | ||
267 | static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = { | ||
268 | .no = EXYNOS4_GPD0(1), | ||
269 | .func = S3C_GPIO_SFN(2), | ||
270 | }; | ||
271 | |||
272 | static struct platform_pwm_backlight_data smdkc210_bl_data = { | ||
273 | .pwm_id = 1, | ||
274 | .pwm_period_ns = 1000, | ||
275 | }; | ||
276 | |||
277 | static void __init smdkc210_map_io(void) | ||
278 | { | ||
279 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
280 | s3c24xx_init_clocks(24000000); | ||
281 | s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs)); | ||
282 | } | ||
283 | |||
284 | static void __init smdkc210_machine_init(void) | ||
285 | { | ||
286 | s3c_i2c1_set_platdata(NULL); | ||
287 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | ||
288 | |||
289 | smdkc210_smsc911x_init(); | ||
290 | |||
291 | s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); | ||
292 | s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata); | ||
293 | s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata); | ||
294 | s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata); | ||
295 | |||
296 | samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data); | ||
297 | s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata); | ||
298 | |||
299 | platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices)); | ||
300 | } | ||
301 | |||
302 | MACHINE_START(SMDKC210, "SMDKC210") | ||
303 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
304 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
305 | .init_irq = exynos4_init_irq, | ||
306 | .map_io = smdkc210_map_io, | ||
307 | .init_machine = smdkc210_machine_init, | ||
308 | .timer = &exynos4_timer, | ||
309 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c index ea4149556860..a16eb569a3e6 100644 --- a/arch/arm/mach-exynos4/mach-smdkv310.c +++ b/arch/arm/mach-exynos4/mach-smdkv310.c | |||
@@ -9,7 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/serial_core.h> | 11 | #include <linux/serial_core.h> |
12 | #include <linux/delay.h> | ||
12 | #include <linux/gpio.h> | 13 | #include <linux/gpio.h> |
14 | #include <linux/lcd.h> | ||
13 | #include <linux/mmc/host.h> | 15 | #include <linux/mmc/host.h> |
14 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
15 | #include <linux/smsc911x.h> | 17 | #include <linux/smsc911x.h> |
@@ -21,11 +23,14 @@ | |||
21 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
22 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
23 | 25 | ||
26 | #include <video/platform_lcd.h> | ||
24 | #include <plat/regs-serial.h> | 27 | #include <plat/regs-serial.h> |
25 | #include <plat/regs-srom.h> | 28 | #include <plat/regs-srom.h> |
29 | #include <plat/regs-fb-v4.h> | ||
26 | #include <plat/exynos4.h> | 30 | #include <plat/exynos4.h> |
27 | #include <plat/cpu.h> | 31 | #include <plat/cpu.h> |
28 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
33 | #include <plat/fb.h> | ||
29 | #include <plat/keypad.h> | 34 | #include <plat/keypad.h> |
30 | #include <plat/sdhci.h> | 35 | #include <plat/sdhci.h> |
31 | #include <plat/iic.h> | 36 | #include <plat/iic.h> |
@@ -112,6 +117,67 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = { | |||
112 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 117 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
113 | }; | 118 | }; |
114 | 119 | ||
120 | static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, | ||
121 | unsigned int power) | ||
122 | { | ||
123 | if (power) { | ||
124 | #if !defined(CONFIG_BACKLIGHT_PWM) | ||
125 | gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0"); | ||
126 | gpio_free(EXYNOS4_GPD0(1)); | ||
127 | #endif | ||
128 | /* fire nRESET on power up */ | ||
129 | gpio_request(EXYNOS4_GPX0(6), "GPX0"); | ||
130 | |||
131 | gpio_direction_output(EXYNOS4_GPX0(6), 1); | ||
132 | mdelay(100); | ||
133 | |||
134 | gpio_set_value(EXYNOS4_GPX0(6), 0); | ||
135 | mdelay(10); | ||
136 | |||
137 | gpio_set_value(EXYNOS4_GPX0(6), 1); | ||
138 | mdelay(10); | ||
139 | |||
140 | gpio_free(EXYNOS4_GPX0(6)); | ||
141 | } else { | ||
142 | #if !defined(CONFIG_BACKLIGHT_PWM) | ||
143 | gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0"); | ||
144 | gpio_free(EXYNOS4_GPD0(1)); | ||
145 | #endif | ||
146 | } | ||
147 | } | ||
148 | |||
149 | static struct plat_lcd_data smdkv310_lcd_lte480wv_data = { | ||
150 | .set_power = lcd_lte480wv_set_power, | ||
151 | }; | ||
152 | |||
153 | static struct platform_device smdkv310_lcd_lte480wv = { | ||
154 | .name = "platform-lcd", | ||
155 | .dev.parent = &s5p_device_fimd0.dev, | ||
156 | .dev.platform_data = &smdkv310_lcd_lte480wv_data, | ||
157 | }; | ||
158 | |||
159 | static struct s3c_fb_pd_win smdkv310_fb_win0 = { | ||
160 | .win_mode = { | ||
161 | .left_margin = 13, | ||
162 | .right_margin = 8, | ||
163 | .upper_margin = 7, | ||
164 | .lower_margin = 5, | ||
165 | .hsync_len = 3, | ||
166 | .vsync_len = 1, | ||
167 | .xres = 800, | ||
168 | .yres = 480, | ||
169 | }, | ||
170 | .max_bpp = 32, | ||
171 | .default_bpp = 24, | ||
172 | }; | ||
173 | |||
174 | static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = { | ||
175 | .win[0] = &smdkv310_fb_win0, | ||
176 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
177 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
178 | .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, | ||
179 | }; | ||
180 | |||
115 | static struct resource smdkv310_smsc911x_resources[] = { | 181 | static struct resource smdkv310_smsc911x_resources[] = { |
116 | [0] = { | 182 | [0] = { |
117 | .start = EXYNOS4_PA_SROM_BANK(1), | 183 | .start = EXYNOS4_PA_SROM_BANK(1), |
@@ -188,6 +254,8 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
188 | &exynos4_device_sysmmu, | 254 | &exynos4_device_sysmmu, |
189 | &samsung_asoc_dma, | 255 | &samsung_asoc_dma, |
190 | &samsung_asoc_idma, | 256 | &samsung_asoc_idma, |
257 | &s5p_device_fimd0, | ||
258 | &smdkv310_lcd_lte480wv, | ||
191 | &smdkv310_smsc911x, | 259 | &smdkv310_smsc911x, |
192 | &exynos4_device_ahci, | 260 | &exynos4_device_ahci, |
193 | }; | 261 | }; |
@@ -248,6 +316,7 @@ static void __init smdkv310_machine_init(void) | |||
248 | samsung_keypad_set_platdata(&smdkv310_keypad_data); | 316 | samsung_keypad_set_platdata(&smdkv310_keypad_data); |
249 | 317 | ||
250 | samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); | 318 | samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); |
319 | s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); | ||
251 | 320 | ||
252 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); | 321 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); |
253 | } | 322 | } |
@@ -261,3 +330,12 @@ MACHINE_START(SMDKV310, "SMDKV310") | |||
261 | .init_machine = smdkv310_machine_init, | 330 | .init_machine = smdkv310_machine_init, |
262 | .timer = &exynos4_timer, | 331 | .timer = &exynos4_timer, |
263 | MACHINE_END | 332 | MACHINE_END |
333 | |||
334 | MACHINE_START(SMDKC210, "SMDKC210") | ||
335 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
336 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
337 | .init_irq = exynos4_init_irq, | ||
338 | .map_io = smdkv310_map_io, | ||
339 | .init_machine = smdkv310_machine_init, | ||
340 | .timer = &exynos4_timer, | ||
341 | MACHINE_END | ||
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c index 1ae059b7ad7b..ddd86864fb83 100644 --- a/arch/arm/mach-exynos4/mct.c +++ b/arch/arm/mach-exynos4/mct.c | |||
@@ -132,12 +132,18 @@ static cycle_t exynos4_frc_read(struct clocksource *cs) | |||
132 | return ((cycle_t)hi << 32) | lo; | 132 | return ((cycle_t)hi << 32) | lo; |
133 | } | 133 | } |
134 | 134 | ||
135 | static void exynos4_frc_resume(struct clocksource *cs) | ||
136 | { | ||
137 | exynos4_mct_frc_start(0, 0); | ||
138 | } | ||
139 | |||
135 | struct clocksource mct_frc = { | 140 | struct clocksource mct_frc = { |
136 | .name = "mct-frc", | 141 | .name = "mct-frc", |
137 | .rating = 400, | 142 | .rating = 400, |
138 | .read = exynos4_frc_read, | 143 | .read = exynos4_frc_read, |
139 | .mask = CLOCKSOURCE_MASK(64), | 144 | .mask = CLOCKSOURCE_MASK(64), |
140 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 145 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
146 | .resume = exynos4_frc_resume, | ||
141 | }; | 147 | }; |
142 | 148 | ||
143 | static void __init exynos4_clocksource_init(void) | 149 | static void __init exynos4_clocksource_init(void) |
@@ -389,9 +395,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt) | |||
389 | } | 395 | } |
390 | 396 | ||
391 | /* Setup the local clock events for a CPU */ | 397 | /* Setup the local clock events for a CPU */ |
392 | void __cpuinit local_timer_setup(struct clock_event_device *evt) | 398 | int __cpuinit local_timer_setup(struct clock_event_device *evt) |
393 | { | 399 | { |
394 | exynos4_mct_tick_init(evt); | 400 | exynos4_mct_tick_init(evt); |
401 | |||
402 | return 0; | ||
395 | } | 403 | } |
396 | 404 | ||
397 | int local_timer_ack(void) | 405 | int local_timer_ack(void) |
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c index 7c2282c6ba81..a3346e36d0ae 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos4/platsmp.c | |||
@@ -30,9 +30,12 @@ | |||
30 | #include <mach/regs-clock.h> | 30 | #include <mach/regs-clock.h> |
31 | #include <mach/regs-pmu.h> | 31 | #include <mach/regs-pmu.h> |
32 | 32 | ||
33 | #include <plat/cpu.h> | ||
34 | |||
33 | extern void exynos4_secondary_startup(void); | 35 | extern void exynos4_secondary_startup(void); |
34 | 36 | ||
35 | #define CPU1_BOOT_REG S5P_VA_SYSRAM | 37 | #define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ |
38 | S5P_INFORM5 : S5P_VA_SYSRAM) | ||
36 | 39 | ||
37 | /* | 40 | /* |
38 | * control for which core is the next to come out of the secondary | 41 | * control for which core is the next to come out of the secondary |
@@ -106,6 +109,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
106 | */ | 109 | */ |
107 | spin_lock(&boot_lock); | 110 | spin_lock(&boot_lock); |
108 | spin_unlock(&boot_lock); | 111 | spin_unlock(&boot_lock); |
112 | |||
113 | set_cpu_online(cpu, true); | ||
109 | } | 114 | } |
110 | 115 | ||
111 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | 116 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
@@ -216,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) | |||
216 | * until it receives a soft interrupt, and then the | 221 | * until it receives a soft interrupt, and then the |
217 | * secondary CPU branches to this address. | 222 | * secondary CPU branches to this address. |
218 | */ | 223 | */ |
219 | __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM); | 224 | __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), |
225 | CPU1_BOOT_REG); | ||
220 | } | 226 | } |
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c index bc6ca9482de1..62e4f4363006 100644 --- a/arch/arm/mach-exynos4/pm.c +++ b/arch/arm/mach-exynos4/pm.c | |||
@@ -41,7 +41,6 @@ static struct sleep_save exynos4_set_clksrc[] = { | |||
41 | { .reg = S5P_CLKSRC_MASK_CAM , .val = 0x11111111, }, | 41 | { .reg = S5P_CLKSRC_MASK_CAM , .val = 0x11111111, }, |
42 | { .reg = S5P_CLKSRC_MASK_TV , .val = 0x00000111, }, | 42 | { .reg = S5P_CLKSRC_MASK_TV , .val = 0x00000111, }, |
43 | { .reg = S5P_CLKSRC_MASK_LCD0 , .val = 0x00001111, }, | 43 | { .reg = S5P_CLKSRC_MASK_LCD0 , .val = 0x00001111, }, |
44 | { .reg = S5P_CLKSRC_MASK_LCD1 , .val = 0x00001111, }, | ||
45 | { .reg = S5P_CLKSRC_MASK_MAUDIO , .val = 0x00000001, }, | 44 | { .reg = S5P_CLKSRC_MASK_MAUDIO , .val = 0x00000001, }, |
46 | { .reg = S5P_CLKSRC_MASK_FSYS , .val = 0x01011111, }, | 45 | { .reg = S5P_CLKSRC_MASK_FSYS , .val = 0x01011111, }, |
47 | { .reg = S5P_CLKSRC_MASK_PERIL0 , .val = 0x01111111, }, | 46 | { .reg = S5P_CLKSRC_MASK_PERIL0 , .val = 0x01111111, }, |
@@ -49,6 +48,10 @@ static struct sleep_save exynos4_set_clksrc[] = { | |||
49 | { .reg = S5P_CLKSRC_MASK_DMC , .val = 0x00010000, }, | 48 | { .reg = S5P_CLKSRC_MASK_DMC , .val = 0x00010000, }, |
50 | }; | 49 | }; |
51 | 50 | ||
51 | static struct sleep_save exynos4210_set_clksrc[] = { | ||
52 | { .reg = S5P_CLKSRC_MASK_LCD1 , .val = 0x00001111, }, | ||
53 | }; | ||
54 | |||
52 | static struct sleep_save exynos4_epll_save[] = { | 55 | static struct sleep_save exynos4_epll_save[] = { |
53 | SAVE_ITEM(S5P_EPLL_CON0), | 56 | SAVE_ITEM(S5P_EPLL_CON0), |
54 | SAVE_ITEM(S5P_EPLL_CON1), | 57 | SAVE_ITEM(S5P_EPLL_CON1), |
@@ -60,77 +63,6 @@ static struct sleep_save exynos4_vpll_save[] = { | |||
60 | }; | 63 | }; |
61 | 64 | ||
62 | static struct sleep_save exynos4_core_save[] = { | 65 | static struct sleep_save exynos4_core_save[] = { |
63 | /* CMU side */ | ||
64 | SAVE_ITEM(S5P_CLKDIV_LEFTBUS), | ||
65 | SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), | ||
66 | SAVE_ITEM(S5P_CLKDIV_RIGHTBUS), | ||
67 | SAVE_ITEM(S5P_CLKGATE_IP_RIGHTBUS), | ||
68 | SAVE_ITEM(S5P_CLKSRC_TOP0), | ||
69 | SAVE_ITEM(S5P_CLKSRC_TOP1), | ||
70 | SAVE_ITEM(S5P_CLKSRC_CAM), | ||
71 | SAVE_ITEM(S5P_CLKSRC_TV), | ||
72 | SAVE_ITEM(S5P_CLKSRC_MFC), | ||
73 | SAVE_ITEM(S5P_CLKSRC_G3D), | ||
74 | SAVE_ITEM(S5P_CLKSRC_IMAGE), | ||
75 | SAVE_ITEM(S5P_CLKSRC_LCD0), | ||
76 | SAVE_ITEM(S5P_CLKSRC_LCD1), | ||
77 | SAVE_ITEM(S5P_CLKSRC_MAUDIO), | ||
78 | SAVE_ITEM(S5P_CLKSRC_FSYS), | ||
79 | SAVE_ITEM(S5P_CLKSRC_PERIL0), | ||
80 | SAVE_ITEM(S5P_CLKSRC_PERIL1), | ||
81 | SAVE_ITEM(S5P_CLKDIV_CAM), | ||
82 | SAVE_ITEM(S5P_CLKDIV_TV), | ||
83 | SAVE_ITEM(S5P_CLKDIV_MFC), | ||
84 | SAVE_ITEM(S5P_CLKDIV_G3D), | ||
85 | SAVE_ITEM(S5P_CLKDIV_IMAGE), | ||
86 | SAVE_ITEM(S5P_CLKDIV_LCD0), | ||
87 | SAVE_ITEM(S5P_CLKDIV_LCD1), | ||
88 | SAVE_ITEM(S5P_CLKDIV_MAUDIO), | ||
89 | SAVE_ITEM(S5P_CLKDIV_FSYS0), | ||
90 | SAVE_ITEM(S5P_CLKDIV_FSYS1), | ||
91 | SAVE_ITEM(S5P_CLKDIV_FSYS2), | ||
92 | SAVE_ITEM(S5P_CLKDIV_FSYS3), | ||
93 | SAVE_ITEM(S5P_CLKDIV_PERIL0), | ||
94 | SAVE_ITEM(S5P_CLKDIV_PERIL1), | ||
95 | SAVE_ITEM(S5P_CLKDIV_PERIL2), | ||
96 | SAVE_ITEM(S5P_CLKDIV_PERIL3), | ||
97 | SAVE_ITEM(S5P_CLKDIV_PERIL4), | ||
98 | SAVE_ITEM(S5P_CLKDIV_PERIL5), | ||
99 | SAVE_ITEM(S5P_CLKDIV_TOP), | ||
100 | SAVE_ITEM(S5P_CLKSRC_MASK_TOP), | ||
101 | SAVE_ITEM(S5P_CLKSRC_MASK_CAM), | ||
102 | SAVE_ITEM(S5P_CLKSRC_MASK_TV), | ||
103 | SAVE_ITEM(S5P_CLKSRC_MASK_LCD0), | ||
104 | SAVE_ITEM(S5P_CLKSRC_MASK_LCD1), | ||
105 | SAVE_ITEM(S5P_CLKSRC_MASK_MAUDIO), | ||
106 | SAVE_ITEM(S5P_CLKSRC_MASK_FSYS), | ||
107 | SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0), | ||
108 | SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1), | ||
109 | SAVE_ITEM(S5P_CLKDIV2_RATIO), | ||
110 | SAVE_ITEM(S5P_CLKGATE_SCLKCAM), | ||
111 | SAVE_ITEM(S5P_CLKGATE_IP_CAM), | ||
112 | SAVE_ITEM(S5P_CLKGATE_IP_TV), | ||
113 | SAVE_ITEM(S5P_CLKGATE_IP_MFC), | ||
114 | SAVE_ITEM(S5P_CLKGATE_IP_G3D), | ||
115 | SAVE_ITEM(S5P_CLKGATE_IP_IMAGE), | ||
116 | SAVE_ITEM(S5P_CLKGATE_IP_LCD0), | ||
117 | SAVE_ITEM(S5P_CLKGATE_IP_LCD1), | ||
118 | SAVE_ITEM(S5P_CLKGATE_IP_FSYS), | ||
119 | SAVE_ITEM(S5P_CLKGATE_IP_GPS), | ||
120 | SAVE_ITEM(S5P_CLKGATE_IP_PERIL), | ||
121 | SAVE_ITEM(S5P_CLKGATE_IP_PERIR), | ||
122 | SAVE_ITEM(S5P_CLKGATE_BLOCK), | ||
123 | SAVE_ITEM(S5P_CLKSRC_MASK_DMC), | ||
124 | SAVE_ITEM(S5P_CLKSRC_DMC), | ||
125 | SAVE_ITEM(S5P_CLKDIV_DMC0), | ||
126 | SAVE_ITEM(S5P_CLKDIV_DMC1), | ||
127 | SAVE_ITEM(S5P_CLKGATE_IP_DMC), | ||
128 | SAVE_ITEM(S5P_CLKSRC_CPU), | ||
129 | SAVE_ITEM(S5P_CLKDIV_CPU), | ||
130 | SAVE_ITEM(S5P_CLKDIV_CPU + 0x4), | ||
131 | SAVE_ITEM(S5P_CLKGATE_SCLKCPU), | ||
132 | SAVE_ITEM(S5P_CLKGATE_IP_CPU), | ||
133 | |||
134 | /* GIC side */ | 66 | /* GIC side */ |
135 | SAVE_ITEM(S5P_VA_GIC_CPU + 0x000), | 67 | SAVE_ITEM(S5P_VA_GIC_CPU + 0x000), |
136 | SAVE_ITEM(S5P_VA_GIC_CPU + 0x004), | 68 | SAVE_ITEM(S5P_VA_GIC_CPU + 0x004), |
@@ -268,6 +200,9 @@ static void exynos4_pm_prepare(void) | |||
268 | 200 | ||
269 | s3c_pm_do_restore_core(exynos4_set_clksrc, ARRAY_SIZE(exynos4_set_clksrc)); | 201 | s3c_pm_do_restore_core(exynos4_set_clksrc, ARRAY_SIZE(exynos4_set_clksrc)); |
270 | 202 | ||
203 | if (soc_is_exynos4210()) | ||
204 | s3c_pm_do_restore_core(exynos4210_set_clksrc, ARRAY_SIZE(exynos4210_set_clksrc)); | ||
205 | |||
271 | } | 206 | } |
272 | 207 | ||
273 | static int exynos4_pm_add(struct sys_device *sysdev) | 208 | static int exynos4_pm_add(struct sys_device *sysdev) |
diff --git a/arch/arm/mach-exynos4/setup-keypad.c b/arch/arm/mach-exynos4/setup-keypad.c index 1ee0ebff111f..7862bfb5933d 100644 --- a/arch/arm/mach-exynos4/setup-keypad.c +++ b/arch/arm/mach-exynos4/setup-keypad.c | |||
@@ -19,15 +19,16 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | |||
19 | 19 | ||
20 | if (rows > 8) { | 20 | if (rows > 8) { |
21 | /* Set all the necessary GPX2 pins: KP_ROW[0~7] */ | 21 | /* Set all the necessary GPX2 pins: KP_ROW[0~7] */ |
22 | s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3)); | 22 | s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3), |
23 | S3C_GPIO_PULL_UP); | ||
23 | 24 | ||
24 | /* Set all the necessary GPX3 pins: KP_ROW[8~] */ | 25 | /* Set all the necessary GPX3 pins: KP_ROW[8~] */ |
25 | s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8), | 26 | s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8), |
26 | S3C_GPIO_SFN(3)); | 27 | S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); |
27 | } else { | 28 | } else { |
28 | /* Set all the necessary GPX2 pins: KP_ROW[x] */ | 29 | /* Set all the necessary GPX2 pins: KP_ROW[x] */ |
29 | s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows, | 30 | s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3), |
30 | S3C_GPIO_SFN(3)); | 31 | S3C_GPIO_PULL_UP); |
31 | } | 32 | } |
32 | 33 | ||
33 | /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */ | 34 | /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */ |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 2fbbdd5eac35..fcf0ae95651f 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -337,15 +337,15 @@ static unsigned long timer_reload; | |||
337 | static void integrator_clocksource_init(u32 khz) | 337 | static void integrator_clocksource_init(u32 khz) |
338 | { | 338 | { |
339 | void __iomem *base = (void __iomem *)TIMER2_VA_BASE; | 339 | void __iomem *base = (void __iomem *)TIMER2_VA_BASE; |
340 | u32 ctrl = TIMER_CTRL_ENABLE; | 340 | u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC; |
341 | 341 | ||
342 | if (khz >= 1500) { | 342 | if (khz >= 1500) { |
343 | khz /= 16; | 343 | khz /= 16; |
344 | ctrl = TIMER_CTRL_DIV16; | 344 | ctrl |= TIMER_CTRL_DIV16; |
345 | } | 345 | } |
346 | 346 | ||
347 | writel(ctrl, base + TIMER_CTRL); | ||
348 | writel(0xffff, base + TIMER_LOAD); | 347 | writel(0xffff, base + TIMER_LOAD); |
348 | writel(ctrl, base + TIMER_CTRL); | ||
349 | 349 | ||
350 | clocksource_mmio_init(base + TIMER_VALUE, "timer2", | 350 | clocksource_mmio_init(base + TIMER_VALUE, "timer2", |
351 | khz * 1000, 200, 16, clocksource_mmio_readl_down); | 351 | khz * 1000, 200, 16, clocksource_mmio_readl_down); |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index ffd55b1c4396..b9b844683147 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3078,6 +3078,7 @@ static struct clk gpt12_fck = { | |||
3078 | .name = "gpt12_fck", | 3078 | .name = "gpt12_fck", |
3079 | .ops = &clkops_null, | 3079 | .ops = &clkops_null, |
3080 | .parent = &secure_32k_fck, | 3080 | .parent = &secure_32k_fck, |
3081 | .clkdm_name = "wkup_clkdm", | ||
3081 | .recalc = &followparent_recalc, | 3082 | .recalc = &followparent_recalc, |
3082 | }; | 3083 | }; |
3083 | 3084 | ||
@@ -3085,6 +3086,7 @@ static struct clk wdt1_fck = { | |||
3085 | .name = "wdt1_fck", | 3086 | .name = "wdt1_fck", |
3086 | .ops = &clkops_null, | 3087 | .ops = &clkops_null, |
3087 | .parent = &secure_32k_fck, | 3088 | .parent = &secure_32k_fck, |
3089 | .clkdm_name = "wkup_clkdm", | ||
3088 | .recalc = &followparent_recalc, | 3090 | .recalc = &followparent_recalc, |
3089 | }; | 3091 | }; |
3090 | 3092 | ||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2af0e3f00ce1..c0b6fbda3408 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3376,10 +3376,18 @@ int __init omap4xxx_clk_init(void) | |||
3376 | } else if (cpu_is_omap446x()) { | 3376 | } else if (cpu_is_omap446x()) { |
3377 | cpu_mask = RATE_IN_4460; | 3377 | cpu_mask = RATE_IN_4460; |
3378 | cpu_clkflg = CK_446X; | 3378 | cpu_clkflg = CK_446X; |
3379 | } else { | ||
3380 | return 0; | ||
3379 | } | 3381 | } |
3380 | 3382 | ||
3381 | clk_init(&omap2_clk_functions); | 3383 | clk_init(&omap2_clk_functions); |
3382 | omap2_clk_disable_clkdm_control(); | 3384 | |
3385 | /* | ||
3386 | * Must stay commented until all OMAP SoC drivers are | ||
3387 | * converted to runtime PM, or drivers may start crashing | ||
3388 | * | ||
3389 | * omap2_clk_disable_clkdm_control(); | ||
3390 | */ | ||
3383 | 3391 | ||
3384 | for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); | 3392 | for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); |
3385 | c++) | 3393 | c++) |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index ab7db083f97f..8f0890685d7b 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -747,6 +747,7 @@ int clkdm_wakeup(struct clockdomain *clkdm) | |||
747 | spin_lock_irqsave(&clkdm->lock, flags); | 747 | spin_lock_irqsave(&clkdm->lock, flags); |
748 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | 748 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; |
749 | ret = arch_clkdm->clkdm_wakeup(clkdm); | 749 | ret = arch_clkdm->clkdm_wakeup(clkdm); |
750 | ret |= pwrdm_state_switch(clkdm->pwrdm.ptr); | ||
750 | spin_unlock_irqrestore(&clkdm->lock, flags); | 751 | spin_unlock_irqrestore(&clkdm->lock, flags); |
751 | return ret; | 752 | return ret; |
752 | } | 753 | } |
@@ -818,6 +819,7 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | |||
818 | spin_lock_irqsave(&clkdm->lock, flags); | 819 | spin_lock_irqsave(&clkdm->lock, flags); |
819 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | 820 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; |
820 | arch_clkdm->clkdm_deny_idle(clkdm); | 821 | arch_clkdm->clkdm_deny_idle(clkdm); |
822 | pwrdm_state_switch(clkdm->pwrdm.ptr); | ||
821 | spin_unlock_irqrestore(&clkdm->lock, flags); | 823 | spin_unlock_irqrestore(&clkdm->lock, flags); |
822 | } | 824 | } |
823 | 825 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 16743c7d6e8e..408193d8e044 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -192,6 +192,7 @@ static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { | |||
192 | .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, | 192 | .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, |
193 | .flags = ADDR_TYPE_RT | 193 | .flags = ADDR_TYPE_RT |
194 | }, | 194 | }, |
195 | { } | ||
195 | }; | 196 | }; |
196 | 197 | ||
197 | /* l4_core ->usbhsotg interface */ | 198 | /* l4_core ->usbhsotg interface */ |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 3feb35911a32..472bf22d5e84 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -130,7 +130,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
130 | } else { | 130 | } else { |
131 | hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); | 131 | hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); |
132 | clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); | 132 | clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); |
133 | pwrdm_wait_transition(pwrdm); | ||
134 | sleep_switch = FORCEWAKEUP_SWITCH; | 133 | sleep_switch = FORCEWAKEUP_SWITCH; |
135 | } | 134 | } |
136 | } | 135 | } |
@@ -156,7 +155,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
156 | return ret; | 155 | return ret; |
157 | } | 156 | } |
158 | 157 | ||
159 | pwrdm_wait_transition(pwrdm); | ||
160 | pwrdm_state_switch(pwrdm); | 158 | pwrdm_state_switch(pwrdm); |
161 | err: | 159 | err: |
162 | return ret; | 160 | return ret; |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 9af08473bf10..ef71fdd40fc4 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -195,28 +195,35 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) | |||
195 | 195 | ||
196 | /** | 196 | /** |
197 | * pwrdm_init - set up the powerdomain layer | 197 | * pwrdm_init - set up the powerdomain layer |
198 | * @pwrdm_list: array of struct powerdomain pointers to register | 198 | * @pwrdms: array of struct powerdomain pointers to register |
199 | * @custom_funcs: func pointers for arch specific implementations | 199 | * @custom_funcs: func pointers for arch specific implementations |
200 | * | 200 | * |
201 | * Loop through the array of powerdomains @pwrdm_list, registering all | 201 | * Loop through the array of powerdomains @pwrdms, registering all |
202 | * that are available on the current CPU. If pwrdm_list is supplied | 202 | * that are available on the current CPU. Also, program all |
203 | * and not null, all of the referenced powerdomains will be | 203 | * powerdomain target state as ON; this is to prevent domains from |
204 | * registered. No return value. XXX pwrdm_list is not really a | 204 | * hitting low power states (if bootloader has target states set to |
205 | * "list"; it is an array. Rename appropriately. | 205 | * something other than ON) and potentially even losing context while |
206 | * PM is not fully initialized. The PM late init code can then program | ||
207 | * the desired target state for all the power domains. No return | ||
208 | * value. | ||
206 | */ | 209 | */ |
207 | void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs) | 210 | void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs) |
208 | { | 211 | { |
209 | struct powerdomain **p = NULL; | 212 | struct powerdomain **p = NULL; |
213 | struct powerdomain *temp_p; | ||
210 | 214 | ||
211 | if (!custom_funcs) | 215 | if (!custom_funcs) |
212 | WARN(1, "powerdomain: No custom pwrdm functions registered\n"); | 216 | WARN(1, "powerdomain: No custom pwrdm functions registered\n"); |
213 | else | 217 | else |
214 | arch_pwrdm = custom_funcs; | 218 | arch_pwrdm = custom_funcs; |
215 | 219 | ||
216 | if (pwrdm_list) { | 220 | if (pwrdms) { |
217 | for (p = pwrdm_list; *p; p++) | 221 | for (p = pwrdms; *p; p++) |
218 | _pwrdm_register(*p); | 222 | _pwrdm_register(*p); |
219 | } | 223 | } |
224 | |||
225 | list_for_each_entry(temp_p, &pwrdm_list, node) | ||
226 | pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON); | ||
220 | } | 227 | } |
221 | 228 | ||
222 | /** | 229 | /** |
diff --git a/arch/arm/mach-prima2/clock.c b/arch/arm/mach-prima2/clock.c index f9a2aaf63f71..615a4e75ceab 100644 --- a/arch/arm/mach-prima2/clock.c +++ b/arch/arm/mach-prima2/clock.c | |||
@@ -481,6 +481,7 @@ static void __init sirfsoc_clk_init(void) | |||
481 | 481 | ||
482 | static struct of_device_id clkc_ids[] = { | 482 | static struct of_device_id clkc_ids[] = { |
483 | { .compatible = "sirf,prima2-clkc" }, | 483 | { .compatible = "sirf,prima2-clkc" }, |
484 | {}, | ||
484 | }; | 485 | }; |
485 | 486 | ||
486 | void __init sirfsoc_of_clk_init(void) | 487 | void __init sirfsoc_of_clk_init(void) |
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c index c3404cbb6ff7..7af254d046ba 100644 --- a/arch/arm/mach-prima2/irq.c +++ b/arch/arm/mach-prima2/irq.c | |||
@@ -51,6 +51,7 @@ static __init void sirfsoc_irq_init(void) | |||
51 | 51 | ||
52 | static struct of_device_id intc_ids[] = { | 52 | static struct of_device_id intc_ids[] = { |
53 | { .compatible = "sirf,prima2-intc" }, | 53 | { .compatible = "sirf,prima2-intc" }, |
54 | {}, | ||
54 | }; | 55 | }; |
55 | 56 | ||
56 | void __init sirfsoc_of_irq_init(void) | 57 | void __init sirfsoc_of_irq_init(void) |
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c index d074786e83d4..492cfa8d2610 100644 --- a/arch/arm/mach-prima2/rstc.c +++ b/arch/arm/mach-prima2/rstc.c | |||
@@ -19,6 +19,7 @@ static DEFINE_MUTEX(rstc_lock); | |||
19 | 19 | ||
20 | static struct of_device_id rstc_ids[] = { | 20 | static struct of_device_id rstc_ids[] = { |
21 | { .compatible = "sirf,prima2-rstc" }, | 21 | { .compatible = "sirf,prima2-rstc" }, |
22 | {}, | ||
22 | }; | 23 | }; |
23 | 24 | ||
24 | static int __init sirfsoc_of_rstc_init(void) | 25 | static int __init sirfsoc_of_rstc_init(void) |
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c index 44027f34a88a..ed7ec48d11da 100644 --- a/arch/arm/mach-prima2/timer.c +++ b/arch/arm/mach-prima2/timer.c | |||
@@ -190,6 +190,7 @@ static void __init sirfsoc_timer_init(void) | |||
190 | 190 | ||
191 | static struct of_device_id timer_ids[] = { | 191 | static struct of_device_id timer_ids[] = { |
192 | { .compatible = "sirf,prima2-tick" }, | 192 | { .compatible = "sirf,prima2-tick" }, |
193 | {}, | ||
193 | }; | 194 | }; |
194 | 195 | ||
195 | static void __init sirfsoc_of_timer_map(void) | 196 | static void __init sirfsoc_of_timer_map(void) |
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index 374e45e566b8..6c498f9a18c5 100644 --- a/arch/arm/mach-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c | |||
@@ -43,16 +43,16 @@ static const char name_s3c6410[] = "S3C6410"; | |||
43 | 43 | ||
44 | static struct cpu_table cpu_ids[] __initdata = { | 44 | static struct cpu_table cpu_ids[] __initdata = { |
45 | { | 45 | { |
46 | .idcode = 0x36400000, | 46 | .idcode = S3C6400_CPU_ID, |
47 | .idmask = 0xfffff000, | 47 | .idmask = S3C64XX_CPU_MASK, |
48 | .map_io = s3c6400_map_io, | 48 | .map_io = s3c6400_map_io, |
49 | .init_clocks = s3c6400_init_clocks, | 49 | .init_clocks = s3c6400_init_clocks, |
50 | .init_uarts = s3c6400_init_uarts, | 50 | .init_uarts = s3c6400_init_uarts, |
51 | .init = s3c6400_init, | 51 | .init = s3c6400_init, |
52 | .name = name_s3c6400, | 52 | .name = name_s3c6400, |
53 | }, { | 53 | }, { |
54 | .idcode = 0x36410100, | 54 | .idcode = S3C6410_CPU_ID, |
55 | .idmask = 0xffffff00, | 55 | .idmask = S3C64XX_CPU_MASK, |
56 | .map_io = s3c6410_map_io, | 56 | .map_io = s3c6410_map_io, |
57 | .init_clocks = s3c6410_init_clocks, | 57 | .init_clocks = s3c6410_init_clocks, |
58 | .init_uarts = s3c6410_init_uarts, | 58 | .init_uarts = s3c6410_init_uarts, |
@@ -140,22 +140,14 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
140 | 140 | ||
141 | void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) | 141 | void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) |
142 | { | 142 | { |
143 | unsigned long idcode; | ||
144 | |||
145 | /* initialise the io descriptors we need for initialisation */ | 143 | /* initialise the io descriptors we need for initialisation */ |
146 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 144 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
147 | iotable_init(mach_desc, size); | 145 | iotable_init(mach_desc, size); |
148 | 146 | ||
149 | idcode = __raw_readl(S3C_VA_SYS + 0x118); | 147 | /* detect cpu id */ |
150 | if (!idcode) { | 148 | s3c64xx_init_cpu(); |
151 | /* S3C6400 has the ID register in a different place, | ||
152 | * and needs a write before it can be read. */ | ||
153 | |||
154 | __raw_writel(0x0, S3C_VA_SYS + 0xA1C); | ||
155 | idcode = __raw_readl(S3C_VA_SYS + 0xA1C); | ||
156 | } | ||
157 | 149 | ||
158 | s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); | 150 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); |
159 | } | 151 | } |
160 | 152 | ||
161 | static __init int s3c64xx_sysdev_init(void) | 153 | static __init int s3c64xx_sysdev_init(void) |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index ecbea92bf83b..a9f3183e0290 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -262,45 +262,6 @@ static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { | |||
262 | .cols = 8, | 262 | .cols = 8, |
263 | }; | 263 | }; |
264 | 264 | ||
265 | static int smdk6410_backlight_init(struct device *dev) | ||
266 | { | ||
267 | int ret; | ||
268 | |||
269 | ret = gpio_request(S3C64XX_GPF(15), "Backlight"); | ||
270 | if (ret) { | ||
271 | printk(KERN_ERR "failed to request GPF for PWM-OUT1\n"); | ||
272 | return ret; | ||
273 | } | ||
274 | |||
275 | /* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */ | ||
276 | s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); | ||
277 | |||
278 | return 0; | ||
279 | } | ||
280 | |||
281 | static void smdk6410_backlight_exit(struct device *dev) | ||
282 | { | ||
283 | s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT); | ||
284 | gpio_free(S3C64XX_GPF(15)); | ||
285 | } | ||
286 | |||
287 | static struct platform_pwm_backlight_data smdk6410_backlight_data = { | ||
288 | .pwm_id = 1, | ||
289 | .max_brightness = 255, | ||
290 | .dft_brightness = 255, | ||
291 | .pwm_period_ns = 78770, | ||
292 | .init = smdk6410_backlight_init, | ||
293 | .exit = smdk6410_backlight_exit, | ||
294 | }; | ||
295 | |||
296 | static struct platform_device smdk6410_backlight_device = { | ||
297 | .name = "pwm-backlight", | ||
298 | .dev = { | ||
299 | .parent = &s3c_device_timer[1].dev, | ||
300 | .platform_data = &smdk6410_backlight_data, | ||
301 | }, | ||
302 | }; | ||
303 | |||
304 | static struct map_desc smdk6410_iodesc[] = {}; | 265 | static struct map_desc smdk6410_iodesc[] = {}; |
305 | 266 | ||
306 | static struct platform_device *smdk6410_devices[] __initdata = { | 267 | static struct platform_device *smdk6410_devices[] __initdata = { |
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index ac825e826326..1fd9c79c7dbc 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <mach/regs-clock.h> | 21 | #include <mach/regs-clock.h> |
22 | #include <mach/spi-clocks.h> | 22 | #include <mach/spi-clocks.h> |
23 | 23 | ||
24 | #include <plat/cpu.h> | ||
24 | #include <plat/s3c64xx-spi.h> | 25 | #include <plat/s3c64xx-spi.h> |
25 | #include <plat/gpio-cfg.h> | 26 | #include <plat/gpio-cfg.h> |
26 | 27 | ||
@@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = { | |||
185 | 186 | ||
186 | void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | 187 | void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) |
187 | { | 188 | { |
188 | unsigned int id; | ||
189 | struct s3c64xx_spi_info *pd; | 189 | struct s3c64xx_spi_info *pd; |
190 | 190 | ||
191 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
192 | |||
193 | /* Reject invalid configuration */ | 191 | /* Reject invalid configuration */ |
194 | if (!num_cs || src_clk_nr < 0 | 192 | if (!num_cs || src_clk_nr < 0 |
195 | || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { | 193 | || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) { |
@@ -199,7 +197,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | |||
199 | 197 | ||
200 | switch (cntrlr) { | 198 | switch (cntrlr) { |
201 | case 0: | 199 | case 0: |
202 | if (id == 0x50000) | 200 | if (soc_is_s5p6450()) |
203 | pd = &s5p6450_spi0_pdata; | 201 | pd = &s5p6450_spi0_pdata; |
204 | else | 202 | else |
205 | pd = &s5p6440_spi0_pdata; | 203 | pd = &s5p6440_spi0_pdata; |
@@ -207,7 +205,7 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | |||
207 | s5p64x0_device_spi0.dev.platform_data = pd; | 205 | s5p64x0_device_spi0.dev.platform_data = pd; |
208 | break; | 206 | break; |
209 | case 1: | 207 | case 1: |
210 | if (id == 0x50000) | 208 | if (soc_is_s5p6450()) |
211 | pd = &s5p6450_spi1_pdata; | 209 | pd = &s5p6450_spi1_pdata; |
212 | else | 210 | else |
213 | pd = &s5p6440_spi1_pdata; | 211 | pd = &s5p6440_spi1_pdata; |
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index d7ad944b3475..0e5b3e63e5b3 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
29 | #include <mach/regs-clock.h> | 29 | #include <mach/regs-clock.h> |
30 | 30 | ||
31 | #include <plat/cpu.h> | ||
31 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
32 | #include <plat/s3c-pl330-pdata.h> | 33 | #include <plat/s3c-pl330-pdata.h> |
33 | 34 | ||
@@ -133,11 +134,7 @@ static struct platform_device s5p64x0_device_pdma = { | |||
133 | 134 | ||
134 | static int __init s5p64x0_dma_init(void) | 135 | static int __init s5p64x0_dma_init(void) |
135 | { | 136 | { |
136 | unsigned int id; | 137 | if (soc_is_s5p6450()) |
137 | |||
138 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
139 | |||
140 | if (id == 0x50000) | ||
141 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | 138 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; |
142 | else | 139 | else |
143 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 140 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; |
diff --git a/arch/arm/mach-s5p64x0/gpiolib.c b/arch/arm/mach-s5p64x0/gpiolib.c index e7fb3b004e77..700dac6c43f3 100644 --- a/arch/arm/mach-s5p64x0/gpiolib.c +++ b/arch/arm/mach-s5p64x0/gpiolib.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <mach/regs-gpio.h> | 19 | #include <mach/regs-gpio.h> |
20 | #include <mach/regs-clock.h> | 20 | #include <mach/regs-clock.h> |
21 | 21 | ||
22 | #include <plat/cpu.h> | ||
22 | #include <plat/gpio-core.h> | 23 | #include <plat/gpio-core.h> |
23 | #include <plat/gpio-cfg.h> | 24 | #include <plat/gpio-cfg.h> |
24 | #include <plat/gpio-cfg-helpers.h> | 25 | #include <plat/gpio-cfg-helpers.h> |
@@ -473,14 +474,10 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip, | |||
473 | 474 | ||
474 | static int __init s5p64x0_gpiolib_init(void) | 475 | static int __init s5p64x0_gpiolib_init(void) |
475 | { | 476 | { |
476 | unsigned int chipid; | ||
477 | |||
478 | chipid = __raw_readl(S5P64X0_SYS_ID); | ||
479 | |||
480 | s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, | 477 | s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, |
481 | ARRAY_SIZE(s5p64x0_gpio_cfgs)); | 478 | ARRAY_SIZE(s5p64x0_gpio_cfgs)); |
482 | 479 | ||
483 | if ((chipid & 0xff000) == 0x50000) { | 480 | if (soc_is_s5p6450()) { |
484 | samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit, | 481 | samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit, |
485 | ARRAY_SIZE(s5p6450_gpio_2bit)); | 482 | ARRAY_SIZE(s5p6450_gpio_2bit)); |
486 | 483 | ||
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c index fe7380f5c3cd..494e1a8f6f6d 100644 --- a/arch/arm/mach-s5p64x0/irq-eint.c +++ b/arch/arm/mach-s5p64x0/irq-eint.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | 19 | ||
20 | #include <plat/cpu.h> | ||
20 | #include <plat/regs-irqtype.h> | 21 | #include <plat/regs-irqtype.h> |
21 | #include <plat/gpio-cfg.h> | 22 | #include <plat/gpio-cfg.h> |
22 | 23 | ||
@@ -67,7 +68,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) | |||
67 | __raw_writel(ctrl, S5P64X0_EINT0CON0); | 68 | __raw_writel(ctrl, S5P64X0_EINT0CON0); |
68 | 69 | ||
69 | /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ | 70 | /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ |
70 | if (0x50000 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000)) | 71 | if (soc_is_s5p6450()) |
71 | s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); | 72 | s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); |
72 | else | 73 | else |
73 | s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); | 74 | s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); |
diff --git a/arch/arm/mm/abort-macro.S b/arch/arm/mm/abort-macro.S index 52162d59407a..2cbf68ef0e83 100644 --- a/arch/arm/mm/abort-macro.S +++ b/arch/arm/mm/abort-macro.S | |||
@@ -17,7 +17,7 @@ | |||
17 | cmp \tmp, # 0x5600 @ Is it ldrsb? | 17 | cmp \tmp, # 0x5600 @ Is it ldrsb? |
18 | orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes | 18 | orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes |
19 | tst \tmp, #1 << 11 @ L = 0 -> write | 19 | tst \tmp, #1 << 11 @ L = 0 -> write |
20 | orreq \psr, \psr, #1 << 11 @ yes. | 20 | orreq \fsr, \fsr, #1 << 11 @ yes. |
21 | b do_DataAbort | 21 | b do_DataAbort |
22 | not_thumb: | 22 | not_thumb: |
23 | .endm | 23 | .endm |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 44c086710d2b..9ecfdb511951 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -277,6 +277,25 @@ static void l2x0_disable(void) | |||
277 | spin_unlock_irqrestore(&l2x0_lock, flags); | 277 | spin_unlock_irqrestore(&l2x0_lock, flags); |
278 | } | 278 | } |
279 | 279 | ||
280 | static void __init l2x0_unlock(__u32 cache_id) | ||
281 | { | ||
282 | int lockregs; | ||
283 | int i; | ||
284 | |||
285 | if (cache_id == L2X0_CACHE_ID_PART_L310) | ||
286 | lockregs = 8; | ||
287 | else | ||
288 | /* L210 and unknown types */ | ||
289 | lockregs = 1; | ||
290 | |||
291 | for (i = 0; i < lockregs; i++) { | ||
292 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE + | ||
293 | i * L2X0_LOCKDOWN_STRIDE); | ||
294 | writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + | ||
295 | i * L2X0_LOCKDOWN_STRIDE); | ||
296 | } | ||
297 | } | ||
298 | |||
280 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | 299 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) |
281 | { | 300 | { |
282 | __u32 aux; | 301 | __u32 aux; |
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
328 | * accessing the below registers will fault. | 347 | * accessing the below registers will fault. |
329 | */ | 348 | */ |
330 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { | 349 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { |
350 | /* Make sure that I&D is not locked down when starting */ | ||
351 | l2x0_unlock(cache_id); | ||
331 | 352 | ||
332 | /* l2x0 controller is disabled */ | 353 | /* l2x0 controller is disabled */ |
333 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); | 354 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 91bca355cd31..cc7e2d8be9aa 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -298,7 +298,7 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low, | |||
298 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID | 298 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID |
299 | int pfn_valid(unsigned long pfn) | 299 | int pfn_valid(unsigned long pfn) |
300 | { | 300 | { |
301 | return memblock_is_memory(pfn << PAGE_SHIFT); | 301 | return memblock_is_memory(__pfn_to_phys(pfn)); |
302 | } | 302 | } |
303 | EXPORT_SYMBOL(pfn_valid); | 303 | EXPORT_SYMBOL(pfn_valid); |
304 | #endif | 304 | #endif |
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 9a6a53854911..02609eee0562 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -615,6 +615,9 @@ static int _od_resume_noirq(struct device *dev) | |||
615 | 615 | ||
616 | return pm_generic_resume_noirq(dev); | 616 | return pm_generic_resume_noirq(dev); |
617 | } | 617 | } |
618 | #else | ||
619 | #define _od_suspend_noirq NULL | ||
620 | #define _od_resume_noirq NULL | ||
618 | #endif | 621 | #endif |
619 | 622 | ||
620 | static struct dev_pm_domain omap_device_pm_domain = { | 623 | static struct dev_pm_domain omap_device_pm_domain = { |
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index c1fc6c6fac72..3c6335307fb1 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -215,19 +215,18 @@ static void s3c24xx_pm_restart(char mode, const char *cmd) | |||
215 | 215 | ||
216 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 216 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
217 | { | 217 | { |
218 | unsigned long idcode = 0x0; | ||
219 | |||
220 | /* initialise the io descriptors we need for initialisation */ | 218 | /* initialise the io descriptors we need for initialisation */ |
221 | iotable_init(mach_desc, size); | 219 | iotable_init(mach_desc, size); |
222 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 220 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
223 | 221 | ||
224 | if (cpu_architecture() >= CPU_ARCH_ARMv5) { | 222 | if (cpu_architecture() >= CPU_ARCH_ARMv5) { |
225 | idcode = s3c24xx_read_idcode_v5(); | 223 | samsung_cpu_id = s3c24xx_read_idcode_v5(); |
226 | } else { | 224 | } else { |
227 | idcode = s3c24xx_read_idcode_v4(); | 225 | samsung_cpu_id = s3c24xx_read_idcode_v4(); |
228 | } | 226 | } |
227 | s3c24xx_init_cpu(); | ||
229 | 228 | ||
230 | arm_pm_restart = s3c24xx_pm_restart; | 229 | arm_pm_restart = s3c24xx_pm_restart; |
231 | 230 | ||
232 | s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); | 231 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); |
233 | } | 232 | } |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index bbc2aa7449ca..909507bae2fa 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -33,48 +33,57 @@ static const char name_s5p6450[] = "S5P6450"; | |||
33 | static const char name_s5pc100[] = "S5PC100"; | 33 | static const char name_s5pc100[] = "S5PC100"; |
34 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 34 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
35 | static const char name_exynos4210[] = "EXYNOS4210"; | 35 | static const char name_exynos4210[] = "EXYNOS4210"; |
36 | static const char name_exynos4212[] = "EXYNOS4212"; | ||
36 | 37 | ||
37 | static struct cpu_table cpu_ids[] __initdata = { | 38 | static struct cpu_table cpu_ids[] __initdata = { |
38 | { | 39 | { |
39 | .idcode = 0x56440100, | 40 | .idcode = S5P6440_CPU_ID, |
40 | .idmask = 0xfffff000, | 41 | .idmask = S5P64XX_CPU_MASK, |
41 | .map_io = s5p6440_map_io, | 42 | .map_io = s5p6440_map_io, |
42 | .init_clocks = s5p6440_init_clocks, | 43 | .init_clocks = s5p6440_init_clocks, |
43 | .init_uarts = s5p6440_init_uarts, | 44 | .init_uarts = s5p6440_init_uarts, |
44 | .init = s5p64x0_init, | 45 | .init = s5p64x0_init, |
45 | .name = name_s5p6440, | 46 | .name = name_s5p6440, |
46 | }, { | 47 | }, { |
47 | .idcode = 0x36450000, | 48 | .idcode = S5P6450_CPU_ID, |
48 | .idmask = 0xfffff000, | 49 | .idmask = S5P64XX_CPU_MASK, |
49 | .map_io = s5p6450_map_io, | 50 | .map_io = s5p6450_map_io, |
50 | .init_clocks = s5p6450_init_clocks, | 51 | .init_clocks = s5p6450_init_clocks, |
51 | .init_uarts = s5p6450_init_uarts, | 52 | .init_uarts = s5p6450_init_uarts, |
52 | .init = s5p64x0_init, | 53 | .init = s5p64x0_init, |
53 | .name = name_s5p6450, | 54 | .name = name_s5p6450, |
54 | }, { | 55 | }, { |
55 | .idcode = 0x43100000, | 56 | .idcode = S5PC100_CPU_ID, |
56 | .idmask = 0xfffff000, | 57 | .idmask = S5PC100_CPU_MASK, |
57 | .map_io = s5pc100_map_io, | 58 | .map_io = s5pc100_map_io, |
58 | .init_clocks = s5pc100_init_clocks, | 59 | .init_clocks = s5pc100_init_clocks, |
59 | .init_uarts = s5pc100_init_uarts, | 60 | .init_uarts = s5pc100_init_uarts, |
60 | .init = s5pc100_init, | 61 | .init = s5pc100_init, |
61 | .name = name_s5pc100, | 62 | .name = name_s5pc100, |
62 | }, { | 63 | }, { |
63 | .idcode = 0x43110000, | 64 | .idcode = S5PV210_CPU_ID, |
64 | .idmask = 0xfffff000, | 65 | .idmask = S5PV210_CPU_MASK, |
65 | .map_io = s5pv210_map_io, | 66 | .map_io = s5pv210_map_io, |
66 | .init_clocks = s5pv210_init_clocks, | 67 | .init_clocks = s5pv210_init_clocks, |
67 | .init_uarts = s5pv210_init_uarts, | 68 | .init_uarts = s5pv210_init_uarts, |
68 | .init = s5pv210_init, | 69 | .init = s5pv210_init, |
69 | .name = name_s5pv210, | 70 | .name = name_s5pv210, |
70 | }, { | 71 | }, { |
71 | .idcode = 0x43210000, | 72 | .idcode = EXYNOS4210_CPU_ID, |
72 | .idmask = 0xfffe0000, | 73 | .idmask = EXYNOS4_CPU_MASK, |
73 | .map_io = exynos4_map_io, | 74 | .map_io = exynos4_map_io, |
74 | .init_clocks = exynos4_init_clocks, | 75 | .init_clocks = exynos4_init_clocks, |
75 | .init_uarts = exynos4_init_uarts, | 76 | .init_uarts = exynos4_init_uarts, |
76 | .init = exynos4_init, | 77 | .init = exynos4_init, |
77 | .name = name_exynos4210, | 78 | .name = name_exynos4210, |
79 | }, { | ||
80 | .idcode = EXYNOS4212_CPU_ID, | ||
81 | .idmask = EXYNOS4_CPU_MASK, | ||
82 | .map_io = exynos4_map_io, | ||
83 | .init_clocks = exynos4_init_clocks, | ||
84 | .init_uarts = exynos4_init_uarts, | ||
85 | .init = exynos4_init, | ||
86 | .name = name_exynos4212, | ||
78 | }, | 87 | }, |
79 | }; | 88 | }; |
80 | 89 | ||
@@ -114,13 +123,13 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
114 | void __init s5p_init_io(struct map_desc *mach_desc, | 123 | void __init s5p_init_io(struct map_desc *mach_desc, |
115 | int size, void __iomem *cpuid_addr) | 124 | int size, void __iomem *cpuid_addr) |
116 | { | 125 | { |
117 | unsigned long idcode; | ||
118 | |||
119 | /* initialize the io descriptors we need for initialization */ | 126 | /* initialize the io descriptors we need for initialization */ |
120 | iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc)); | 127 | iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc)); |
121 | if (mach_desc) | 128 | if (mach_desc) |
122 | iotable_init(mach_desc, size); | 129 | iotable_init(mach_desc, size); |
123 | 130 | ||
124 | idcode = __raw_readl(cpuid_addr); | 131 | /* detect cpu id and rev. */ |
125 | s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); | 132 | s5p_init_cpu(cpuid_addr); |
133 | |||
134 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
126 | } | 135 | } |
diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-s5p/include/plat/exynos4.h index 907caab53dcf..f680a143e38c 100644 --- a/arch/arm/plat-s5p/include/plat/exynos4.h +++ b/arch/arm/plat-s5p/include/plat/exynos4.h | |||
@@ -14,10 +14,11 @@ | |||
14 | 14 | ||
15 | extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | 15 | extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
16 | extern void exynos4_register_clocks(void); | 16 | extern void exynos4_register_clocks(void); |
17 | extern void exynos4210_register_clocks(void); | ||
18 | extern void exynos4212_register_clocks(void); | ||
17 | extern void exynos4_setup_clocks(void); | 19 | extern void exynos4_setup_clocks(void); |
18 | 20 | ||
19 | #ifdef CONFIG_CPU_EXYNOS4210 | 21 | #ifdef CONFIG_ARCH_EXYNOS4 |
20 | |||
21 | extern int exynos4_init(void); | 22 | extern int exynos4_init(void); |
22 | extern void exynos4_init_irq(void); | 23 | extern void exynos4_init_irq(void); |
23 | extern void exynos4_map_io(void); | 24 | extern void exynos4_map_io(void); |
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h index bf28fadee7ae..1bfd61a4c8de 100644 --- a/arch/arm/plat-s5p/include/plat/pll.h +++ b/arch/arm/plat-s5p/include/plat/pll.h | |||
@@ -12,6 +12,59 @@ | |||
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <asm/div64.h> | ||
16 | |||
17 | #define PLL35XX_MDIV_MASK (0x3FF) | ||
18 | #define PLL35XX_PDIV_MASK (0x3F) | ||
19 | #define PLL35XX_SDIV_MASK (0x7) | ||
20 | #define PLL35XX_MDIV_SHIFT (16) | ||
21 | #define PLL35XX_PDIV_SHIFT (8) | ||
22 | #define PLL35XX_SDIV_SHIFT (0) | ||
23 | |||
24 | static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con) | ||
25 | { | ||
26 | u32 mdiv, pdiv, sdiv; | ||
27 | u64 fvco = baseclk; | ||
28 | |||
29 | mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK; | ||
30 | pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; | ||
31 | sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK; | ||
32 | |||
33 | fvco *= mdiv; | ||
34 | do_div(fvco, (pdiv << sdiv)); | ||
35 | |||
36 | return (unsigned long)fvco; | ||
37 | } | ||
38 | |||
39 | #define PLL36XX_KDIV_MASK (0xFFFF) | ||
40 | #define PLL36XX_MDIV_MASK (0x1FF) | ||
41 | #define PLL36XX_PDIV_MASK (0x3F) | ||
42 | #define PLL36XX_SDIV_MASK (0x7) | ||
43 | #define PLL36XX_MDIV_SHIFT (16) | ||
44 | #define PLL36XX_PDIV_SHIFT (8) | ||
45 | #define PLL36XX_SDIV_SHIFT (0) | ||
46 | |||
47 | static inline unsigned long s5p_get_pll36xx(unsigned long baseclk, | ||
48 | u32 pll_con0, u32 pll_con1) | ||
49 | { | ||
50 | unsigned long result; | ||
51 | u32 mdiv, pdiv, sdiv, kdiv; | ||
52 | u64 tmp; | ||
53 | |||
54 | mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; | ||
55 | pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; | ||
56 | sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK; | ||
57 | kdiv = pll_con1 & PLL36XX_KDIV_MASK; | ||
58 | |||
59 | tmp = baseclk; | ||
60 | |||
61 | tmp *= (mdiv << 16) + kdiv; | ||
62 | do_div(tmp, (pdiv << sdiv)); | ||
63 | result = tmp >> 16; | ||
64 | |||
65 | return result; | ||
66 | } | ||
67 | |||
15 | #define PLL45XX_MDIV_MASK (0x3FF) | 68 | #define PLL45XX_MDIV_MASK (0x3FF) |
16 | #define PLL45XX_PDIV_MASK (0x3F) | 69 | #define PLL45XX_PDIV_MASK (0x3F) |
17 | #define PLL45XX_SDIV_MASK (0x7) | 70 | #define PLL45XX_SDIV_MASK (0x7) |
@@ -19,8 +72,6 @@ | |||
19 | #define PLL45XX_PDIV_SHIFT (8) | 72 | #define PLL45XX_PDIV_SHIFT (8) |
20 | #define PLL45XX_SDIV_SHIFT (0) | 73 | #define PLL45XX_SDIV_SHIFT (0) |
21 | 74 | ||
22 | #include <asm/div64.h> | ||
23 | |||
24 | enum pll45xx_type_t { | 75 | enum pll45xx_type_t { |
25 | pll_4500, | 76 | pll_4500, |
26 | pll_4502, | 77 | pll_4502, |
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 853764ba8cc5..3de756da5eaa 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -11,7 +11,7 @@ obj- := | |||
11 | 11 | ||
12 | # Objects we always build independent of SoC choice | 12 | # Objects we always build independent of SoC choice |
13 | 13 | ||
14 | obj-y += init.o | 14 | obj-y += init.o cpu.o |
15 | obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o | 15 | obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o |
16 | obj-y += clock.o | 16 | obj-y += clock.o |
17 | obj-y += pwm-clock.o | 17 | obj-y += pwm-clock.o |
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index 302c42670bd1..3b4451979d1b 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c | |||
@@ -64,6 +64,17 @@ static LIST_HEAD(clocks); | |||
64 | */ | 64 | */ |
65 | DEFINE_SPINLOCK(clocks_lock); | 65 | DEFINE_SPINLOCK(clocks_lock); |
66 | 66 | ||
67 | /* Global watchdog clock used by arch_wtd_reset() callback */ | ||
68 | struct clk *s3c2410_wdtclk; | ||
69 | static int __init s3c_wdt_reset_init(void) | ||
70 | { | ||
71 | s3c2410_wdtclk = clk_get(NULL, "watchdog"); | ||
72 | if (IS_ERR(s3c2410_wdtclk)) | ||
73 | printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); | ||
74 | return 0; | ||
75 | } | ||
76 | arch_initcall(s3c_wdt_reset_init); | ||
77 | |||
67 | /* enable and disable calls for use with the clk struct */ | 78 | /* enable and disable calls for use with the clk struct */ |
68 | 79 | ||
69 | static int clk_null_enable(struct clk *clk, int enable) | 80 | static int clk_null_enable(struct clk *clk, int enable) |
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c new file mode 100644 index 000000000000..81c06d44c11e --- /dev/null +++ b/arch/arm/plat-samsung/cpu.c | |||
@@ -0,0 +1,58 @@ | |||
1 | /* linux/arch/arm/plat-samsung/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Samsung CPU Support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/io.h> | ||
17 | |||
18 | #include <asm/system.h> | ||
19 | |||
20 | #include <mach/map.h> | ||
21 | #include <plat/cpu.h> | ||
22 | |||
23 | unsigned long samsung_cpu_id; | ||
24 | static unsigned int samsung_cpu_rev; | ||
25 | |||
26 | unsigned int samsung_rev(void) | ||
27 | { | ||
28 | return samsung_cpu_rev; | ||
29 | } | ||
30 | EXPORT_SYMBOL(samsung_rev); | ||
31 | |||
32 | void __init s3c24xx_init_cpu(void) | ||
33 | { | ||
34 | /* nothing here yet */ | ||
35 | |||
36 | samsung_cpu_rev = 0; | ||
37 | } | ||
38 | |||
39 | void __init s3c64xx_init_cpu(void) | ||
40 | { | ||
41 | samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118); | ||
42 | if (!samsung_cpu_id) { | ||
43 | /* | ||
44 | * S3C6400 has the ID register in a different place, | ||
45 | * and needs a write before it can be read. | ||
46 | */ | ||
47 | __raw_writel(0x0, S3C_VA_SYS + 0xA1C); | ||
48 | samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0xA1C); | ||
49 | } | ||
50 | |||
51 | samsung_cpu_rev = 0; | ||
52 | } | ||
53 | |||
54 | void __init s5p_init_cpu(void __iomem *cpuid_addr) | ||
55 | { | ||
56 | samsung_cpu_id = __raw_readl(cpuid_addr); | ||
57 | samsung_cpu_rev = samsung_cpu_id & 0xFF; | ||
58 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index 87d5b38a86fb..73c66d4d10fa 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h | |||
@@ -9,6 +9,9 @@ | |||
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #ifndef __ASM_PLAT_CLOCK_H | ||
13 | #define __ASM_PLAT_CLOCK_H __FILE__ | ||
14 | |||
12 | #include <linux/spinlock.h> | 15 | #include <linux/spinlock.h> |
13 | #include <linux/clkdev.h> | 16 | #include <linux/clkdev.h> |
14 | 17 | ||
@@ -121,3 +124,8 @@ extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); | |||
121 | 124 | ||
122 | extern void s3c_pwmclk_init(void); | 125 | extern void s3c_pwmclk_init(void); |
123 | 126 | ||
127 | /* Global watchdog clock used by arch_wtd_reset() callback */ | ||
128 | |||
129 | extern struct clk *s3c2410_wdtclk; | ||
130 | |||
131 | #endif /* __ASM_PLAT_CLOCK_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index c0a5741b23e6..1bbbbb420be7 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -1,9 +1,12 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/cpu.h | 1 | /* linux/arch/arm/plat-samsung/include/plat/cpu.h |
2 | * | 2 | * |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
3 | * Copyright (c) 2004-2005 Simtec Electronics | 6 | * Copyright (c) 2004-2005 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 7 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | 8 | * |
6 | * Header file for S3C24XX CPU support | 9 | * Header file for Samsung CPU support |
7 | * | 10 | * |
8 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
@@ -15,6 +18,100 @@ | |||
15 | #ifndef __SAMSUNG_PLAT_CPU_H | 18 | #ifndef __SAMSUNG_PLAT_CPU_H |
16 | #define __SAMSUNG_PLAT_CPU_H | 19 | #define __SAMSUNG_PLAT_CPU_H |
17 | 20 | ||
21 | extern unsigned long samsung_cpu_id; | ||
22 | |||
23 | #define S3C24XX_CPU_ID 0x32400000 | ||
24 | #define S3C24XX_CPU_MASK 0xFFF00000 | ||
25 | |||
26 | #define S3C6400_CPU_ID 0x36400000 | ||
27 | #define S3C6410_CPU_ID 0x36410000 | ||
28 | #define S3C64XX_CPU_ID (S3C6400_CPU_ID & S3C6410_CPU_ID) | ||
29 | #define S3C64XX_CPU_MASK 0xFFFFF000 | ||
30 | |||
31 | #define S5P6440_CPU_ID 0x56440000 | ||
32 | #define S5P6450_CPU_ID 0x36450000 | ||
33 | #define S5P64XX_CPU_MASK 0xFFFFF000 | ||
34 | |||
35 | #define S5PC100_CPU_ID 0x43100000 | ||
36 | #define S5PC100_CPU_MASK 0xFFFFF000 | ||
37 | |||
38 | #define S5PV210_CPU_ID 0x43110000 | ||
39 | #define S5PV210_CPU_MASK 0xFFFFF000 | ||
40 | |||
41 | #define EXYNOS4210_CPU_ID 0x43210000 | ||
42 | #define EXYNOS4212_CPU_ID 0x43220000 | ||
43 | #define EXYNOS4_CPU_MASK 0xFFFE0000 | ||
44 | |||
45 | #define IS_SAMSUNG_CPU(name, id, mask) \ | ||
46 | static inline int is_samsung_##name(void) \ | ||
47 | { \ | ||
48 | return ((samsung_cpu_id & mask) == (id & mask)); \ | ||
49 | } | ||
50 | |||
51 | IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) | ||
52 | IS_SAMSUNG_CPU(s3c64xx, S3C64XX_CPU_ID, S3C64XX_CPU_MASK) | ||
53 | IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) | ||
54 | IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) | ||
55 | IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) | ||
56 | IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) | ||
57 | IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) | ||
58 | IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK) | ||
59 | |||
60 | #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ | ||
61 | defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ | ||
62 | defined(CONFIG_CPU_S3C2442) || defined(CONFIG_CPU_S3C244X) || \ | ||
63 | defined(CONFIG_CPU_S3C2443) | ||
64 | # define soc_is_s3c24xx() is_samsung_s3c24xx() | ||
65 | #else | ||
66 | # define soc_is_s3c24xx() 0 | ||
67 | #endif | ||
68 | |||
69 | #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) | ||
70 | # define soc_is_s3c64xx() is_samsung_s3c64xx() | ||
71 | #else | ||
72 | # define soc_is_s3c64xx() 0 | ||
73 | #endif | ||
74 | |||
75 | #if defined(CONFIG_CPU_S5P6440) | ||
76 | # define soc_is_s5p6440() is_samsung_s5p6440() | ||
77 | #else | ||
78 | # define soc_is_s5p6440() 0 | ||
79 | #endif | ||
80 | |||
81 | #if defined(CONFIG_CPU_S5P6450) | ||
82 | # define soc_is_s5p6450() is_samsung_s5p6450() | ||
83 | #else | ||
84 | # define soc_is_s5p6450() 0 | ||
85 | #endif | ||
86 | |||
87 | #if defined(CONFIG_CPU_S5PC100) | ||
88 | # define soc_is_s5pc100() is_samsung_s5pc100() | ||
89 | #else | ||
90 | # define soc_is_s5pc100() 0 | ||
91 | #endif | ||
92 | |||
93 | #if defined(CONFIG_CPU_S5PV210) | ||
94 | # define soc_is_s5pv210() is_samsung_s5pv210() | ||
95 | #else | ||
96 | # define soc_is_s5pv210() 0 | ||
97 | #endif | ||
98 | |||
99 | #if defined(CONFIG_CPU_EXYNOS4210) | ||
100 | # define soc_is_exynos4210() is_samsung_exynos4210() | ||
101 | #else | ||
102 | # define soc_is_exynos4210() 0 | ||
103 | #endif | ||
104 | |||
105 | #if defined(CONFIG_SOC_EXYNOS4212) | ||
106 | # define soc_is_exynos4212() is_samsung_exynos4212() | ||
107 | #else | ||
108 | # define soc_is_exynos4212() 0 | ||
109 | #endif | ||
110 | |||
111 | #define EXYNOS4210_REV_0 (0x0) | ||
112 | #define EXYNOS4210_REV_1_0 (0x10) | ||
113 | #define EXYNOS4210_REV_1_1 (0x11) | ||
114 | |||
18 | #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } | 115 | #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } |
19 | 116 | ||
20 | #ifndef MHZ | 117 | #ifndef MHZ |
@@ -55,6 +152,12 @@ extern void s3c64xx_init_io(struct map_desc *mach_desc, int size); | |||
55 | extern void s5p_init_io(struct map_desc *mach_desc, | 152 | extern void s5p_init_io(struct map_desc *mach_desc, |
56 | int size, void __iomem *cpuid_addr); | 153 | int size, void __iomem *cpuid_addr); |
57 | 154 | ||
155 | extern void s3c24xx_init_cpu(void); | ||
156 | extern void s3c64xx_init_cpu(void); | ||
157 | extern void s5p_init_cpu(void __iomem *cpuid_addr); | ||
158 | |||
159 | extern unsigned int samsung_rev(void); | ||
160 | |||
58 | extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); | 161 | extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
59 | 162 | ||
60 | extern void s3c24xx_init_clocks(int xtal); | 163 | extern void s3c24xx_init_clocks(int xtal); |
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h index 54b762acb5a0..40dbb2b0ae22 100644 --- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h +++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h | |||
@@ -10,6 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <plat/clock.h> | ||
13 | #include <plat/regs-watchdog.h> | 14 | #include <plat/regs-watchdog.h> |
14 | #include <mach/map.h> | 15 | #include <mach/map.h> |
15 | 16 | ||
@@ -19,17 +20,12 @@ | |||
19 | 20 | ||
20 | static inline void arch_wdt_reset(void) | 21 | static inline void arch_wdt_reset(void) |
21 | { | 22 | { |
22 | struct clk *wdtclk; | ||
23 | |||
24 | printk("arch_reset: attempting watchdog reset\n"); | 23 | printk("arch_reset: attempting watchdog reset\n"); |
25 | 24 | ||
26 | __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ | 25 | __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ |
27 | 26 | ||
28 | wdtclk = clk_get(NULL, "watchdog"); | 27 | if (s3c2410_wdtclk) |
29 | if (!IS_ERR(wdtclk)) { | 28 | clk_enable(s3c2410_wdtclk); |
30 | clk_enable(wdtclk); | ||
31 | } else | ||
32 | printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); | ||
33 | 29 | ||
34 | /* put initial values into count and data */ | 30 | /* put initial values into count and data */ |
35 | __raw_writel(0x80, S3C2410_WTCNT); | 31 | __raw_writel(0x80, S3C2410_WTCNT); |
diff --git a/arch/openrisc/include/asm/dma-mapping.h b/arch/openrisc/include/asm/dma-mapping.h index 052f877b52a5..60b472233900 100644 --- a/arch/openrisc/include/asm/dma-mapping.h +++ b/arch/openrisc/include/asm/dma-mapping.h | |||
@@ -31,7 +31,6 @@ | |||
31 | 31 | ||
32 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) | 32 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) |
33 | 33 | ||
34 | int dma_mapping_error(struct device *dev, dma_addr_t dma_addr); | ||
35 | 34 | ||
36 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | 35 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
37 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | 36 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
@@ -47,6 +46,12 @@ dma_addr_t or1k_map_page(struct device *dev, struct page *page, | |||
47 | void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle, | 46 | void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle, |
48 | size_t size, enum dma_data_direction dir, | 47 | size_t size, enum dma_data_direction dir, |
49 | struct dma_attrs *attrs); | 48 | struct dma_attrs *attrs); |
49 | int or1k_map_sg(struct device *dev, struct scatterlist *sg, | ||
50 | int nents, enum dma_data_direction dir, | ||
51 | struct dma_attrs *attrs); | ||
52 | void or1k_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
53 | int nents, enum dma_data_direction dir, | ||
54 | struct dma_attrs *attrs); | ||
50 | void or1k_sync_single_for_cpu(struct device *dev, | 55 | void or1k_sync_single_for_cpu(struct device *dev, |
51 | dma_addr_t dma_handle, size_t size, | 56 | dma_addr_t dma_handle, size_t size, |
52 | enum dma_data_direction dir); | 57 | enum dma_data_direction dir); |
@@ -98,6 +103,51 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, | |||
98 | debug_dma_unmap_page(dev, addr, size, dir, true); | 103 | debug_dma_unmap_page(dev, addr, size, dir, true); |
99 | } | 104 | } |
100 | 105 | ||
106 | static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, | ||
107 | int nents, enum dma_data_direction dir) | ||
108 | { | ||
109 | int i, ents; | ||
110 | struct scatterlist *s; | ||
111 | |||
112 | for_each_sg(sg, s, nents, i) | ||
113 | kmemcheck_mark_initialized(sg_virt(s), s->length); | ||
114 | BUG_ON(!valid_dma_direction(dir)); | ||
115 | ents = or1k_map_sg(dev, sg, nents, dir, NULL); | ||
116 | debug_dma_map_sg(dev, sg, nents, ents, dir); | ||
117 | |||
118 | return ents; | ||
119 | } | ||
120 | |||
121 | static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
122 | int nents, enum dma_data_direction dir) | ||
123 | { | ||
124 | BUG_ON(!valid_dma_direction(dir)); | ||
125 | debug_dma_unmap_sg(dev, sg, nents, dir); | ||
126 | or1k_unmap_sg(dev, sg, nents, dir, NULL); | ||
127 | } | ||
128 | |||
129 | static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
130 | size_t offset, size_t size, | ||
131 | enum dma_data_direction dir) | ||
132 | { | ||
133 | dma_addr_t addr; | ||
134 | |||
135 | kmemcheck_mark_initialized(page_address(page) + offset, size); | ||
136 | BUG_ON(!valid_dma_direction(dir)); | ||
137 | addr = or1k_map_page(dev, page, offset, size, dir, NULL); | ||
138 | debug_dma_map_page(dev, page, offset, size, dir, addr, false); | ||
139 | |||
140 | return addr; | ||
141 | } | ||
142 | |||
143 | static inline void dma_unmap_page(struct device *dev, dma_addr_t addr, | ||
144 | size_t size, enum dma_data_direction dir) | ||
145 | { | ||
146 | BUG_ON(!valid_dma_direction(dir)); | ||
147 | or1k_unmap_page(dev, addr, size, dir, NULL); | ||
148 | debug_dma_unmap_page(dev, addr, size, dir, true); | ||
149 | } | ||
150 | |||
101 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, | 151 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
102 | size_t size, | 152 | size_t size, |
103 | enum dma_data_direction dir) | 153 | enum dma_data_direction dir) |
@@ -119,7 +169,12 @@ static inline void dma_sync_single_for_device(struct device *dev, | |||
119 | static inline int dma_supported(struct device *dev, u64 dma_mask) | 169 | static inline int dma_supported(struct device *dev, u64 dma_mask) |
120 | { | 170 | { |
121 | /* Support 32 bit DMA mask exclusively */ | 171 | /* Support 32 bit DMA mask exclusively */ |
122 | return dma_mask == 0xffffffffULL; | 172 | return dma_mask == DMA_BIT_MASK(32); |
173 | } | ||
174 | |||
175 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | ||
176 | { | ||
177 | return 0; | ||
123 | } | 178 | } |
124 | 179 | ||
125 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) | 180 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) |
diff --git a/arch/openrisc/include/asm/sigcontext.h b/arch/openrisc/include/asm/sigcontext.h index 54a5c50132e3..b79c2b19afbe 100644 --- a/arch/openrisc/include/asm/sigcontext.h +++ b/arch/openrisc/include/asm/sigcontext.h | |||
@@ -23,16 +23,11 @@ | |||
23 | 23 | ||
24 | /* This struct is saved by setup_frame in signal.c, to keep the current | 24 | /* This struct is saved by setup_frame in signal.c, to keep the current |
25 | context while a signal handler is executed. It's restored by sys_sigreturn. | 25 | context while a signal handler is executed. It's restored by sys_sigreturn. |
26 | |||
27 | To keep things simple, we use pt_regs here even though normally you just | ||
28 | specify the list of regs to save. Then we can use copy_from_user on the | ||
29 | entire regs instead of a bunch of get_user's as well... | ||
30 | */ | 26 | */ |
31 | 27 | ||
32 | struct sigcontext { | 28 | struct sigcontext { |
33 | struct pt_regs regs; /* needs to be first */ | 29 | struct user_regs_struct regs; /* needs to be first */ |
34 | unsigned long oldmask; | 30 | unsigned long oldmask; |
35 | unsigned long usp; /* usp before stacking this gunk on it */ | ||
36 | }; | 31 | }; |
37 | 32 | ||
38 | #endif /* __ASM_OPENRISC_SIGCONTEXT_H */ | 33 | #endif /* __ASM_OPENRISC_SIGCONTEXT_H */ |
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c index 968d3ee477e3..f1c8ee2895d0 100644 --- a/arch/openrisc/kernel/dma.c +++ b/arch/openrisc/kernel/dma.c | |||
@@ -154,6 +154,33 @@ void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle, | |||
154 | /* Nothing special to do here... */ | 154 | /* Nothing special to do here... */ |
155 | } | 155 | } |
156 | 156 | ||
157 | int or1k_map_sg(struct device *dev, struct scatterlist *sg, | ||
158 | int nents, enum dma_data_direction dir, | ||
159 | struct dma_attrs *attrs) | ||
160 | { | ||
161 | struct scatterlist *s; | ||
162 | int i; | ||
163 | |||
164 | for_each_sg(sg, s, nents, i) { | ||
165 | s->dma_address = or1k_map_page(dev, sg_page(s), s->offset, | ||
166 | s->length, dir, NULL); | ||
167 | } | ||
168 | |||
169 | return nents; | ||
170 | } | ||
171 | |||
172 | void or1k_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
173 | int nents, enum dma_data_direction dir, | ||
174 | struct dma_attrs *attrs) | ||
175 | { | ||
176 | struct scatterlist *s; | ||
177 | int i; | ||
178 | |||
179 | for_each_sg(sg, s, nents, i) { | ||
180 | or1k_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, NULL); | ||
181 | } | ||
182 | } | ||
183 | |||
157 | void or1k_sync_single_for_cpu(struct device *dev, | 184 | void or1k_sync_single_for_cpu(struct device *dev, |
158 | dma_addr_t dma_handle, size_t size, | 185 | dma_addr_t dma_handle, size_t size, |
159 | enum dma_data_direction dir) | 186 | enum dma_data_direction dir) |
@@ -187,5 +214,4 @@ static int __init dma_init(void) | |||
187 | 214 | ||
188 | return 0; | 215 | return 0; |
189 | } | 216 | } |
190 | |||
191 | fs_initcall(dma_init); | 217 | fs_initcall(dma_init); |
diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c index 5f759c76834e..95207ab0c99e 100644 --- a/arch/openrisc/kernel/signal.c +++ b/arch/openrisc/kernel/signal.c | |||
@@ -52,31 +52,25 @@ struct rt_sigframe { | |||
52 | static int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc) | 52 | static int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc) |
53 | { | 53 | { |
54 | unsigned int err = 0; | 54 | unsigned int err = 0; |
55 | unsigned long old_usp; | ||
56 | 55 | ||
57 | /* Alwys make any pending restarted system call return -EINTR */ | 56 | /* Alwys make any pending restarted system call return -EINTR */ |
58 | current_thread_info()->restart_block.fn = do_no_restart_syscall; | 57 | current_thread_info()->restart_block.fn = do_no_restart_syscall; |
59 | 58 | ||
60 | /* restore the regs from &sc->regs (same as sc, since regs is first) | 59 | /* |
60 | * Restore the regs from &sc->regs. | ||
61 | * (sc is already checked for VERIFY_READ since the sigframe was | 61 | * (sc is already checked for VERIFY_READ since the sigframe was |
62 | * checked in sys_sigreturn previously) | 62 | * checked in sys_sigreturn previously) |
63 | */ | 63 | */ |
64 | 64 | if (__copy_from_user(regs, sc->regs.gpr, 32 * sizeof(unsigned long))) | |
65 | if (__copy_from_user(regs, sc, sizeof(struct pt_regs))) | 65 | goto badframe; |
66 | if (__copy_from_user(®s->pc, &sc->regs.pc, sizeof(unsigned long))) | ||
67 | goto badframe; | ||
68 | if (__copy_from_user(®s->sr, &sc->regs.sr, sizeof(unsigned long))) | ||
66 | goto badframe; | 69 | goto badframe; |
67 | 70 | ||
68 | /* make sure the SM-bit is cleared so user-mode cannot fool us */ | 71 | /* make sure the SM-bit is cleared so user-mode cannot fool us */ |
69 | regs->sr &= ~SPR_SR_SM; | 72 | regs->sr &= ~SPR_SR_SM; |
70 | 73 | ||
71 | /* restore the old USP as it was before we stacked the sc etc. | ||
72 | * (we cannot just pop the sigcontext since we aligned the sp and | ||
73 | * stuff after pushing it) | ||
74 | */ | ||
75 | |||
76 | err |= __get_user(old_usp, &sc->usp); | ||
77 | |||
78 | regs->sp = old_usp; | ||
79 | |||
80 | /* TODO: the other ports use regs->orig_XX to disable syscall checks | 74 | /* TODO: the other ports use regs->orig_XX to disable syscall checks |
81 | * after this completes, but we don't use that mechanism. maybe we can | 75 | * after this completes, but we don't use that mechanism. maybe we can |
82 | * use it now ? | 76 | * use it now ? |
@@ -137,18 +131,17 @@ static int setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, | |||
137 | unsigned long mask) | 131 | unsigned long mask) |
138 | { | 132 | { |
139 | int err = 0; | 133 | int err = 0; |
140 | unsigned long usp = regs->sp; | ||
141 | 134 | ||
142 | /* copy the regs. they are first in sc so we can use sc directly */ | 135 | /* copy the regs */ |
143 | 136 | ||
144 | err |= __copy_to_user(sc, regs, sizeof(struct pt_regs)); | 137 | err |= __copy_to_user(sc->regs.gpr, regs, 32 * sizeof(unsigned long)); |
138 | err |= __copy_to_user(&sc->regs.pc, ®s->pc, sizeof(unsigned long)); | ||
139 | err |= __copy_to_user(&sc->regs.sr, ®s->sr, sizeof(unsigned long)); | ||
145 | 140 | ||
146 | /* then some other stuff */ | 141 | /* then some other stuff */ |
147 | 142 | ||
148 | err |= __put_user(mask, &sc->oldmask); | 143 | err |= __put_user(mask, &sc->oldmask); |
149 | 144 | ||
150 | err |= __put_user(usp, &sc->usp); | ||
151 | |||
152 | return err; | 145 | return err; |
153 | } | 146 | } |
154 | 147 | ||
diff --git a/arch/x86/include/asm/pvclock.h b/arch/x86/include/asm/pvclock.h index a518c0a45044..c59cc97fe6c1 100644 --- a/arch/x86/include/asm/pvclock.h +++ b/arch/x86/include/asm/pvclock.h | |||
@@ -44,7 +44,7 @@ static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift) | |||
44 | : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) ); | 44 | : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) ); |
45 | #elif defined(__x86_64__) | 45 | #elif defined(__x86_64__) |
46 | __asm__ ( | 46 | __asm__ ( |
47 | "mul %[mul_frac] ; shrd $32, %[hi], %[lo]" | 47 | "mulq %[mul_frac] ; shrd $32, %[hi], %[lo]" |
48 | : [lo]"=a"(product), | 48 | : [lo]"=a"(product), |
49 | [hi]"=d"(tmp) | 49 | [hi]"=d"(tmp) |
50 | : "0"(delta), | 50 | : "0"(delta), |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 4ee3abf20ed6..cfa62ec090ec 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -1900,6 +1900,9 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs) | |||
1900 | 1900 | ||
1901 | perf_callchain_store(entry, regs->ip); | 1901 | perf_callchain_store(entry, regs->ip); |
1902 | 1902 | ||
1903 | if (!current->mm) | ||
1904 | return; | ||
1905 | |||
1903 | if (perf_callchain_user32(regs, entry)) | 1906 | if (perf_callchain_user32(regs, entry)) |
1904 | return; | 1907 | return; |
1905 | 1908 | ||
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index c95330267f08..039d91315bc5 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c | |||
@@ -365,8 +365,13 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) | |||
365 | */ | 365 | */ |
366 | if (bus) { | 366 | if (bus) { |
367 | struct pci_bus *child; | 367 | struct pci_bus *child; |
368 | list_for_each_entry(child, &bus->children, node) | 368 | list_for_each_entry(child, &bus->children, node) { |
369 | pcie_bus_configure_settings(child, child->self->pcie_mpss); | 369 | struct pci_dev *self = child->self; |
370 | if (!self) | ||
371 | continue; | ||
372 | |||
373 | pcie_bus_configure_settings(child, self->pcie_mpss); | ||
374 | } | ||
370 | } | 375 | } |
371 | 376 | ||
372 | if (!bus) | 377 | if (!bus) |
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index df118a825f39..c3b8d440873c 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c | |||
@@ -184,6 +184,19 @@ static unsigned long __init xen_set_identity(const struct e820entry *list, | |||
184 | PFN_UP(start_pci), PFN_DOWN(last)); | 184 | PFN_UP(start_pci), PFN_DOWN(last)); |
185 | return identity; | 185 | return identity; |
186 | } | 186 | } |
187 | |||
188 | static unsigned long __init xen_get_max_pages(void) | ||
189 | { | ||
190 | unsigned long max_pages = MAX_DOMAIN_PAGES; | ||
191 | domid_t domid = DOMID_SELF; | ||
192 | int ret; | ||
193 | |||
194 | ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid); | ||
195 | if (ret > 0) | ||
196 | max_pages = ret; | ||
197 | return min(max_pages, MAX_DOMAIN_PAGES); | ||
198 | } | ||
199 | |||
187 | /** | 200 | /** |
188 | * machine_specific_memory_setup - Hook for machine specific memory setup. | 201 | * machine_specific_memory_setup - Hook for machine specific memory setup. |
189 | **/ | 202 | **/ |
@@ -292,6 +305,12 @@ char * __init xen_memory_setup(void) | |||
292 | 305 | ||
293 | sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); | 306 | sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); |
294 | 307 | ||
308 | extra_limit = xen_get_max_pages(); | ||
309 | if (extra_limit >= max_pfn) | ||
310 | extra_pages = extra_limit - max_pfn; | ||
311 | else | ||
312 | extra_pages = 0; | ||
313 | |||
295 | extra_pages += xen_return_unused_memory(xen_start_info->nr_pages, &e820); | 314 | extra_pages += xen_return_unused_memory(xen_start_info->nr_pages, &e820); |
296 | 315 | ||
297 | /* | 316 | /* |
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c index e79dbb95482b..d4fc6d454f8d 100644 --- a/arch/x86/xen/smp.c +++ b/arch/x86/xen/smp.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <xen/page.h> | 32 | #include <xen/page.h> |
33 | #include <xen/events.h> | 33 | #include <xen/events.h> |
34 | 34 | ||
35 | #include <xen/hvc-console.h> | ||
35 | #include "xen-ops.h" | 36 | #include "xen-ops.h" |
36 | #include "mmu.h" | 37 | #include "mmu.h" |
37 | 38 | ||
@@ -207,6 +208,15 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus) | |||
207 | unsigned cpu; | 208 | unsigned cpu; |
208 | unsigned int i; | 209 | unsigned int i; |
209 | 210 | ||
211 | if (skip_ioapic_setup) { | ||
212 | char *m = (max_cpus == 0) ? | ||
213 | "The nosmp parameter is incompatible with Xen; " \ | ||
214 | "use Xen dom0_max_vcpus=1 parameter" : | ||
215 | "The noapic parameter is incompatible with Xen"; | ||
216 | |||
217 | xen_raw_printk(m); | ||
218 | panic(m); | ||
219 | } | ||
210 | xen_init_lock_cpu(0); | 220 | xen_init_lock_cpu(0); |
211 | 221 | ||
212 | smp_store_cpu_info(0); | 222 | smp_store_cpu_info(0); |
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S index 22a2093b5862..b040b0e518ca 100644 --- a/arch/x86/xen/xen-asm_32.S +++ b/arch/x86/xen/xen-asm_32.S | |||
@@ -113,11 +113,13 @@ xen_iret_start_crit: | |||
113 | 113 | ||
114 | /* | 114 | /* |
115 | * If there's something pending, mask events again so we can | 115 | * If there's something pending, mask events again so we can |
116 | * jump back into xen_hypervisor_callback | 116 | * jump back into xen_hypervisor_callback. Otherwise do not |
117 | * touch XEN_vcpu_info_mask. | ||
117 | */ | 118 | */ |
118 | sete XEN_vcpu_info_mask(%eax) | 119 | jne 1f |
120 | movb $1, XEN_vcpu_info_mask(%eax) | ||
119 | 121 | ||
120 | popl %eax | 122 | 1: popl %eax |
121 | 123 | ||
122 | /* | 124 | /* |
123 | * From this point on the registers are restored and the stack | 125 | * From this point on the registers are restored and the stack |
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 0eef4da1ac61..20663f8dae45 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c | |||
@@ -168,13 +168,11 @@ struct regmap *regmap_init(struct device *dev, | |||
168 | map->work_buf = kmalloc(map->format.buf_size, GFP_KERNEL); | 168 | map->work_buf = kmalloc(map->format.buf_size, GFP_KERNEL); |
169 | if (map->work_buf == NULL) { | 169 | if (map->work_buf == NULL) { |
170 | ret = -ENOMEM; | 170 | ret = -ENOMEM; |
171 | goto err_bus; | 171 | goto err_map; |
172 | } | 172 | } |
173 | 173 | ||
174 | return map; | 174 | return map; |
175 | 175 | ||
176 | err_bus: | ||
177 | module_put(map->bus->owner); | ||
178 | err_map: | 176 | err_map: |
179 | kfree(map); | 177 | kfree(map); |
180 | err: | 178 | err: |
@@ -188,7 +186,6 @@ EXPORT_SYMBOL_GPL(regmap_init); | |||
188 | void regmap_exit(struct regmap *map) | 186 | void regmap_exit(struct regmap *map) |
189 | { | 187 | { |
190 | kfree(map->work_buf); | 188 | kfree(map->work_buf); |
191 | module_put(map->bus->owner); | ||
192 | kfree(map); | 189 | kfree(map); |
193 | } | 190 | } |
194 | EXPORT_SYMBOL_GPL(regmap_exit); | 191 | EXPORT_SYMBOL_GPL(regmap_exit); |
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index cd3a7c726bf8..467e4dcb20a0 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c | |||
@@ -174,8 +174,10 @@ struct d40_base; | |||
174 | * @tasklet: Tasklet that gets scheduled from interrupt context to complete a | 174 | * @tasklet: Tasklet that gets scheduled from interrupt context to complete a |
175 | * transfer and call client callback. | 175 | * transfer and call client callback. |
176 | * @client: Cliented owned descriptor list. | 176 | * @client: Cliented owned descriptor list. |
177 | * @pending_queue: Submitted jobs, to be issued by issue_pending() | ||
177 | * @active: Active descriptor. | 178 | * @active: Active descriptor. |
178 | * @queue: Queued jobs. | 179 | * @queue: Queued jobs. |
180 | * @prepare_queue: Prepared jobs. | ||
179 | * @dma_cfg: The client configuration of this dma channel. | 181 | * @dma_cfg: The client configuration of this dma channel. |
180 | * @configured: whether the dma_cfg configuration is valid | 182 | * @configured: whether the dma_cfg configuration is valid |
181 | * @base: Pointer to the device instance struct. | 183 | * @base: Pointer to the device instance struct. |
@@ -203,6 +205,7 @@ struct d40_chan { | |||
203 | struct list_head pending_queue; | 205 | struct list_head pending_queue; |
204 | struct list_head active; | 206 | struct list_head active; |
205 | struct list_head queue; | 207 | struct list_head queue; |
208 | struct list_head prepare_queue; | ||
206 | struct stedma40_chan_cfg dma_cfg; | 209 | struct stedma40_chan_cfg dma_cfg; |
207 | bool configured; | 210 | bool configured; |
208 | struct d40_base *base; | 211 | struct d40_base *base; |
@@ -477,7 +480,6 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c) | |||
477 | 480 | ||
478 | list_for_each_entry_safe(d, _d, &d40c->client, node) | 481 | list_for_each_entry_safe(d, _d, &d40c->client, node) |
479 | if (async_tx_test_ack(&d->txd)) { | 482 | if (async_tx_test_ack(&d->txd)) { |
480 | d40_pool_lli_free(d40c, d); | ||
481 | d40_desc_remove(d); | 483 | d40_desc_remove(d); |
482 | desc = d; | 484 | desc = d; |
483 | memset(desc, 0, sizeof(*desc)); | 485 | memset(desc, 0, sizeof(*desc)); |
@@ -644,8 +646,11 @@ static struct d40_desc *d40_first_active_get(struct d40_chan *d40c) | |||
644 | return d; | 646 | return d; |
645 | } | 647 | } |
646 | 648 | ||
649 | /* remove desc from current queue and add it to the pending_queue */ | ||
647 | static void d40_desc_queue(struct d40_chan *d40c, struct d40_desc *desc) | 650 | static void d40_desc_queue(struct d40_chan *d40c, struct d40_desc *desc) |
648 | { | 651 | { |
652 | d40_desc_remove(desc); | ||
653 | desc->is_in_client_list = false; | ||
649 | list_add_tail(&desc->node, &d40c->pending_queue); | 654 | list_add_tail(&desc->node, &d40c->pending_queue); |
650 | } | 655 | } |
651 | 656 | ||
@@ -803,6 +808,7 @@ done: | |||
803 | static void d40_term_all(struct d40_chan *d40c) | 808 | static void d40_term_all(struct d40_chan *d40c) |
804 | { | 809 | { |
805 | struct d40_desc *d40d; | 810 | struct d40_desc *d40d; |
811 | struct d40_desc *_d; | ||
806 | 812 | ||
807 | /* Release active descriptors */ | 813 | /* Release active descriptors */ |
808 | while ((d40d = d40_first_active_get(d40c))) { | 814 | while ((d40d = d40_first_active_get(d40c))) { |
@@ -822,6 +828,21 @@ static void d40_term_all(struct d40_chan *d40c) | |||
822 | d40_desc_free(d40c, d40d); | 828 | d40_desc_free(d40c, d40d); |
823 | } | 829 | } |
824 | 830 | ||
831 | /* Release client owned descriptors */ | ||
832 | if (!list_empty(&d40c->client)) | ||
833 | list_for_each_entry_safe(d40d, _d, &d40c->client, node) { | ||
834 | d40_desc_remove(d40d); | ||
835 | d40_desc_free(d40c, d40d); | ||
836 | } | ||
837 | |||
838 | /* Release descriptors in prepare queue */ | ||
839 | if (!list_empty(&d40c->prepare_queue)) | ||
840 | list_for_each_entry_safe(d40d, _d, | ||
841 | &d40c->prepare_queue, node) { | ||
842 | d40_desc_remove(d40d); | ||
843 | d40_desc_free(d40c, d40d); | ||
844 | } | ||
845 | |||
825 | d40c->pending_tx = 0; | 846 | d40c->pending_tx = 0; |
826 | d40c->busy = false; | 847 | d40c->busy = false; |
827 | } | 848 | } |
@@ -1208,7 +1229,6 @@ static void dma_tasklet(unsigned long data) | |||
1208 | 1229 | ||
1209 | if (!d40d->cyclic) { | 1230 | if (!d40d->cyclic) { |
1210 | if (async_tx_test_ack(&d40d->txd)) { | 1231 | if (async_tx_test_ack(&d40d->txd)) { |
1211 | d40_pool_lli_free(d40c, d40d); | ||
1212 | d40_desc_remove(d40d); | 1232 | d40_desc_remove(d40d); |
1213 | d40_desc_free(d40c, d40d); | 1233 | d40_desc_free(d40c, d40d); |
1214 | } else { | 1234 | } else { |
@@ -1595,21 +1615,10 @@ static int d40_free_dma(struct d40_chan *d40c) | |||
1595 | u32 event; | 1615 | u32 event; |
1596 | struct d40_phy_res *phy = d40c->phy_chan; | 1616 | struct d40_phy_res *phy = d40c->phy_chan; |
1597 | bool is_src; | 1617 | bool is_src; |
1598 | struct d40_desc *d; | ||
1599 | struct d40_desc *_d; | ||
1600 | |||
1601 | 1618 | ||
1602 | /* Terminate all queued and active transfers */ | 1619 | /* Terminate all queued and active transfers */ |
1603 | d40_term_all(d40c); | 1620 | d40_term_all(d40c); |
1604 | 1621 | ||
1605 | /* Release client owned descriptors */ | ||
1606 | if (!list_empty(&d40c->client)) | ||
1607 | list_for_each_entry_safe(d, _d, &d40c->client, node) { | ||
1608 | d40_pool_lli_free(d40c, d); | ||
1609 | d40_desc_remove(d); | ||
1610 | d40_desc_free(d40c, d); | ||
1611 | } | ||
1612 | |||
1613 | if (phy == NULL) { | 1622 | if (phy == NULL) { |
1614 | chan_err(d40c, "phy == null\n"); | 1623 | chan_err(d40c, "phy == null\n"); |
1615 | return -EINVAL; | 1624 | return -EINVAL; |
@@ -1911,6 +1920,12 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, | |||
1911 | goto err; | 1920 | goto err; |
1912 | } | 1921 | } |
1913 | 1922 | ||
1923 | /* | ||
1924 | * add descriptor to the prepare queue in order to be able | ||
1925 | * to free them later in terminate_all | ||
1926 | */ | ||
1927 | list_add_tail(&desc->node, &chan->prepare_queue); | ||
1928 | |||
1914 | spin_unlock_irqrestore(&chan->lock, flags); | 1929 | spin_unlock_irqrestore(&chan->lock, flags); |
1915 | 1930 | ||
1916 | return &desc->txd; | 1931 | return &desc->txd; |
@@ -2400,6 +2415,7 @@ static void __init d40_chan_init(struct d40_base *base, struct dma_device *dma, | |||
2400 | INIT_LIST_HEAD(&d40c->queue); | 2415 | INIT_LIST_HEAD(&d40c->queue); |
2401 | INIT_LIST_HEAD(&d40c->pending_queue); | 2416 | INIT_LIST_HEAD(&d40c->pending_queue); |
2402 | INIT_LIST_HEAD(&d40c->client); | 2417 | INIT_LIST_HEAD(&d40c->client); |
2418 | INIT_LIST_HEAD(&d40c->prepare_queue); | ||
2403 | 2419 | ||
2404 | tasklet_init(&d40c->tasklet, dma_tasklet, | 2420 | tasklet_init(&d40c->tasklet, dma_tasklet, |
2405 | (unsigned long) d40c); | 2421 | (unsigned long) d40c); |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 802b61ac3139..f7c6854eb4dd 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -256,7 +256,6 @@ int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed, | |||
256 | { | 256 | { |
257 | printk(KERN_ERR "panic occurred, switching back to text console\n"); | 257 | printk(KERN_ERR "panic occurred, switching back to text console\n"); |
258 | return drm_fb_helper_force_kernel_mode(); | 258 | return drm_fb_helper_force_kernel_mode(); |
259 | return 0; | ||
260 | } | 259 | } |
261 | EXPORT_SYMBOL(drm_fb_helper_panic); | 260 | EXPORT_SYMBOL(drm_fb_helper_panic); |
262 | 261 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 8d02d875376d..c919cfc8f2fd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
@@ -530,7 +530,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
530 | nouveau_gpuobj_ref(NULL, &obj); | 530 | nouveau_gpuobj_ref(NULL, &obj); |
531 | if (ret) | 531 | if (ret) |
532 | return ret; | 532 | return ret; |
533 | } else { | 533 | } else |
534 | if (USE_SEMA(dev)) { | ||
534 | /* map fence bo into channel's vm */ | 535 | /* map fence bo into channel's vm */ |
535 | ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm, | 536 | ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm, |
536 | &chan->fence.vma); | 537 | &chan->fence.vma); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index c444cadbf849..2706cb3d871a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
@@ -37,8 +37,11 @@ nouveau_sgdma_populate(struct ttm_backend *be, unsigned long num_pages, | |||
37 | return -ENOMEM; | 37 | return -ENOMEM; |
38 | 38 | ||
39 | nvbe->ttm_alloced = kmalloc(sizeof(bool) * num_pages, GFP_KERNEL); | 39 | nvbe->ttm_alloced = kmalloc(sizeof(bool) * num_pages, GFP_KERNEL); |
40 | if (!nvbe->ttm_alloced) | 40 | if (!nvbe->ttm_alloced) { |
41 | kfree(nvbe->pages); | ||
42 | nvbe->pages = NULL; | ||
41 | return -ENOMEM; | 43 | return -ENOMEM; |
44 | } | ||
42 | 45 | ||
43 | nvbe->nr_pages = 0; | 46 | nvbe->nr_pages = 0; |
44 | while (num_pages--) { | 47 | while (num_pages--) { |
@@ -126,7 +129,7 @@ nv04_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem) | |||
126 | 129 | ||
127 | for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++, pte++) { | 130 | for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++, pte++) { |
128 | nv_wo32(gpuobj, (pte * 4) + 0, offset_l | 3); | 131 | nv_wo32(gpuobj, (pte * 4) + 0, offset_l | 3); |
129 | dma_offset += NV_CTXDMA_PAGE_SIZE; | 132 | offset_l += NV_CTXDMA_PAGE_SIZE; |
130 | } | 133 | } |
131 | } | 134 | } |
132 | 135 | ||
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c index 118261d4927a..5e45398a9e2d 100644 --- a/drivers/gpu/drm/nouveau/nv04_crtc.c +++ b/drivers/gpu/drm/nouveau/nv04_crtc.c | |||
@@ -781,11 +781,20 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
781 | struct drm_device *dev = crtc->dev; | 781 | struct drm_device *dev = crtc->dev; |
782 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 782 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
783 | struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; | 783 | struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; |
784 | struct drm_framebuffer *drm_fb = nv_crtc->base.fb; | 784 | struct drm_framebuffer *drm_fb; |
785 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | 785 | struct nouveau_framebuffer *fb; |
786 | int arb_burst, arb_lwm; | 786 | int arb_burst, arb_lwm; |
787 | int ret; | 787 | int ret; |
788 | 788 | ||
789 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); | ||
790 | |||
791 | /* no fb bound */ | ||
792 | if (!atomic && !crtc->fb) { | ||
793 | NV_DEBUG_KMS(dev, "No FB bound\n"); | ||
794 | return 0; | ||
795 | } | ||
796 | |||
797 | |||
789 | /* If atomic, we want to switch to the fb we were passed, so | 798 | /* If atomic, we want to switch to the fb we were passed, so |
790 | * now we update pointers to do that. (We don't pin; just | 799 | * now we update pointers to do that. (We don't pin; just |
791 | * assume we're already pinned and update the base address.) | 800 | * assume we're already pinned and update the base address.) |
@@ -794,6 +803,8 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
794 | drm_fb = passed_fb; | 803 | drm_fb = passed_fb; |
795 | fb = nouveau_framebuffer(passed_fb); | 804 | fb = nouveau_framebuffer(passed_fb); |
796 | } else { | 805 | } else { |
806 | drm_fb = crtc->fb; | ||
807 | fb = nouveau_framebuffer(crtc->fb); | ||
797 | /* If not atomic, we can go ahead and pin, and unpin the | 808 | /* If not atomic, we can go ahead and pin, and unpin the |
798 | * old fb we were passed. | 809 | * old fb we were passed. |
799 | */ | 810 | */ |
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c index 46ad59ea2185..5d989073ba6e 100644 --- a/drivers/gpu/drm/nouveau/nv50_crtc.c +++ b/drivers/gpu/drm/nouveau/nv50_crtc.c | |||
@@ -519,12 +519,18 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
519 | struct drm_device *dev = nv_crtc->base.dev; | 519 | struct drm_device *dev = nv_crtc->base.dev; |
520 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 520 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
521 | struct nouveau_channel *evo = nv50_display(dev)->master; | 521 | struct nouveau_channel *evo = nv50_display(dev)->master; |
522 | struct drm_framebuffer *drm_fb = nv_crtc->base.fb; | 522 | struct drm_framebuffer *drm_fb; |
523 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | 523 | struct nouveau_framebuffer *fb; |
524 | int ret; | 524 | int ret; |
525 | 525 | ||
526 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); | 526 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); |
527 | 527 | ||
528 | /* no fb bound */ | ||
529 | if (!atomic && !crtc->fb) { | ||
530 | NV_DEBUG_KMS(dev, "No FB bound\n"); | ||
531 | return 0; | ||
532 | } | ||
533 | |||
528 | /* If atomic, we want to switch to the fb we were passed, so | 534 | /* If atomic, we want to switch to the fb we were passed, so |
529 | * now we update pointers to do that. (We don't pin; just | 535 | * now we update pointers to do that. (We don't pin; just |
530 | * assume we're already pinned and update the base address.) | 536 | * assume we're already pinned and update the base address.) |
@@ -533,6 +539,8 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
533 | drm_fb = passed_fb; | 539 | drm_fb = passed_fb; |
534 | fb = nouveau_framebuffer(passed_fb); | 540 | fb = nouveau_framebuffer(passed_fb); |
535 | } else { | 541 | } else { |
542 | drm_fb = crtc->fb; | ||
543 | fb = nouveau_framebuffer(crtc->fb); | ||
536 | /* If not atomic, we can go ahead and pin, and unpin the | 544 | /* If not atomic, we can go ahead and pin, and unpin the |
537 | * old fb we were passed. | 545 | * old fb we were passed. |
538 | */ | 546 | */ |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 4f0c1ecac72e..c4b8741dbf58 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -1297,12 +1297,33 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
1297 | if (!radeon_dig_connector->edp_on) | 1297 | if (!radeon_dig_connector->edp_on) |
1298 | atombios_set_edp_panel_power(connector, | 1298 | atombios_set_edp_panel_power(connector, |
1299 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | 1299 | ATOM_TRANSMITTER_ACTION_POWER_OFF); |
1300 | } else { | 1300 | } else if (radeon_connector_encoder_is_dp_bridge(connector)) { |
1301 | /* need to setup ddc on the bridge */ | 1301 | /* DP bridges are always DP */ |
1302 | if (radeon_connector_encoder_is_dp_bridge(connector)) { | 1302 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; |
1303 | /* get the DPCD from the bridge */ | ||
1304 | radeon_dp_getdpcd(radeon_connector); | ||
1305 | |||
1306 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | ||
1307 | ret = connector_status_connected; | ||
1308 | else { | ||
1309 | /* need to setup ddc on the bridge */ | ||
1303 | if (encoder) | 1310 | if (encoder) |
1304 | radeon_atom_ext_encoder_setup_ddc(encoder); | 1311 | radeon_atom_ext_encoder_setup_ddc(encoder); |
1312 | if (radeon_ddc_probe(radeon_connector, | ||
1313 | radeon_connector->requires_extended_probe)) | ||
1314 | ret = connector_status_connected; | ||
1315 | } | ||
1316 | |||
1317 | if ((ret == connector_status_disconnected) && | ||
1318 | radeon_connector->dac_load_detect) { | ||
1319 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
1320 | struct drm_encoder_helper_funcs *encoder_funcs; | ||
1321 | if (encoder) { | ||
1322 | encoder_funcs = encoder->helper_private; | ||
1323 | ret = encoder_funcs->detect(encoder, connector); | ||
1324 | } | ||
1305 | } | 1325 | } |
1326 | } else { | ||
1306 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | 1327 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
1307 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | 1328 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
1308 | ret = connector_status_connected; | 1329 | ret = connector_status_connected; |
@@ -1318,16 +1339,6 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
1318 | ret = connector_status_connected; | 1339 | ret = connector_status_connected; |
1319 | } | 1340 | } |
1320 | } | 1341 | } |
1321 | |||
1322 | if ((ret == connector_status_disconnected) && | ||
1323 | radeon_connector->dac_load_detect) { | ||
1324 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
1325 | struct drm_encoder_helper_funcs *encoder_funcs; | ||
1326 | if (encoder) { | ||
1327 | encoder_funcs = encoder->helper_private; | ||
1328 | ret = encoder_funcs->detect(encoder, connector); | ||
1329 | } | ||
1330 | } | ||
1331 | } | 1342 | } |
1332 | 1343 | ||
1333 | radeon_connector_update_scratch_regs(connector, ret); | 1344 | radeon_connector_update_scratch_regs(connector, ret); |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 1a858944e4f3..6cc17fb96a57 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -707,16 +707,21 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | |||
707 | radeon_router_select_ddc_port(radeon_connector); | 707 | radeon_router_select_ddc_port(radeon_connector); |
708 | 708 | ||
709 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || | 709 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
710 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { | 710 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) || |
711 | radeon_connector_encoder_is_dp_bridge(&radeon_connector->base)) { | ||
711 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; | 712 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
713 | |||
712 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || | 714 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || |
713 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) | 715 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) |
714 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); | 716 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
715 | } | 717 | &dig->dp_i2c_bus->adapter); |
716 | if (!radeon_connector->ddc_bus) | 718 | else if (radeon_connector->ddc_bus && !radeon_connector->edid) |
717 | return -1; | 719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
718 | if (!radeon_connector->edid) { | 720 | &radeon_connector->ddc_bus->adapter); |
719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 721 | } else { |
722 | if (radeon_connector->ddc_bus && !radeon_connector->edid) | ||
723 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, | ||
724 | &radeon_connector->ddc_bus->adapter); | ||
720 | } | 725 | } |
721 | 726 | ||
722 | if (!radeon_connector->edid) { | 727 | if (!radeon_connector->edid) { |
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 7d27d2b0445a..7484e1b67249 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h | |||
@@ -277,6 +277,7 @@ | |||
277 | #define USB_DEVICE_ID_PENPOWER 0x00f4 | 277 | #define USB_DEVICE_ID_PENPOWER 0x00f4 |
278 | 278 | ||
279 | #define USB_VENDOR_ID_GREENASIA 0x0e8f | 279 | #define USB_VENDOR_ID_GREENASIA 0x0e8f |
280 | #define USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD 0x3013 | ||
280 | 281 | ||
281 | #define USB_VENDOR_ID_GRETAGMACBETH 0x0971 | 282 | #define USB_VENDOR_ID_GRETAGMACBETH 0x0971 |
282 | #define USB_DEVICE_ID_GRETAGMACBETH_HUEY 0x2005 | 283 | #define USB_DEVICE_ID_GRETAGMACBETH_HUEY 0x2005 |
diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c index 0ec91c18a421..f0fbd7bd239e 100644 --- a/drivers/hid/hid-magicmouse.c +++ b/drivers/hid/hid-magicmouse.c | |||
@@ -81,6 +81,28 @@ MODULE_PARM_DESC(report_undeciphered, "Report undeciphered multi-touch state fie | |||
81 | #define NO_TOUCHES -1 | 81 | #define NO_TOUCHES -1 |
82 | #define SINGLE_TOUCH_UP -2 | 82 | #define SINGLE_TOUCH_UP -2 |
83 | 83 | ||
84 | /* Touch surface information. Dimension is in hundredths of a mm, min and max | ||
85 | * are in units. */ | ||
86 | #define MOUSE_DIMENSION_X (float)9056 | ||
87 | #define MOUSE_MIN_X -1100 | ||
88 | #define MOUSE_MAX_X 1258 | ||
89 | #define MOUSE_RES_X ((MOUSE_MAX_X - MOUSE_MIN_X) / (MOUSE_DIMENSION_X / 100)) | ||
90 | #define MOUSE_DIMENSION_Y (float)5152 | ||
91 | #define MOUSE_MIN_Y -1589 | ||
92 | #define MOUSE_MAX_Y 2047 | ||
93 | #define MOUSE_RES_Y ((MOUSE_MAX_Y - MOUSE_MIN_Y) / (MOUSE_DIMENSION_Y / 100)) | ||
94 | |||
95 | #define TRACKPAD_DIMENSION_X (float)13000 | ||
96 | #define TRACKPAD_MIN_X -2909 | ||
97 | #define TRACKPAD_MAX_X 3167 | ||
98 | #define TRACKPAD_RES_X \ | ||
99 | ((TRACKPAD_MAX_X - TRACKPAD_MIN_X) / (TRACKPAD_DIMENSION_X / 100)) | ||
100 | #define TRACKPAD_DIMENSION_Y (float)11000 | ||
101 | #define TRACKPAD_MIN_Y -2456 | ||
102 | #define TRACKPAD_MAX_Y 2565 | ||
103 | #define TRACKPAD_RES_Y \ | ||
104 | ((TRACKPAD_MAX_Y - TRACKPAD_MIN_Y) / (TRACKPAD_DIMENSION_Y / 100)) | ||
105 | |||
84 | /** | 106 | /** |
85 | * struct magicmouse_sc - Tracks Magic Mouse-specific data. | 107 | * struct magicmouse_sc - Tracks Magic Mouse-specific data. |
86 | * @input: Input device through which we report events. | 108 | * @input: Input device through which we report events. |
@@ -406,17 +428,31 @@ static void magicmouse_setup_input(struct input_dev *input, struct hid_device *h | |||
406 | * inverse of the reported Y. | 428 | * inverse of the reported Y. |
407 | */ | 429 | */ |
408 | if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { | 430 | if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { |
409 | input_set_abs_params(input, ABS_MT_POSITION_X, -1100, | 431 | input_set_abs_params(input, ABS_MT_POSITION_X, |
410 | 1358, 4, 0); | 432 | MOUSE_MIN_X, MOUSE_MAX_X, 4, 0); |
411 | input_set_abs_params(input, ABS_MT_POSITION_Y, -1589, | 433 | input_set_abs_params(input, ABS_MT_POSITION_Y, |
412 | 2047, 4, 0); | 434 | MOUSE_MIN_Y, MOUSE_MAX_Y, 4, 0); |
435 | |||
436 | input_abs_set_res(input, ABS_MT_POSITION_X, | ||
437 | MOUSE_RES_X); | ||
438 | input_abs_set_res(input, ABS_MT_POSITION_Y, | ||
439 | MOUSE_RES_Y); | ||
413 | } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ | 440 | } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ |
414 | input_set_abs_params(input, ABS_X, -2909, 3167, 4, 0); | 441 | input_set_abs_params(input, ABS_X, TRACKPAD_MIN_X, |
415 | input_set_abs_params(input, ABS_Y, -2456, 2565, 4, 0); | 442 | TRACKPAD_MAX_X, 4, 0); |
416 | input_set_abs_params(input, ABS_MT_POSITION_X, -2909, | 443 | input_set_abs_params(input, ABS_Y, TRACKPAD_MIN_Y, |
417 | 3167, 4, 0); | 444 | TRACKPAD_MAX_Y, 4, 0); |
418 | input_set_abs_params(input, ABS_MT_POSITION_Y, -2456, | 445 | input_set_abs_params(input, ABS_MT_POSITION_X, |
419 | 2565, 4, 0); | 446 | TRACKPAD_MIN_X, TRACKPAD_MAX_X, 4, 0); |
447 | input_set_abs_params(input, ABS_MT_POSITION_Y, | ||
448 | TRACKPAD_MIN_Y, TRACKPAD_MAX_Y, 4, 0); | ||
449 | |||
450 | input_abs_set_res(input, ABS_X, TRACKPAD_RES_X); | ||
451 | input_abs_set_res(input, ABS_Y, TRACKPAD_RES_Y); | ||
452 | input_abs_set_res(input, ABS_MT_POSITION_X, | ||
453 | TRACKPAD_RES_X); | ||
454 | input_abs_set_res(input, ABS_MT_POSITION_Y, | ||
455 | TRACKPAD_RES_Y); | ||
420 | } | 456 | } |
421 | 457 | ||
422 | input_set_events_per_packet(input, 60); | 458 | input_set_events_per_packet(input, 60); |
@@ -501,9 +537,17 @@ static int magicmouse_probe(struct hid_device *hdev, | |||
501 | } | 537 | } |
502 | report->size = 6; | 538 | report->size = 6; |
503 | 539 | ||
540 | /* | ||
541 | * Some devices repond with 'invalid report id' when feature | ||
542 | * report switching it into multitouch mode is sent to it. | ||
543 | * | ||
544 | * This results in -EIO from the _raw low-level transport callback, | ||
545 | * but there seems to be no other way of switching the mode. | ||
546 | * Thus the super-ugly hacky success check below. | ||
547 | */ | ||
504 | ret = hdev->hid_output_raw_report(hdev, feature, sizeof(feature), | 548 | ret = hdev->hid_output_raw_report(hdev, feature, sizeof(feature), |
505 | HID_FEATURE_REPORT); | 549 | HID_FEATURE_REPORT); |
506 | if (ret != sizeof(feature)) { | 550 | if (ret != -EIO && ret != sizeof(feature)) { |
507 | hid_err(hdev, "unable to request touch data (%d)\n", ret); | 551 | hid_err(hdev, "unable to request touch data (%d)\n", ret); |
508 | goto err_stop_hw; | 552 | goto err_stop_hw; |
509 | } | 553 | } |
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c index 06888323828c..a597039d0755 100644 --- a/drivers/hid/hid-wacom.c +++ b/drivers/hid/hid-wacom.c | |||
@@ -353,11 +353,7 @@ static int wacom_probe(struct hid_device *hdev, | |||
353 | if (ret) { | 353 | if (ret) { |
354 | hid_warn(hdev, "can't create sysfs battery attribute, err: %d\n", | 354 | hid_warn(hdev, "can't create sysfs battery attribute, err: %d\n", |
355 | ret); | 355 | ret); |
356 | /* | 356 | goto err_battery; |
357 | * battery attribute is not critical for the tablet, but if it | ||
358 | * failed then there is no need to create ac attribute | ||
359 | */ | ||
360 | goto move_on; | ||
361 | } | 357 | } |
362 | 358 | ||
363 | wdata->ac.properties = wacom_ac_props; | 359 | wdata->ac.properties = wacom_ac_props; |
@@ -371,14 +367,8 @@ static int wacom_probe(struct hid_device *hdev, | |||
371 | if (ret) { | 367 | if (ret) { |
372 | hid_warn(hdev, | 368 | hid_warn(hdev, |
373 | "can't create ac battery attribute, err: %d\n", ret); | 369 | "can't create ac battery attribute, err: %d\n", ret); |
374 | /* | 370 | goto err_ac; |
375 | * ac attribute is not critical for the tablet, but if it | ||
376 | * failed then we don't want to battery attribute to exist | ||
377 | */ | ||
378 | power_supply_unregister(&wdata->battery); | ||
379 | } | 371 | } |
380 | |||
381 | move_on: | ||
382 | #endif | 372 | #endif |
383 | hidinput = list_entry(hdev->inputs.next, struct hid_input, list); | 373 | hidinput = list_entry(hdev->inputs.next, struct hid_input, list); |
384 | input = hidinput->input; | 374 | input = hidinput->input; |
@@ -416,6 +406,13 @@ move_on: | |||
416 | 406 | ||
417 | return 0; | 407 | return 0; |
418 | 408 | ||
409 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | ||
410 | err_ac: | ||
411 | power_supply_unregister(&wdata->battery); | ||
412 | err_battery: | ||
413 | device_remove_file(&hdev->dev, &dev_attr_speed); | ||
414 | hid_hw_stop(hdev); | ||
415 | #endif | ||
419 | err_free: | 416 | err_free: |
420 | kfree(wdata); | 417 | kfree(wdata); |
421 | return ret; | 418 | return ret; |
@@ -426,6 +423,7 @@ static void wacom_remove(struct hid_device *hdev) | |||
426 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | 423 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY |
427 | struct wacom_data *wdata = hid_get_drvdata(hdev); | 424 | struct wacom_data *wdata = hid_get_drvdata(hdev); |
428 | #endif | 425 | #endif |
426 | device_remove_file(&hdev->dev, &dev_attr_speed); | ||
429 | hid_hw_stop(hdev); | 427 | hid_hw_stop(hdev); |
430 | 428 | ||
431 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | 429 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY |
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c index 4bdb5d46c52c..3146fdcda272 100644 --- a/drivers/hid/usbhid/hid-quirks.c +++ b/drivers/hid/usbhid/hid-quirks.c | |||
@@ -47,6 +47,7 @@ static const struct hid_blacklist { | |||
47 | { USB_VENDOR_ID_AFATECH, USB_DEVICE_ID_AFATECH_AF9016, HID_QUIRK_FULLSPEED_INTERVAL }, | 47 | { USB_VENDOR_ID_AFATECH, USB_DEVICE_ID_AFATECH_AF9016, HID_QUIRK_FULLSPEED_INTERVAL }, |
48 | 48 | ||
49 | { USB_VENDOR_ID_ETURBOTOUCH, USB_DEVICE_ID_ETURBOTOUCH, HID_QUIRK_MULTI_INPUT }, | 49 | { USB_VENDOR_ID_ETURBOTOUCH, USB_DEVICE_ID_ETURBOTOUCH, HID_QUIRK_MULTI_INPUT }, |
50 | { USB_VENDOR_ID_GREENASIA, USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD, HID_QUIRK_MULTI_INPUT }, | ||
50 | { USB_VENDOR_ID_PANTHERLORD, USB_DEVICE_ID_PANTHERLORD_TWIN_USB_JOYSTICK, HID_QUIRK_MULTI_INPUT | HID_QUIRK_SKIP_OUTPUT_REPORTS }, | 51 | { USB_VENDOR_ID_PANTHERLORD, USB_DEVICE_ID_PANTHERLORD_TWIN_USB_JOYSTICK, HID_QUIRK_MULTI_INPUT | HID_QUIRK_SKIP_OUTPUT_REPORTS }, |
51 | { USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT }, | 52 | { USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT }, |
52 | { USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT }, | 53 | { USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT }, |
diff --git a/drivers/hwmon/max16065.c b/drivers/hwmon/max16065.c index d94a24fdf4ba..dd2d7b9620c2 100644 --- a/drivers/hwmon/max16065.c +++ b/drivers/hwmon/max16065.c | |||
@@ -124,7 +124,7 @@ static inline int MV_TO_LIMIT(int mv, int range) | |||
124 | 124 | ||
125 | static inline int ADC_TO_CURR(int adc, int gain) | 125 | static inline int ADC_TO_CURR(int adc, int gain) |
126 | { | 126 | { |
127 | return adc * 1400000 / gain * 255; | 127 | return adc * 1400000 / (gain * 255); |
128 | } | 128 | } |
129 | 129 | ||
130 | /* | 130 | /* |
diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c index ace1c7319734..d0ddb60155c9 100644 --- a/drivers/hwmon/pmbus/ucd9000.c +++ b/drivers/hwmon/pmbus/ucd9000.c | |||
@@ -141,13 +141,11 @@ static int ucd9000_probe(struct i2c_client *client, | |||
141 | block_buffer[ret] = '\0'; | 141 | block_buffer[ret] = '\0'; |
142 | dev_info(&client->dev, "Device ID %s\n", block_buffer); | 142 | dev_info(&client->dev, "Device ID %s\n", block_buffer); |
143 | 143 | ||
144 | mid = NULL; | 144 | for (mid = ucd9000_id; mid->name[0]; mid++) { |
145 | for (i = 0; i < ARRAY_SIZE(ucd9000_id); i++) { | ||
146 | mid = &ucd9000_id[i]; | ||
147 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) | 145 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) |
148 | break; | 146 | break; |
149 | } | 147 | } |
150 | if (!mid || !strlen(mid->name)) { | 148 | if (!mid->name[0]) { |
151 | dev_err(&client->dev, "Unsupported device\n"); | 149 | dev_err(&client->dev, "Unsupported device\n"); |
152 | return -ENODEV; | 150 | return -ENODEV; |
153 | } | 151 | } |
diff --git a/drivers/hwmon/pmbus/ucd9200.c b/drivers/hwmon/pmbus/ucd9200.c index ffcc1cf3609d..c65e9da707cc 100644 --- a/drivers/hwmon/pmbus/ucd9200.c +++ b/drivers/hwmon/pmbus/ucd9200.c | |||
@@ -68,13 +68,11 @@ static int ucd9200_probe(struct i2c_client *client, | |||
68 | block_buffer[ret] = '\0'; | 68 | block_buffer[ret] = '\0'; |
69 | dev_info(&client->dev, "Device ID %s\n", block_buffer); | 69 | dev_info(&client->dev, "Device ID %s\n", block_buffer); |
70 | 70 | ||
71 | mid = NULL; | 71 | for (mid = ucd9200_id; mid->name[0]; mid++) { |
72 | for (i = 0; i < ARRAY_SIZE(ucd9200_id); i++) { | ||
73 | mid = &ucd9200_id[i]; | ||
74 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) | 72 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) |
75 | break; | 73 | break; |
76 | } | 74 | } |
77 | if (!mid || !strlen(mid->name)) { | 75 | if (!mid->name[0]) { |
78 | dev_err(&client->dev, "Unsupported device\n"); | 76 | dev_err(&client->dev, "Unsupported device\n"); |
79 | return -ENODEV; | 77 | return -ENODEV; |
80 | } | 78 | } |
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c index 6659d269b841..b73da6cd6f91 100644 --- a/drivers/i2c/busses/i2c-pxa-pci.c +++ b/drivers/i2c/busses/i2c-pxa-pci.c | |||
@@ -109,12 +109,15 @@ static int __devinit ce4100_i2c_probe(struct pci_dev *dev, | |||
109 | return -EINVAL; | 109 | return -EINVAL; |
110 | } | 110 | } |
111 | sds = kzalloc(sizeof(*sds), GFP_KERNEL); | 111 | sds = kzalloc(sizeof(*sds), GFP_KERNEL); |
112 | if (!sds) | 112 | if (!sds) { |
113 | ret = -ENOMEM; | ||
113 | goto err_mem; | 114 | goto err_mem; |
115 | } | ||
114 | 116 | ||
115 | for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) { | 117 | for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) { |
116 | sds->pdev[i] = add_i2c_device(dev, i); | 118 | sds->pdev[i] = add_i2c_device(dev, i); |
117 | if (IS_ERR(sds->pdev[i])) { | 119 | if (IS_ERR(sds->pdev[i])) { |
120 | ret = PTR_ERR(sds->pdev[i]); | ||
118 | while (--i >= 0) | 121 | while (--i >= 0) |
119 | platform_device_unregister(sds->pdev[i]); | 122 | platform_device_unregister(sds->pdev[i]); |
120 | goto err_dev_add; | 123 | goto err_dev_add; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 2440b7411978..3c94c4a81a55 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -270,14 +270,30 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) | |||
270 | 270 | ||
271 | /* Rounds down to not include partial word at the end of buf */ | 271 | /* Rounds down to not include partial word at the end of buf */ |
272 | words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD; | 272 | words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD; |
273 | if (words_to_transfer > tx_fifo_avail) | ||
274 | words_to_transfer = tx_fifo_avail; | ||
275 | 273 | ||
276 | i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); | 274 | /* It's very common to have < 4 bytes, so optimize that case. */ |
277 | 275 | if (words_to_transfer) { | |
278 | buf += words_to_transfer * BYTES_PER_FIFO_WORD; | 276 | if (words_to_transfer > tx_fifo_avail) |
279 | buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; | 277 | words_to_transfer = tx_fifo_avail; |
280 | tx_fifo_avail -= words_to_transfer; | 278 | |
279 | /* | ||
280 | * Update state before writing to FIFO. If this casues us | ||
281 | * to finish writing all bytes (AKA buf_remaining goes to 0) we | ||
282 | * have a potential for an interrupt (PACKET_XFER_COMPLETE is | ||
283 | * not maskable). We need to make sure that the isr sees | ||
284 | * buf_remaining as 0 and doesn't call us back re-entrantly. | ||
285 | */ | ||
286 | buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; | ||
287 | tx_fifo_avail -= words_to_transfer; | ||
288 | i2c_dev->msg_buf_remaining = buf_remaining; | ||
289 | i2c_dev->msg_buf = buf + | ||
290 | words_to_transfer * BYTES_PER_FIFO_WORD; | ||
291 | barrier(); | ||
292 | |||
293 | i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); | ||
294 | |||
295 | buf += words_to_transfer * BYTES_PER_FIFO_WORD; | ||
296 | } | ||
281 | 297 | ||
282 | /* | 298 | /* |
283 | * If there is a partial word at the end of buf, handle it manually to | 299 | * If there is a partial word at the end of buf, handle it manually to |
@@ -287,14 +303,15 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) | |||
287 | if (tx_fifo_avail > 0 && buf_remaining > 0) { | 303 | if (tx_fifo_avail > 0 && buf_remaining > 0) { |
288 | BUG_ON(buf_remaining > 3); | 304 | BUG_ON(buf_remaining > 3); |
289 | memcpy(&val, buf, buf_remaining); | 305 | memcpy(&val, buf, buf_remaining); |
306 | |||
307 | /* Again update before writing to FIFO to make sure isr sees. */ | ||
308 | i2c_dev->msg_buf_remaining = 0; | ||
309 | i2c_dev->msg_buf = NULL; | ||
310 | barrier(); | ||
311 | |||
290 | i2c_writel(i2c_dev, val, I2C_TX_FIFO); | 312 | i2c_writel(i2c_dev, val, I2C_TX_FIFO); |
291 | buf_remaining = 0; | ||
292 | tx_fifo_avail--; | ||
293 | } | 313 | } |
294 | 314 | ||
295 | BUG_ON(tx_fifo_avail > 0 && buf_remaining > 0); | ||
296 | i2c_dev->msg_buf_remaining = buf_remaining; | ||
297 | i2c_dev->msg_buf = buf; | ||
298 | return 0; | 315 | return 0; |
299 | } | 316 | } |
300 | 317 | ||
@@ -411,9 +428,10 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) | |||
411 | tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); | 428 | tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); |
412 | } | 429 | } |
413 | 430 | ||
414 | if ((status & I2C_INT_PACKET_XFER_COMPLETE) && | 431 | if (status & I2C_INT_PACKET_XFER_COMPLETE) { |
415 | !i2c_dev->msg_buf_remaining) | 432 | BUG_ON(i2c_dev->msg_buf_remaining); |
416 | complete(&i2c_dev->msg_complete); | 433 | complete(&i2c_dev->msg_complete); |
434 | } | ||
417 | 435 | ||
418 | i2c_writel(i2c_dev, status, I2C_INT_STATUS); | 436 | i2c_writel(i2c_dev, status, I2C_INT_STATUS); |
419 | if (i2c_dev->is_dvc) | 437 | if (i2c_dev->is_dvc) |
@@ -531,7 +549,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], | |||
531 | 549 | ||
532 | static u32 tegra_i2c_func(struct i2c_adapter *adap) | 550 | static u32 tegra_i2c_func(struct i2c_adapter *adap) |
533 | { | 551 | { |
534 | return I2C_FUNC_I2C; | 552 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
535 | } | 553 | } |
536 | 554 | ||
537 | static const struct i2c_algorithm tegra_i2c_algo = { | 555 | static const struct i2c_algorithm tegra_i2c_algo = { |
@@ -719,6 +737,17 @@ static int tegra_i2c_resume(struct platform_device *pdev) | |||
719 | } | 737 | } |
720 | #endif | 738 | #endif |
721 | 739 | ||
740 | #if defined(CONFIG_OF) | ||
741 | /* Match table for of_platform binding */ | ||
742 | static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { | ||
743 | { .compatible = "nvidia,tegra20-i2c", }, | ||
744 | {}, | ||
745 | }; | ||
746 | MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); | ||
747 | #else | ||
748 | #define tegra_i2c_of_match NULL | ||
749 | #endif | ||
750 | |||
722 | static struct platform_driver tegra_i2c_driver = { | 751 | static struct platform_driver tegra_i2c_driver = { |
723 | .probe = tegra_i2c_probe, | 752 | .probe = tegra_i2c_probe, |
724 | .remove = tegra_i2c_remove, | 753 | .remove = tegra_i2c_remove, |
@@ -729,6 +758,7 @@ static struct platform_driver tegra_i2c_driver = { | |||
729 | .driver = { | 758 | .driver = { |
730 | .name = "tegra-i2c", | 759 | .name = "tegra-i2c", |
731 | .owner = THIS_MODULE, | 760 | .owner = THIS_MODULE, |
761 | .of_match_table = tegra_i2c_of_match, | ||
732 | }, | 762 | }, |
733 | }; | 763 | }; |
734 | 764 | ||
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index a14f8dc23462..0e4227f457af 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c | |||
@@ -605,7 +605,9 @@ static void build_inv_all(struct iommu_cmd *cmd) | |||
605 | * Writes the command to the IOMMUs command buffer and informs the | 605 | * Writes the command to the IOMMUs command buffer and informs the |
606 | * hardware about the new command. | 606 | * hardware about the new command. |
607 | */ | 607 | */ |
608 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | 608 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
609 | struct iommu_cmd *cmd, | ||
610 | bool sync) | ||
609 | { | 611 | { |
610 | u32 left, tail, head, next_tail; | 612 | u32 left, tail, head, next_tail; |
611 | unsigned long flags; | 613 | unsigned long flags; |
@@ -639,13 +641,18 @@ again: | |||
639 | copy_cmd_to_buffer(iommu, cmd, tail); | 641 | copy_cmd_to_buffer(iommu, cmd, tail); |
640 | 642 | ||
641 | /* We need to sync now to make sure all commands are processed */ | 643 | /* We need to sync now to make sure all commands are processed */ |
642 | iommu->need_sync = true; | 644 | iommu->need_sync = sync; |
643 | 645 | ||
644 | spin_unlock_irqrestore(&iommu->lock, flags); | 646 | spin_unlock_irqrestore(&iommu->lock, flags); |
645 | 647 | ||
646 | return 0; | 648 | return 0; |
647 | } | 649 | } |
648 | 650 | ||
651 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | ||
652 | { | ||
653 | return iommu_queue_command_sync(iommu, cmd, true); | ||
654 | } | ||
655 | |||
649 | /* | 656 | /* |
650 | * This function queues a completion wait command into the command | 657 | * This function queues a completion wait command into the command |
651 | * buffer of an IOMMU | 658 | * buffer of an IOMMU |
@@ -661,7 +668,7 @@ static int iommu_completion_wait(struct amd_iommu *iommu) | |||
661 | 668 | ||
662 | build_completion_wait(&cmd, (u64)&sem); | 669 | build_completion_wait(&cmd, (u64)&sem); |
663 | 670 | ||
664 | ret = iommu_queue_command(iommu, &cmd); | 671 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
665 | if (ret) | 672 | if (ret) |
666 | return ret; | 673 | return ret; |
667 | 674 | ||
@@ -840,14 +847,9 @@ static void domain_flush_complete(struct protection_domain *domain) | |||
840 | static void domain_flush_devices(struct protection_domain *domain) | 847 | static void domain_flush_devices(struct protection_domain *domain) |
841 | { | 848 | { |
842 | struct iommu_dev_data *dev_data; | 849 | struct iommu_dev_data *dev_data; |
843 | unsigned long flags; | ||
844 | |||
845 | spin_lock_irqsave(&domain->lock, flags); | ||
846 | 850 | ||
847 | list_for_each_entry(dev_data, &domain->dev_list, list) | 851 | list_for_each_entry(dev_data, &domain->dev_list, list) |
848 | device_flush_dte(dev_data); | 852 | device_flush_dte(dev_data); |
849 | |||
850 | spin_unlock_irqrestore(&domain->lock, flags); | ||
851 | } | 853 | } |
852 | 854 | ||
853 | /**************************************************************************** | 855 | /**************************************************************************** |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 3742ce8b0acf..5404b2295820 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -1138,8 +1138,11 @@ static int super_90_load(mdk_rdev_t *rdev, mdk_rdev_t *refdev, int minor_version | |||
1138 | ret = 0; | 1138 | ret = 0; |
1139 | } | 1139 | } |
1140 | rdev->sectors = rdev->sb_start; | 1140 | rdev->sectors = rdev->sb_start; |
1141 | /* Limit to 4TB as metadata cannot record more than that */ | ||
1142 | if (rdev->sectors >= (2ULL << 32)) | ||
1143 | rdev->sectors = (2ULL << 32) - 2; | ||
1141 | 1144 | ||
1142 | if (rdev->sectors < sb->size * 2 && sb->level > 1) | 1145 | if (rdev->sectors < ((sector_t)sb->size) * 2 && sb->level >= 1) |
1143 | /* "this cannot possibly happen" ... */ | 1146 | /* "this cannot possibly happen" ... */ |
1144 | ret = -EINVAL; | 1147 | ret = -EINVAL; |
1145 | 1148 | ||
@@ -1173,7 +1176,7 @@ static int super_90_validate(mddev_t *mddev, mdk_rdev_t *rdev) | |||
1173 | mddev->clevel[0] = 0; | 1176 | mddev->clevel[0] = 0; |
1174 | mddev->layout = sb->layout; | 1177 | mddev->layout = sb->layout; |
1175 | mddev->raid_disks = sb->raid_disks; | 1178 | mddev->raid_disks = sb->raid_disks; |
1176 | mddev->dev_sectors = sb->size * 2; | 1179 | mddev->dev_sectors = ((sector_t)sb->size) * 2; |
1177 | mddev->events = ev1; | 1180 | mddev->events = ev1; |
1178 | mddev->bitmap_info.offset = 0; | 1181 | mddev->bitmap_info.offset = 0; |
1179 | mddev->bitmap_info.default_offset = MD_SB_BYTES >> 9; | 1182 | mddev->bitmap_info.default_offset = MD_SB_BYTES >> 9; |
@@ -1415,6 +1418,11 @@ super_90_rdev_size_change(mdk_rdev_t *rdev, sector_t num_sectors) | |||
1415 | rdev->sb_start = calc_dev_sboffset(rdev); | 1418 | rdev->sb_start = calc_dev_sboffset(rdev); |
1416 | if (!num_sectors || num_sectors > rdev->sb_start) | 1419 | if (!num_sectors || num_sectors > rdev->sb_start) |
1417 | num_sectors = rdev->sb_start; | 1420 | num_sectors = rdev->sb_start; |
1421 | /* Limit to 4TB as metadata cannot record more than that. | ||
1422 | * 4TB == 2^32 KB, or 2*2^32 sectors. | ||
1423 | */ | ||
1424 | if (num_sectors >= (2ULL << 32)) | ||
1425 | num_sectors = (2ULL << 32) - 2; | ||
1418 | md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, | 1426 | md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, |
1419 | rdev->sb_page); | 1427 | rdev->sb_page); |
1420 | md_super_wait(rdev->mddev); | 1428 | md_super_wait(rdev->mddev); |
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index 32323f0afd89..f4622dd8fc59 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -1099,12 +1099,11 @@ read_again: | |||
1099 | bio_list_add(&conf->pending_bio_list, mbio); | 1099 | bio_list_add(&conf->pending_bio_list, mbio); |
1100 | spin_unlock_irqrestore(&conf->device_lock, flags); | 1100 | spin_unlock_irqrestore(&conf->device_lock, flags); |
1101 | } | 1101 | } |
1102 | r1_bio_write_done(r1_bio); | 1102 | /* Mustn't call r1_bio_write_done before this next test, |
1103 | 1103 | * as it could result in the bio being freed. | |
1104 | /* In case raid1d snuck in to freeze_array */ | 1104 | */ |
1105 | wake_up(&conf->wait_barrier); | ||
1106 | |||
1107 | if (sectors_handled < (bio->bi_size >> 9)) { | 1105 | if (sectors_handled < (bio->bi_size >> 9)) { |
1106 | r1_bio_write_done(r1_bio); | ||
1108 | /* We need another r1_bio. It has already been counted | 1107 | /* We need another r1_bio. It has already been counted |
1109 | * in bio->bi_phys_segments | 1108 | * in bio->bi_phys_segments |
1110 | */ | 1109 | */ |
@@ -1117,6 +1116,11 @@ read_again: | |||
1117 | goto retry_write; | 1116 | goto retry_write; |
1118 | } | 1117 | } |
1119 | 1118 | ||
1119 | r1_bio_write_done(r1_bio); | ||
1120 | |||
1121 | /* In case raid1d snuck in to freeze_array */ | ||
1122 | wake_up(&conf->wait_barrier); | ||
1123 | |||
1120 | if (do_sync || !bitmap || !plugged) | 1124 | if (do_sync || !bitmap || !plugged) |
1121 | md_wakeup_thread(mddev->thread); | 1125 | md_wakeup_thread(mddev->thread); |
1122 | 1126 | ||
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 8b29cd4f01c8..d7a8468ddeab 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -337,6 +337,21 @@ static void close_write(r10bio_t *r10_bio) | |||
337 | md_write_end(r10_bio->mddev); | 337 | md_write_end(r10_bio->mddev); |
338 | } | 338 | } |
339 | 339 | ||
340 | static void one_write_done(r10bio_t *r10_bio) | ||
341 | { | ||
342 | if (atomic_dec_and_test(&r10_bio->remaining)) { | ||
343 | if (test_bit(R10BIO_WriteError, &r10_bio->state)) | ||
344 | reschedule_retry(r10_bio); | ||
345 | else { | ||
346 | close_write(r10_bio); | ||
347 | if (test_bit(R10BIO_MadeGood, &r10_bio->state)) | ||
348 | reschedule_retry(r10_bio); | ||
349 | else | ||
350 | raid_end_bio_io(r10_bio); | ||
351 | } | ||
352 | } | ||
353 | } | ||
354 | |||
340 | static void raid10_end_write_request(struct bio *bio, int error) | 355 | static void raid10_end_write_request(struct bio *bio, int error) |
341 | { | 356 | { |
342 | int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); | 357 | int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); |
@@ -387,17 +402,7 @@ static void raid10_end_write_request(struct bio *bio, int error) | |||
387 | * Let's see if all mirrored write operations have finished | 402 | * Let's see if all mirrored write operations have finished |
388 | * already. | 403 | * already. |
389 | */ | 404 | */ |
390 | if (atomic_dec_and_test(&r10_bio->remaining)) { | 405 | one_write_done(r10_bio); |
391 | if (test_bit(R10BIO_WriteError, &r10_bio->state)) | ||
392 | reschedule_retry(r10_bio); | ||
393 | else { | ||
394 | close_write(r10_bio); | ||
395 | if (test_bit(R10BIO_MadeGood, &r10_bio->state)) | ||
396 | reschedule_retry(r10_bio); | ||
397 | else | ||
398 | raid_end_bio_io(r10_bio); | ||
399 | } | ||
400 | } | ||
401 | if (dec_rdev) | 406 | if (dec_rdev) |
402 | rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); | 407 | rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); |
403 | } | 408 | } |
@@ -1127,20 +1132,12 @@ retry_write: | |||
1127 | spin_unlock_irqrestore(&conf->device_lock, flags); | 1132 | spin_unlock_irqrestore(&conf->device_lock, flags); |
1128 | } | 1133 | } |
1129 | 1134 | ||
1130 | if (atomic_dec_and_test(&r10_bio->remaining)) { | 1135 | /* Don't remove the bias on 'remaining' (one_write_done) until |
1131 | /* This matches the end of raid10_end_write_request() */ | 1136 | * after checking if we need to go around again. |
1132 | bitmap_endwrite(r10_bio->mddev->bitmap, r10_bio->sector, | 1137 | */ |
1133 | r10_bio->sectors, | ||
1134 | !test_bit(R10BIO_Degraded, &r10_bio->state), | ||
1135 | 0); | ||
1136 | md_write_end(mddev); | ||
1137 | raid_end_bio_io(r10_bio); | ||
1138 | } | ||
1139 | |||
1140 | /* In case raid10d snuck in to freeze_array */ | ||
1141 | wake_up(&conf->wait_barrier); | ||
1142 | 1138 | ||
1143 | if (sectors_handled < (bio->bi_size >> 9)) { | 1139 | if (sectors_handled < (bio->bi_size >> 9)) { |
1140 | one_write_done(r10_bio); | ||
1144 | /* We need another r10_bio. It has already been counted | 1141 | /* We need another r10_bio. It has already been counted |
1145 | * in bio->bi_phys_segments. | 1142 | * in bio->bi_phys_segments. |
1146 | */ | 1143 | */ |
@@ -1154,6 +1151,10 @@ retry_write: | |||
1154 | r10_bio->state = 0; | 1151 | r10_bio->state = 0; |
1155 | goto retry_write; | 1152 | goto retry_write; |
1156 | } | 1153 | } |
1154 | one_write_done(r10_bio); | ||
1155 | |||
1156 | /* In case raid10d snuck in to freeze_array */ | ||
1157 | wake_up(&conf->wait_barrier); | ||
1157 | 1158 | ||
1158 | if (do_sync || !mddev->bitmap || !plugged) | 1159 | if (do_sync || !mddev->bitmap || !plugged) |
1159 | md_wakeup_thread(mddev->thread); | 1160 | md_wakeup_thread(mddev->thread); |
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c index 3db89e3cb0bb..536c16c943bd 100644 --- a/drivers/media/dvb/dvb-usb/vp7045.c +++ b/drivers/media/dvb/dvb-usb/vp7045.c | |||
@@ -224,26 +224,8 @@ static struct dvb_usb_device_properties vp7045_properties; | |||
224 | static int vp7045_usb_probe(struct usb_interface *intf, | 224 | static int vp7045_usb_probe(struct usb_interface *intf, |
225 | const struct usb_device_id *id) | 225 | const struct usb_device_id *id) |
226 | { | 226 | { |
227 | struct dvb_usb_device *d; | 227 | return dvb_usb_device_init(intf, &vp7045_properties, |
228 | int ret = dvb_usb_device_init(intf, &vp7045_properties, | 228 | THIS_MODULE, NULL, adapter_nr); |
229 | THIS_MODULE, &d, adapter_nr); | ||
230 | if (ret) | ||
231 | return ret; | ||
232 | |||
233 | d->priv = kmalloc(20, GFP_KERNEL); | ||
234 | if (!d->priv) { | ||
235 | dvb_usb_device_exit(intf); | ||
236 | return -ENOMEM; | ||
237 | } | ||
238 | |||
239 | return ret; | ||
240 | } | ||
241 | |||
242 | static void vp7045_usb_disconnect(struct usb_interface *intf) | ||
243 | { | ||
244 | struct dvb_usb_device *d = usb_get_intfdata(intf); | ||
245 | kfree(d->priv); | ||
246 | dvb_usb_device_exit(intf); | ||
247 | } | 229 | } |
248 | 230 | ||
249 | static struct usb_device_id vp7045_usb_table [] = { | 231 | static struct usb_device_id vp7045_usb_table [] = { |
@@ -258,7 +240,7 @@ MODULE_DEVICE_TABLE(usb, vp7045_usb_table); | |||
258 | static struct dvb_usb_device_properties vp7045_properties = { | 240 | static struct dvb_usb_device_properties vp7045_properties = { |
259 | .usb_ctrl = CYPRESS_FX2, | 241 | .usb_ctrl = CYPRESS_FX2, |
260 | .firmware = "dvb-usb-vp7045-01.fw", | 242 | .firmware = "dvb-usb-vp7045-01.fw", |
261 | .size_of_priv = sizeof(u8 *), | 243 | .size_of_priv = 20, |
262 | 244 | ||
263 | .num_adapters = 1, | 245 | .num_adapters = 1, |
264 | .adapter = { | 246 | .adapter = { |
@@ -305,7 +287,7 @@ static struct dvb_usb_device_properties vp7045_properties = { | |||
305 | static struct usb_driver vp7045_usb_driver = { | 287 | static struct usb_driver vp7045_usb_driver = { |
306 | .name = "dvb_usb_vp7045", | 288 | .name = "dvb_usb_vp7045", |
307 | .probe = vp7045_usb_probe, | 289 | .probe = vp7045_usb_probe, |
308 | .disconnect = vp7045_usb_disconnect, | 290 | .disconnect = dvb_usb_device_exit, |
309 | .id_table = vp7045_usb_table, | 291 | .id_table = vp7045_usb_table, |
310 | }; | 292 | }; |
311 | 293 | ||
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c index eae05b500476..144f3f55d765 100644 --- a/drivers/media/rc/nuvoton-cir.c +++ b/drivers/media/rc/nuvoton-cir.c | |||
@@ -618,7 +618,6 @@ static void nvt_dump_rx_buf(struct nvt_dev *nvt) | |||
618 | static void nvt_process_rx_ir_data(struct nvt_dev *nvt) | 618 | static void nvt_process_rx_ir_data(struct nvt_dev *nvt) |
619 | { | 619 | { |
620 | DEFINE_IR_RAW_EVENT(rawir); | 620 | DEFINE_IR_RAW_EVENT(rawir); |
621 | unsigned int count; | ||
622 | u32 carrier; | 621 | u32 carrier; |
623 | u8 sample; | 622 | u8 sample; |
624 | int i; | 623 | int i; |
@@ -631,65 +630,38 @@ static void nvt_process_rx_ir_data(struct nvt_dev *nvt) | |||
631 | if (nvt->carrier_detect_enabled) | 630 | if (nvt->carrier_detect_enabled) |
632 | carrier = nvt_rx_carrier_detect(nvt); | 631 | carrier = nvt_rx_carrier_detect(nvt); |
633 | 632 | ||
634 | count = nvt->pkts; | 633 | nvt_dbg_verbose("Processing buffer of len %d", nvt->pkts); |
635 | nvt_dbg_verbose("Processing buffer of len %d", count); | ||
636 | 634 | ||
637 | init_ir_raw_event(&rawir); | 635 | init_ir_raw_event(&rawir); |
638 | 636 | ||
639 | for (i = 0; i < count; i++) { | 637 | for (i = 0; i < nvt->pkts; i++) { |
640 | nvt->pkts--; | ||
641 | sample = nvt->buf[i]; | 638 | sample = nvt->buf[i]; |
642 | 639 | ||
643 | rawir.pulse = ((sample & BUF_PULSE_BIT) != 0); | 640 | rawir.pulse = ((sample & BUF_PULSE_BIT) != 0); |
644 | rawir.duration = US_TO_NS((sample & BUF_LEN_MASK) | 641 | rawir.duration = US_TO_NS((sample & BUF_LEN_MASK) |
645 | * SAMPLE_PERIOD); | 642 | * SAMPLE_PERIOD); |
646 | 643 | ||
647 | if ((sample & BUF_LEN_MASK) == BUF_LEN_MASK) { | 644 | nvt_dbg("Storing %s with duration %d", |
648 | if (nvt->rawir.pulse == rawir.pulse) | 645 | rawir.pulse ? "pulse" : "space", rawir.duration); |
649 | nvt->rawir.duration += rawir.duration; | ||
650 | else { | ||
651 | nvt->rawir.duration = rawir.duration; | ||
652 | nvt->rawir.pulse = rawir.pulse; | ||
653 | } | ||
654 | continue; | ||
655 | } | ||
656 | |||
657 | rawir.duration += nvt->rawir.duration; | ||
658 | 646 | ||
659 | init_ir_raw_event(&nvt->rawir); | 647 | ir_raw_event_store_with_filter(nvt->rdev, &rawir); |
660 | nvt->rawir.duration = 0; | ||
661 | nvt->rawir.pulse = rawir.pulse; | ||
662 | |||
663 | if (sample == BUF_PULSE_BIT) | ||
664 | rawir.pulse = false; | ||
665 | |||
666 | if (rawir.duration) { | ||
667 | nvt_dbg("Storing %s with duration %d", | ||
668 | rawir.pulse ? "pulse" : "space", | ||
669 | rawir.duration); | ||
670 | |||
671 | ir_raw_event_store_with_filter(nvt->rdev, &rawir); | ||
672 | } | ||
673 | 648 | ||
674 | /* | 649 | /* |
675 | * BUF_PULSE_BIT indicates end of IR data, BUF_REPEAT_BYTE | 650 | * BUF_PULSE_BIT indicates end of IR data, BUF_REPEAT_BYTE |
676 | * indicates end of IR signal, but new data incoming. In both | 651 | * indicates end of IR signal, but new data incoming. In both |
677 | * cases, it means we're ready to call ir_raw_event_handle | 652 | * cases, it means we're ready to call ir_raw_event_handle |
678 | */ | 653 | */ |
679 | if ((sample == BUF_PULSE_BIT) && nvt->pkts) { | 654 | if ((sample == BUF_PULSE_BIT) && (i + 1 < nvt->pkts)) { |
680 | nvt_dbg("Calling ir_raw_event_handle (signal end)\n"); | 655 | nvt_dbg("Calling ir_raw_event_handle (signal end)\n"); |
681 | ir_raw_event_handle(nvt->rdev); | 656 | ir_raw_event_handle(nvt->rdev); |
682 | } | 657 | } |
683 | } | 658 | } |
684 | 659 | ||
660 | nvt->pkts = 0; | ||
661 | |||
685 | nvt_dbg("Calling ir_raw_event_handle (buffer empty)\n"); | 662 | nvt_dbg("Calling ir_raw_event_handle (buffer empty)\n"); |
686 | ir_raw_event_handle(nvt->rdev); | 663 | ir_raw_event_handle(nvt->rdev); |
687 | 664 | ||
688 | if (nvt->pkts) { | ||
689 | nvt_dbg("Odd, pkts should be 0 now... (its %u)", nvt->pkts); | ||
690 | nvt->pkts = 0; | ||
691 | } | ||
692 | |||
693 | nvt_dbg_verbose("%s done", __func__); | 665 | nvt_dbg_verbose("%s done", __func__); |
694 | } | 666 | } |
695 | 667 | ||
@@ -1048,7 +1020,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id) | |||
1048 | 1020 | ||
1049 | spin_lock_init(&nvt->nvt_lock); | 1021 | spin_lock_init(&nvt->nvt_lock); |
1050 | spin_lock_init(&nvt->tx.lock); | 1022 | spin_lock_init(&nvt->tx.lock); |
1051 | init_ir_raw_event(&nvt->rawir); | ||
1052 | 1023 | ||
1053 | ret = -EBUSY; | 1024 | ret = -EBUSY; |
1054 | /* now claim resources */ | 1025 | /* now claim resources */ |
diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h index 1241fc89a36c..0d5e0872a2ea 100644 --- a/drivers/media/rc/nuvoton-cir.h +++ b/drivers/media/rc/nuvoton-cir.h | |||
@@ -67,7 +67,6 @@ static int debug; | |||
67 | struct nvt_dev { | 67 | struct nvt_dev { |
68 | struct pnp_dev *pdev; | 68 | struct pnp_dev *pdev; |
69 | struct rc_dev *rdev; | 69 | struct rc_dev *rdev; |
70 | struct ir_raw_event rawir; | ||
71 | 70 | ||
72 | spinlock_t nvt_lock; | 71 | spinlock_t nvt_lock; |
73 | 72 | ||
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 0800433b2092..18305c89083c 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
@@ -2858,7 +2858,6 @@ static void ov7xx0_configure(struct sd *sd) | |||
2858 | case 0x60: | 2858 | case 0x60: |
2859 | PDEBUG(D_PROBE, "Sensor is a OV7660"); | 2859 | PDEBUG(D_PROBE, "Sensor is a OV7660"); |
2860 | sd->sensor = SEN_OV7660; | 2860 | sd->sensor = SEN_OV7660; |
2861 | sd->invert_led = 0; | ||
2862 | break; | 2861 | break; |
2863 | default: | 2862 | default: |
2864 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | 2863 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); |
@@ -3337,7 +3336,6 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
3337 | case BRIDGE_OV519: | 3336 | case BRIDGE_OV519: |
3338 | cam->cam_mode = ov519_vga_mode; | 3337 | cam->cam_mode = ov519_vga_mode; |
3339 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | 3338 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); |
3340 | sd->invert_led = !sd->invert_led; | ||
3341 | break; | 3339 | break; |
3342 | case BRIDGE_OVFX2: | 3340 | case BRIDGE_OVFX2: |
3343 | cam->cam_mode = ov519_vga_mode; | 3341 | cam->cam_mode = ov519_vga_mode; |
@@ -5005,24 +5003,24 @@ static const struct sd_desc sd_desc = { | |||
5005 | /* -- module initialisation -- */ | 5003 | /* -- module initialisation -- */ |
5006 | static const struct usb_device_id device_table[] = { | 5004 | static const struct usb_device_id device_table[] = { |
5007 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, | 5005 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, |
5008 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, | 5006 | {USB_DEVICE(0x041e, 0x4052), |
5009 | {USB_DEVICE(0x041e, 0x405f), | ||
5010 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | 5007 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
5008 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | ||
5011 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | 5009 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, |
5012 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | 5010 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, |
5013 | {USB_DEVICE(0x041e, 0x4064), | 5011 | {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 }, |
5014 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
5015 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, | 5012 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, |
5016 | {USB_DEVICE(0x041e, 0x4068), | 5013 | {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 }, |
5014 | {USB_DEVICE(0x045e, 0x028c), | ||
5017 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | 5015 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
5018 | {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, | ||
5019 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, | 5016 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, |
5020 | {USB_DEVICE(0x054c, 0x0155), | 5017 | {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 }, |
5021 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
5022 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, | 5018 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, |
5023 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, | 5019 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, |
5024 | {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, | 5020 | {USB_DEVICE(0x05a9, 0x0519), |
5025 | {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 }, | 5021 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
5022 | {USB_DEVICE(0x05a9, 0x0530), | ||
5023 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
5026 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, | 5024 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, |
5027 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, | 5025 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, |
5028 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, | 5026 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, |
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c index 81b8a600783b..c477ad11f103 100644 --- a/drivers/media/video/gspca/sonixj.c +++ b/drivers/media/video/gspca/sonixj.c | |||
@@ -2386,7 +2386,7 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
2386 | reg_w1(gspca_dev, 0x01, 0x22); | 2386 | reg_w1(gspca_dev, 0x01, 0x22); |
2387 | msleep(100); | 2387 | msleep(100); |
2388 | reg01 = SCL_SEL_OD | S_PDN_INV; | 2388 | reg01 = SCL_SEL_OD | S_PDN_INV; |
2389 | reg17 &= MCK_SIZE_MASK; | 2389 | reg17 &= ~MCK_SIZE_MASK; |
2390 | reg17 |= 0x04; /* clock / 4 */ | 2390 | reg17 |= 0x04; /* clock / 4 */ |
2391 | break; | 2391 | break; |
2392 | } | 2392 | } |
@@ -2532,6 +2532,10 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
2532 | if (!mode) { /* if 640x480 */ | 2532 | if (!mode) { /* if 640x480 */ |
2533 | reg17 &= ~MCK_SIZE_MASK; | 2533 | reg17 &= ~MCK_SIZE_MASK; |
2534 | reg17 |= 0x04; /* clock / 4 */ | 2534 | reg17 |= 0x04; /* clock / 4 */ |
2535 | } else { | ||
2536 | reg01 &= ~SYS_SEL_48M; /* clk 24Mz */ | ||
2537 | reg17 &= ~MCK_SIZE_MASK; | ||
2538 | reg17 |= 0x02; /* clock / 2 */ | ||
2535 | } | 2539 | } |
2536 | break; | 2540 | break; |
2537 | case SENSOR_OV7630: | 2541 | case SENSOR_OV7630: |
diff --git a/drivers/media/video/pwc/pwc-v4l.c b/drivers/media/video/pwc/pwc-v4l.c index e9a0e94b9995..8c70e64444e7 100644 --- a/drivers/media/video/pwc/pwc-v4l.c +++ b/drivers/media/video/pwc/pwc-v4l.c | |||
@@ -338,7 +338,7 @@ int pwc_init_controls(struct pwc_device *pdev) | |||
338 | if (pdev->restore_factory) | 338 | if (pdev->restore_factory) |
339 | pdev->restore_factory->flags = V4L2_CTRL_FLAG_UPDATE; | 339 | pdev->restore_factory->flags = V4L2_CTRL_FLAG_UPDATE; |
340 | 340 | ||
341 | if (!pdev->features & FEATURE_MOTOR_PANTILT) | 341 | if (!(pdev->features & FEATURE_MOTOR_PANTILT)) |
342 | return hdl->error; | 342 | return hdl->error; |
343 | 343 | ||
344 | /* Motor pan / tilt / reset */ | 344 | /* Motor pan / tilt / reset */ |
diff --git a/drivers/media/video/via-camera.c b/drivers/media/video/via-camera.c index 85d3048c1d67..bb7f17f2a33c 100644 --- a/drivers/media/video/via-camera.c +++ b/drivers/media/video/via-camera.c | |||
@@ -1332,6 +1332,8 @@ static __devinit bool viacam_serial_is_enabled(void) | |||
1332 | struct pci_bus *pbus = pci_find_bus(0, 0); | 1332 | struct pci_bus *pbus = pci_find_bus(0, 0); |
1333 | u8 cbyte; | 1333 | u8 cbyte; |
1334 | 1334 | ||
1335 | if (!pbus) | ||
1336 | return false; | ||
1335 | pci_bus_read_config_byte(pbus, VIACAM_SERIAL_DEVFN, | 1337 | pci_bus_read_config_byte(pbus, VIACAM_SERIAL_DEVFN, |
1336 | VIACAM_SERIAL_CREG, &cbyte); | 1338 | VIACAM_SERIAL_CREG, &cbyte); |
1337 | if ((cbyte & VIACAM_SERIAL_BIT) == 0) | 1339 | if ((cbyte & VIACAM_SERIAL_BIT) == 0) |
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 91a0a7460ebb..b27b94078c21 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c | |||
@@ -133,7 +133,7 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |||
133 | if (mrq->done) | 133 | if (mrq->done) |
134 | mrq->done(mrq); | 134 | mrq->done(mrq); |
135 | 135 | ||
136 | mmc_host_clk_gate(host); | 136 | mmc_host_clk_release(host); |
137 | } | 137 | } |
138 | } | 138 | } |
139 | 139 | ||
@@ -192,7 +192,7 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) | |||
192 | mrq->stop->mrq = mrq; | 192 | mrq->stop->mrq = mrq; |
193 | } | 193 | } |
194 | } | 194 | } |
195 | mmc_host_clk_ungate(host); | 195 | mmc_host_clk_hold(host); |
196 | led_trigger_event(host->led, LED_FULL); | 196 | led_trigger_event(host->led, LED_FULL); |
197 | host->ops->request(host, mrq); | 197 | host->ops->request(host, mrq); |
198 | } | 198 | } |
@@ -728,15 +728,17 @@ static inline void mmc_set_ios(struct mmc_host *host) | |||
728 | */ | 728 | */ |
729 | void mmc_set_chip_select(struct mmc_host *host, int mode) | 729 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
730 | { | 730 | { |
731 | mmc_host_clk_hold(host); | ||
731 | host->ios.chip_select = mode; | 732 | host->ios.chip_select = mode; |
732 | mmc_set_ios(host); | 733 | mmc_set_ios(host); |
734 | mmc_host_clk_release(host); | ||
733 | } | 735 | } |
734 | 736 | ||
735 | /* | 737 | /* |
736 | * Sets the host clock to the highest possible frequency that | 738 | * Sets the host clock to the highest possible frequency that |
737 | * is below "hz". | 739 | * is below "hz". |
738 | */ | 740 | */ |
739 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | 741 | static void __mmc_set_clock(struct mmc_host *host, unsigned int hz) |
740 | { | 742 | { |
741 | WARN_ON(hz < host->f_min); | 743 | WARN_ON(hz < host->f_min); |
742 | 744 | ||
@@ -747,6 +749,13 @@ void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |||
747 | mmc_set_ios(host); | 749 | mmc_set_ios(host); |
748 | } | 750 | } |
749 | 751 | ||
752 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | ||
753 | { | ||
754 | mmc_host_clk_hold(host); | ||
755 | __mmc_set_clock(host, hz); | ||
756 | mmc_host_clk_release(host); | ||
757 | } | ||
758 | |||
750 | #ifdef CONFIG_MMC_CLKGATE | 759 | #ifdef CONFIG_MMC_CLKGATE |
751 | /* | 760 | /* |
752 | * This gates the clock by setting it to 0 Hz. | 761 | * This gates the clock by setting it to 0 Hz. |
@@ -779,7 +788,7 @@ void mmc_ungate_clock(struct mmc_host *host) | |||
779 | if (host->clk_old) { | 788 | if (host->clk_old) { |
780 | BUG_ON(host->ios.clock); | 789 | BUG_ON(host->ios.clock); |
781 | /* This call will also set host->clk_gated to false */ | 790 | /* This call will also set host->clk_gated to false */ |
782 | mmc_set_clock(host, host->clk_old); | 791 | __mmc_set_clock(host, host->clk_old); |
783 | } | 792 | } |
784 | } | 793 | } |
785 | 794 | ||
@@ -807,8 +816,10 @@ void mmc_set_ungated(struct mmc_host *host) | |||
807 | */ | 816 | */ |
808 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | 817 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) |
809 | { | 818 | { |
819 | mmc_host_clk_hold(host); | ||
810 | host->ios.bus_mode = mode; | 820 | host->ios.bus_mode = mode; |
811 | mmc_set_ios(host); | 821 | mmc_set_ios(host); |
822 | mmc_host_clk_release(host); | ||
812 | } | 823 | } |
813 | 824 | ||
814 | /* | 825 | /* |
@@ -816,8 +827,10 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |||
816 | */ | 827 | */ |
817 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | 828 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) |
818 | { | 829 | { |
830 | mmc_host_clk_hold(host); | ||
819 | host->ios.bus_width = width; | 831 | host->ios.bus_width = width; |
820 | mmc_set_ios(host); | 832 | mmc_set_ios(host); |
833 | mmc_host_clk_release(host); | ||
821 | } | 834 | } |
822 | 835 | ||
823 | /** | 836 | /** |
@@ -1015,8 +1028,10 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) | |||
1015 | 1028 | ||
1016 | ocr &= 3 << bit; | 1029 | ocr &= 3 << bit; |
1017 | 1030 | ||
1031 | mmc_host_clk_hold(host); | ||
1018 | host->ios.vdd = bit; | 1032 | host->ios.vdd = bit; |
1019 | mmc_set_ios(host); | 1033 | mmc_set_ios(host); |
1034 | mmc_host_clk_release(host); | ||
1020 | } else { | 1035 | } else { |
1021 | pr_warning("%s: host doesn't support card's voltages\n", | 1036 | pr_warning("%s: host doesn't support card's voltages\n", |
1022 | mmc_hostname(host)); | 1037 | mmc_hostname(host)); |
@@ -1063,8 +1078,10 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, bool cmd11 | |||
1063 | */ | 1078 | */ |
1064 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) | 1079 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
1065 | { | 1080 | { |
1081 | mmc_host_clk_hold(host); | ||
1066 | host->ios.timing = timing; | 1082 | host->ios.timing = timing; |
1067 | mmc_set_ios(host); | 1083 | mmc_set_ios(host); |
1084 | mmc_host_clk_release(host); | ||
1068 | } | 1085 | } |
1069 | 1086 | ||
1070 | /* | 1087 | /* |
@@ -1072,8 +1089,10 @@ void mmc_set_timing(struct mmc_host *host, unsigned int timing) | |||
1072 | */ | 1089 | */ |
1073 | void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type) | 1090 | void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type) |
1074 | { | 1091 | { |
1092 | mmc_host_clk_hold(host); | ||
1075 | host->ios.drv_type = drv_type; | 1093 | host->ios.drv_type = drv_type; |
1076 | mmc_set_ios(host); | 1094 | mmc_set_ios(host); |
1095 | mmc_host_clk_release(host); | ||
1077 | } | 1096 | } |
1078 | 1097 | ||
1079 | /* | 1098 | /* |
@@ -1091,6 +1110,8 @@ static void mmc_power_up(struct mmc_host *host) | |||
1091 | { | 1110 | { |
1092 | int bit; | 1111 | int bit; |
1093 | 1112 | ||
1113 | mmc_host_clk_hold(host); | ||
1114 | |||
1094 | /* If ocr is set, we use it */ | 1115 | /* If ocr is set, we use it */ |
1095 | if (host->ocr) | 1116 | if (host->ocr) |
1096 | bit = ffs(host->ocr) - 1; | 1117 | bit = ffs(host->ocr) - 1; |
@@ -1126,10 +1147,14 @@ static void mmc_power_up(struct mmc_host *host) | |||
1126 | * time required to reach a stable voltage. | 1147 | * time required to reach a stable voltage. |
1127 | */ | 1148 | */ |
1128 | mmc_delay(10); | 1149 | mmc_delay(10); |
1150 | |||
1151 | mmc_host_clk_release(host); | ||
1129 | } | 1152 | } |
1130 | 1153 | ||
1131 | static void mmc_power_off(struct mmc_host *host) | 1154 | static void mmc_power_off(struct mmc_host *host) |
1132 | { | 1155 | { |
1156 | mmc_host_clk_hold(host); | ||
1157 | |||
1133 | host->ios.clock = 0; | 1158 | host->ios.clock = 0; |
1134 | host->ios.vdd = 0; | 1159 | host->ios.vdd = 0; |
1135 | 1160 | ||
@@ -1147,6 +1172,8 @@ static void mmc_power_off(struct mmc_host *host) | |||
1147 | host->ios.bus_width = MMC_BUS_WIDTH_1; | 1172 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
1148 | host->ios.timing = MMC_TIMING_LEGACY; | 1173 | host->ios.timing = MMC_TIMING_LEGACY; |
1149 | mmc_set_ios(host); | 1174 | mmc_set_ios(host); |
1175 | |||
1176 | mmc_host_clk_release(host); | ||
1150 | } | 1177 | } |
1151 | 1178 | ||
1152 | /* | 1179 | /* |
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index b29d3e8fd3a2..793d0a0dad8d 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c | |||
@@ -119,14 +119,14 @@ static void mmc_host_clk_gate_work(struct work_struct *work) | |||
119 | } | 119 | } |
120 | 120 | ||
121 | /** | 121 | /** |
122 | * mmc_host_clk_ungate - ungate hardware MCI clocks | 122 | * mmc_host_clk_hold - ungate hardware MCI clocks |
123 | * @host: host to ungate. | 123 | * @host: host to ungate. |
124 | * | 124 | * |
125 | * Makes sure the host ios.clock is restored to a non-zero value | 125 | * Makes sure the host ios.clock is restored to a non-zero value |
126 | * past this call. Increase clock reference count and ungate clock | 126 | * past this call. Increase clock reference count and ungate clock |
127 | * if we're the first user. | 127 | * if we're the first user. |
128 | */ | 128 | */ |
129 | void mmc_host_clk_ungate(struct mmc_host *host) | 129 | void mmc_host_clk_hold(struct mmc_host *host) |
130 | { | 130 | { |
131 | unsigned long flags; | 131 | unsigned long flags; |
132 | 132 | ||
@@ -164,14 +164,14 @@ static bool mmc_host_may_gate_card(struct mmc_card *card) | |||
164 | } | 164 | } |
165 | 165 | ||
166 | /** | 166 | /** |
167 | * mmc_host_clk_gate - gate off hardware MCI clocks | 167 | * mmc_host_clk_release - gate off hardware MCI clocks |
168 | * @host: host to gate. | 168 | * @host: host to gate. |
169 | * | 169 | * |
170 | * Calls the host driver with ios.clock set to zero as often as possible | 170 | * Calls the host driver with ios.clock set to zero as often as possible |
171 | * in order to gate off hardware MCI clocks. Decrease clock reference | 171 | * in order to gate off hardware MCI clocks. Decrease clock reference |
172 | * count and schedule disabling of clock. | 172 | * count and schedule disabling of clock. |
173 | */ | 173 | */ |
174 | void mmc_host_clk_gate(struct mmc_host *host) | 174 | void mmc_host_clk_release(struct mmc_host *host) |
175 | { | 175 | { |
176 | unsigned long flags; | 176 | unsigned long flags; |
177 | 177 | ||
@@ -179,7 +179,7 @@ void mmc_host_clk_gate(struct mmc_host *host) | |||
179 | host->clk_requests--; | 179 | host->clk_requests--; |
180 | if (mmc_host_may_gate_card(host->card) && | 180 | if (mmc_host_may_gate_card(host->card) && |
181 | !host->clk_requests) | 181 | !host->clk_requests) |
182 | schedule_work(&host->clk_gate_work); | 182 | queue_work(system_nrt_wq, &host->clk_gate_work); |
183 | spin_unlock_irqrestore(&host->clk_lock, flags); | 183 | spin_unlock_irqrestore(&host->clk_lock, flags); |
184 | } | 184 | } |
185 | 185 | ||
@@ -231,7 +231,7 @@ static inline void mmc_host_clk_exit(struct mmc_host *host) | |||
231 | if (cancel_work_sync(&host->clk_gate_work)) | 231 | if (cancel_work_sync(&host->clk_gate_work)) |
232 | mmc_host_clk_gate_delayed(host); | 232 | mmc_host_clk_gate_delayed(host); |
233 | if (host->clk_gated) | 233 | if (host->clk_gated) |
234 | mmc_host_clk_ungate(host); | 234 | mmc_host_clk_hold(host); |
235 | /* There should be only one user now */ | 235 | /* There should be only one user now */ |
236 | WARN_ON(host->clk_requests > 1); | 236 | WARN_ON(host->clk_requests > 1); |
237 | } | 237 | } |
diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h index de199f911928..fb8a5cd2e4a1 100644 --- a/drivers/mmc/core/host.h +++ b/drivers/mmc/core/host.h | |||
@@ -16,16 +16,16 @@ int mmc_register_host_class(void); | |||
16 | void mmc_unregister_host_class(void); | 16 | void mmc_unregister_host_class(void); |
17 | 17 | ||
18 | #ifdef CONFIG_MMC_CLKGATE | 18 | #ifdef CONFIG_MMC_CLKGATE |
19 | void mmc_host_clk_ungate(struct mmc_host *host); | 19 | void mmc_host_clk_hold(struct mmc_host *host); |
20 | void mmc_host_clk_gate(struct mmc_host *host); | 20 | void mmc_host_clk_release(struct mmc_host *host); |
21 | unsigned int mmc_host_clk_rate(struct mmc_host *host); | 21 | unsigned int mmc_host_clk_rate(struct mmc_host *host); |
22 | 22 | ||
23 | #else | 23 | #else |
24 | static inline void mmc_host_clk_ungate(struct mmc_host *host) | 24 | static inline void mmc_host_clk_hold(struct mmc_host *host) |
25 | { | 25 | { |
26 | } | 26 | } |
27 | 27 | ||
28 | static inline void mmc_host_clk_gate(struct mmc_host *host) | 28 | static inline void mmc_host_clk_release(struct mmc_host *host) |
29 | { | 29 | { |
30 | } | 30 | } |
31 | 31 | ||
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 633975ff2bb3..0370e03e3142 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c | |||
@@ -469,56 +469,75 @@ static int sd_select_driver_type(struct mmc_card *card, u8 *status) | |||
469 | return 0; | 469 | return 0; |
470 | } | 470 | } |
471 | 471 | ||
472 | static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) | 472 | static void sd_update_bus_speed_mode(struct mmc_card *card) |
473 | { | 473 | { |
474 | unsigned int bus_speed = 0, timing = 0; | ||
475 | int err; | ||
476 | |||
477 | /* | 474 | /* |
478 | * If the host doesn't support any of the UHS-I modes, fallback on | 475 | * If the host doesn't support any of the UHS-I modes, fallback on |
479 | * default speed. | 476 | * default speed. |
480 | */ | 477 | */ |
481 | if (!(card->host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | | 478 | if (!(card->host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | |
482 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))) | 479 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))) { |
483 | return 0; | 480 | card->sd_bus_speed = 0; |
481 | return; | ||
482 | } | ||
484 | 483 | ||
485 | if ((card->host->caps & MMC_CAP_UHS_SDR104) && | 484 | if ((card->host->caps & MMC_CAP_UHS_SDR104) && |
486 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR104)) { | 485 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR104)) { |
487 | bus_speed = UHS_SDR104_BUS_SPEED; | 486 | card->sd_bus_speed = UHS_SDR104_BUS_SPEED; |
488 | timing = MMC_TIMING_UHS_SDR104; | ||
489 | card->sw_caps.uhs_max_dtr = UHS_SDR104_MAX_DTR; | ||
490 | } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && | 487 | } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && |
491 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_DDR50)) { | 488 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_DDR50)) { |
492 | bus_speed = UHS_DDR50_BUS_SPEED; | 489 | card->sd_bus_speed = UHS_DDR50_BUS_SPEED; |
493 | timing = MMC_TIMING_UHS_DDR50; | ||
494 | card->sw_caps.uhs_max_dtr = UHS_DDR50_MAX_DTR; | ||
495 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 490 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
496 | MMC_CAP_UHS_SDR50)) && (card->sw_caps.sd3_bus_mode & | 491 | MMC_CAP_UHS_SDR50)) && (card->sw_caps.sd3_bus_mode & |
497 | SD_MODE_UHS_SDR50)) { | 492 | SD_MODE_UHS_SDR50)) { |
498 | bus_speed = UHS_SDR50_BUS_SPEED; | 493 | card->sd_bus_speed = UHS_SDR50_BUS_SPEED; |
499 | timing = MMC_TIMING_UHS_SDR50; | ||
500 | card->sw_caps.uhs_max_dtr = UHS_SDR50_MAX_DTR; | ||
501 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 494 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
502 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25)) && | 495 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25)) && |
503 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR25)) { | 496 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR25)) { |
504 | bus_speed = UHS_SDR25_BUS_SPEED; | 497 | card->sd_bus_speed = UHS_SDR25_BUS_SPEED; |
505 | timing = MMC_TIMING_UHS_SDR25; | ||
506 | card->sw_caps.uhs_max_dtr = UHS_SDR25_MAX_DTR; | ||
507 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 498 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
508 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25 | | 499 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25 | |
509 | MMC_CAP_UHS_SDR12)) && (card->sw_caps.sd3_bus_mode & | 500 | MMC_CAP_UHS_SDR12)) && (card->sw_caps.sd3_bus_mode & |
510 | SD_MODE_UHS_SDR12)) { | 501 | SD_MODE_UHS_SDR12)) { |
511 | bus_speed = UHS_SDR12_BUS_SPEED; | 502 | card->sd_bus_speed = UHS_SDR12_BUS_SPEED; |
512 | timing = MMC_TIMING_UHS_SDR12; | 503 | } |
513 | card->sw_caps.uhs_max_dtr = UHS_SDR12_MAX_DTR; | 504 | } |
505 | |||
506 | static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) | ||
507 | { | ||
508 | int err; | ||
509 | unsigned int timing = 0; | ||
510 | |||
511 | switch (card->sd_bus_speed) { | ||
512 | case UHS_SDR104_BUS_SPEED: | ||
513 | timing = MMC_TIMING_UHS_SDR104; | ||
514 | card->sw_caps.uhs_max_dtr = UHS_SDR104_MAX_DTR; | ||
515 | break; | ||
516 | case UHS_DDR50_BUS_SPEED: | ||
517 | timing = MMC_TIMING_UHS_DDR50; | ||
518 | card->sw_caps.uhs_max_dtr = UHS_DDR50_MAX_DTR; | ||
519 | break; | ||
520 | case UHS_SDR50_BUS_SPEED: | ||
521 | timing = MMC_TIMING_UHS_SDR50; | ||
522 | card->sw_caps.uhs_max_dtr = UHS_SDR50_MAX_DTR; | ||
523 | break; | ||
524 | case UHS_SDR25_BUS_SPEED: | ||
525 | timing = MMC_TIMING_UHS_SDR25; | ||
526 | card->sw_caps.uhs_max_dtr = UHS_SDR25_MAX_DTR; | ||
527 | break; | ||
528 | case UHS_SDR12_BUS_SPEED: | ||
529 | timing = MMC_TIMING_UHS_SDR12; | ||
530 | card->sw_caps.uhs_max_dtr = UHS_SDR12_MAX_DTR; | ||
531 | break; | ||
532 | default: | ||
533 | return 0; | ||
514 | } | 534 | } |
515 | 535 | ||
516 | card->sd_bus_speed = bus_speed; | 536 | err = mmc_sd_switch(card, 1, 0, card->sd_bus_speed, status); |
517 | err = mmc_sd_switch(card, 1, 0, bus_speed, status); | ||
518 | if (err) | 537 | if (err) |
519 | return err; | 538 | return err; |
520 | 539 | ||
521 | if ((status[16] & 0xF) != bus_speed) | 540 | if ((status[16] & 0xF) != card->sd_bus_speed) |
522 | printk(KERN_WARNING "%s: Problem setting bus speed mode!\n", | 541 | printk(KERN_WARNING "%s: Problem setting bus speed mode!\n", |
523 | mmc_hostname(card->host)); | 542 | mmc_hostname(card->host)); |
524 | else { | 543 | else { |
@@ -618,18 +637,24 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card) | |||
618 | mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); | 637 | mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); |
619 | } | 638 | } |
620 | 639 | ||
640 | /* | ||
641 | * Select the bus speed mode depending on host | ||
642 | * and card capability. | ||
643 | */ | ||
644 | sd_update_bus_speed_mode(card); | ||
645 | |||
621 | /* Set the driver strength for the card */ | 646 | /* Set the driver strength for the card */ |
622 | err = sd_select_driver_type(card, status); | 647 | err = sd_select_driver_type(card, status); |
623 | if (err) | 648 | if (err) |
624 | goto out; | 649 | goto out; |
625 | 650 | ||
626 | /* Set bus speed mode of the card */ | 651 | /* Set current limit for the card */ |
627 | err = sd_set_bus_speed_mode(card, status); | 652 | err = sd_set_current_limit(card, status); |
628 | if (err) | 653 | if (err) |
629 | goto out; | 654 | goto out; |
630 | 655 | ||
631 | /* Set current limit for the card */ | 656 | /* Set bus speed mode of the card */ |
632 | err = sd_set_current_limit(card, status); | 657 | err = sd_set_bus_speed_mode(card, status); |
633 | if (err) | 658 | if (err) |
634 | goto out; | 659 | goto out; |
635 | 660 | ||
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 0e9780f5a4a9..4dc0028086a3 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/err.h> | 16 | #include <linux/err.h> |
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
19 | #include <linux/module.h> | ||
19 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
20 | #include <linux/mmc/host.h> | 21 | #include <linux/mmc/host.h> |
21 | #include <linux/mmc/mmc.h> | 22 | #include <linux/mmc/mmc.h> |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2bd7bf4fece7..fe886d6c474a 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
@@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) | |||
302 | ctrl &= ~SDHCI_CTRL_8BITBUS; | 302 | ctrl &= ~SDHCI_CTRL_8BITBUS; |
303 | break; | 303 | break; |
304 | default: | 304 | default: |
305 | ctrl &= ~SDHCI_CTRL_4BITBUS; | ||
306 | ctrl &= ~SDHCI_CTRL_8BITBUS; | ||
305 | break; | 307 | break; |
306 | } | 308 | } |
307 | 309 | ||
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 774f6439d7ce..0c4a672f5db6 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c | |||
@@ -120,11 +120,11 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev) | |||
120 | mmc_data->hclk = clk_get_rate(priv->clk); | 120 | mmc_data->hclk = clk_get_rate(priv->clk); |
121 | mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; | 121 | mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; |
122 | mmc_data->get_cd = sh_mobile_sdhi_get_cd; | 122 | mmc_data->get_cd = sh_mobile_sdhi_get_cd; |
123 | if (mmc_data->flags & TMIO_MMC_HAS_IDLE_WAIT) | ||
124 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; | ||
125 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; | 123 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; |
126 | if (p) { | 124 | if (p) { |
127 | mmc_data->flags = p->tmio_flags; | 125 | mmc_data->flags = p->tmio_flags; |
126 | if (mmc_data->flags & TMIO_MMC_HAS_IDLE_WAIT) | ||
127 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; | ||
128 | mmc_data->ocr_mask = p->tmio_ocr_mask; | 128 | mmc_data->ocr_mask = p->tmio_ocr_mask; |
129 | mmc_data->capabilities |= p->tmio_caps; | 129 | mmc_data->capabilities |= p->tmio_caps; |
130 | 130 | ||
diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h index 65b5b76cc379..64fbb0021825 100644 --- a/drivers/mtd/ubi/debug.h +++ b/drivers/mtd/ubi/debug.h | |||
@@ -181,7 +181,7 @@ static inline int ubi_dbg_is_erase_failure(const struct ubi_device *ubi) | |||
181 | 181 | ||
182 | #define ubi_dbg_msg(fmt, ...) do { \ | 182 | #define ubi_dbg_msg(fmt, ...) do { \ |
183 | if (0) \ | 183 | if (0) \ |
184 | pr_debug(fmt "\n", ##__VA_ARGS__); \ | 184 | printk(KERN_DEBUG fmt "\n", ##__VA_ARGS__); \ |
185 | } while (0) | 185 | } while (0) |
186 | 186 | ||
187 | #define dbg_msg(fmt, ...) ubi_dbg_msg(fmt, ##__VA_ARGS__) | 187 | #define dbg_msg(fmt, ...) ubi_dbg_msg(fmt, ##__VA_ARGS__) |
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c index 52fe21e1e2cd..3b1416e3d217 100644 --- a/drivers/net/arm/am79c961a.c +++ b/drivers/net/arm/am79c961a.c | |||
@@ -308,8 +308,11 @@ static void am79c961_timer(unsigned long data) | |||
308 | struct net_device *dev = (struct net_device *)data; | 308 | struct net_device *dev = (struct net_device *)data; |
309 | struct dev_priv *priv = netdev_priv(dev); | 309 | struct dev_priv *priv = netdev_priv(dev); |
310 | unsigned int lnkstat, carrier; | 310 | unsigned int lnkstat, carrier; |
311 | unsigned long flags; | ||
311 | 312 | ||
313 | spin_lock_irqsave(&priv->chip_lock, flags); | ||
312 | lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST; | 314 | lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST; |
315 | spin_unlock_irqrestore(&priv->chip_lock, flags); | ||
313 | carrier = netif_carrier_ok(dev); | 316 | carrier = netif_carrier_ok(dev); |
314 | 317 | ||
315 | if (lnkstat && !carrier) { | 318 | if (lnkstat && !carrier) { |
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c index 753b21aaea61..3ffd9c1acc0a 100644 --- a/drivers/pci/hotplug/pcihp_slot.c +++ b/drivers/pci/hotplug/pcihp_slot.c | |||
@@ -169,7 +169,9 @@ void pci_configure_slot(struct pci_dev *dev) | |||
169 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) | 169 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) |
170 | return; | 170 | return; |
171 | 171 | ||
172 | pcie_bus_configure_settings(dev->bus, dev->bus->self->pcie_mpss); | 172 | if (dev->bus && dev->bus->self) |
173 | pcie_bus_configure_settings(dev->bus, | ||
174 | dev->bus->self->pcie_mpss); | ||
173 | 175 | ||
174 | memset(&hpp, 0, sizeof(hpp)); | 176 | memset(&hpp, 0, sizeof(hpp)); |
175 | ret = pci_get_hp_params(dev, &hpp); | 177 | ret = pci_get_hp_params(dev, &hpp); |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0ce67423a0a3..4e84fd4a4312 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -77,7 +77,7 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE; | |||
77 | unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE; | 77 | unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE; |
78 | unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE; | 78 | unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE; |
79 | 79 | ||
80 | enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_PERFORMANCE; | 80 | enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_SAFE; |
81 | 81 | ||
82 | /* | 82 | /* |
83 | * The default CLS is used if arch didn't set CLS explicitly and not | 83 | * The default CLS is used if arch didn't set CLS explicitly and not |
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 8473727b29fa..b1187ff31d89 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
@@ -1396,34 +1396,37 @@ static void pcie_write_mps(struct pci_dev *dev, int mps) | |||
1396 | 1396 | ||
1397 | static void pcie_write_mrrs(struct pci_dev *dev, int mps) | 1397 | static void pcie_write_mrrs(struct pci_dev *dev, int mps) |
1398 | { | 1398 | { |
1399 | int rc, mrrs; | 1399 | int rc, mrrs, dev_mpss; |
1400 | 1400 | ||
1401 | if (pcie_bus_config == PCIE_BUS_PERFORMANCE) { | 1401 | /* In the "safe" case, do not configure the MRRS. There appear to be |
1402 | int dev_mpss = 128 << dev->pcie_mpss; | 1402 | * issues with setting MRRS to 0 on a number of devices. |
1403 | */ | ||
1403 | 1404 | ||
1404 | /* For Max performance, the MRRS must be set to the largest | 1405 | if (pcie_bus_config != PCIE_BUS_PERFORMANCE) |
1405 | * supported value. However, it cannot be configured larger | 1406 | return; |
1406 | * than the MPS the device or the bus can support. This assumes | ||
1407 | * that the largest MRRS available on the device cannot be | ||
1408 | * smaller than the device MPSS. | ||
1409 | */ | ||
1410 | mrrs = mps < dev_mpss ? mps : dev_mpss; | ||
1411 | } else | ||
1412 | /* In the "safe" case, configure the MRRS for fairness on the | ||
1413 | * bus by making all devices have the same size | ||
1414 | */ | ||
1415 | mrrs = mps; | ||
1416 | 1407 | ||
1408 | dev_mpss = 128 << dev->pcie_mpss; | ||
1409 | |||
1410 | /* For Max performance, the MRRS must be set to the largest supported | ||
1411 | * value. However, it cannot be configured larger than the MPS the | ||
1412 | * device or the bus can support. This assumes that the largest MRRS | ||
1413 | * available on the device cannot be smaller than the device MPSS. | ||
1414 | */ | ||
1415 | mrrs = min(mps, dev_mpss); | ||
1417 | 1416 | ||
1418 | /* MRRS is a R/W register. Invalid values can be written, but a | 1417 | /* MRRS is a R/W register. Invalid values can be written, but a |
1419 | * subsiquent read will verify if the value is acceptable or not. | 1418 | * subsequent read will verify if the value is acceptable or not. |
1420 | * If the MRRS value provided is not acceptable (e.g., too large), | 1419 | * If the MRRS value provided is not acceptable (e.g., too large), |
1421 | * shrink the value until it is acceptable to the HW. | 1420 | * shrink the value until it is acceptable to the HW. |
1422 | */ | 1421 | */ |
1423 | while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) { | 1422 | while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) { |
1423 | dev_warn(&dev->dev, "Attempting to modify the PCI-E MRRS value" | ||
1424 | " to %d. If any issues are encountered, please try " | ||
1425 | "running with pci=pcie_bus_safe\n", mrrs); | ||
1424 | rc = pcie_set_readrq(dev, mrrs); | 1426 | rc = pcie_set_readrq(dev, mrrs); |
1425 | if (rc) | 1427 | if (rc) |
1426 | dev_err(&dev->dev, "Failed attempting to set the MRRS\n"); | 1428 | dev_err(&dev->dev, |
1429 | "Failed attempting to set the MRRS\n"); | ||
1427 | 1430 | ||
1428 | mrrs /= 2; | 1431 | mrrs /= 2; |
1429 | } | 1432 | } |
@@ -1436,13 +1439,13 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data) | |||
1436 | if (!pci_is_pcie(dev)) | 1439 | if (!pci_is_pcie(dev)) |
1437 | return 0; | 1440 | return 0; |
1438 | 1441 | ||
1439 | dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", | 1442 | dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", |
1440 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); | 1443 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); |
1441 | 1444 | ||
1442 | pcie_write_mps(dev, mps); | 1445 | pcie_write_mps(dev, mps); |
1443 | pcie_write_mrrs(dev, mps); | 1446 | pcie_write_mrrs(dev, mps); |
1444 | 1447 | ||
1445 | dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", | 1448 | dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", |
1446 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); | 1449 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); |
1447 | 1450 | ||
1448 | return 0; | 1451 | return 0; |
@@ -1456,9 +1459,6 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss) | |||
1456 | { | 1459 | { |
1457 | u8 smpss = mpss; | 1460 | u8 smpss = mpss; |
1458 | 1461 | ||
1459 | if (!bus->self) | ||
1460 | return; | ||
1461 | |||
1462 | if (!pci_is_pcie(bus->self)) | 1462 | if (!pci_is_pcie(bus->self)) |
1463 | return; | 1463 | return; |
1464 | 1464 | ||
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c index 335551d333b2..14a42a1edc66 100644 --- a/drivers/rtc/rtc-ep93xx.c +++ b/drivers/rtc/rtc-ep93xx.c | |||
@@ -36,6 +36,7 @@ | |||
36 | */ | 36 | */ |
37 | struct ep93xx_rtc { | 37 | struct ep93xx_rtc { |
38 | void __iomem *mmio_base; | 38 | void __iomem *mmio_base; |
39 | struct rtc_device *rtc; | ||
39 | }; | 40 | }; |
40 | 41 | ||
41 | static int ep93xx_rtc_get_swcomp(struct device *dev, unsigned short *preload, | 42 | static int ep93xx_rtc_get_swcomp(struct device *dev, unsigned short *preload, |
@@ -130,7 +131,6 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
130 | { | 131 | { |
131 | struct ep93xx_rtc *ep93xx_rtc; | 132 | struct ep93xx_rtc *ep93xx_rtc; |
132 | struct resource *res; | 133 | struct resource *res; |
133 | struct rtc_device *rtc; | ||
134 | int err; | 134 | int err; |
135 | 135 | ||
136 | ep93xx_rtc = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_rtc), GFP_KERNEL); | 136 | ep93xx_rtc = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_rtc), GFP_KERNEL); |
@@ -151,12 +151,12 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
151 | return -ENXIO; | 151 | return -ENXIO; |
152 | 152 | ||
153 | pdev->dev.platform_data = ep93xx_rtc; | 153 | pdev->dev.platform_data = ep93xx_rtc; |
154 | platform_set_drvdata(pdev, rtc); | 154 | platform_set_drvdata(pdev, ep93xx_rtc); |
155 | 155 | ||
156 | rtc = rtc_device_register(pdev->name, | 156 | ep93xx_rtc->rtc = rtc_device_register(pdev->name, |
157 | &pdev->dev, &ep93xx_rtc_ops, THIS_MODULE); | 157 | &pdev->dev, &ep93xx_rtc_ops, THIS_MODULE); |
158 | if (IS_ERR(rtc)) { | 158 | if (IS_ERR(ep93xx_rtc->rtc)) { |
159 | err = PTR_ERR(rtc); | 159 | err = PTR_ERR(ep93xx_rtc->rtc); |
160 | goto exit; | 160 | goto exit; |
161 | } | 161 | } |
162 | 162 | ||
@@ -167,7 +167,7 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
167 | return 0; | 167 | return 0; |
168 | 168 | ||
169 | fail: | 169 | fail: |
170 | rtc_device_unregister(rtc); | 170 | rtc_device_unregister(ep93xx_rtc->rtc); |
171 | exit: | 171 | exit: |
172 | platform_set_drvdata(pdev, NULL); | 172 | platform_set_drvdata(pdev, NULL); |
173 | pdev->dev.platform_data = NULL; | 173 | pdev->dev.platform_data = NULL; |
@@ -176,11 +176,11 @@ exit: | |||
176 | 176 | ||
177 | static int __exit ep93xx_rtc_remove(struct platform_device *pdev) | 177 | static int __exit ep93xx_rtc_remove(struct platform_device *pdev) |
178 | { | 178 | { |
179 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 179 | struct ep93xx_rtc *ep93xx_rtc = platform_get_drvdata(pdev); |
180 | 180 | ||
181 | sysfs_remove_group(&pdev->dev.kobj, &ep93xx_rtc_sysfs_files); | 181 | sysfs_remove_group(&pdev->dev.kobj, &ep93xx_rtc_sysfs_files); |
182 | platform_set_drvdata(pdev, NULL); | 182 | platform_set_drvdata(pdev, NULL); |
183 | rtc_device_unregister(rtc); | 183 | rtc_device_unregister(ep93xx_rtc->rtc); |
184 | pdev->dev.platform_data = NULL; | 184 | pdev->dev.platform_data = NULL; |
185 | 185 | ||
186 | return 0; | 186 | return 0; |
diff --git a/drivers/rtc/rtc-lib.c b/drivers/rtc/rtc-lib.c index 075f1708deae..c4cf05731118 100644 --- a/drivers/rtc/rtc-lib.c +++ b/drivers/rtc/rtc-lib.c | |||
@@ -85,6 +85,8 @@ void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) | |||
85 | time -= tm->tm_hour * 3600; | 85 | time -= tm->tm_hour * 3600; |
86 | tm->tm_min = time / 60; | 86 | tm->tm_min = time / 60; |
87 | tm->tm_sec = time - tm->tm_min * 60; | 87 | tm->tm_sec = time - tm->tm_min * 60; |
88 | |||
89 | tm->tm_isdst = 0; | ||
88 | } | 90 | } |
89 | EXPORT_SYMBOL(rtc_time_to_tm); | 91 | EXPORT_SYMBOL(rtc_time_to_tm); |
90 | 92 | ||
diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c index 9a81f778d6b2..20687d55e7a7 100644 --- a/drivers/rtc/rtc-twl.c +++ b/drivers/rtc/rtc-twl.c | |||
@@ -362,14 +362,6 @@ static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) | |||
362 | int res; | 362 | int res; |
363 | u8 rd_reg; | 363 | u8 rd_reg; |
364 | 364 | ||
365 | #ifdef CONFIG_LOCKDEP | ||
366 | /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which | ||
367 | * we don't want and can't tolerate. Although it might be | ||
368 | * friendlier not to borrow this thread context... | ||
369 | */ | ||
370 | local_irq_enable(); | ||
371 | #endif | ||
372 | |||
373 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 365 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
374 | if (res) | 366 | if (res) |
375 | goto out; | 367 | goto out; |
@@ -428,24 +420,12 @@ static struct rtc_class_ops twl_rtc_ops = { | |||
428 | static int __devinit twl_rtc_probe(struct platform_device *pdev) | 420 | static int __devinit twl_rtc_probe(struct platform_device *pdev) |
429 | { | 421 | { |
430 | struct rtc_device *rtc; | 422 | struct rtc_device *rtc; |
431 | int ret = 0; | 423 | int ret = -EINVAL; |
432 | int irq = platform_get_irq(pdev, 0); | 424 | int irq = platform_get_irq(pdev, 0); |
433 | u8 rd_reg; | 425 | u8 rd_reg; |
434 | 426 | ||
435 | if (irq <= 0) | 427 | if (irq <= 0) |
436 | return -EINVAL; | 428 | goto out1; |
437 | |||
438 | rtc = rtc_device_register(pdev->name, | ||
439 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
440 | if (IS_ERR(rtc)) { | ||
441 | ret = PTR_ERR(rtc); | ||
442 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
443 | PTR_ERR(rtc)); | ||
444 | goto out0; | ||
445 | |||
446 | } | ||
447 | |||
448 | platform_set_drvdata(pdev, rtc); | ||
449 | 429 | ||
450 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 430 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
451 | if (ret < 0) | 431 | if (ret < 0) |
@@ -462,14 +442,6 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | |||
462 | if (ret < 0) | 442 | if (ret < 0) |
463 | goto out1; | 443 | goto out1; |
464 | 444 | ||
465 | ret = request_irq(irq, twl_rtc_interrupt, | ||
466 | IRQF_TRIGGER_RISING, | ||
467 | dev_name(&rtc->dev), rtc); | ||
468 | if (ret < 0) { | ||
469 | dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
470 | goto out1; | ||
471 | } | ||
472 | |||
473 | if (twl_class_is_6030()) { | 445 | if (twl_class_is_6030()) { |
474 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, | 446 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
475 | REG_INT_MSK_LINE_A); | 447 | REG_INT_MSK_LINE_A); |
@@ -480,28 +452,44 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | |||
480 | /* Check RTC module status, Enable if it is off */ | 452 | /* Check RTC module status, Enable if it is off */ |
481 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); | 453 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); |
482 | if (ret < 0) | 454 | if (ret < 0) |
483 | goto out2; | 455 | goto out1; |
484 | 456 | ||
485 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { | 457 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { |
486 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); | 458 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); |
487 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; | 459 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; |
488 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); | 460 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); |
489 | if (ret < 0) | 461 | if (ret < 0) |
490 | goto out2; | 462 | goto out1; |
491 | } | 463 | } |
492 | 464 | ||
493 | /* init cached IRQ enable bits */ | 465 | /* init cached IRQ enable bits */ |
494 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); | 466 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); |
495 | if (ret < 0) | 467 | if (ret < 0) |
468 | goto out1; | ||
469 | |||
470 | rtc = rtc_device_register(pdev->name, | ||
471 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
472 | if (IS_ERR(rtc)) { | ||
473 | ret = PTR_ERR(rtc); | ||
474 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
475 | PTR_ERR(rtc)); | ||
476 | goto out1; | ||
477 | } | ||
478 | |||
479 | ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, | ||
480 | IRQF_TRIGGER_RISING, | ||
481 | dev_name(&rtc->dev), rtc); | ||
482 | if (ret < 0) { | ||
483 | dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
496 | goto out2; | 484 | goto out2; |
485 | } | ||
497 | 486 | ||
498 | return ret; | 487 | platform_set_drvdata(pdev, rtc); |
488 | return 0; | ||
499 | 489 | ||
500 | out2: | 490 | out2: |
501 | free_irq(irq, rtc); | ||
502 | out1: | ||
503 | rtc_device_unregister(rtc); | 491 | rtc_device_unregister(rtc); |
504 | out0: | 492 | out1: |
505 | return ret; | 493 | return ret; |
506 | } | 494 | } |
507 | 495 | ||
diff --git a/drivers/scsi/qla4xxx/Kconfig b/drivers/scsi/qla4xxx/Kconfig index 2c33ce6eac1e..0f5599e0abf6 100644 --- a/drivers/scsi/qla4xxx/Kconfig +++ b/drivers/scsi/qla4xxx/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config SCSI_QLA_ISCSI | 1 | config SCSI_QLA_ISCSI |
2 | tristate "QLogic ISP4XXX and ISP82XX host adapter family support" | 2 | tristate "QLogic ISP4XXX and ISP82XX host adapter family support" |
3 | depends on PCI && SCSI | 3 | depends on PCI && SCSI && NET |
4 | select SCSI_ISCSI_ATTRS | 4 | select SCSI_ISCSI_ATTRS |
5 | ---help--- | 5 | ---help--- |
6 | This driver supports the QLogic 40xx (ISP4XXX) and 8022 (ISP82XX) | 6 | This driver supports the QLogic 40xx (ISP4XXX) and 8022 (ISP82XX) |
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index 80d292fb92d8..7363c1b169e8 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <asm/backlight.h> | 19 | #include <asm/backlight.h> |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | static const char const *backlight_types[] = { | 22 | static const char *const backlight_types[] = { |
23 | [BACKLIGHT_RAW] = "raw", | 23 | [BACKLIGHT_RAW] = "raw", |
24 | [BACKLIGHT_PLATFORM] = "platform", | 24 | [BACKLIGHT_PLATFORM] = "platform", |
25 | [BACKLIGHT_FIRMWARE] = "firmware", | 25 | [BACKLIGHT_FIRMWARE] = "firmware", |
diff --git a/fs/9p/v9fs_vfs.h b/fs/9p/v9fs_vfs.h index 46ce357ca1ab..410ffd6ceb5f 100644 --- a/fs/9p/v9fs_vfs.h +++ b/fs/9p/v9fs_vfs.h | |||
@@ -54,9 +54,9 @@ extern struct kmem_cache *v9fs_inode_cache; | |||
54 | 54 | ||
55 | struct inode *v9fs_alloc_inode(struct super_block *sb); | 55 | struct inode *v9fs_alloc_inode(struct super_block *sb); |
56 | void v9fs_destroy_inode(struct inode *inode); | 56 | void v9fs_destroy_inode(struct inode *inode); |
57 | struct inode *v9fs_get_inode(struct super_block *sb, int mode); | 57 | struct inode *v9fs_get_inode(struct super_block *sb, int mode, dev_t); |
58 | int v9fs_init_inode(struct v9fs_session_info *v9ses, | 58 | int v9fs_init_inode(struct v9fs_session_info *v9ses, |
59 | struct inode *inode, int mode); | 59 | struct inode *inode, int mode, dev_t); |
60 | void v9fs_evict_inode(struct inode *inode); | 60 | void v9fs_evict_inode(struct inode *inode); |
61 | ino_t v9fs_qid2ino(struct p9_qid *qid); | 61 | ino_t v9fs_qid2ino(struct p9_qid *qid); |
62 | void v9fs_stat2inode(struct p9_wstat *, struct inode *, struct super_block *); | 62 | void v9fs_stat2inode(struct p9_wstat *, struct inode *, struct super_block *); |
@@ -83,4 +83,6 @@ static inline void v9fs_invalidate_inode_attr(struct inode *inode) | |||
83 | v9inode->cache_validity |= V9FS_INO_INVALID_ATTR; | 83 | v9inode->cache_validity |= V9FS_INO_INVALID_ATTR; |
84 | return; | 84 | return; |
85 | } | 85 | } |
86 | |||
87 | int v9fs_open_to_dotl_flags(int flags); | ||
86 | #endif | 88 | #endif |
diff --git a/fs/9p/vfs_file.c b/fs/9p/vfs_file.c index 3c173fcc2c5a..62857a810a79 100644 --- a/fs/9p/vfs_file.c +++ b/fs/9p/vfs_file.c | |||
@@ -65,7 +65,7 @@ int v9fs_file_open(struct inode *inode, struct file *file) | |||
65 | v9inode = V9FS_I(inode); | 65 | v9inode = V9FS_I(inode); |
66 | v9ses = v9fs_inode2v9ses(inode); | 66 | v9ses = v9fs_inode2v9ses(inode); |
67 | if (v9fs_proto_dotl(v9ses)) | 67 | if (v9fs_proto_dotl(v9ses)) |
68 | omode = file->f_flags; | 68 | omode = v9fs_open_to_dotl_flags(file->f_flags); |
69 | else | 69 | else |
70 | omode = v9fs_uflags2omode(file->f_flags, | 70 | omode = v9fs_uflags2omode(file->f_flags, |
71 | v9fs_proto_dotu(v9ses)); | 71 | v9fs_proto_dotu(v9ses)); |
@@ -169,7 +169,18 @@ static int v9fs_file_do_lock(struct file *filp, int cmd, struct file_lock *fl) | |||
169 | 169 | ||
170 | /* convert posix lock to p9 tlock args */ | 170 | /* convert posix lock to p9 tlock args */ |
171 | memset(&flock, 0, sizeof(flock)); | 171 | memset(&flock, 0, sizeof(flock)); |
172 | flock.type = fl->fl_type; | 172 | /* map the lock type */ |
173 | switch (fl->fl_type) { | ||
174 | case F_RDLCK: | ||
175 | flock.type = P9_LOCK_TYPE_RDLCK; | ||
176 | break; | ||
177 | case F_WRLCK: | ||
178 | flock.type = P9_LOCK_TYPE_WRLCK; | ||
179 | break; | ||
180 | case F_UNLCK: | ||
181 | flock.type = P9_LOCK_TYPE_UNLCK; | ||
182 | break; | ||
183 | } | ||
173 | flock.start = fl->fl_start; | 184 | flock.start = fl->fl_start; |
174 | if (fl->fl_end == OFFSET_MAX) | 185 | if (fl->fl_end == OFFSET_MAX) |
175 | flock.length = 0; | 186 | flock.length = 0; |
@@ -245,7 +256,7 @@ static int v9fs_file_getlock(struct file *filp, struct file_lock *fl) | |||
245 | 256 | ||
246 | /* convert posix lock to p9 tgetlock args */ | 257 | /* convert posix lock to p9 tgetlock args */ |
247 | memset(&glock, 0, sizeof(glock)); | 258 | memset(&glock, 0, sizeof(glock)); |
248 | glock.type = fl->fl_type; | 259 | glock.type = P9_LOCK_TYPE_UNLCK; |
249 | glock.start = fl->fl_start; | 260 | glock.start = fl->fl_start; |
250 | if (fl->fl_end == OFFSET_MAX) | 261 | if (fl->fl_end == OFFSET_MAX) |
251 | glock.length = 0; | 262 | glock.length = 0; |
@@ -257,17 +268,26 @@ static int v9fs_file_getlock(struct file *filp, struct file_lock *fl) | |||
257 | res = p9_client_getlock_dotl(fid, &glock); | 268 | res = p9_client_getlock_dotl(fid, &glock); |
258 | if (res < 0) | 269 | if (res < 0) |
259 | return res; | 270 | return res; |
260 | if (glock.type != F_UNLCK) { | 271 | /* map 9p lock type to os lock type */ |
261 | fl->fl_type = glock.type; | 272 | switch (glock.type) { |
273 | case P9_LOCK_TYPE_RDLCK: | ||
274 | fl->fl_type = F_RDLCK; | ||
275 | break; | ||
276 | case P9_LOCK_TYPE_WRLCK: | ||
277 | fl->fl_type = F_WRLCK; | ||
278 | break; | ||
279 | case P9_LOCK_TYPE_UNLCK: | ||
280 | fl->fl_type = F_UNLCK; | ||
281 | break; | ||
282 | } | ||
283 | if (glock.type != P9_LOCK_TYPE_UNLCK) { | ||
262 | fl->fl_start = glock.start; | 284 | fl->fl_start = glock.start; |
263 | if (glock.length == 0) | 285 | if (glock.length == 0) |
264 | fl->fl_end = OFFSET_MAX; | 286 | fl->fl_end = OFFSET_MAX; |
265 | else | 287 | else |
266 | fl->fl_end = glock.start + glock.length - 1; | 288 | fl->fl_end = glock.start + glock.length - 1; |
267 | fl->fl_pid = glock.proc_id; | 289 | fl->fl_pid = glock.proc_id; |
268 | } else | 290 | } |
269 | fl->fl_type = F_UNLCK; | ||
270 | |||
271 | return res; | 291 | return res; |
272 | } | 292 | } |
273 | 293 | ||
diff --git a/fs/9p/vfs_inode.c b/fs/9p/vfs_inode.c index 8bb5507e822f..e3c03db3c788 100644 --- a/fs/9p/vfs_inode.c +++ b/fs/9p/vfs_inode.c | |||
@@ -95,15 +95,18 @@ static int unixmode2p9mode(struct v9fs_session_info *v9ses, int mode) | |||
95 | /** | 95 | /** |
96 | * p9mode2unixmode- convert plan9 mode bits to unix mode bits | 96 | * p9mode2unixmode- convert plan9 mode bits to unix mode bits |
97 | * @v9ses: v9fs session information | 97 | * @v9ses: v9fs session information |
98 | * @mode: mode to convert | 98 | * @stat: p9_wstat from which mode need to be derived |
99 | * @rdev: major number, minor number in case of device files. | ||
99 | * | 100 | * |
100 | */ | 101 | */ |
101 | 102 | static int p9mode2unixmode(struct v9fs_session_info *v9ses, | |
102 | static int p9mode2unixmode(struct v9fs_session_info *v9ses, int mode) | 103 | struct p9_wstat *stat, dev_t *rdev) |
103 | { | 104 | { |
104 | int res; | 105 | int res; |
106 | int mode = stat->mode; | ||
105 | 107 | ||
106 | res = mode & 0777; | 108 | res = mode & S_IALLUGO; |
109 | *rdev = 0; | ||
107 | 110 | ||
108 | if ((mode & P9_DMDIR) == P9_DMDIR) | 111 | if ((mode & P9_DMDIR) == P9_DMDIR) |
109 | res |= S_IFDIR; | 112 | res |= S_IFDIR; |
@@ -116,9 +119,26 @@ static int p9mode2unixmode(struct v9fs_session_info *v9ses, int mode) | |||
116 | && (v9ses->nodev == 0)) | 119 | && (v9ses->nodev == 0)) |
117 | res |= S_IFIFO; | 120 | res |= S_IFIFO; |
118 | else if ((mode & P9_DMDEVICE) && (v9fs_proto_dotu(v9ses)) | 121 | else if ((mode & P9_DMDEVICE) && (v9fs_proto_dotu(v9ses)) |
119 | && (v9ses->nodev == 0)) | 122 | && (v9ses->nodev == 0)) { |
120 | res |= S_IFBLK; | 123 | char type = 0, ext[32]; |
121 | else | 124 | int major = -1, minor = -1; |
125 | |||
126 | strncpy(ext, stat->extension, sizeof(ext)); | ||
127 | sscanf(ext, "%c %u %u", &type, &major, &minor); | ||
128 | switch (type) { | ||
129 | case 'c': | ||
130 | res |= S_IFCHR; | ||
131 | break; | ||
132 | case 'b': | ||
133 | res |= S_IFBLK; | ||
134 | break; | ||
135 | default: | ||
136 | P9_DPRINTK(P9_DEBUG_ERROR, | ||
137 | "Unknown special type %c %s\n", type, | ||
138 | stat->extension); | ||
139 | }; | ||
140 | *rdev = MKDEV(major, minor); | ||
141 | } else | ||
122 | res |= S_IFREG; | 142 | res |= S_IFREG; |
123 | 143 | ||
124 | if (v9fs_proto_dotu(v9ses)) { | 144 | if (v9fs_proto_dotu(v9ses)) { |
@@ -131,7 +151,6 @@ static int p9mode2unixmode(struct v9fs_session_info *v9ses, int mode) | |||
131 | if ((mode & P9_DMSETVTX) == P9_DMSETVTX) | 151 | if ((mode & P9_DMSETVTX) == P9_DMSETVTX) |
132 | res |= S_ISVTX; | 152 | res |= S_ISVTX; |
133 | } | 153 | } |
134 | |||
135 | return res; | 154 | return res; |
136 | } | 155 | } |
137 | 156 | ||
@@ -242,13 +261,13 @@ void v9fs_destroy_inode(struct inode *inode) | |||
242 | } | 261 | } |
243 | 262 | ||
244 | int v9fs_init_inode(struct v9fs_session_info *v9ses, | 263 | int v9fs_init_inode(struct v9fs_session_info *v9ses, |
245 | struct inode *inode, int mode) | 264 | struct inode *inode, int mode, dev_t rdev) |
246 | { | 265 | { |
247 | int err = 0; | 266 | int err = 0; |
248 | 267 | ||
249 | inode_init_owner(inode, NULL, mode); | 268 | inode_init_owner(inode, NULL, mode); |
250 | inode->i_blocks = 0; | 269 | inode->i_blocks = 0; |
251 | inode->i_rdev = 0; | 270 | inode->i_rdev = rdev; |
252 | inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; | 271 | inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; |
253 | inode->i_mapping->a_ops = &v9fs_addr_operations; | 272 | inode->i_mapping->a_ops = &v9fs_addr_operations; |
254 | 273 | ||
@@ -335,7 +354,7 @@ error: | |||
335 | * | 354 | * |
336 | */ | 355 | */ |
337 | 356 | ||
338 | struct inode *v9fs_get_inode(struct super_block *sb, int mode) | 357 | struct inode *v9fs_get_inode(struct super_block *sb, int mode, dev_t rdev) |
339 | { | 358 | { |
340 | int err; | 359 | int err; |
341 | struct inode *inode; | 360 | struct inode *inode; |
@@ -348,7 +367,7 @@ struct inode *v9fs_get_inode(struct super_block *sb, int mode) | |||
348 | P9_EPRINTK(KERN_WARNING, "Problem allocating inode\n"); | 367 | P9_EPRINTK(KERN_WARNING, "Problem allocating inode\n"); |
349 | return ERR_PTR(-ENOMEM); | 368 | return ERR_PTR(-ENOMEM); |
350 | } | 369 | } |
351 | err = v9fs_init_inode(v9ses, inode, mode); | 370 | err = v9fs_init_inode(v9ses, inode, mode, rdev); |
352 | if (err) { | 371 | if (err) { |
353 | iput(inode); | 372 | iput(inode); |
354 | return ERR_PTR(err); | 373 | return ERR_PTR(err); |
@@ -435,11 +454,12 @@ void v9fs_evict_inode(struct inode *inode) | |||
435 | static int v9fs_test_inode(struct inode *inode, void *data) | 454 | static int v9fs_test_inode(struct inode *inode, void *data) |
436 | { | 455 | { |
437 | int umode; | 456 | int umode; |
457 | dev_t rdev; | ||
438 | struct v9fs_inode *v9inode = V9FS_I(inode); | 458 | struct v9fs_inode *v9inode = V9FS_I(inode); |
439 | struct p9_wstat *st = (struct p9_wstat *)data; | 459 | struct p9_wstat *st = (struct p9_wstat *)data; |
440 | struct v9fs_session_info *v9ses = v9fs_inode2v9ses(inode); | 460 | struct v9fs_session_info *v9ses = v9fs_inode2v9ses(inode); |
441 | 461 | ||
442 | umode = p9mode2unixmode(v9ses, st->mode); | 462 | umode = p9mode2unixmode(v9ses, st, &rdev); |
443 | /* don't match inode of different type */ | 463 | /* don't match inode of different type */ |
444 | if ((inode->i_mode & S_IFMT) != (umode & S_IFMT)) | 464 | if ((inode->i_mode & S_IFMT) != (umode & S_IFMT)) |
445 | return 0; | 465 | return 0; |
@@ -473,6 +493,7 @@ static struct inode *v9fs_qid_iget(struct super_block *sb, | |||
473 | struct p9_wstat *st, | 493 | struct p9_wstat *st, |
474 | int new) | 494 | int new) |
475 | { | 495 | { |
496 | dev_t rdev; | ||
476 | int retval, umode; | 497 | int retval, umode; |
477 | unsigned long i_ino; | 498 | unsigned long i_ino; |
478 | struct inode *inode; | 499 | struct inode *inode; |
@@ -496,8 +517,8 @@ static struct inode *v9fs_qid_iget(struct super_block *sb, | |||
496 | * later. | 517 | * later. |
497 | */ | 518 | */ |
498 | inode->i_ino = i_ino; | 519 | inode->i_ino = i_ino; |
499 | umode = p9mode2unixmode(v9ses, st->mode); | 520 | umode = p9mode2unixmode(v9ses, st, &rdev); |
500 | retval = v9fs_init_inode(v9ses, inode, umode); | 521 | retval = v9fs_init_inode(v9ses, inode, umode, rdev); |
501 | if (retval) | 522 | if (retval) |
502 | goto error; | 523 | goto error; |
503 | 524 | ||
@@ -532,6 +553,19 @@ v9fs_inode_from_fid(struct v9fs_session_info *v9ses, struct p9_fid *fid, | |||
532 | } | 553 | } |
533 | 554 | ||
534 | /** | 555 | /** |
556 | * v9fs_at_to_dotl_flags- convert Linux specific AT flags to | ||
557 | * plan 9 AT flag. | ||
558 | * @flags: flags to convert | ||
559 | */ | ||
560 | static int v9fs_at_to_dotl_flags(int flags) | ||
561 | { | ||
562 | int rflags = 0; | ||
563 | if (flags & AT_REMOVEDIR) | ||
564 | rflags |= P9_DOTL_AT_REMOVEDIR; | ||
565 | return rflags; | ||
566 | } | ||
567 | |||
568 | /** | ||
535 | * v9fs_remove - helper function to remove files and directories | 569 | * v9fs_remove - helper function to remove files and directories |
536 | * @dir: directory inode that is being deleted | 570 | * @dir: directory inode that is being deleted |
537 | * @dentry: dentry that is being deleted | 571 | * @dentry: dentry that is being deleted |
@@ -558,7 +592,8 @@ static int v9fs_remove(struct inode *dir, struct dentry *dentry, int flags) | |||
558 | return retval; | 592 | return retval; |
559 | } | 593 | } |
560 | if (v9fs_proto_dotl(v9ses)) | 594 | if (v9fs_proto_dotl(v9ses)) |
561 | retval = p9_client_unlinkat(dfid, dentry->d_name.name, flags); | 595 | retval = p9_client_unlinkat(dfid, dentry->d_name.name, |
596 | v9fs_at_to_dotl_flags(flags)); | ||
562 | if (retval == -EOPNOTSUPP) { | 597 | if (retval == -EOPNOTSUPP) { |
563 | /* Try the one based on path */ | 598 | /* Try the one based on path */ |
564 | v9fid = v9fs_fid_clone(dentry); | 599 | v9fid = v9fs_fid_clone(dentry); |
@@ -645,13 +680,11 @@ v9fs_create(struct v9fs_session_info *v9ses, struct inode *dir, | |||
645 | P9_DPRINTK(P9_DEBUG_VFS, "inode creation failed %d\n", err); | 680 | P9_DPRINTK(P9_DEBUG_VFS, "inode creation failed %d\n", err); |
646 | goto error; | 681 | goto error; |
647 | } | 682 | } |
648 | d_instantiate(dentry, inode); | ||
649 | err = v9fs_fid_add(dentry, fid); | 683 | err = v9fs_fid_add(dentry, fid); |
650 | if (err < 0) | 684 | if (err < 0) |
651 | goto error; | 685 | goto error; |
652 | 686 | d_instantiate(dentry, inode); | |
653 | return ofid; | 687 | return ofid; |
654 | |||
655 | error: | 688 | error: |
656 | if (ofid) | 689 | if (ofid) |
657 | p9_client_clunk(ofid); | 690 | p9_client_clunk(ofid); |
@@ -792,6 +825,7 @@ static int v9fs_vfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) | |||
792 | struct dentry *v9fs_vfs_lookup(struct inode *dir, struct dentry *dentry, | 825 | struct dentry *v9fs_vfs_lookup(struct inode *dir, struct dentry *dentry, |
793 | struct nameidata *nameidata) | 826 | struct nameidata *nameidata) |
794 | { | 827 | { |
828 | struct dentry *res; | ||
795 | struct super_block *sb; | 829 | struct super_block *sb; |
796 | struct v9fs_session_info *v9ses; | 830 | struct v9fs_session_info *v9ses; |
797 | struct p9_fid *dfid, *fid; | 831 | struct p9_fid *dfid, *fid; |
@@ -823,22 +857,35 @@ struct dentry *v9fs_vfs_lookup(struct inode *dir, struct dentry *dentry, | |||
823 | 857 | ||
824 | return ERR_PTR(result); | 858 | return ERR_PTR(result); |
825 | } | 859 | } |
826 | 860 | /* | |
827 | inode = v9fs_get_inode_from_fid(v9ses, fid, dir->i_sb); | 861 | * Make sure we don't use a wrong inode due to parallel |
862 | * unlink. For cached mode create calls request for new | ||
863 | * inode. But with cache disabled, lookup should do this. | ||
864 | */ | ||
865 | if (v9ses->cache) | ||
866 | inode = v9fs_get_inode_from_fid(v9ses, fid, dir->i_sb); | ||
867 | else | ||
868 | inode = v9fs_get_new_inode_from_fid(v9ses, fid, dir->i_sb); | ||
828 | if (IS_ERR(inode)) { | 869 | if (IS_ERR(inode)) { |
829 | result = PTR_ERR(inode); | 870 | result = PTR_ERR(inode); |
830 | inode = NULL; | 871 | inode = NULL; |
831 | goto error; | 872 | goto error; |
832 | } | 873 | } |
833 | |||
834 | result = v9fs_fid_add(dentry, fid); | 874 | result = v9fs_fid_add(dentry, fid); |
835 | if (result < 0) | 875 | if (result < 0) |
836 | goto error_iput; | 876 | goto error_iput; |
837 | |||
838 | inst_out: | 877 | inst_out: |
839 | d_add(dentry, inode); | 878 | /* |
840 | return NULL; | 879 | * If we had a rename on the server and a parallel lookup |
841 | 880 | * for the new name, then make sure we instantiate with | |
881 | * the new name. ie look up for a/b, while on server somebody | ||
882 | * moved b under k and client parallely did a lookup for | ||
883 | * k/b. | ||
884 | */ | ||
885 | res = d_materialise_unique(dentry, inode); | ||
886 | if (!IS_ERR(res)) | ||
887 | return res; | ||
888 | result = PTR_ERR(res); | ||
842 | error_iput: | 889 | error_iput: |
843 | iput(inode); | 890 | iput(inode); |
844 | error: | 891 | error: |
@@ -1002,7 +1049,7 @@ v9fs_vfs_getattr(struct vfsmount *mnt, struct dentry *dentry, | |||
1002 | return PTR_ERR(st); | 1049 | return PTR_ERR(st); |
1003 | 1050 | ||
1004 | v9fs_stat2inode(st, dentry->d_inode, dentry->d_inode->i_sb); | 1051 | v9fs_stat2inode(st, dentry->d_inode, dentry->d_inode->i_sb); |
1005 | generic_fillattr(dentry->d_inode, stat); | 1052 | generic_fillattr(dentry->d_inode, stat); |
1006 | 1053 | ||
1007 | p9stat_free(st); | 1054 | p9stat_free(st); |
1008 | kfree(st); | 1055 | kfree(st); |
@@ -1086,6 +1133,7 @@ void | |||
1086 | v9fs_stat2inode(struct p9_wstat *stat, struct inode *inode, | 1133 | v9fs_stat2inode(struct p9_wstat *stat, struct inode *inode, |
1087 | struct super_block *sb) | 1134 | struct super_block *sb) |
1088 | { | 1135 | { |
1136 | mode_t mode; | ||
1089 | char ext[32]; | 1137 | char ext[32]; |
1090 | char tag_name[14]; | 1138 | char tag_name[14]; |
1091 | unsigned int i_nlink; | 1139 | unsigned int i_nlink; |
@@ -1121,31 +1169,9 @@ v9fs_stat2inode(struct p9_wstat *stat, struct inode *inode, | |||
1121 | inode->i_nlink = i_nlink; | 1169 | inode->i_nlink = i_nlink; |
1122 | } | 1170 | } |
1123 | } | 1171 | } |
1124 | inode->i_mode = p9mode2unixmode(v9ses, stat->mode); | 1172 | mode = stat->mode & S_IALLUGO; |
1125 | if ((S_ISBLK(inode->i_mode)) || (S_ISCHR(inode->i_mode))) { | 1173 | mode |= inode->i_mode & ~S_IALLUGO; |
1126 | char type = 0; | 1174 | inode->i_mode = mode; |
1127 | int major = -1; | ||
1128 | int minor = -1; | ||
1129 | |||
1130 | strncpy(ext, stat->extension, sizeof(ext)); | ||
1131 | sscanf(ext, "%c %u %u", &type, &major, &minor); | ||
1132 | switch (type) { | ||
1133 | case 'c': | ||
1134 | inode->i_mode &= ~S_IFBLK; | ||
1135 | inode->i_mode |= S_IFCHR; | ||
1136 | break; | ||
1137 | case 'b': | ||
1138 | break; | ||
1139 | default: | ||
1140 | P9_DPRINTK(P9_DEBUG_ERROR, | ||
1141 | "Unknown special type %c %s\n", type, | ||
1142 | stat->extension); | ||
1143 | }; | ||
1144 | inode->i_rdev = MKDEV(major, minor); | ||
1145 | init_special_inode(inode, inode->i_mode, inode->i_rdev); | ||
1146 | } else | ||
1147 | inode->i_rdev = 0; | ||
1148 | |||
1149 | i_size_write(inode, stat->length); | 1175 | i_size_write(inode, stat->length); |
1150 | 1176 | ||
1151 | /* not real number of blocks, but 512 byte ones ... */ | 1177 | /* not real number of blocks, but 512 byte ones ... */ |
@@ -1411,6 +1437,8 @@ v9fs_vfs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t rdev) | |||
1411 | 1437 | ||
1412 | int v9fs_refresh_inode(struct p9_fid *fid, struct inode *inode) | 1438 | int v9fs_refresh_inode(struct p9_fid *fid, struct inode *inode) |
1413 | { | 1439 | { |
1440 | int umode; | ||
1441 | dev_t rdev; | ||
1414 | loff_t i_size; | 1442 | loff_t i_size; |
1415 | struct p9_wstat *st; | 1443 | struct p9_wstat *st; |
1416 | struct v9fs_session_info *v9ses; | 1444 | struct v9fs_session_info *v9ses; |
@@ -1419,6 +1447,12 @@ int v9fs_refresh_inode(struct p9_fid *fid, struct inode *inode) | |||
1419 | st = p9_client_stat(fid); | 1447 | st = p9_client_stat(fid); |
1420 | if (IS_ERR(st)) | 1448 | if (IS_ERR(st)) |
1421 | return PTR_ERR(st); | 1449 | return PTR_ERR(st); |
1450 | /* | ||
1451 | * Don't update inode if the file type is different | ||
1452 | */ | ||
1453 | umode = p9mode2unixmode(v9ses, st, &rdev); | ||
1454 | if ((inode->i_mode & S_IFMT) != (umode & S_IFMT)) | ||
1455 | goto out; | ||
1422 | 1456 | ||
1423 | spin_lock(&inode->i_lock); | 1457 | spin_lock(&inode->i_lock); |
1424 | /* | 1458 | /* |
@@ -1430,6 +1464,7 @@ int v9fs_refresh_inode(struct p9_fid *fid, struct inode *inode) | |||
1430 | if (v9ses->cache) | 1464 | if (v9ses->cache) |
1431 | inode->i_size = i_size; | 1465 | inode->i_size = i_size; |
1432 | spin_unlock(&inode->i_lock); | 1466 | spin_unlock(&inode->i_lock); |
1467 | out: | ||
1433 | p9stat_free(st); | 1468 | p9stat_free(st); |
1434 | kfree(st); | 1469 | kfree(st); |
1435 | return 0; | 1470 | return 0; |
diff --git a/fs/9p/vfs_inode_dotl.c b/fs/9p/vfs_inode_dotl.c index b6c8ed205192..aded79fcd5cf 100644 --- a/fs/9p/vfs_inode_dotl.c +++ b/fs/9p/vfs_inode_dotl.c | |||
@@ -153,7 +153,8 @@ static struct inode *v9fs_qid_iget_dotl(struct super_block *sb, | |||
153 | * later. | 153 | * later. |
154 | */ | 154 | */ |
155 | inode->i_ino = i_ino; | 155 | inode->i_ino = i_ino; |
156 | retval = v9fs_init_inode(v9ses, inode, st->st_mode); | 156 | retval = v9fs_init_inode(v9ses, inode, |
157 | st->st_mode, new_decode_dev(st->st_rdev)); | ||
157 | if (retval) | 158 | if (retval) |
158 | goto error; | 159 | goto error; |
159 | 160 | ||
@@ -190,6 +191,58 @@ v9fs_inode_from_fid_dotl(struct v9fs_session_info *v9ses, struct p9_fid *fid, | |||
190 | return inode; | 191 | return inode; |
191 | } | 192 | } |
192 | 193 | ||
194 | struct dotl_openflag_map { | ||
195 | int open_flag; | ||
196 | int dotl_flag; | ||
197 | }; | ||
198 | |||
199 | static int v9fs_mapped_dotl_flags(int flags) | ||
200 | { | ||
201 | int i; | ||
202 | int rflags = 0; | ||
203 | struct dotl_openflag_map dotl_oflag_map[] = { | ||
204 | { O_CREAT, P9_DOTL_CREATE }, | ||
205 | { O_EXCL, P9_DOTL_EXCL }, | ||
206 | { O_NOCTTY, P9_DOTL_NOCTTY }, | ||
207 | { O_TRUNC, P9_DOTL_TRUNC }, | ||
208 | { O_APPEND, P9_DOTL_APPEND }, | ||
209 | { O_NONBLOCK, P9_DOTL_NONBLOCK }, | ||
210 | { O_DSYNC, P9_DOTL_DSYNC }, | ||
211 | { FASYNC, P9_DOTL_FASYNC }, | ||
212 | { O_DIRECT, P9_DOTL_DIRECT }, | ||
213 | { O_LARGEFILE, P9_DOTL_LARGEFILE }, | ||
214 | { O_DIRECTORY, P9_DOTL_DIRECTORY }, | ||
215 | { O_NOFOLLOW, P9_DOTL_NOFOLLOW }, | ||
216 | { O_NOATIME, P9_DOTL_NOATIME }, | ||
217 | { O_CLOEXEC, P9_DOTL_CLOEXEC }, | ||
218 | { O_SYNC, P9_DOTL_SYNC}, | ||
219 | }; | ||
220 | for (i = 0; i < ARRAY_SIZE(dotl_oflag_map); i++) { | ||
221 | if (flags & dotl_oflag_map[i].open_flag) | ||
222 | rflags |= dotl_oflag_map[i].dotl_flag; | ||
223 | } | ||
224 | return rflags; | ||
225 | } | ||
226 | |||
227 | /** | ||
228 | * v9fs_open_to_dotl_flags- convert Linux specific open flags to | ||
229 | * plan 9 open flag. | ||
230 | * @flags: flags to convert | ||
231 | */ | ||
232 | int v9fs_open_to_dotl_flags(int flags) | ||
233 | { | ||
234 | int rflags = 0; | ||
235 | |||
236 | /* | ||
237 | * We have same bits for P9_DOTL_READONLY, P9_DOTL_WRONLY | ||
238 | * and P9_DOTL_NOACCESS | ||
239 | */ | ||
240 | rflags |= flags & O_ACCMODE; | ||
241 | rflags |= v9fs_mapped_dotl_flags(flags); | ||
242 | |||
243 | return rflags; | ||
244 | } | ||
245 | |||
193 | /** | 246 | /** |
194 | * v9fs_vfs_create_dotl - VFS hook to create files for 9P2000.L protocol. | 247 | * v9fs_vfs_create_dotl - VFS hook to create files for 9P2000.L protocol. |
195 | * @dir: directory inode that is being created | 248 | * @dir: directory inode that is being created |
@@ -258,7 +311,8 @@ v9fs_vfs_create_dotl(struct inode *dir, struct dentry *dentry, int omode, | |||
258 | "Failed to get acl values in creat %d\n", err); | 311 | "Failed to get acl values in creat %d\n", err); |
259 | goto error; | 312 | goto error; |
260 | } | 313 | } |
261 | err = p9_client_create_dotl(ofid, name, flags, mode, gid, &qid); | 314 | err = p9_client_create_dotl(ofid, name, v9fs_open_to_dotl_flags(flags), |
315 | mode, gid, &qid); | ||
262 | if (err < 0) { | 316 | if (err < 0) { |
263 | P9_DPRINTK(P9_DEBUG_VFS, | 317 | P9_DPRINTK(P9_DEBUG_VFS, |
264 | "p9_client_open_dotl failed in creat %d\n", | 318 | "p9_client_open_dotl failed in creat %d\n", |
@@ -281,10 +335,10 @@ v9fs_vfs_create_dotl(struct inode *dir, struct dentry *dentry, int omode, | |||
281 | P9_DPRINTK(P9_DEBUG_VFS, "inode creation failed %d\n", err); | 335 | P9_DPRINTK(P9_DEBUG_VFS, "inode creation failed %d\n", err); |
282 | goto error; | 336 | goto error; |
283 | } | 337 | } |
284 | d_instantiate(dentry, inode); | ||
285 | err = v9fs_fid_add(dentry, fid); | 338 | err = v9fs_fid_add(dentry, fid); |
286 | if (err < 0) | 339 | if (err < 0) |
287 | goto error; | 340 | goto error; |
341 | d_instantiate(dentry, inode); | ||
288 | 342 | ||
289 | /* Now set the ACL based on the default value */ | 343 | /* Now set the ACL based on the default value */ |
290 | v9fs_set_create_acl(dentry, &dacl, &pacl); | 344 | v9fs_set_create_acl(dentry, &dacl, &pacl); |
@@ -403,10 +457,10 @@ static int v9fs_vfs_mkdir_dotl(struct inode *dir, | |||
403 | err); | 457 | err); |
404 | goto error; | 458 | goto error; |
405 | } | 459 | } |
406 | d_instantiate(dentry, inode); | ||
407 | err = v9fs_fid_add(dentry, fid); | 460 | err = v9fs_fid_add(dentry, fid); |
408 | if (err < 0) | 461 | if (err < 0) |
409 | goto error; | 462 | goto error; |
463 | d_instantiate(dentry, inode); | ||
410 | fid = NULL; | 464 | fid = NULL; |
411 | } else { | 465 | } else { |
412 | /* | 466 | /* |
@@ -414,7 +468,7 @@ static int v9fs_vfs_mkdir_dotl(struct inode *dir, | |||
414 | * inode with stat. We need to get an inode | 468 | * inode with stat. We need to get an inode |
415 | * so that we can set the acl with dentry | 469 | * so that we can set the acl with dentry |
416 | */ | 470 | */ |
417 | inode = v9fs_get_inode(dir->i_sb, mode); | 471 | inode = v9fs_get_inode(dir->i_sb, mode, 0); |
418 | if (IS_ERR(inode)) { | 472 | if (IS_ERR(inode)) { |
419 | err = PTR_ERR(inode); | 473 | err = PTR_ERR(inode); |
420 | goto error; | 474 | goto error; |
@@ -540,6 +594,7 @@ int v9fs_vfs_setattr_dotl(struct dentry *dentry, struct iattr *iattr) | |||
540 | void | 594 | void |
541 | v9fs_stat2inode_dotl(struct p9_stat_dotl *stat, struct inode *inode) | 595 | v9fs_stat2inode_dotl(struct p9_stat_dotl *stat, struct inode *inode) |
542 | { | 596 | { |
597 | mode_t mode; | ||
543 | struct v9fs_inode *v9inode = V9FS_I(inode); | 598 | struct v9fs_inode *v9inode = V9FS_I(inode); |
544 | 599 | ||
545 | if ((stat->st_result_mask & P9_STATS_BASIC) == P9_STATS_BASIC) { | 600 | if ((stat->st_result_mask & P9_STATS_BASIC) == P9_STATS_BASIC) { |
@@ -552,11 +607,10 @@ v9fs_stat2inode_dotl(struct p9_stat_dotl *stat, struct inode *inode) | |||
552 | inode->i_uid = stat->st_uid; | 607 | inode->i_uid = stat->st_uid; |
553 | inode->i_gid = stat->st_gid; | 608 | inode->i_gid = stat->st_gid; |
554 | inode->i_nlink = stat->st_nlink; | 609 | inode->i_nlink = stat->st_nlink; |
555 | inode->i_mode = stat->st_mode; | ||
556 | inode->i_rdev = new_decode_dev(stat->st_rdev); | ||
557 | 610 | ||
558 | if ((S_ISBLK(inode->i_mode)) || (S_ISCHR(inode->i_mode))) | 611 | mode = stat->st_mode & S_IALLUGO; |
559 | init_special_inode(inode, inode->i_mode, inode->i_rdev); | 612 | mode |= inode->i_mode & ~S_IALLUGO; |
613 | inode->i_mode = mode; | ||
560 | 614 | ||
561 | i_size_write(inode, stat->st_size); | 615 | i_size_write(inode, stat->st_size); |
562 | inode->i_blocks = stat->st_blocks; | 616 | inode->i_blocks = stat->st_blocks; |
@@ -657,14 +711,14 @@ v9fs_vfs_symlink_dotl(struct inode *dir, struct dentry *dentry, | |||
657 | err); | 711 | err); |
658 | goto error; | 712 | goto error; |
659 | } | 713 | } |
660 | d_instantiate(dentry, inode); | ||
661 | err = v9fs_fid_add(dentry, fid); | 714 | err = v9fs_fid_add(dentry, fid); |
662 | if (err < 0) | 715 | if (err < 0) |
663 | goto error; | 716 | goto error; |
717 | d_instantiate(dentry, inode); | ||
664 | fid = NULL; | 718 | fid = NULL; |
665 | } else { | 719 | } else { |
666 | /* Not in cached mode. No need to populate inode with stat */ | 720 | /* Not in cached mode. No need to populate inode with stat */ |
667 | inode = v9fs_get_inode(dir->i_sb, S_IFLNK); | 721 | inode = v9fs_get_inode(dir->i_sb, S_IFLNK, 0); |
668 | if (IS_ERR(inode)) { | 722 | if (IS_ERR(inode)) { |
669 | err = PTR_ERR(inode); | 723 | err = PTR_ERR(inode); |
670 | goto error; | 724 | goto error; |
@@ -810,17 +864,17 @@ v9fs_vfs_mknod_dotl(struct inode *dir, struct dentry *dentry, int omode, | |||
810 | err); | 864 | err); |
811 | goto error; | 865 | goto error; |
812 | } | 866 | } |
813 | d_instantiate(dentry, inode); | ||
814 | err = v9fs_fid_add(dentry, fid); | 867 | err = v9fs_fid_add(dentry, fid); |
815 | if (err < 0) | 868 | if (err < 0) |
816 | goto error; | 869 | goto error; |
870 | d_instantiate(dentry, inode); | ||
817 | fid = NULL; | 871 | fid = NULL; |
818 | } else { | 872 | } else { |
819 | /* | 873 | /* |
820 | * Not in cached mode. No need to populate inode with stat. | 874 | * Not in cached mode. No need to populate inode with stat. |
821 | * socket syscall returns a fd, so we need instantiate | 875 | * socket syscall returns a fd, so we need instantiate |
822 | */ | 876 | */ |
823 | inode = v9fs_get_inode(dir->i_sb, mode); | 877 | inode = v9fs_get_inode(dir->i_sb, mode, rdev); |
824 | if (IS_ERR(inode)) { | 878 | if (IS_ERR(inode)) { |
825 | err = PTR_ERR(inode); | 879 | err = PTR_ERR(inode); |
826 | goto error; | 880 | goto error; |
@@ -886,6 +940,11 @@ int v9fs_refresh_inode_dotl(struct p9_fid *fid, struct inode *inode) | |||
886 | st = p9_client_getattr_dotl(fid, P9_STATS_ALL); | 940 | st = p9_client_getattr_dotl(fid, P9_STATS_ALL); |
887 | if (IS_ERR(st)) | 941 | if (IS_ERR(st)) |
888 | return PTR_ERR(st); | 942 | return PTR_ERR(st); |
943 | /* | ||
944 | * Don't update inode if the file type is different | ||
945 | */ | ||
946 | if ((inode->i_mode & S_IFMT) != (st->st_mode & S_IFMT)) | ||
947 | goto out; | ||
889 | 948 | ||
890 | spin_lock(&inode->i_lock); | 949 | spin_lock(&inode->i_lock); |
891 | /* | 950 | /* |
@@ -897,6 +956,7 @@ int v9fs_refresh_inode_dotl(struct p9_fid *fid, struct inode *inode) | |||
897 | if (v9ses->cache) | 956 | if (v9ses->cache) |
898 | inode->i_size = i_size; | 957 | inode->i_size = i_size; |
899 | spin_unlock(&inode->i_lock); | 958 | spin_unlock(&inode->i_lock); |
959 | out: | ||
900 | kfree(st); | 960 | kfree(st); |
901 | return 0; | 961 | return 0; |
902 | } | 962 | } |
diff --git a/fs/9p/vfs_super.c b/fs/9p/vfs_super.c index feef6cdc1fd2..c70251d47ed1 100644 --- a/fs/9p/vfs_super.c +++ b/fs/9p/vfs_super.c | |||
@@ -149,7 +149,7 @@ static struct dentry *v9fs_mount(struct file_system_type *fs_type, int flags, | |||
149 | else | 149 | else |
150 | sb->s_d_op = &v9fs_dentry_operations; | 150 | sb->s_d_op = &v9fs_dentry_operations; |
151 | 151 | ||
152 | inode = v9fs_get_inode(sb, S_IFDIR | mode); | 152 | inode = v9fs_get_inode(sb, S_IFDIR | mode, 0); |
153 | if (IS_ERR(inode)) { | 153 | if (IS_ERR(inode)) { |
154 | retval = PTR_ERR(inode); | 154 | retval = PTR_ERR(inode); |
155 | goto release_sb; | 155 | goto release_sb; |
diff --git a/fs/block_dev.c b/fs/block_dev.c index ff77262e887c..95f786ec7f08 100644 --- a/fs/block_dev.c +++ b/fs/block_dev.c | |||
@@ -1429,6 +1429,11 @@ static int __blkdev_put(struct block_device *bdev, fmode_t mode, int for_part) | |||
1429 | WARN_ON_ONCE(bdev->bd_holders); | 1429 | WARN_ON_ONCE(bdev->bd_holders); |
1430 | sync_blockdev(bdev); | 1430 | sync_blockdev(bdev); |
1431 | kill_bdev(bdev); | 1431 | kill_bdev(bdev); |
1432 | /* ->release can cause the old bdi to disappear, | ||
1433 | * so must switch it out first | ||
1434 | */ | ||
1435 | bdev_inode_switch_bdi(bdev->bd_inode, | ||
1436 | &default_backing_dev_info); | ||
1432 | } | 1437 | } |
1433 | if (bdev->bd_contains == bdev) { | 1438 | if (bdev->bd_contains == bdev) { |
1434 | if (disk->fops->release) | 1439 | if (disk->fops->release) |
@@ -1442,8 +1447,6 @@ static int __blkdev_put(struct block_device *bdev, fmode_t mode, int for_part) | |||
1442 | disk_put_part(bdev->bd_part); | 1447 | disk_put_part(bdev->bd_part); |
1443 | bdev->bd_part = NULL; | 1448 | bdev->bd_part = NULL; |
1444 | bdev->bd_disk = NULL; | 1449 | bdev->bd_disk = NULL; |
1445 | bdev_inode_switch_bdi(bdev->bd_inode, | ||
1446 | &default_backing_dev_info); | ||
1447 | if (bdev != bdev->bd_contains) | 1450 | if (bdev != bdev->bd_contains) |
1448 | victim = bdev->bd_contains; | 1451 | victim = bdev->bd_contains; |
1449 | bdev->bd_contains = NULL; | 1452 | bdev->bd_contains = NULL; |
diff --git a/fs/btrfs/btrfs_inode.h b/fs/btrfs/btrfs_inode.h index 502b9e988679..d9f99a16edd6 100644 --- a/fs/btrfs/btrfs_inode.h +++ b/fs/btrfs/btrfs_inode.h | |||
@@ -176,7 +176,11 @@ static inline u64 btrfs_ino(struct inode *inode) | |||
176 | { | 176 | { |
177 | u64 ino = BTRFS_I(inode)->location.objectid; | 177 | u64 ino = BTRFS_I(inode)->location.objectid; |
178 | 178 | ||
179 | if (ino <= BTRFS_FIRST_FREE_OBJECTID) | 179 | /* |
180 | * !ino: btree_inode | ||
181 | * type == BTRFS_ROOT_ITEM_KEY: subvol dir | ||
182 | */ | ||
183 | if (!ino || BTRFS_I(inode)->location.type == BTRFS_ROOT_ITEM_KEY) | ||
180 | ino = inode->i_ino; | 184 | ino = inode->i_ino; |
181 | return ino; | 185 | return ino; |
182 | } | 186 | } |
diff --git a/fs/btrfs/file-item.c b/fs/btrfs/file-item.c index b910694f61ed..a1cb7821becd 100644 --- a/fs/btrfs/file-item.c +++ b/fs/btrfs/file-item.c | |||
@@ -183,8 +183,10 @@ static int __btrfs_lookup_bio_sums(struct btrfs_root *root, | |||
183 | * read from the commit root and sidestep a nasty deadlock | 183 | * read from the commit root and sidestep a nasty deadlock |
184 | * between reading the free space cache and updating the csum tree. | 184 | * between reading the free space cache and updating the csum tree. |
185 | */ | 185 | */ |
186 | if (btrfs_is_free_space_inode(root, inode)) | 186 | if (btrfs_is_free_space_inode(root, inode)) { |
187 | path->search_commit_root = 1; | 187 | path->search_commit_root = 1; |
188 | path->skip_locking = 1; | ||
189 | } | ||
188 | 190 | ||
189 | disk_bytenr = (u64)bio->bi_sector << 9; | 191 | disk_bytenr = (u64)bio->bi_sector << 9; |
190 | if (dio) | 192 | if (dio) |
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index e7872e485f13..3c3abff731a7 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c | |||
@@ -1075,12 +1075,6 @@ static noinline int prepare_pages(struct btrfs_root *root, struct file *file, | |||
1075 | start_pos = pos & ~((u64)root->sectorsize - 1); | 1075 | start_pos = pos & ~((u64)root->sectorsize - 1); |
1076 | last_pos = ((u64)index + num_pages) << PAGE_CACHE_SHIFT; | 1076 | last_pos = ((u64)index + num_pages) << PAGE_CACHE_SHIFT; |
1077 | 1077 | ||
1078 | if (start_pos > inode->i_size) { | ||
1079 | err = btrfs_cont_expand(inode, i_size_read(inode), start_pos); | ||
1080 | if (err) | ||
1081 | return err; | ||
1082 | } | ||
1083 | |||
1084 | again: | 1078 | again: |
1085 | for (i = 0; i < num_pages; i++) { | 1079 | for (i = 0; i < num_pages; i++) { |
1086 | pages[i] = find_or_create_page(inode->i_mapping, index + i, | 1080 | pages[i] = find_or_create_page(inode->i_mapping, index + i, |
@@ -1338,6 +1332,7 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb, | |||
1338 | struct inode *inode = fdentry(file)->d_inode; | 1332 | struct inode *inode = fdentry(file)->d_inode; |
1339 | struct btrfs_root *root = BTRFS_I(inode)->root; | 1333 | struct btrfs_root *root = BTRFS_I(inode)->root; |
1340 | loff_t *ppos = &iocb->ki_pos; | 1334 | loff_t *ppos = &iocb->ki_pos; |
1335 | u64 start_pos; | ||
1341 | ssize_t num_written = 0; | 1336 | ssize_t num_written = 0; |
1342 | ssize_t err = 0; | 1337 | ssize_t err = 0; |
1343 | size_t count, ocount; | 1338 | size_t count, ocount; |
@@ -1386,6 +1381,15 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb, | |||
1386 | file_update_time(file); | 1381 | file_update_time(file); |
1387 | BTRFS_I(inode)->sequence++; | 1382 | BTRFS_I(inode)->sequence++; |
1388 | 1383 | ||
1384 | start_pos = round_down(pos, root->sectorsize); | ||
1385 | if (start_pos > i_size_read(inode)) { | ||
1386 | err = btrfs_cont_expand(inode, i_size_read(inode), start_pos); | ||
1387 | if (err) { | ||
1388 | mutex_unlock(&inode->i_mutex); | ||
1389 | goto out; | ||
1390 | } | ||
1391 | } | ||
1392 | |||
1389 | if (unlikely(file->f_flags & O_DIRECT)) { | 1393 | if (unlikely(file->f_flags & O_DIRECT)) { |
1390 | num_written = __btrfs_direct_write(iocb, iov, nr_segs, | 1394 | num_written = __btrfs_direct_write(iocb, iov, nr_segs, |
1391 | pos, ppos, count, ocount); | 1395 | pos, ppos, count, ocount); |
diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c index 6a265b9f85f2..41ac927401d0 100644 --- a/fs/btrfs/free-space-cache.c +++ b/fs/btrfs/free-space-cache.c | |||
@@ -190,9 +190,11 @@ int btrfs_truncate_free_space_cache(struct btrfs_root *root, | |||
190 | struct btrfs_path *path, | 190 | struct btrfs_path *path, |
191 | struct inode *inode) | 191 | struct inode *inode) |
192 | { | 192 | { |
193 | struct btrfs_block_rsv *rsv; | ||
193 | loff_t oldsize; | 194 | loff_t oldsize; |
194 | int ret = 0; | 195 | int ret = 0; |
195 | 196 | ||
197 | rsv = trans->block_rsv; | ||
196 | trans->block_rsv = root->orphan_block_rsv; | 198 | trans->block_rsv = root->orphan_block_rsv; |
197 | ret = btrfs_block_rsv_check(trans, root, | 199 | ret = btrfs_block_rsv_check(trans, root, |
198 | root->orphan_block_rsv, | 200 | root->orphan_block_rsv, |
@@ -210,6 +212,8 @@ int btrfs_truncate_free_space_cache(struct btrfs_root *root, | |||
210 | */ | 212 | */ |
211 | ret = btrfs_truncate_inode_items(trans, root, inode, | 213 | ret = btrfs_truncate_inode_items(trans, root, inode, |
212 | 0, BTRFS_EXTENT_DATA_KEY); | 214 | 0, BTRFS_EXTENT_DATA_KEY); |
215 | |||
216 | trans->block_rsv = rsv; | ||
213 | if (ret) { | 217 | if (ret) { |
214 | WARN_ON(1); | 218 | WARN_ON(1); |
215 | return ret; | 219 | return ret; |
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index 0ccc7438ad34..4d14de6d121b 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c | |||
@@ -1786,7 +1786,7 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) | |||
1786 | &ordered_extent->list); | 1786 | &ordered_extent->list); |
1787 | 1787 | ||
1788 | ret = btrfs_ordered_update_i_size(inode, 0, ordered_extent); | 1788 | ret = btrfs_ordered_update_i_size(inode, 0, ordered_extent); |
1789 | if (!ret) { | 1789 | if (!ret || !test_bit(BTRFS_ORDERED_PREALLOC, &ordered_extent->flags)) { |
1790 | ret = btrfs_update_inode(trans, root, inode); | 1790 | ret = btrfs_update_inode(trans, root, inode); |
1791 | BUG_ON(ret); | 1791 | BUG_ON(ret); |
1792 | } | 1792 | } |
@@ -3510,15 +3510,19 @@ int btrfs_cont_expand(struct inode *inode, loff_t oldsize, loff_t size) | |||
3510 | err = btrfs_drop_extents(trans, inode, cur_offset, | 3510 | err = btrfs_drop_extents(trans, inode, cur_offset, |
3511 | cur_offset + hole_size, | 3511 | cur_offset + hole_size, |
3512 | &hint_byte, 1); | 3512 | &hint_byte, 1); |
3513 | if (err) | 3513 | if (err) { |
3514 | btrfs_end_transaction(trans, root); | ||
3514 | break; | 3515 | break; |
3516 | } | ||
3515 | 3517 | ||
3516 | err = btrfs_insert_file_extent(trans, root, | 3518 | err = btrfs_insert_file_extent(trans, root, |
3517 | btrfs_ino(inode), cur_offset, 0, | 3519 | btrfs_ino(inode), cur_offset, 0, |
3518 | 0, hole_size, 0, hole_size, | 3520 | 0, hole_size, 0, hole_size, |
3519 | 0, 0, 0); | 3521 | 0, 0, 0); |
3520 | if (err) | 3522 | if (err) { |
3523 | btrfs_end_transaction(trans, root); | ||
3521 | break; | 3524 | break; |
3525 | } | ||
3522 | 3526 | ||
3523 | btrfs_drop_extent_cache(inode, hole_start, | 3527 | btrfs_drop_extent_cache(inode, hole_start, |
3524 | last_byte - 1, 0); | 3528 | last_byte - 1, 0); |
@@ -3952,7 +3956,6 @@ struct inode *btrfs_iget(struct super_block *s, struct btrfs_key *location, | |||
3952 | struct btrfs_root *root, int *new) | 3956 | struct btrfs_root *root, int *new) |
3953 | { | 3957 | { |
3954 | struct inode *inode; | 3958 | struct inode *inode; |
3955 | int bad_inode = 0; | ||
3956 | 3959 | ||
3957 | inode = btrfs_iget_locked(s, location->objectid, root); | 3960 | inode = btrfs_iget_locked(s, location->objectid, root); |
3958 | if (!inode) | 3961 | if (!inode) |
@@ -3968,15 +3971,12 @@ struct inode *btrfs_iget(struct super_block *s, struct btrfs_key *location, | |||
3968 | if (new) | 3971 | if (new) |
3969 | *new = 1; | 3972 | *new = 1; |
3970 | } else { | 3973 | } else { |
3971 | bad_inode = 1; | 3974 | unlock_new_inode(inode); |
3975 | iput(inode); | ||
3976 | inode = ERR_PTR(-ESTALE); | ||
3972 | } | 3977 | } |
3973 | } | 3978 | } |
3974 | 3979 | ||
3975 | if (bad_inode) { | ||
3976 | iput(inode); | ||
3977 | inode = ERR_PTR(-ESTALE); | ||
3978 | } | ||
3979 | |||
3980 | return inode; | 3980 | return inode; |
3981 | } | 3981 | } |
3982 | 3982 | ||
@@ -5823,7 +5823,7 @@ again: | |||
5823 | 5823 | ||
5824 | add_pending_csums(trans, inode, ordered->file_offset, &ordered->list); | 5824 | add_pending_csums(trans, inode, ordered->file_offset, &ordered->list); |
5825 | ret = btrfs_ordered_update_i_size(inode, 0, ordered); | 5825 | ret = btrfs_ordered_update_i_size(inode, 0, ordered); |
5826 | if (!ret) | 5826 | if (!ret || !test_bit(BTRFS_ORDERED_PREALLOC, &ordered->flags)) |
5827 | btrfs_update_inode(trans, root, inode); | 5827 | btrfs_update_inode(trans, root, inode); |
5828 | ret = 0; | 5828 | ret = 0; |
5829 | out_unlock: | 5829 | out_unlock: |
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index 970977aab224..3351b1b24574 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c | |||
@@ -2220,6 +2220,12 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, | |||
2220 | !IS_ALIGNED(destoff, bs)) | 2220 | !IS_ALIGNED(destoff, bs)) |
2221 | goto out_unlock; | 2221 | goto out_unlock; |
2222 | 2222 | ||
2223 | if (destoff > inode->i_size) { | ||
2224 | ret = btrfs_cont_expand(inode, inode->i_size, destoff); | ||
2225 | if (ret) | ||
2226 | goto out_unlock; | ||
2227 | } | ||
2228 | |||
2223 | /* do any pending delalloc/csum calc on src, one way or | 2229 | /* do any pending delalloc/csum calc on src, one way or |
2224 | another, and lock file content */ | 2230 | another, and lock file content */ |
2225 | while (1) { | 2231 | while (1) { |
@@ -2325,14 +2331,21 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, | |||
2325 | 2331 | ||
2326 | if (type == BTRFS_FILE_EXTENT_REG || | 2332 | if (type == BTRFS_FILE_EXTENT_REG || |
2327 | type == BTRFS_FILE_EXTENT_PREALLOC) { | 2333 | type == BTRFS_FILE_EXTENT_PREALLOC) { |
2334 | /* | ||
2335 | * a | --- range to clone ---| b | ||
2336 | * | ------------- extent ------------- | | ||
2337 | */ | ||
2338 | |||
2339 | /* substract range b */ | ||
2340 | if (key.offset + datal > off + len) | ||
2341 | datal = off + len - key.offset; | ||
2342 | |||
2343 | /* substract range a */ | ||
2328 | if (off > key.offset) { | 2344 | if (off > key.offset) { |
2329 | datao += off - key.offset; | 2345 | datao += off - key.offset; |
2330 | datal -= off - key.offset; | 2346 | datal -= off - key.offset; |
2331 | } | 2347 | } |
2332 | 2348 | ||
2333 | if (key.offset + datal > off + len) | ||
2334 | datal = off + len - key.offset; | ||
2335 | |||
2336 | ret = btrfs_drop_extents(trans, inode, | 2349 | ret = btrfs_drop_extents(trans, inode, |
2337 | new_key.offset, | 2350 | new_key.offset, |
2338 | new_key.offset + datal, | 2351 | new_key.offset + datal, |
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c index 7dc36fab4afc..e24b7964a155 100644 --- a/fs/btrfs/transaction.c +++ b/fs/btrfs/transaction.c | |||
@@ -884,6 +884,7 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, | |||
884 | struct btrfs_root *tree_root = fs_info->tree_root; | 884 | struct btrfs_root *tree_root = fs_info->tree_root; |
885 | struct btrfs_root *root = pending->root; | 885 | struct btrfs_root *root = pending->root; |
886 | struct btrfs_root *parent_root; | 886 | struct btrfs_root *parent_root; |
887 | struct btrfs_block_rsv *rsv; | ||
887 | struct inode *parent_inode; | 888 | struct inode *parent_inode; |
888 | struct dentry *parent; | 889 | struct dentry *parent; |
889 | struct dentry *dentry; | 890 | struct dentry *dentry; |
@@ -895,6 +896,8 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, | |||
895 | u64 objectid; | 896 | u64 objectid; |
896 | u64 root_flags; | 897 | u64 root_flags; |
897 | 898 | ||
899 | rsv = trans->block_rsv; | ||
900 | |||
898 | new_root_item = kmalloc(sizeof(*new_root_item), GFP_NOFS); | 901 | new_root_item = kmalloc(sizeof(*new_root_item), GFP_NOFS); |
899 | if (!new_root_item) { | 902 | if (!new_root_item) { |
900 | pending->error = -ENOMEM; | 903 | pending->error = -ENOMEM; |
@@ -1002,6 +1005,7 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, | |||
1002 | btrfs_orphan_post_snapshot(trans, pending); | 1005 | btrfs_orphan_post_snapshot(trans, pending); |
1003 | fail: | 1006 | fail: |
1004 | kfree(new_root_item); | 1007 | kfree(new_root_item); |
1008 | trans->block_rsv = rsv; | ||
1005 | btrfs_block_rsv_release(root, &pending->block_rsv, (u64)-1); | 1009 | btrfs_block_rsv_release(root, &pending->block_rsv, (u64)-1); |
1006 | return 0; | 1010 | return 0; |
1007 | } | 1011 | } |
diff --git a/fs/btrfs/xattr.c b/fs/btrfs/xattr.c index d733b9cfea34..69565e5fc6a0 100644 --- a/fs/btrfs/xattr.c +++ b/fs/btrfs/xattr.c | |||
@@ -116,6 +116,12 @@ static int do_setxattr(struct btrfs_trans_handle *trans, | |||
116 | if (ret) | 116 | if (ret) |
117 | goto out; | 117 | goto out; |
118 | btrfs_release_path(path); | 118 | btrfs_release_path(path); |
119 | |||
120 | /* | ||
121 | * remove the attribute | ||
122 | */ | ||
123 | if (!value) | ||
124 | goto out; | ||
119 | } | 125 | } |
120 | 126 | ||
121 | again: | 127 | again: |
@@ -158,6 +164,9 @@ out: | |||
158 | return ret; | 164 | return ret; |
159 | } | 165 | } |
160 | 166 | ||
167 | /* | ||
168 | * @value: "" makes the attribute to empty, NULL removes it | ||
169 | */ | ||
161 | int __btrfs_setxattr(struct btrfs_trans_handle *trans, | 170 | int __btrfs_setxattr(struct btrfs_trans_handle *trans, |
162 | struct inode *inode, const char *name, | 171 | struct inode *inode, const char *name, |
163 | const void *value, size_t size, int flags) | 172 | const void *value, size_t size, int flags) |
diff --git a/fs/ceph/mds_client.c b/fs/ceph/mds_client.c index fee028b5332e..86c59e16ba74 100644 --- a/fs/ceph/mds_client.c +++ b/fs/ceph/mds_client.c | |||
@@ -1595,7 +1595,7 @@ static int set_request_path_attr(struct inode *rinode, struct dentry *rdentry, | |||
1595 | r = build_dentry_path(rdentry, ppath, pathlen, ino, freepath); | 1595 | r = build_dentry_path(rdentry, ppath, pathlen, ino, freepath); |
1596 | dout(" dentry %p %llx/%.*s\n", rdentry, *ino, *pathlen, | 1596 | dout(" dentry %p %llx/%.*s\n", rdentry, *ino, *pathlen, |
1597 | *ppath); | 1597 | *ppath); |
1598 | } else if (rpath) { | 1598 | } else if (rpath || rino) { |
1599 | *ino = rino; | 1599 | *ino = rino; |
1600 | *ppath = rpath; | 1600 | *ppath = rpath; |
1601 | *pathlen = strlen(rpath); | 1601 | *pathlen = strlen(rpath); |
diff --git a/fs/ceph/super.c b/fs/ceph/super.c index d47c5ec7fb1f..88bacaf385d9 100644 --- a/fs/ceph/super.c +++ b/fs/ceph/super.c | |||
@@ -813,8 +813,8 @@ static struct dentry *ceph_mount(struct file_system_type *fs_type, | |||
813 | fsc = create_fs_client(fsopt, opt); | 813 | fsc = create_fs_client(fsopt, opt); |
814 | if (IS_ERR(fsc)) { | 814 | if (IS_ERR(fsc)) { |
815 | res = ERR_CAST(fsc); | 815 | res = ERR_CAST(fsc); |
816 | kfree(fsopt); | 816 | destroy_mount_options(fsopt); |
817 | kfree(opt); | 817 | ceph_destroy_options(opt); |
818 | goto out_final; | 818 | goto out_final; |
819 | } | 819 | } |
820 | 820 | ||
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c index 168a80f7f12b..5cb8614508c3 100644 --- a/fs/fuse/dev.c +++ b/fs/fuse/dev.c | |||
@@ -258,10 +258,14 @@ void fuse_queue_forget(struct fuse_conn *fc, struct fuse_forget_link *forget, | |||
258 | forget->forget_one.nlookup = nlookup; | 258 | forget->forget_one.nlookup = nlookup; |
259 | 259 | ||
260 | spin_lock(&fc->lock); | 260 | spin_lock(&fc->lock); |
261 | fc->forget_list_tail->next = forget; | 261 | if (fc->connected) { |
262 | fc->forget_list_tail = forget; | 262 | fc->forget_list_tail->next = forget; |
263 | wake_up(&fc->waitq); | 263 | fc->forget_list_tail = forget; |
264 | kill_fasync(&fc->fasync, SIGIO, POLL_IN); | 264 | wake_up(&fc->waitq); |
265 | kill_fasync(&fc->fasync, SIGIO, POLL_IN); | ||
266 | } else { | ||
267 | kfree(forget); | ||
268 | } | ||
265 | spin_unlock(&fc->lock); | 269 | spin_unlock(&fc->lock); |
266 | } | 270 | } |
267 | 271 | ||
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c index 12b502929da9..add96f6ffda5 100644 --- a/fs/fuse/inode.c +++ b/fs/fuse/inode.c | |||
@@ -812,6 +812,9 @@ static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) | |||
812 | if (arg->minor >= 17) { | 812 | if (arg->minor >= 17) { |
813 | if (!(arg->flags & FUSE_FLOCK_LOCKS)) | 813 | if (!(arg->flags & FUSE_FLOCK_LOCKS)) |
814 | fc->no_flock = 1; | 814 | fc->no_flock = 1; |
815 | } else { | ||
816 | if (!(arg->flags & FUSE_POSIX_LOCKS)) | ||
817 | fc->no_flock = 1; | ||
815 | } | 818 | } |
816 | if (arg->flags & FUSE_ATOMIC_O_TRUNC) | 819 | if (arg->flags & FUSE_ATOMIC_O_TRUNC) |
817 | fc->atomic_o_trunc = 1; | 820 | fc->atomic_o_trunc = 1; |
diff --git a/fs/namei.c b/fs/namei.c index 2826db35dc25..b52bc685465f 100644 --- a/fs/namei.c +++ b/fs/namei.c | |||
@@ -727,25 +727,22 @@ static int follow_automount(struct path *path, unsigned flags, | |||
727 | if ((flags & LOOKUP_NO_AUTOMOUNT) && !(flags & LOOKUP_PARENT)) | 727 | if ((flags & LOOKUP_NO_AUTOMOUNT) && !(flags & LOOKUP_PARENT)) |
728 | return -EISDIR; /* we actually want to stop here */ | 728 | return -EISDIR; /* we actually want to stop here */ |
729 | 729 | ||
730 | /* | 730 | /* We don't want to mount if someone's just doing a stat - |
731 | * We don't want to mount if someone's just doing a stat and they've | 731 | * unless they're stat'ing a directory and appended a '/' to |
732 | * set AT_SYMLINK_NOFOLLOW - unless they're stat'ing a directory and | 732 | * the name. |
733 | * appended a '/' to the name. | 733 | * |
734 | * We do, however, want to mount if someone wants to open or | ||
735 | * create a file of any type under the mountpoint, wants to | ||
736 | * traverse through the mountpoint or wants to open the | ||
737 | * mounted directory. Also, autofs may mark negative dentries | ||
738 | * as being automount points. These will need the attentions | ||
739 | * of the daemon to instantiate them before they can be used. | ||
734 | */ | 740 | */ |
735 | if (!(flags & LOOKUP_FOLLOW)) { | 741 | if (!(flags & (LOOKUP_PARENT | LOOKUP_DIRECTORY | |
736 | /* We do, however, want to mount if someone wants to open or | 742 | LOOKUP_OPEN | LOOKUP_CREATE)) && |
737 | * create a file of any type under the mountpoint, wants to | 743 | path->dentry->d_inode) |
738 | * traverse through the mountpoint or wants to open the mounted | 744 | return -EISDIR; |
739 | * directory. | 745 | |
740 | * Also, autofs may mark negative dentries as being automount | ||
741 | * points. These will need the attentions of the daemon to | ||
742 | * instantiate them before they can be used. | ||
743 | */ | ||
744 | if (!(flags & (LOOKUP_PARENT | LOOKUP_DIRECTORY | | ||
745 | LOOKUP_OPEN | LOOKUP_CREATE)) && | ||
746 | path->dentry->d_inode) | ||
747 | return -EISDIR; | ||
748 | } | ||
749 | current->total_link_count++; | 746 | current->total_link_count++; |
750 | if (current->total_link_count >= 40) | 747 | if (current->total_link_count >= 40) |
751 | return -ELOOP; | 748 | return -ELOOP; |
diff --git a/fs/ubifs/debug.h b/fs/ubifs/debug.h index 45174b534377..feb361e252ac 100644 --- a/fs/ubifs/debug.h +++ b/fs/ubifs/debug.h | |||
@@ -335,9 +335,9 @@ void dbg_debugfs_exit_fs(struct ubifs_info *c); | |||
335 | #define DBGKEY(key) ((char *)(key)) | 335 | #define DBGKEY(key) ((char *)(key)) |
336 | #define DBGKEY1(key) ((char *)(key)) | 336 | #define DBGKEY1(key) ((char *)(key)) |
337 | 337 | ||
338 | #define ubifs_dbg_msg(fmt, ...) do { \ | 338 | #define ubifs_dbg_msg(fmt, ...) do { \ |
339 | if (0) \ | 339 | if (0) \ |
340 | pr_debug(fmt "\n", ##__VA_ARGS__); \ | 340 | printk(KERN_DEBUG fmt "\n", ##__VA_ARGS__); \ |
341 | } while (0) | 341 | } while (0) |
342 | 342 | ||
343 | #define dbg_dump_stack() | 343 | #define dbg_dump_stack() |
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 245bafdafd5e..c816075c01ce 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h | |||
@@ -944,8 +944,10 @@ extern void perf_pmu_unregister(struct pmu *pmu); | |||
944 | 944 | ||
945 | extern int perf_num_counters(void); | 945 | extern int perf_num_counters(void); |
946 | extern const char *perf_pmu_name(void); | 946 | extern const char *perf_pmu_name(void); |
947 | extern void __perf_event_task_sched_in(struct task_struct *task); | 947 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
948 | extern void __perf_event_task_sched_out(struct task_struct *task, struct task_struct *next); | 948 | struct task_struct *task); |
949 | extern void __perf_event_task_sched_out(struct task_struct *prev, | ||
950 | struct task_struct *next); | ||
949 | extern int perf_event_init_task(struct task_struct *child); | 951 | extern int perf_event_init_task(struct task_struct *child); |
950 | extern void perf_event_exit_task(struct task_struct *child); | 952 | extern void perf_event_exit_task(struct task_struct *child); |
951 | extern void perf_event_free_task(struct task_struct *task); | 953 | extern void perf_event_free_task(struct task_struct *task); |
@@ -1059,17 +1061,20 @@ perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) | |||
1059 | 1061 | ||
1060 | extern struct jump_label_key perf_sched_events; | 1062 | extern struct jump_label_key perf_sched_events; |
1061 | 1063 | ||
1062 | static inline void perf_event_task_sched_in(struct task_struct *task) | 1064 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
1065 | struct task_struct *task) | ||
1063 | { | 1066 | { |
1064 | if (static_branch(&perf_sched_events)) | 1067 | if (static_branch(&perf_sched_events)) |
1065 | __perf_event_task_sched_in(task); | 1068 | __perf_event_task_sched_in(prev, task); |
1066 | } | 1069 | } |
1067 | 1070 | ||
1068 | static inline void perf_event_task_sched_out(struct task_struct *task, struct task_struct *next) | 1071 | static inline void perf_event_task_sched_out(struct task_struct *prev, |
1072 | struct task_struct *next) | ||
1069 | { | 1073 | { |
1070 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); | 1074 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
1071 | 1075 | ||
1072 | __perf_event_task_sched_out(task, next); | 1076 | if (static_branch(&perf_sched_events)) |
1077 | __perf_event_task_sched_out(prev, next); | ||
1073 | } | 1078 | } |
1074 | 1079 | ||
1075 | extern void perf_event_mmap(struct vm_area_struct *vma); | 1080 | extern void perf_event_mmap(struct vm_area_struct *vma); |
@@ -1139,10 +1144,11 @@ extern void perf_event_disable(struct perf_event *event); | |||
1139 | extern void perf_event_task_tick(void); | 1144 | extern void perf_event_task_tick(void); |
1140 | #else | 1145 | #else |
1141 | static inline void | 1146 | static inline void |
1142 | perf_event_task_sched_in(struct task_struct *task) { } | 1147 | perf_event_task_sched_in(struct task_struct *prev, |
1148 | struct task_struct *task) { } | ||
1143 | static inline void | 1149 | static inline void |
1144 | perf_event_task_sched_out(struct task_struct *task, | 1150 | perf_event_task_sched_out(struct task_struct *prev, |
1145 | struct task_struct *next) { } | 1151 | struct task_struct *next) { } |
1146 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } | 1152 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1147 | static inline void perf_event_exit_task(struct task_struct *child) { } | 1153 | static inline void perf_event_exit_task(struct task_struct *child) { } |
1148 | static inline void perf_event_free_task(struct task_struct *task) { } | 1154 | static inline void perf_event_free_task(struct task_struct *task) { } |
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index 26f6ea4444e3..b47771aa5718 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h | |||
@@ -123,7 +123,7 @@ struct regulator_bulk_data { | |||
123 | const char *supply; | 123 | const char *supply; |
124 | struct regulator *consumer; | 124 | struct regulator *consumer; |
125 | 125 | ||
126 | /* Internal use */ | 126 | /* private: Internal use */ |
127 | int ret; | 127 | int ret; |
128 | }; | 128 | }; |
129 | 129 | ||
diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h index 342dcf13d039..a6326ef8ade6 100644 --- a/include/net/9p/9p.h +++ b/include/net/9p/9p.h | |||
@@ -288,6 +288,35 @@ enum p9_perm_t { | |||
288 | P9_DMSETVTX = 0x00010000, | 288 | P9_DMSETVTX = 0x00010000, |
289 | }; | 289 | }; |
290 | 290 | ||
291 | /* 9p2000.L open flags */ | ||
292 | #define P9_DOTL_RDONLY 00000000 | ||
293 | #define P9_DOTL_WRONLY 00000001 | ||
294 | #define P9_DOTL_RDWR 00000002 | ||
295 | #define P9_DOTL_NOACCESS 00000003 | ||
296 | #define P9_DOTL_CREATE 00000100 | ||
297 | #define P9_DOTL_EXCL 00000200 | ||
298 | #define P9_DOTL_NOCTTY 00000400 | ||
299 | #define P9_DOTL_TRUNC 00001000 | ||
300 | #define P9_DOTL_APPEND 00002000 | ||
301 | #define P9_DOTL_NONBLOCK 00004000 | ||
302 | #define P9_DOTL_DSYNC 00010000 | ||
303 | #define P9_DOTL_FASYNC 00020000 | ||
304 | #define P9_DOTL_DIRECT 00040000 | ||
305 | #define P9_DOTL_LARGEFILE 00100000 | ||
306 | #define P9_DOTL_DIRECTORY 00200000 | ||
307 | #define P9_DOTL_NOFOLLOW 00400000 | ||
308 | #define P9_DOTL_NOATIME 01000000 | ||
309 | #define P9_DOTL_CLOEXEC 02000000 | ||
310 | #define P9_DOTL_SYNC 04000000 | ||
311 | |||
312 | /* 9p2000.L at flags */ | ||
313 | #define P9_DOTL_AT_REMOVEDIR 0x200 | ||
314 | |||
315 | /* 9p2000.L lock type */ | ||
316 | #define P9_LOCK_TYPE_RDLCK 0 | ||
317 | #define P9_LOCK_TYPE_WRLCK 1 | ||
318 | #define P9_LOCK_TYPE_UNLCK 2 | ||
319 | |||
291 | /** | 320 | /** |
292 | * enum p9_qid_t - QID types | 321 | * enum p9_qid_t - QID types |
293 | * @P9_QTDIR: directory | 322 | * @P9_QTDIR: directory |
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index 408ae4882d22..401d73bd151f 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h | |||
@@ -1744,6 +1744,8 @@ struct wiphy_wowlan_support { | |||
1744 | * by default for perm_addr. In this case, the mask should be set to | 1744 | * by default for perm_addr. In this case, the mask should be set to |
1745 | * all-zeroes. In this case it is assumed that the device can handle | 1745 | * all-zeroes. In this case it is assumed that the device can handle |
1746 | * the same number of arbitrary MAC addresses. | 1746 | * the same number of arbitrary MAC addresses. |
1747 | * @registered: protects ->resume and ->suspend sysfs callbacks against | ||
1748 | * unregister hardware | ||
1747 | * @debugfsdir: debugfs directory used for this wiphy, will be renamed | 1749 | * @debugfsdir: debugfs directory used for this wiphy, will be renamed |
1748 | * automatically on wiphy renames | 1750 | * automatically on wiphy renames |
1749 | * @dev: (virtual) struct device for this wiphy | 1751 | * @dev: (virtual) struct device for this wiphy |
diff --git a/kernel/events/core.c b/kernel/events/core.c index b8785e26ee1c..0f857782d06f 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c | |||
@@ -399,14 +399,54 @@ void perf_cgroup_switch(struct task_struct *task, int mode) | |||
399 | local_irq_restore(flags); | 399 | local_irq_restore(flags); |
400 | } | 400 | } |
401 | 401 | ||
402 | static inline void perf_cgroup_sched_out(struct task_struct *task) | 402 | static inline void perf_cgroup_sched_out(struct task_struct *task, |
403 | struct task_struct *next) | ||
403 | { | 404 | { |
404 | perf_cgroup_switch(task, PERF_CGROUP_SWOUT); | 405 | struct perf_cgroup *cgrp1; |
406 | struct perf_cgroup *cgrp2 = NULL; | ||
407 | |||
408 | /* | ||
409 | * we come here when we know perf_cgroup_events > 0 | ||
410 | */ | ||
411 | cgrp1 = perf_cgroup_from_task(task); | ||
412 | |||
413 | /* | ||
414 | * next is NULL when called from perf_event_enable_on_exec() | ||
415 | * that will systematically cause a cgroup_switch() | ||
416 | */ | ||
417 | if (next) | ||
418 | cgrp2 = perf_cgroup_from_task(next); | ||
419 | |||
420 | /* | ||
421 | * only schedule out current cgroup events if we know | ||
422 | * that we are switching to a different cgroup. Otherwise, | ||
423 | * do no touch the cgroup events. | ||
424 | */ | ||
425 | if (cgrp1 != cgrp2) | ||
426 | perf_cgroup_switch(task, PERF_CGROUP_SWOUT); | ||
405 | } | 427 | } |
406 | 428 | ||
407 | static inline void perf_cgroup_sched_in(struct task_struct *task) | 429 | static inline void perf_cgroup_sched_in(struct task_struct *prev, |
430 | struct task_struct *task) | ||
408 | { | 431 | { |
409 | perf_cgroup_switch(task, PERF_CGROUP_SWIN); | 432 | struct perf_cgroup *cgrp1; |
433 | struct perf_cgroup *cgrp2 = NULL; | ||
434 | |||
435 | /* | ||
436 | * we come here when we know perf_cgroup_events > 0 | ||
437 | */ | ||
438 | cgrp1 = perf_cgroup_from_task(task); | ||
439 | |||
440 | /* prev can never be NULL */ | ||
441 | cgrp2 = perf_cgroup_from_task(prev); | ||
442 | |||
443 | /* | ||
444 | * only need to schedule in cgroup events if we are changing | ||
445 | * cgroup during ctxsw. Cgroup events were not scheduled | ||
446 | * out of ctxsw out if that was not the case. | ||
447 | */ | ||
448 | if (cgrp1 != cgrp2) | ||
449 | perf_cgroup_switch(task, PERF_CGROUP_SWIN); | ||
410 | } | 450 | } |
411 | 451 | ||
412 | static inline int perf_cgroup_connect(int fd, struct perf_event *event, | 452 | static inline int perf_cgroup_connect(int fd, struct perf_event *event, |
@@ -518,11 +558,13 @@ static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx) | |||
518 | { | 558 | { |
519 | } | 559 | } |
520 | 560 | ||
521 | static inline void perf_cgroup_sched_out(struct task_struct *task) | 561 | static inline void perf_cgroup_sched_out(struct task_struct *task, |
562 | struct task_struct *next) | ||
522 | { | 563 | { |
523 | } | 564 | } |
524 | 565 | ||
525 | static inline void perf_cgroup_sched_in(struct task_struct *task) | 566 | static inline void perf_cgroup_sched_in(struct task_struct *prev, |
567 | struct task_struct *task) | ||
526 | { | 568 | { |
527 | } | 569 | } |
528 | 570 | ||
@@ -1988,7 +2030,7 @@ void __perf_event_task_sched_out(struct task_struct *task, | |||
1988 | * cgroup event are system-wide mode only | 2030 | * cgroup event are system-wide mode only |
1989 | */ | 2031 | */ |
1990 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) | 2032 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) |
1991 | perf_cgroup_sched_out(task); | 2033 | perf_cgroup_sched_out(task, next); |
1992 | } | 2034 | } |
1993 | 2035 | ||
1994 | static void task_ctx_sched_out(struct perf_event_context *ctx) | 2036 | static void task_ctx_sched_out(struct perf_event_context *ctx) |
@@ -2153,7 +2195,8 @@ static void perf_event_context_sched_in(struct perf_event_context *ctx, | |||
2153 | * accessing the event control register. If a NMI hits, then it will | 2195 | * accessing the event control register. If a NMI hits, then it will |
2154 | * keep the event running. | 2196 | * keep the event running. |
2155 | */ | 2197 | */ |
2156 | void __perf_event_task_sched_in(struct task_struct *task) | 2198 | void __perf_event_task_sched_in(struct task_struct *prev, |
2199 | struct task_struct *task) | ||
2157 | { | 2200 | { |
2158 | struct perf_event_context *ctx; | 2201 | struct perf_event_context *ctx; |
2159 | int ctxn; | 2202 | int ctxn; |
@@ -2171,7 +2214,7 @@ void __perf_event_task_sched_in(struct task_struct *task) | |||
2171 | * cgroup event are system-wide mode only | 2214 | * cgroup event are system-wide mode only |
2172 | */ | 2215 | */ |
2173 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) | 2216 | if (atomic_read(&__get_cpu_var(perf_cgroup_events))) |
2174 | perf_cgroup_sched_in(task); | 2217 | perf_cgroup_sched_in(prev, task); |
2175 | } | 2218 | } |
2176 | 2219 | ||
2177 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) | 2220 | static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count) |
@@ -2427,7 +2470,7 @@ static void perf_event_enable_on_exec(struct perf_event_context *ctx) | |||
2427 | * ctxswin cgroup events which are already scheduled | 2470 | * ctxswin cgroup events which are already scheduled |
2428 | * in. | 2471 | * in. |
2429 | */ | 2472 | */ |
2430 | perf_cgroup_sched_out(current); | 2473 | perf_cgroup_sched_out(current, NULL); |
2431 | 2474 | ||
2432 | raw_spin_lock(&ctx->lock); | 2475 | raw_spin_lock(&ctx->lock); |
2433 | task_ctx_sched_out(ctx); | 2476 | task_ctx_sched_out(ctx); |
@@ -3353,8 +3396,8 @@ static int perf_event_index(struct perf_event *event) | |||
3353 | } | 3396 | } |
3354 | 3397 | ||
3355 | static void calc_timer_values(struct perf_event *event, | 3398 | static void calc_timer_values(struct perf_event *event, |
3356 | u64 *running, | 3399 | u64 *enabled, |
3357 | u64 *enabled) | 3400 | u64 *running) |
3358 | { | 3401 | { |
3359 | u64 now, ctx_time; | 3402 | u64 now, ctx_time; |
3360 | 3403 | ||
diff --git a/kernel/sched.c b/kernel/sched.c index ccacdbdecf45..ec5f472bc5b9 100644 --- a/kernel/sched.c +++ b/kernel/sched.c | |||
@@ -3065,7 +3065,7 @@ static void finish_task_switch(struct rq *rq, struct task_struct *prev) | |||
3065 | #ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW | 3065 | #ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW |
3066 | local_irq_disable(); | 3066 | local_irq_disable(); |
3067 | #endif /* __ARCH_WANT_INTERRUPTS_ON_CTXSW */ | 3067 | #endif /* __ARCH_WANT_INTERRUPTS_ON_CTXSW */ |
3068 | perf_event_task_sched_in(current); | 3068 | perf_event_task_sched_in(prev, current); |
3069 | #ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW | 3069 | #ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW |
3070 | local_irq_enable(); | 3070 | local_irq_enable(); |
3071 | #endif /* __ARCH_WANT_INTERRUPTS_ON_CTXSW */ | 3071 | #endif /* __ARCH_WANT_INTERRUPTS_ON_CTXSW */ |
@@ -4279,9 +4279,9 @@ pick_next_task(struct rq *rq) | |||
4279 | } | 4279 | } |
4280 | 4280 | ||
4281 | /* | 4281 | /* |
4282 | * schedule() is the main scheduler function. | 4282 | * __schedule() is the main scheduler function. |
4283 | */ | 4283 | */ |
4284 | asmlinkage void __sched schedule(void) | 4284 | static void __sched __schedule(void) |
4285 | { | 4285 | { |
4286 | struct task_struct *prev, *next; | 4286 | struct task_struct *prev, *next; |
4287 | unsigned long *switch_count; | 4287 | unsigned long *switch_count; |
@@ -4322,16 +4322,6 @@ need_resched: | |||
4322 | if (to_wakeup) | 4322 | if (to_wakeup) |
4323 | try_to_wake_up_local(to_wakeup); | 4323 | try_to_wake_up_local(to_wakeup); |
4324 | } | 4324 | } |
4325 | |||
4326 | /* | ||
4327 | * If we are going to sleep and we have plugged IO | ||
4328 | * queued, make sure to submit it to avoid deadlocks. | ||
4329 | */ | ||
4330 | if (blk_needs_flush_plug(prev)) { | ||
4331 | raw_spin_unlock(&rq->lock); | ||
4332 | blk_schedule_flush_plug(prev); | ||
4333 | raw_spin_lock(&rq->lock); | ||
4334 | } | ||
4335 | } | 4325 | } |
4336 | switch_count = &prev->nvcsw; | 4326 | switch_count = &prev->nvcsw; |
4337 | } | 4327 | } |
@@ -4369,6 +4359,26 @@ need_resched: | |||
4369 | if (need_resched()) | 4359 | if (need_resched()) |
4370 | goto need_resched; | 4360 | goto need_resched; |
4371 | } | 4361 | } |
4362 | |||
4363 | static inline void sched_submit_work(struct task_struct *tsk) | ||
4364 | { | ||
4365 | if (!tsk->state) | ||
4366 | return; | ||
4367 | /* | ||
4368 | * If we are going to sleep and we have plugged IO queued, | ||
4369 | * make sure to submit it to avoid deadlocks. | ||
4370 | */ | ||
4371 | if (blk_needs_flush_plug(tsk)) | ||
4372 | blk_schedule_flush_plug(tsk); | ||
4373 | } | ||
4374 | |||
4375 | asmlinkage void schedule(void) | ||
4376 | { | ||
4377 | struct task_struct *tsk = current; | ||
4378 | |||
4379 | sched_submit_work(tsk); | ||
4380 | __schedule(); | ||
4381 | } | ||
4372 | EXPORT_SYMBOL(schedule); | 4382 | EXPORT_SYMBOL(schedule); |
4373 | 4383 | ||
4374 | #ifdef CONFIG_MUTEX_SPIN_ON_OWNER | 4384 | #ifdef CONFIG_MUTEX_SPIN_ON_OWNER |
@@ -4435,7 +4445,7 @@ asmlinkage void __sched notrace preempt_schedule(void) | |||
4435 | 4445 | ||
4436 | do { | 4446 | do { |
4437 | add_preempt_count_notrace(PREEMPT_ACTIVE); | 4447 | add_preempt_count_notrace(PREEMPT_ACTIVE); |
4438 | schedule(); | 4448 | __schedule(); |
4439 | sub_preempt_count_notrace(PREEMPT_ACTIVE); | 4449 | sub_preempt_count_notrace(PREEMPT_ACTIVE); |
4440 | 4450 | ||
4441 | /* | 4451 | /* |
@@ -4463,7 +4473,7 @@ asmlinkage void __sched preempt_schedule_irq(void) | |||
4463 | do { | 4473 | do { |
4464 | add_preempt_count(PREEMPT_ACTIVE); | 4474 | add_preempt_count(PREEMPT_ACTIVE); |
4465 | local_irq_enable(); | 4475 | local_irq_enable(); |
4466 | schedule(); | 4476 | __schedule(); |
4467 | local_irq_disable(); | 4477 | local_irq_disable(); |
4468 | sub_preempt_count(PREEMPT_ACTIVE); | 4478 | sub_preempt_count(PREEMPT_ACTIVE); |
4469 | 4479 | ||
@@ -5588,7 +5598,7 @@ static inline int should_resched(void) | |||
5588 | static void __cond_resched(void) | 5598 | static void __cond_resched(void) |
5589 | { | 5599 | { |
5590 | add_preempt_count(PREEMPT_ACTIVE); | 5600 | add_preempt_count(PREEMPT_ACTIVE); |
5591 | schedule(); | 5601 | __schedule(); |
5592 | sub_preempt_count(PREEMPT_ACTIVE); | 5602 | sub_preempt_count(PREEMPT_ACTIVE); |
5593 | } | 5603 | } |
5594 | 5604 | ||
@@ -7443,6 +7453,7 @@ static void __sdt_free(const struct cpumask *cpu_map) | |||
7443 | struct sched_domain *sd = *per_cpu_ptr(sdd->sd, j); | 7453 | struct sched_domain *sd = *per_cpu_ptr(sdd->sd, j); |
7444 | if (sd && (sd->flags & SD_OVERLAP)) | 7454 | if (sd && (sd->flags & SD_OVERLAP)) |
7445 | free_sched_groups(sd->groups, 0); | 7455 | free_sched_groups(sd->groups, 0); |
7456 | kfree(*per_cpu_ptr(sdd->sd, j)); | ||
7446 | kfree(*per_cpu_ptr(sdd->sg, j)); | 7457 | kfree(*per_cpu_ptr(sdd->sg, j)); |
7447 | kfree(*per_cpu_ptr(sdd->sgp, j)); | 7458 | kfree(*per_cpu_ptr(sdd->sgp, j)); |
7448 | } | 7459 | } |
diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index 59f369f98a04..ea5e1a928d5b 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c | |||
@@ -441,6 +441,8 @@ static int alarm_timer_create(struct k_itimer *new_timer) | |||
441 | static void alarm_timer_get(struct k_itimer *timr, | 441 | static void alarm_timer_get(struct k_itimer *timr, |
442 | struct itimerspec *cur_setting) | 442 | struct itimerspec *cur_setting) |
443 | { | 443 | { |
444 | memset(cur_setting, 0, sizeof(struct itimerspec)); | ||
445 | |||
444 | cur_setting->it_interval = | 446 | cur_setting->it_interval = |
445 | ktime_to_timespec(timr->it.alarmtimer.period); | 447 | ktime_to_timespec(timr->it.alarmtimer.period); |
446 | cur_setting->it_value = | 448 | cur_setting->it_value = |
@@ -479,11 +481,17 @@ static int alarm_timer_set(struct k_itimer *timr, int flags, | |||
479 | if (!rtcdev) | 481 | if (!rtcdev) |
480 | return -ENOTSUPP; | 482 | return -ENOTSUPP; |
481 | 483 | ||
482 | /* Save old values */ | 484 | /* |
483 | old_setting->it_interval = | 485 | * XXX HACK! Currently we can DOS a system if the interval |
484 | ktime_to_timespec(timr->it.alarmtimer.period); | 486 | * period on alarmtimers is too small. Cap the interval here |
485 | old_setting->it_value = | 487 | * to 100us and solve this properly in a future patch! -jstultz |
486 | ktime_to_timespec(timr->it.alarmtimer.node.expires); | 488 | */ |
489 | if ((new_setting->it_interval.tv_sec == 0) && | ||
490 | (new_setting->it_interval.tv_nsec < 100000)) | ||
491 | new_setting->it_interval.tv_nsec = 100000; | ||
492 | |||
493 | if (old_setting) | ||
494 | alarm_timer_get(timr, old_setting); | ||
487 | 495 | ||
488 | /* If the timer was already set, cancel it */ | 496 | /* If the timer was already set, cancel it */ |
489 | alarm_cancel(&timr->it.alarmtimer); | 497 | alarm_cancel(&timr->it.alarmtimer); |
diff --git a/net/9p/trans_virtio.c b/net/9p/trans_virtio.c index 175b5135bdcf..e317583fcc73 100644 --- a/net/9p/trans_virtio.c +++ b/net/9p/trans_virtio.c | |||
@@ -263,7 +263,6 @@ p9_virtio_request(struct p9_client *client, struct p9_req_t *req) | |||
263 | { | 263 | { |
264 | int in, out, inp, outp; | 264 | int in, out, inp, outp; |
265 | struct virtio_chan *chan = client->trans; | 265 | struct virtio_chan *chan = client->trans; |
266 | char *rdata = (char *)req->rc+sizeof(struct p9_fcall); | ||
267 | unsigned long flags; | 266 | unsigned long flags; |
268 | size_t pdata_off = 0; | 267 | size_t pdata_off = 0; |
269 | struct trans_rpage_info *rpinfo = NULL; | 268 | struct trans_rpage_info *rpinfo = NULL; |
@@ -346,7 +345,8 @@ req_retry_pinned: | |||
346 | * Arrange in such a way that server places header in the | 345 | * Arrange in such a way that server places header in the |
347 | * alloced memory and payload onto the user buffer. | 346 | * alloced memory and payload onto the user buffer. |
348 | */ | 347 | */ |
349 | inp = pack_sg_list(chan->sg, out, VIRTQUEUE_NUM, rdata, 11); | 348 | inp = pack_sg_list(chan->sg, out, |
349 | VIRTQUEUE_NUM, req->rc->sdata, 11); | ||
350 | /* | 350 | /* |
351 | * Running executables in the filesystem may result in | 351 | * Running executables in the filesystem may result in |
352 | * a read request with kernel buffer as opposed to user buffer. | 352 | * a read request with kernel buffer as opposed to user buffer. |
@@ -366,8 +366,8 @@ req_retry_pinned: | |||
366 | } | 366 | } |
367 | in += inp; | 367 | in += inp; |
368 | } else { | 368 | } else { |
369 | in = pack_sg_list(chan->sg, out, VIRTQUEUE_NUM, rdata, | 369 | in = pack_sg_list(chan->sg, out, VIRTQUEUE_NUM, |
370 | req->rc->capacity); | 370 | req->rc->sdata, req->rc->capacity); |
371 | } | 371 | } |
372 | 372 | ||
373 | err = virtqueue_add_buf(chan->vq, chan->sg, out, in, req->tc); | 373 | err = virtqueue_add_buf(chan->vq, chan->sg, out, in, req->tc); |
@@ -592,7 +592,14 @@ static struct p9_trans_module p9_virtio_trans = { | |||
592 | .close = p9_virtio_close, | 592 | .close = p9_virtio_close, |
593 | .request = p9_virtio_request, | 593 | .request = p9_virtio_request, |
594 | .cancel = p9_virtio_cancel, | 594 | .cancel = p9_virtio_cancel, |
595 | .maxsize = PAGE_SIZE*VIRTQUEUE_NUM, | 595 | |
596 | /* | ||
597 | * We leave one entry for input and one entry for response | ||
598 | * headers. We also skip one more entry to accomodate, address | ||
599 | * that are not at page boundary, that can result in an extra | ||
600 | * page in zero copy. | ||
601 | */ | ||
602 | .maxsize = PAGE_SIZE * (VIRTQUEUE_NUM - 3), | ||
596 | .pref = P9_TRANS_PREF_PAYLOAD_SEP, | 603 | .pref = P9_TRANS_PREF_PAYLOAD_SEP, |
597 | .def = 0, | 604 | .def = 0, |
598 | .owner = THIS_MODULE, | 605 | .owner = THIS_MODULE, |
diff --git a/net/ceph/msgpool.c b/net/ceph/msgpool.c index d5f2d97ac05c..1f4cb30a42c5 100644 --- a/net/ceph/msgpool.c +++ b/net/ceph/msgpool.c | |||
@@ -7,27 +7,37 @@ | |||
7 | 7 | ||
8 | #include <linux/ceph/msgpool.h> | 8 | #include <linux/ceph/msgpool.h> |
9 | 9 | ||
10 | static void *alloc_fn(gfp_t gfp_mask, void *arg) | 10 | static void *msgpool_alloc(gfp_t gfp_mask, void *arg) |
11 | { | 11 | { |
12 | struct ceph_msgpool *pool = arg; | 12 | struct ceph_msgpool *pool = arg; |
13 | void *p; | 13 | struct ceph_msg *msg; |
14 | 14 | ||
15 | p = ceph_msg_new(0, pool->front_len, gfp_mask); | 15 | msg = ceph_msg_new(0, pool->front_len, gfp_mask); |
16 | if (!p) | 16 | if (!msg) { |
17 | pr_err("msgpool %s alloc failed\n", pool->name); | 17 | dout("msgpool_alloc %s failed\n", pool->name); |
18 | return p; | 18 | } else { |
19 | dout("msgpool_alloc %s %p\n", pool->name, msg); | ||
20 | msg->pool = pool; | ||
21 | } | ||
22 | return msg; | ||
19 | } | 23 | } |
20 | 24 | ||
21 | static void free_fn(void *element, void *arg) | 25 | static void msgpool_free(void *element, void *arg) |
22 | { | 26 | { |
23 | ceph_msg_put(element); | 27 | struct ceph_msgpool *pool = arg; |
28 | struct ceph_msg *msg = element; | ||
29 | |||
30 | dout("msgpool_release %s %p\n", pool->name, msg); | ||
31 | msg->pool = NULL; | ||
32 | ceph_msg_put(msg); | ||
24 | } | 33 | } |
25 | 34 | ||
26 | int ceph_msgpool_init(struct ceph_msgpool *pool, | 35 | int ceph_msgpool_init(struct ceph_msgpool *pool, |
27 | int front_len, int size, bool blocking, const char *name) | 36 | int front_len, int size, bool blocking, const char *name) |
28 | { | 37 | { |
38 | dout("msgpool %s init\n", name); | ||
29 | pool->front_len = front_len; | 39 | pool->front_len = front_len; |
30 | pool->pool = mempool_create(size, alloc_fn, free_fn, pool); | 40 | pool->pool = mempool_create(size, msgpool_alloc, msgpool_free, pool); |
31 | if (!pool->pool) | 41 | if (!pool->pool) |
32 | return -ENOMEM; | 42 | return -ENOMEM; |
33 | pool->name = name; | 43 | pool->name = name; |
@@ -36,14 +46,17 @@ int ceph_msgpool_init(struct ceph_msgpool *pool, | |||
36 | 46 | ||
37 | void ceph_msgpool_destroy(struct ceph_msgpool *pool) | 47 | void ceph_msgpool_destroy(struct ceph_msgpool *pool) |
38 | { | 48 | { |
49 | dout("msgpool %s destroy\n", pool->name); | ||
39 | mempool_destroy(pool->pool); | 50 | mempool_destroy(pool->pool); |
40 | } | 51 | } |
41 | 52 | ||
42 | struct ceph_msg *ceph_msgpool_get(struct ceph_msgpool *pool, | 53 | struct ceph_msg *ceph_msgpool_get(struct ceph_msgpool *pool, |
43 | int front_len) | 54 | int front_len) |
44 | { | 55 | { |
56 | struct ceph_msg *msg; | ||
57 | |||
45 | if (front_len > pool->front_len) { | 58 | if (front_len > pool->front_len) { |
46 | pr_err("msgpool_get pool %s need front %d, pool size is %d\n", | 59 | dout("msgpool_get %s need front %d, pool size is %d\n", |
47 | pool->name, front_len, pool->front_len); | 60 | pool->name, front_len, pool->front_len); |
48 | WARN_ON(1); | 61 | WARN_ON(1); |
49 | 62 | ||
@@ -51,14 +64,19 @@ struct ceph_msg *ceph_msgpool_get(struct ceph_msgpool *pool, | |||
51 | return ceph_msg_new(0, front_len, GFP_NOFS); | 64 | return ceph_msg_new(0, front_len, GFP_NOFS); |
52 | } | 65 | } |
53 | 66 | ||
54 | return mempool_alloc(pool->pool, GFP_NOFS); | 67 | msg = mempool_alloc(pool->pool, GFP_NOFS); |
68 | dout("msgpool_get %s %p\n", pool->name, msg); | ||
69 | return msg; | ||
55 | } | 70 | } |
56 | 71 | ||
57 | void ceph_msgpool_put(struct ceph_msgpool *pool, struct ceph_msg *msg) | 72 | void ceph_msgpool_put(struct ceph_msgpool *pool, struct ceph_msg *msg) |
58 | { | 73 | { |
74 | dout("msgpool_put %s %p\n", pool->name, msg); | ||
75 | |||
59 | /* reset msg front_len; user may have changed it */ | 76 | /* reset msg front_len; user may have changed it */ |
60 | msg->front.iov_len = pool->front_len; | 77 | msg->front.iov_len = pool->front_len; |
61 | msg->hdr.front_len = cpu_to_le32(pool->front_len); | 78 | msg->hdr.front_len = cpu_to_le32(pool->front_len); |
62 | 79 | ||
63 | kref_init(&msg->kref); /* retake single ref */ | 80 | kref_init(&msg->kref); /* retake single ref */ |
81 | mempool_free(msg, pool->pool); | ||
64 | } | 82 | } |
diff --git a/net/ceph/osd_client.c b/net/ceph/osd_client.c index ce310eee708d..16836a7df7a6 100644 --- a/net/ceph/osd_client.c +++ b/net/ceph/osd_client.c | |||
@@ -685,6 +685,18 @@ static void __remove_osd(struct ceph_osd_client *osdc, struct ceph_osd *osd) | |||
685 | put_osd(osd); | 685 | put_osd(osd); |
686 | } | 686 | } |
687 | 687 | ||
688 | static void remove_all_osds(struct ceph_osd_client *osdc) | ||
689 | { | ||
690 | dout("__remove_old_osds %p\n", osdc); | ||
691 | mutex_lock(&osdc->request_mutex); | ||
692 | while (!RB_EMPTY_ROOT(&osdc->osds)) { | ||
693 | struct ceph_osd *osd = rb_entry(rb_first(&osdc->osds), | ||
694 | struct ceph_osd, o_node); | ||
695 | __remove_osd(osdc, osd); | ||
696 | } | ||
697 | mutex_unlock(&osdc->request_mutex); | ||
698 | } | ||
699 | |||
688 | static void __move_osd_to_lru(struct ceph_osd_client *osdc, | 700 | static void __move_osd_to_lru(struct ceph_osd_client *osdc, |
689 | struct ceph_osd *osd) | 701 | struct ceph_osd *osd) |
690 | { | 702 | { |
@@ -701,14 +713,14 @@ static void __remove_osd_from_lru(struct ceph_osd *osd) | |||
701 | list_del_init(&osd->o_osd_lru); | 713 | list_del_init(&osd->o_osd_lru); |
702 | } | 714 | } |
703 | 715 | ||
704 | static void remove_old_osds(struct ceph_osd_client *osdc, int remove_all) | 716 | static void remove_old_osds(struct ceph_osd_client *osdc) |
705 | { | 717 | { |
706 | struct ceph_osd *osd, *nosd; | 718 | struct ceph_osd *osd, *nosd; |
707 | 719 | ||
708 | dout("__remove_old_osds %p\n", osdc); | 720 | dout("__remove_old_osds %p\n", osdc); |
709 | mutex_lock(&osdc->request_mutex); | 721 | mutex_lock(&osdc->request_mutex); |
710 | list_for_each_entry_safe(osd, nosd, &osdc->osd_lru, o_osd_lru) { | 722 | list_for_each_entry_safe(osd, nosd, &osdc->osd_lru, o_osd_lru) { |
711 | if (!remove_all && time_before(jiffies, osd->lru_ttl)) | 723 | if (time_before(jiffies, osd->lru_ttl)) |
712 | break; | 724 | break; |
713 | __remove_osd(osdc, osd); | 725 | __remove_osd(osdc, osd); |
714 | } | 726 | } |
@@ -751,6 +763,7 @@ static void __insert_osd(struct ceph_osd_client *osdc, struct ceph_osd *new) | |||
751 | struct rb_node *parent = NULL; | 763 | struct rb_node *parent = NULL; |
752 | struct ceph_osd *osd = NULL; | 764 | struct ceph_osd *osd = NULL; |
753 | 765 | ||
766 | dout("__insert_osd %p osd%d\n", new, new->o_osd); | ||
754 | while (*p) { | 767 | while (*p) { |
755 | parent = *p; | 768 | parent = *p; |
756 | osd = rb_entry(parent, struct ceph_osd, o_node); | 769 | osd = rb_entry(parent, struct ceph_osd, o_node); |
@@ -1144,7 +1157,7 @@ static void handle_osds_timeout(struct work_struct *work) | |||
1144 | 1157 | ||
1145 | dout("osds timeout\n"); | 1158 | dout("osds timeout\n"); |
1146 | down_read(&osdc->map_sem); | 1159 | down_read(&osdc->map_sem); |
1147 | remove_old_osds(osdc, 0); | 1160 | remove_old_osds(osdc); |
1148 | up_read(&osdc->map_sem); | 1161 | up_read(&osdc->map_sem); |
1149 | 1162 | ||
1150 | schedule_delayed_work(&osdc->osds_timeout_work, | 1163 | schedule_delayed_work(&osdc->osds_timeout_work, |
@@ -1862,8 +1875,7 @@ void ceph_osdc_stop(struct ceph_osd_client *osdc) | |||
1862 | ceph_osdmap_destroy(osdc->osdmap); | 1875 | ceph_osdmap_destroy(osdc->osdmap); |
1863 | osdc->osdmap = NULL; | 1876 | osdc->osdmap = NULL; |
1864 | } | 1877 | } |
1865 | remove_old_osds(osdc, 1); | 1878 | remove_all_osds(osdc); |
1866 | WARN_ON(!RB_EMPTY_ROOT(&osdc->osds)); | ||
1867 | mempool_destroy(osdc->req_mempool); | 1879 | mempool_destroy(osdc->req_mempool); |
1868 | ceph_msgpool_destroy(&osdc->msgpool_op); | 1880 | ceph_msgpool_destroy(&osdc->msgpool_op); |
1869 | ceph_msgpool_destroy(&osdc->msgpool_op_reply); | 1881 | ceph_msgpool_destroy(&osdc->msgpool_op_reply); |