diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2012-01-11 03:57:56 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-01-30 18:18:26 -0500 |
commit | a3b86a6d6f5a7592192eb3fca22ae38de18f2171 (patch) | |
tree | a2256430a83e7c1f0b48f44fe4ec7167dbefb78a | |
parent | d3e8b7569ad733c063a95dc1a51928e6e7c40652 (diff) |
ARM: plat-nomadik: modernize MTU timer
Modernize the MTU timer to rely on the clockevents core to
calculate mult and shift and setup the clock event.
Acked-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | arch/arm/plat-nomadik/timer.c | 23 |
1 files changed, 3 insertions, 20 deletions
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 954a862ec4aa..9222e5522a43 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
@@ -21,12 +21,6 @@ | |||
21 | #include <asm/sched_clock.h> | 21 | #include <asm/sched_clock.h> |
22 | 22 | ||
23 | /* | 23 | /* |
24 | * Guaranteed runtime conversion range in seconds for | ||
25 | * the clocksource and clockevent. | ||
26 | */ | ||
27 | #define MTU_MIN_RANGE 4 | ||
28 | |||
29 | /* | ||
30 | * The MTU device hosts four different counters, with 4 set of | 24 | * The MTU device hosts four different counters, with 4 set of |
31 | * registers. These are register names. | 25 | * registers. These are register names. |
32 | */ | 26 | */ |
@@ -102,7 +96,6 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) | |||
102 | void nmdk_clkevt_reset(void) | 96 | void nmdk_clkevt_reset(void) |
103 | { | 97 | { |
104 | if (clkevt_periodic) { | 98 | if (clkevt_periodic) { |
105 | |||
106 | /* Timer: configure load and background-load, and fire it up */ | 99 | /* Timer: configure load and background-load, and fire it up */ |
107 | writel(nmdk_cycle, mtu_base + MTU_LR(1)); | 100 | writel(nmdk_cycle, mtu_base + MTU_LR(1)); |
108 | writel(nmdk_cycle, mtu_base + MTU_BGLR(1)); | 101 | writel(nmdk_cycle, mtu_base + MTU_BGLR(1)); |
@@ -120,7 +113,6 @@ void nmdk_clkevt_reset(void) | |||
120 | static void nmdk_clkevt_mode(enum clock_event_mode mode, | 113 | static void nmdk_clkevt_mode(enum clock_event_mode mode, |
121 | struct clock_event_device *dev) | 114 | struct clock_event_device *dev) |
122 | { | 115 | { |
123 | |||
124 | switch (mode) { | 116 | switch (mode) { |
125 | case CLOCK_EVT_MODE_PERIODIC: | 117 | case CLOCK_EVT_MODE_PERIODIC: |
126 | clkevt_periodic = true; | 118 | clkevt_periodic = true; |
@@ -224,17 +216,8 @@ void __init nmdk_timer_init(void __iomem *base) | |||
224 | setup_sched_clock(nomadik_read_sched_clock, 32, rate); | 216 | setup_sched_clock(nomadik_read_sched_clock, 32, rate); |
225 | #endif | 217 | #endif |
226 | 218 | ||
227 | /* Timer 1 is used for events */ | 219 | /* Timer 1 is used for events, register irq and clockevents */ |
228 | |||
229 | clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); | ||
230 | |||
231 | nmdk_clkevt.max_delta_ns = | ||
232 | clockevent_delta2ns(0xffffffff, &nmdk_clkevt); | ||
233 | nmdk_clkevt.min_delta_ns = | ||
234 | clockevent_delta2ns(0x00000002, &nmdk_clkevt); | ||
235 | nmdk_clkevt.cpumask = cpumask_of(0); | ||
236 | |||
237 | /* Register irq and clockevents */ | ||
238 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); | 220 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); |
239 | clockevents_register_device(&nmdk_clkevt); | 221 | nmdk_clkevt.cpumask = cpumask_of(0); |
222 | clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU); | ||
240 | } | 223 | } |