diff options
author | Thomas Abraham <thomas.ab@samsung.com> | 2011-06-16 03:12:35 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-07-05 19:43:02 -0400 |
commit | a0d8efedb203b5b908dd46cea38201761e2380f9 (patch) | |
tree | 5f3ac45e013ced86d403c800dfbd9fb302cd793a | |
parent | fe0d42203cb5616eeff68b14576a0f7e2dd56625 (diff) |
ARM: EXYNOS4: Fix card detection for sdhci 0 and 2
On SMDKV310 board, a card detect gpio pin is available that is directly
connected to the io pad of the sdhci controller. Fix incorrect value
of cd_type field in platform data for sdhci instance 0 and 2.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/mach-exynos4/mach-smdkv310.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c index 152676471b67..edd814110da8 100644 --- a/arch/arm/mach-exynos4/mach-smdkv310.c +++ b/arch/arm/mach-exynos4/mach-smdkv310.c | |||
@@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { | |||
78 | }; | 78 | }; |
79 | 79 | ||
80 | static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { | 80 | static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { |
81 | .cd_type = S3C_SDHCI_CD_GPIO, | 81 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
82 | .ext_cd_gpio = EXYNOS4_GPK0(2), | ||
83 | .ext_cd_gpio_invert = 1, | ||
84 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 82 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
85 | #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT | 83 | #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT |
86 | .max_width = 8, | 84 | .max_width = 8, |
@@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { | |||
96 | }; | 94 | }; |
97 | 95 | ||
98 | static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { | 96 | static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { |
99 | .cd_type = S3C_SDHCI_CD_GPIO, | 97 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
100 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
101 | .ext_cd_gpio_invert = 1, | ||
102 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 98 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
103 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT | 99 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT |
104 | .max_width = 8, | 100 | .max_width = 8, |