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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-18 17:40:01 -0500
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-18 17:54:31 -0500
commit9e3129e937e2f178d2a003ea45765e5e63e34665 (patch)
treefab157ec8ba266d60c51823a78848528753bac6b
parentd9b4fe837d671af5329f32570362c3c0b571c40b (diff)
ARM: at91: fix usart/uart namimg in pinctrl
USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi58
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi24
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_common.dtsi10
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi30
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi38
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi36
8 files changed, 100 insertions, 100 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 36f55e34a430..40bf3298c7fe 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -21,8 +21,8 @@
21 serial2 = &usart1; 21 serial2 = &usart1;
22 serial3 = &usart2; 22 serial3 = &usart2;
23 serial4 = &usart3; 23 serial4 = &usart3;
24 serial5 = &usart4; 24 serial5 = &uart0;
25 serial6 = &usart5; 25 serial6 = &uart1;
26 gpio0 = &pioA; 26 gpio0 = &pioA;
27 gpio1 = &pioB; 27 gpio1 = &pioB;
28 gpio2 = &pioC; 28 gpio2 = &pioC;
@@ -120,88 +120,88 @@
120 }; 120 };
121 }; 121 };
122 122
123 uart0 { 123 usart0 {
124 pinctrl_uart0: uart0-0 { 124 pinctrl_usart0: usart0-0 {
125 atmel,pins = 125 atmel,pins =
126 <1 4 0x1 0x0 /* PB4 periph A */ 126 <1 4 0x1 0x0 /* PB4 periph A */
127 1 5 0x1 0x0>; /* PB5 periph A */ 127 1 5 0x1 0x0>; /* PB5 periph A */
128 }; 128 };
129 129
130 pinctrl_uart0_rts_cts: uart0_rts_cts-0 { 130 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
131 atmel,pins = 131 atmel,pins =
132 <1 26 0x1 0x0 /* PB26 periph A */ 132 <1 26 0x1 0x0 /* PB26 periph A */
133 1 27 0x1 0x0>; /* PB27 periph A */ 133 1 27 0x1 0x0>; /* PB27 periph A */
134 }; 134 };
135 135
136 pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 { 136 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
137 atmel,pins = 137 atmel,pins =
138 <1 24 0x1 0x0 /* PB24 periph A */ 138 <1 24 0x1 0x0 /* PB24 periph A */
139 1 22 0x1 0x0>; /* PB22 periph A */ 139 1 22 0x1 0x0>; /* PB22 periph A */
140 }; 140 };
141 141
142 pinctrl_uart0_dcd: uart0_dcd-0 { 142 pinctrl_usart0_dcd: usart0_dcd-0 {
143 atmel,pins = 143 atmel,pins =
144 <1 23 0x1 0x0>; /* PB23 periph A */ 144 <1 23 0x1 0x0>; /* PB23 periph A */
145 }; 145 };
146 146
147 pinctrl_uart0_ri: uart0_ri-0 { 147 pinctrl_usart0_ri: usart0_ri-0 {
148 atmel,pins = 148 atmel,pins =
149 <1 25 0x1 0x0>; /* PB25 periph A */ 149 <1 25 0x1 0x0>; /* PB25 periph A */
150 }; 150 };
151 }; 151 };
152 152
153 uart1 { 153 usart1 {
154 pinctrl_uart1: uart1-0 { 154 pinctrl_usart1: usart1-0 {
155 atmel,pins = 155 atmel,pins =
156 <2 6 0x1 0x1 /* PB6 periph A with pullup */ 156 <2 6 0x1 0x1 /* PB6 periph A with pullup */
157 2 7 0x1 0x0>; /* PB7 periph A */ 157 2 7 0x1 0x0>; /* PB7 periph A */
158 }; 158 };
159 159
160 pinctrl_uart1_rts_cts: uart1_rts_cts-0 { 160 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
161 atmel,pins = 161 atmel,pins =
162 <1 28 0x1 0x0 /* PB28 periph A */ 162 <1 28 0x1 0x0 /* PB28 periph A */
163 1 29 0x1 0x0>; /* PB29 periph A */ 163 1 29 0x1 0x0>; /* PB29 periph A */
164 }; 164 };
165 }; 165 };
166 166
167 uart2 { 167 usart2 {
168 pinctrl_uart2: uart2-0 { 168 pinctrl_usart2: usart2-0 {
169 atmel,pins = 169 atmel,pins =
170 <1 8 0x1 0x1 /* PB8 periph A with pullup */ 170 <1 8 0x1 0x1 /* PB8 periph A with pullup */
171 1 9 0x1 0x0>; /* PB9 periph A */ 171 1 9 0x1 0x0>; /* PB9 periph A */
172 }; 172 };
173 173
174 pinctrl_uart2_rts_cts: uart2_rts_cts-0 { 174 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
175 atmel,pins = 175 atmel,pins =
176 <0 4 0x1 0x0 /* PA4 periph A */ 176 <0 4 0x1 0x0 /* PA4 periph A */
177 0 5 0x1 0x0>; /* PA5 periph A */ 177 0 5 0x1 0x0>; /* PA5 periph A */
178 }; 178 };
179 }; 179 };
180 180
181 uart3 { 181 usart3 {
182 pinctrl_uart3: uart3-0 { 182 pinctrl_usart3: usart3-0 {
183 atmel,pins = 183 atmel,pins =
184 <2 10 0x1 0x1 /* PB10 periph A with pullup */ 184 <2 10 0x1 0x1 /* PB10 periph A with pullup */
185 2 11 0x1 0x0>; /* PB11 periph A */ 185 2 11 0x1 0x0>; /* PB11 periph A */
186 }; 186 };
187 187
188 pinctrl_uart3_rts_cts: uart3_rts_cts-0 { 188 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
189 atmel,pins = 189 atmel,pins =
190 <3 8 0x2 0x0 /* PB8 periph B */ 190 <3 8 0x2 0x0 /* PB8 periph B */
191 3 10 0x2 0x0>; /* PB10 periph B */ 191 3 10 0x2 0x0>; /* PB10 periph B */
192 }; 192 };
193 }; 193 };
194 194
195 uart4 { 195 uart0 {
196 pinctrl_uart4: uart4-0 { 196 pinctrl_uart0: uart0-0 {
197 atmel,pins = 197 atmel,pins =
198 <0 31 0x2 0x1 /* PA31 periph B with pullup */ 198 <0 31 0x2 0x1 /* PA31 periph B with pullup */
199 0 30 0x2 0x0>; /* PA30 periph B */ 199 0 30 0x2 0x0>; /* PA30 periph B */
200 }; 200 };
201 }; 201 };
202 202
203 uart5 { 203 uart1 {
204 pinctrl_uart5: uart5-0 { 204 pinctrl_uart1: uart1-0 {
205 atmel,pins = 205 atmel,pins =
206 <2 12 0x1 0x1 /* PB12 periph A with pullup */ 206 <2 12 0x1 0x1 /* PB12 periph A with pullup */
207 2 13 0x1 0x0>; /* PB13 periph A */ 207 2 13 0x1 0x0>; /* PB13 periph A */
@@ -303,7 +303,7 @@
303 atmel,use-dma-rx; 303 atmel,use-dma-rx;
304 atmel,use-dma-tx; 304 atmel,use-dma-tx;
305 pinctrl-names = "default"; 305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_uart0>; 306 pinctrl-0 = <&pinctrl_usart0>;
307 status = "disabled"; 307 status = "disabled";
308 }; 308 };
309 309
@@ -314,7 +314,7 @@
314 atmel,use-dma-rx; 314 atmel,use-dma-rx;
315 atmel,use-dma-tx; 315 atmel,use-dma-tx;
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_uart1>; 317 pinctrl-0 = <&pinctrl_usart1>;
318 status = "disabled"; 318 status = "disabled";
319 }; 319 };
320 320
@@ -325,7 +325,7 @@
325 atmel,use-dma-rx; 325 atmel,use-dma-rx;
326 atmel,use-dma-tx; 326 atmel,use-dma-tx;
327 pinctrl-names = "default"; 327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_uart2>; 328 pinctrl-0 = <&pinctrl_usart2>;
329 status = "disabled"; 329 status = "disabled";
330 }; 330 };
331 331
@@ -336,29 +336,29 @@
336 atmel,use-dma-rx; 336 atmel,use-dma-rx;
337 atmel,use-dma-tx; 337 atmel,use-dma-tx;
338 pinctrl-names = "default"; 338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_uart3>; 339 pinctrl-0 = <&pinctrl_usart3>;
340 status = "disabled"; 340 status = "disabled";
341 }; 341 };
342 342
343 usart4: serial@fffd4000 { 343 uart0: serial@fffd4000 {
344 compatible = "atmel,at91sam9260-usart"; 344 compatible = "atmel,at91sam9260-usart";
345 reg = <0xfffd4000 0x200>; 345 reg = <0xfffd4000 0x200>;
346 interrupts = <24 4 5>; 346 interrupts = <24 4 5>;
347 atmel,use-dma-rx; 347 atmel,use-dma-rx;
348 atmel,use-dma-tx; 348 atmel,use-dma-tx;
349 pinctrl-names = "default"; 349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_uart4>; 350 pinctrl-0 = <&pinctrl_uart0>;
351 status = "disabled"; 351 status = "disabled";
352 }; 352 };
353 353
354 usart5: serial@fffd8000 { 354 uart1: serial@fffd8000 {
355 compatible = "atmel,at91sam9260-usart"; 355 compatible = "atmel,at91sam9260-usart";
356 reg = <0xfffd8000 0x200>; 356 reg = <0xfffd8000 0x200>;
357 interrupts = <25 4 5>; 357 interrupts = <25 4 5>;
358 atmel,use-dma-rx; 358 atmel,use-dma-rx;
359 atmel,use-dma-tx; 359 atmel,use-dma-tx;
360 pinctrl-names = "default"; 360 pinctrl-names = "default";
361 pinctrl-0 = <&pinctrl_uart5>; 361 pinctrl-0 = <&pinctrl_uart1>;
362 status = "disabled"; 362 status = "disabled";
363 }; 363 };
364 364
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 148b89a50eed..cf4b59fc8e08 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -113,42 +113,42 @@
113 }; 113 };
114 }; 114 };
115 115
116 uart0 { 116 usart0 {
117 pinctrl_uart0: uart0-0 { 117 pinctrl_usart0: usart0-0 {
118 atmel,pins = 118 atmel,pins =
119 <0 26 0x1 0x1 /* PA26 periph A with pullup */ 119 <0 26 0x1 0x1 /* PA26 periph A with pullup */
120 0 27 0x1 0x0>; /* PA27 periph A */ 120 0 27 0x1 0x0>; /* PA27 periph A */
121 }; 121 };
122 122
123 pinctrl_uart0_rts_cts: uart0_rts_cts-0 { 123 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
124 atmel,pins = 124 atmel,pins =
125 <0 28 0x1 0x0 /* PA28 periph A */ 125 <0 28 0x1 0x0 /* PA28 periph A */
126 0 29 0x1 0x0>; /* PA29 periph A */ 126 0 29 0x1 0x0>; /* PA29 periph A */
127 }; 127 };
128 }; 128 };
129 129
130 uart1 { 130 usart1 {
131 pinctrl_uart1: uart1-0 { 131 pinctrl_usart1: usart1-0 {
132 atmel,pins = 132 atmel,pins =
133 <3 0 0x1 0x1 /* PD0 periph A with pullup */ 133 <3 0 0x1 0x1 /* PD0 periph A with pullup */
134 3 1 0x1 0x0>; /* PD1 periph A */ 134 3 1 0x1 0x0>; /* PD1 periph A */
135 }; 135 };
136 136
137 pinctrl_uart1_rts_cts: uart1_rts_cts-0 { 137 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
138 atmel,pins = 138 atmel,pins =
139 <3 7 0x2 0x0 /* PD7 periph B */ 139 <3 7 0x2 0x0 /* PD7 periph B */
140 3 8 0x2 0x0>; /* PD8 periph B */ 140 3 8 0x2 0x0>; /* PD8 periph B */
141 }; 141 };
142 }; 142 };
143 143
144 uart2 { 144 usart2 {
145 pinctrl_uart2: uart2-0 { 145 pinctrl_usart2: usart2-0 {
146 atmel,pins = 146 atmel,pins =
147 <3 2 0x1 0x1 /* PD2 periph A with pullup */ 147 <3 2 0x1 0x1 /* PD2 periph A with pullup */
148 3 3 0x1 0x0>; /* PD3 periph A */ 148 3 3 0x1 0x0>; /* PD3 periph A */
149 }; 149 };
150 150
151 pinctrl_uart2_rts_cts: uart2_rts_cts-0 { 151 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
152 atmel,pins = 152 atmel,pins =
153 <3 5 0x2 0x0 /* PD5 periph B */ 153 <3 5 0x2 0x0 /* PD5 periph B */
154 4 6 0x2 0x0>; /* PD6 periph B */ 154 4 6 0x2 0x0>; /* PD6 periph B */
@@ -258,7 +258,7 @@
258 atmel,use-dma-rx; 258 atmel,use-dma-rx;
259 atmel,use-dma-tx; 259 atmel,use-dma-tx;
260 pinctrl-names = "default"; 260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_uart0>; 261 pinctrl-0 = <&pinctrl_usart0>;
262 status = "disabled"; 262 status = "disabled";
263 }; 263 };
264 264
@@ -269,7 +269,7 @@
269 atmel,use-dma-rx; 269 atmel,use-dma-rx;
270 atmel,use-dma-tx; 270 atmel,use-dma-tx;
271 pinctrl-names = "default"; 271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_uart1>; 272 pinctrl-0 = <&pinctrl_usart1>;
273 status = "disabled"; 273 status = "disabled";
274 }; 274 };
275 275
@@ -280,7 +280,7 @@
280 atmel,use-dma-rx; 280 atmel,use-dma-rx;
281 atmel,use-dma-tx; 281 atmel,use-dma-tx;
282 pinctrl-names = "default"; 282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart2>; 283 pinctrl-0 = <&pinctrl_usart2>;
284 status = "disabled"; 284 status = "disabled";
285 }; 285 };
286 286
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 7cfe9d521f12..34343739727d 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -38,7 +38,7 @@
38 }; 38 };
39 39
40 usart0: serial@fff8c000 { 40 usart0: serial@fff8c000 {
41 pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>; 41 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
42 status = "okay"; 42 status = "okay";
43 }; 43 };
44 44
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index e33ab0a88d04..04f048f082e8 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -36,11 +36,11 @@
36 36
37 usart0: serial@fffb0000 { 37 usart0: serial@fffb0000 {
38 pinctrl-0 = 38 pinctrl-0 =
39 <&pinctrl_uart0 39 <&pinctrl_usart0
40 &pinctrl_uart0_rts_cts 40 &pinctrl_usart0_rts_cts
41 &pinctrl_uart0_dtr_dsr 41 &pinctrl_usart0_dtr_dsr
42 &pinctrl_uart0_dcd 42 &pinctrl_usart0_dcd
43 &pinctrl_uart0_ri>; 43 &pinctrl_usart0_ri>;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 0ad84b6cd039..56ce89615263 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -132,14 +132,14 @@
132 }; 132 };
133 }; 133 };
134 134
135 uart0 { 135 usart0 {
136 pinctrl_uart0: uart0-0 { 136 pinctrl_usart0: usart0-0 {
137 atmel,pins = 137 atmel,pins =
138 <1 19 0x1 0x1 /* PB19 periph A with pullup */ 138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
139 1 18 0x1 0x0>; /* PB18 periph A */ 139 1 18 0x1 0x0>; /* PB18 periph A */
140 }; 140 };
141 141
142 pinctrl_uart0_rts_cts: uart0_rts_cts-0 { 142 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
143 atmel,pins = 143 atmel,pins =
144 <1 17 0x2 0x0 /* PB17 periph B */ 144 <1 17 0x2 0x0 /* PB17 periph B */
145 1 15 0x2 0x0>; /* PB15 periph B */ 145 1 15 0x2 0x0>; /* PB15 periph B */
@@ -147,41 +147,41 @@
147 }; 147 };
148 148
149 uart1 { 149 uart1 {
150 pinctrl_uart1: uart1-0 { 150 pinctrl_usart1: usart1-0 {
151 atmel,pins = 151 atmel,pins =
152 <1 4 0x1 0x1 /* PB4 periph A with pullup */ 152 <1 4 0x1 0x1 /* PB4 periph A with pullup */
153 1 5 0x1 0x0>; /* PB5 periph A */ 153 1 5 0x1 0x0>; /* PB5 periph A */
154 }; 154 };
155 155
156 pinctrl_uart1_rts_cts: uart1_rts_cts-0 { 156 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
157 atmel,pins = 157 atmel,pins =
158 <3 16 0x1 0x0 /* PD16 periph A */ 158 <3 16 0x1 0x0 /* PD16 periph A */
159 3 17 0x1 0x0>; /* PD17 periph A */ 159 3 17 0x1 0x0>; /* PD17 periph A */
160 }; 160 };
161 }; 161 };
162 162
163 uart2 { 163 usart2 {
164 pinctrl_uart2: uart2-0 { 164 pinctrl_usart2: usart2-0 {
165 atmel,pins = 165 atmel,pins =
166 <1 6 0x1 0x1 /* PB6 periph A with pullup */ 166 <1 6 0x1 0x1 /* PB6 periph A with pullup */
167 1 7 0x1 0x0>; /* PB7 periph A */ 167 1 7 0x1 0x0>; /* PB7 periph A */
168 }; 168 };
169 169
170 pinctrl_uart2_rts_cts: uart2_rts_cts-0 { 170 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
171 atmel,pins = 171 atmel,pins =
172 <2 9 0x2 0x0 /* PC9 periph B */ 172 <2 9 0x2 0x0 /* PC9 periph B */
173 2 11 0x2 0x0>; /* PC11 periph B */ 173 2 11 0x2 0x0>; /* PC11 periph B */
174 }; 174 };
175 }; 175 };
176 176
177 uart3 { 177 usart3 {
178 pinctrl_uart3: uart3-0 { 178 pinctrl_usart3: usart3-0 {
179 atmel,pins = 179 atmel,pins =
180 <1 8 0x1 0x1 /* PB9 periph A with pullup */ 180 <1 8 0x1 0x1 /* PB9 periph A with pullup */
181 1 9 0x1 0x0>; /* PB8 periph A */ 181 1 9 0x1 0x0>; /* PB8 periph A */
182 }; 182 };
183 183
184 pinctrl_uart3_rts_cts: uart3_rts_cts-0 { 184 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
185 atmel,pins = 185 atmel,pins =
186 <0 23 0x2 0x0 /* PA23 periph B */ 186 <0 23 0x2 0x0 /* PA23 periph B */
187 0 24 0x2 0x0>; /* PA24 periph B */ 187 0 24 0x2 0x0>; /* PA24 periph B */
@@ -291,7 +291,7 @@
291 atmel,use-dma-rx; 291 atmel,use-dma-rx;
292 atmel,use-dma-tx; 292 atmel,use-dma-tx;
293 pinctrl-names = "default"; 293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_uart0>; 294 pinctrl-0 = <&pinctrl_usart0>;
295 status = "disabled"; 295 status = "disabled";
296 }; 296 };
297 297
@@ -302,7 +302,7 @@
302 atmel,use-dma-rx; 302 atmel,use-dma-rx;
303 atmel,use-dma-tx; 303 atmel,use-dma-tx;
304 pinctrl-names = "default"; 304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_uart1>; 305 pinctrl-0 = <&pinctrl_usart1>;
306 status = "disabled"; 306 status = "disabled";
307 }; 307 };
308 308
@@ -313,7 +313,7 @@
313 atmel,use-dma-rx; 313 atmel,use-dma-rx;
314 atmel,use-dma-tx; 314 atmel,use-dma-tx;
315 pinctrl-names = "default"; 315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_uart2>; 316 pinctrl-0 = <&pinctrl_usart2>;
317 status = "disabled"; 317 status = "disabled";
318 }; 318 };
319 319
@@ -324,7 +324,7 @@
324 atmel,use-dma-rx; 324 atmel,use-dma-rx;
325 atmel,use-dma-tx; 325 atmel,use-dma-tx;
326 pinctrl-names = "default"; 326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_uart3>; 327 pinctrl-0 = <&pinctrl_usart3>;
328 status = "disabled"; 328 status = "disabled";
329 }; 329 };
330 330
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 6aa28b941907..0d9674b5e6a9 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -39,7 +39,7 @@
39 }; 39 };
40 40
41 usart1: serial@fff90000 { 41 usart1: serial@fff90000 {
42 pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>; 42 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
43 status = "okay"; 43 status = "okay";
44 }; 44 };
45 45
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7b644c5b0bed..10547bc52a2d 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -125,66 +125,66 @@
125 }; 125 };
126 }; 126 };
127 127
128 uart0 { 128 usart0 {
129 pinctrl_uart0: uart0-0 { 129 pinctrl_usart0: usart0-0 {
130 atmel,pins = 130 atmel,pins =
131 <0 1 0x1 0x1 /* PA1 periph A with pullup */ 131 <0 1 0x1 0x1 /* PA1 periph A with pullup */
132 0 0 0x1 0x0>; /* PA0 periph A */ 132 0 0 0x1 0x0>; /* PA0 periph A */
133 }; 133 };
134 134
135 pinctrl_uart0_rts_cts: uart0_rts_cts-0 { 135 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
136 atmel,pins = 136 atmel,pins =
137 <0 2 0x1 0x0 /* PA2 periph A */ 137 <0 2 0x1 0x0 /* PA2 periph A */
138 0 3 0x1 0x0>; /* PA3 periph A */ 138 0 3 0x1 0x0>; /* PA3 periph A */
139 }; 139 };
140 }; 140 };
141 141
142 uart1 { 142 usart1 {
143 pinctrl_uart1: uart1-0 { 143 pinctrl_usart1: usart1-0 {
144 atmel,pins = 144 atmel,pins =
145 <0 6 0x1 0x1 /* PA6 periph A with pullup */ 145 <0 6 0x1 0x1 /* PA6 periph A with pullup */
146 0 5 0x1 0x0>; /* PA5 periph A */ 146 0 5 0x1 0x0>; /* PA5 periph A */
147 }; 147 };
148 }; 148 };
149 149
150 uart2 { 150 usart2 {
151 pinctrl_uart2: uart2-0 { 151 pinctrl_usart2: usart2-0 {
152 atmel,pins = 152 atmel,pins =
153 <0 8 0x1 0x1 /* PA8 periph A with pullup */ 153 <0 8 0x1 0x1 /* PA8 periph A with pullup */
154 0 7 0x1 0x0>; /* PA7 periph A */ 154 0 7 0x1 0x0>; /* PA7 periph A */
155 }; 155 };
156 156
157 pinctrl_uart2_rts_cts: uart2_rts_cts-0 { 157 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
158 atmel,pins = 158 atmel,pins =
159 <1 0 0x2 0x0 /* PB0 periph B */ 159 <1 0 0x2 0x0 /* PB0 periph B */
160 1 1 0x2 0x0>; /* PB1 periph B */ 160 1 1 0x2 0x0>; /* PB1 periph B */
161 }; 161 };
162 }; 162 };
163 163
164 uart3 { 164 usart3 {
165 pinctrl_uart3: uart3-0 { 165 pinctrl_usart3: usart3-0 {
166 atmel,pins = 166 atmel,pins =
167 <2 23 0x2 0x1 /* PC23 periph B with pullup */ 167 <2 23 0x2 0x1 /* PC23 periph B with pullup */
168 2 22 0x2 0x0>; /* PC22 periph B */ 168 2 22 0x2 0x0>; /* PC22 periph B */
169 }; 169 };
170 170
171 pinctrl_uart3_rts_cts: uart3_rts_cts-0 { 171 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
172 atmel,pins = 172 atmel,pins =
173 <2 24 0x2 0x0 /* PC24 periph B */ 173 <2 24 0x2 0x0 /* PC24 periph B */
174 2 25 0x2 0x0>; /* PC25 periph B */ 174 2 25 0x2 0x0>; /* PC25 periph B */
175 }; 175 };
176 }; 176 };
177 177
178 usart0 { 178 uart0 {
179 pinctrl_usart0: usart0-0 { 179 pinctrl_uart0: uart0-0 {
180 atmel,pins = 180 atmel,pins =
181 <2 9 0x3 0x1 /* PC9 periph C with pullup */ 181 <2 9 0x3 0x1 /* PC9 periph C with pullup */
182 2 8 0x3 0x0>; /* PC8 periph C */ 182 2 8 0x3 0x0>; /* PC8 periph C */
183 }; 183 };
184 }; 184 };
185 185
186 usart1 { 186 uart1 {
187 pinctrl_usart1: usart1-0 { 187 pinctrl_uart1: uart1-0 {
188 atmel,pins = 188 atmel,pins =
189 <2 16 0x3 0x1 /* PC17 periph C with pullup */ 189 <2 16 0x3 0x1 /* PC17 periph C with pullup */
190 2 17 0x3 0x0>; /* PC16 periph C */ 190 2 17 0x3 0x0>; /* PC16 periph C */
@@ -256,7 +256,7 @@
256 atmel,use-dma-rx; 256 atmel,use-dma-rx;
257 atmel,use-dma-tx; 257 atmel,use-dma-tx;
258 pinctrl-names = "default"; 258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_uart0>; 259 pinctrl-0 = <&pinctrl_usart0>;
260 status = "disabled"; 260 status = "disabled";
261 }; 261 };
262 262
@@ -267,7 +267,7 @@
267 atmel,use-dma-rx; 267 atmel,use-dma-rx;
268 atmel,use-dma-tx; 268 atmel,use-dma-tx;
269 pinctrl-names = "default"; 269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_uart1>; 270 pinctrl-0 = <&pinctrl_usart1>;
271 status = "disabled"; 271 status = "disabled";
272 }; 272 };
273 273
@@ -278,7 +278,7 @@
278 atmel,use-dma-rx; 278 atmel,use-dma-rx;
279 atmel,use-dma-tx; 279 atmel,use-dma-tx;
280 pinctrl-names = "default"; 280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_uart2>; 281 pinctrl-0 = <&pinctrl_usart2>;
282 status = "disabled"; 282 status = "disabled";
283 }; 283 };
284 284
@@ -289,7 +289,7 @@
289 atmel,use-dma-rx; 289 atmel,use-dma-rx;
290 atmel,use-dma-tx; 290 atmel,use-dma-tx;
291 pinctrl-names = "default"; 291 pinctrl-names = "default";
292 pinctrl-0 = <&pinctrl_uart3>; 292 pinctrl-0 = <&pinctrl_usart3>;
293 status = "disabled"; 293 status = "disabled";
294 }; 294 };
295 295
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 9fd715926836..9dac00693faf 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -126,36 +126,36 @@
126 }; 126 };
127 }; 127 };
128 128
129 uart0 { 129 usart0 {
130 pinctrl_uart0: uart0-0 { 130 pinctrl_usart0: usart0-0 {
131 atmel,pins = 131 atmel,pins =
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */ 132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */ 133 0 1 0x1 0x0>; /* PA1 periph A */
134 }; 134 };
135 135
136 pinctrl_uart0_rts_cts: uart0_rts_cts-0 { 136 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
137 atmel,pins = 137 atmel,pins =
138 <0 2 0x1 0x0 /* PA2 periph A */ 138 <0 2 0x1 0x0 /* PA2 periph A */
139 0 3 0x1 0x0>; /* PA3 periph A */ 139 0 3 0x1 0x0>; /* PA3 periph A */
140 }; 140 };
141 }; 141 };
142 142
143 uart1 { 143 usart1 {
144 pinctrl_uart1: uart1-0 { 144 pinctrl_usart1: usart1-0 {
145 atmel,pins = 145 atmel,pins =
146 <0 5 0x1 0x1 /* PA5 periph A with pullup */ 146 <0 5 0x1 0x1 /* PA5 periph A with pullup */
147 0 6 0x1 0x0>; /* PA6 periph A */ 147 0 6 0x1 0x0>; /* PA6 periph A */
148 }; 148 };
149 149
150 pinctrl_uart1_rts_cts: uart1_rts_cts-0 { 150 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
151 atmel,pins = 151 atmel,pins =
152 <3 27 0x3 0x0 /* PC27 periph C */ 152 <3 27 0x3 0x0 /* PC27 periph C */
153 3 28 0x3 0x0>; /* PC28 periph C */ 153 3 28 0x3 0x0>; /* PC28 periph C */
154 }; 154 };
155 }; 155 };
156 156
157 uart2 { 157 usart2 {
158 pinctrl_uart2: uart2-0 { 158 pinctrl_usart2: usart2-0 {
159 atmel,pins = 159 atmel,pins =
160 <0 7 0x1 0x1 /* PA7 periph A with pullup */ 160 <0 7 0x1 0x1 /* PA7 periph A with pullup */
161 0 8 0x1 0x0>; /* PA8 periph A */ 161 0 8 0x1 0x0>; /* PA8 periph A */
@@ -168,30 +168,30 @@
168 }; 168 };
169 }; 169 };
170 170
171 uart3 { 171 usart3 {
172 pinctrl_uart3: uart3-0 { 172 pinctrl_uart3: usart3-0 {
173 atmel,pins = 173 atmel,pins =
174 <3 23 0x2 0x1 /* PC22 periph B with pullup */ 174 <3 23 0x2 0x1 /* PC22 periph B with pullup */
175 3 23 0x2 0x0>; /* PC23 periph B */ 175 3 23 0x2 0x0>; /* PC23 periph B */
176 }; 176 };
177 177
178 pinctrl_uart3_rts_cts: uart3_rts_cts-0 { 178 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
179 atmel,pins = 179 atmel,pins =
180 <3 24 0x2 0x0 /* PC24 periph B */ 180 <3 24 0x2 0x0 /* PC24 periph B */
181 3 25 0x2 0x0>; /* PC25 periph B */ 181 3 25 0x2 0x0>; /* PC25 periph B */
182 }; 182 };
183 }; 183 };
184 184
185 usart0 { 185 uart0 {
186 pinctrl_usart0: usart0-0 { 186 pinctrl_uart0: uart0-0 {
187 atmel,pins = 187 atmel,pins =
188 <3 8 0x3 0x0 /* PC8 periph C */ 188 <3 8 0x3 0x0 /* PC8 periph C */
189 3 9 0x3 0x1>; /* PC9 periph C with pullup */ 189 3 9 0x3 0x1>; /* PC9 periph C with pullup */
190 }; 190 };
191 }; 191 };
192 192
193 usart1 { 193 uart1 {
194 pinctrl_usart1: usart1-0 { 194 pinctrl_uart1: uart1-0 {
195 atmel,pins = 195 atmel,pins =
196 <3 16 0x3 0x0 /* PC16 periph C */ 196 <3 16 0x3 0x0 /* PC16 periph C */
197 3 17 0x3 0x1>; /* PC17 periph C with pullup */ 197 3 17 0x3 0x1>; /* PC17 periph C with pullup */
@@ -293,7 +293,7 @@
293 atmel,use-dma-rx; 293 atmel,use-dma-rx;
294 atmel,use-dma-tx; 294 atmel,use-dma-tx;
295 pinctrl-names = "default"; 295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_uart0>; 296 pinctrl-0 = <&pinctrl_usart0>;
297 status = "disabled"; 297 status = "disabled";
298 }; 298 };
299 299
@@ -304,7 +304,7 @@
304 atmel,use-dma-rx; 304 atmel,use-dma-rx;
305 atmel,use-dma-tx; 305 atmel,use-dma-tx;
306 pinctrl-names = "default"; 306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_uart1>; 307 pinctrl-0 = <&pinctrl_usart1>;
308 status = "disabled"; 308 status = "disabled";
309 }; 309 };
310 310
@@ -315,7 +315,7 @@
315 atmel,use-dma-rx; 315 atmel,use-dma-rx;
316 atmel,use-dma-tx; 316 atmel,use-dma-tx;
317 pinctrl-names = "default"; 317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_uart2>; 318 pinctrl-0 = <&pinctrl_usart2>;
319 status = "disabled"; 319 status = "disabled";
320 }; 320 };
321 321
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 21:20:13 -0500