diff options
author | Archit Taneja <archit@ti.com> | 2011-01-06 00:14:10 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-03-11 08:46:27 -0500 |
commit | 88134fa138b90518819b750891ffecc13f5f4886 (patch) | |
tree | 3a07a522cc2764bcb81dc2b4d83b8468e84295f4 | |
parent | 819d807c59af10cce1dcbb13539c2fb100953fcd (diff) |
OMAP2PLUS: DSS2: Make members of dss_clk_source generic
The enum members of 'dss_clk_source' have clock source names specific to
OMAP2/3. Change the names to more generic terms such that they now describe
where the clocks come from and what they are used for.
Also, change the enum member names to have "DSS_CLK_SRC" instead of "DSS_SRC"
for more clarity.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r-- | drivers/video/omap2/dss/dispc.c | 4 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dpi.c | 4 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 20 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 20 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss.h | 6 |
5 files changed, 27 insertions, 27 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index aa6479712d4c..a06b2ea41e98 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -2334,7 +2334,7 @@ unsigned long dispc_fclk_rate(void) | |||
2334 | { | 2334 | { |
2335 | unsigned long r = 0; | 2335 | unsigned long r = 0; |
2336 | 2336 | ||
2337 | if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) | 2337 | if (dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK) |
2338 | r = dss_clk_get_rate(DSS_CLK_FCK); | 2338 | r = dss_clk_get_rate(DSS_CLK_FCK); |
2339 | else | 2339 | else |
2340 | #ifdef CONFIG_OMAP2_DSS_DSI | 2340 | #ifdef CONFIG_OMAP2_DSS_DSI |
@@ -2385,7 +2385,7 @@ void dispc_dump_clocks(struct seq_file *s) | |||
2385 | seq_printf(s, "- DISPC -\n"); | 2385 | seq_printf(s, "- DISPC -\n"); |
2386 | 2386 | ||
2387 | seq_printf(s, "dispc fclk source = %s\n", | 2387 | seq_printf(s, "dispc fclk source = %s\n", |
2388 | dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? | 2388 | dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? |
2389 | "dss1_alwon_fclk" : "dsi1_pll_fclk"); | 2389 | "dss1_alwon_fclk" : "dsi1_pll_fclk"); |
2390 | 2390 | ||
2391 | seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); | 2391 | seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); |
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 026702b921e5..1b2867dfeeb9 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c | |||
@@ -57,7 +57,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, | |||
57 | if (r) | 57 | if (r) |
58 | return r; | 58 | return r; |
59 | 59 | ||
60 | dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK); | 60 | dss_select_dispc_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC); |
61 | 61 | ||
62 | r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo); | 62 | r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo); |
63 | if (r) | 63 | if (r) |
@@ -217,7 +217,7 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) | |||
217 | dssdev->manager->disable(dssdev->manager); | 217 | dssdev->manager->disable(dssdev->manager); |
218 | 218 | ||
219 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL | 219 | #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL |
220 | dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); | 220 | dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); |
221 | dsi_pll_uninit(); | 221 | dsi_pll_uninit(); |
222 | dss_clk_disable(DSS_CLK_SYSCK); | 222 | dss_clk_disable(DSS_CLK_SYSCK); |
223 | #endif | 223 | #endif |
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 705599ad3166..df35aed828da 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -731,7 +731,7 @@ static unsigned long dsi_fclk_rate(void) | |||
731 | { | 731 | { |
732 | unsigned long r; | 732 | unsigned long r; |
733 | 733 | ||
734 | if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) { | 734 | if (dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK) { |
735 | /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ | 735 | /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */ |
736 | r = dss_clk_get_rate(DSS_CLK_FCK); | 736 | r = dss_clk_get_rate(DSS_CLK_FCK); |
737 | } else { | 737 | } else { |
@@ -1188,19 +1188,19 @@ void dsi_dump_clocks(struct seq_file *s) | |||
1188 | seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n", | 1188 | seq_printf(s, "dsi1_pll_fck\t%-16luregm3 %u\t(%s)\n", |
1189 | cinfo->dsi1_pll_fclk, | 1189 | cinfo->dsi1_pll_fclk, |
1190 | cinfo->regm3, | 1190 | cinfo->regm3, |
1191 | dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? | 1191 | dss_get_dispc_clk_source() == DSS_CLK_SRC_FCK ? |
1192 | "off" : "on"); | 1192 | "off" : "on"); |
1193 | 1193 | ||
1194 | seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n", | 1194 | seq_printf(s, "dsi2_pll_fck\t%-16luregm4 %u\t(%s)\n", |
1195 | cinfo->dsi2_pll_fclk, | 1195 | cinfo->dsi2_pll_fclk, |
1196 | cinfo->regm4, | 1196 | cinfo->regm4, |
1197 | dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? | 1197 | dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? |
1198 | "off" : "on"); | 1198 | "off" : "on"); |
1199 | 1199 | ||
1200 | seq_printf(s, "- DSI -\n"); | 1200 | seq_printf(s, "- DSI -\n"); |
1201 | 1201 | ||
1202 | seq_printf(s, "dsi fclk source = %s\n", | 1202 | seq_printf(s, "dsi fclk source = %s\n", |
1203 | dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK ? | 1203 | dss_get_dsi_clk_source() == DSS_CLK_SRC_FCK ? |
1204 | "dss1_alwon_fclk" : "dsi2_pll_fclk"); | 1204 | "dss1_alwon_fclk" : "dsi2_pll_fclk"); |
1205 | 1205 | ||
1206 | seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate()); | 1206 | seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate()); |
@@ -3038,8 +3038,8 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) | |||
3038 | if (r) | 3038 | if (r) |
3039 | goto err1; | 3039 | goto err1; |
3040 | 3040 | ||
3041 | dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK); | 3041 | dss_select_dispc_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC); |
3042 | dss_select_dsi_clk_source(DSS_SRC_DSI2_PLL_FCLK); | 3042 | dss_select_dsi_clk_source(DSS_CLK_SRC_DSI_PLL_HSDIV_DSI); |
3043 | 3043 | ||
3044 | DSSDBG("PLL OK\n"); | 3044 | DSSDBG("PLL OK\n"); |
3045 | 3045 | ||
@@ -3075,8 +3075,8 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) | |||
3075 | err3: | 3075 | err3: |
3076 | dsi_complexio_uninit(); | 3076 | dsi_complexio_uninit(); |
3077 | err2: | 3077 | err2: |
3078 | dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); | 3078 | dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); |
3079 | dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK); | 3079 | dss_select_dsi_clk_source(DSS_CLK_SRC_FCK); |
3080 | err1: | 3080 | err1: |
3081 | dsi_pll_uninit(); | 3081 | dsi_pll_uninit(); |
3082 | err0: | 3082 | err0: |
@@ -3092,8 +3092,8 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev) | |||
3092 | dsi_vc_enable(2, 0); | 3092 | dsi_vc_enable(2, 0); |
3093 | dsi_vc_enable(3, 0); | 3093 | dsi_vc_enable(3, 0); |
3094 | 3094 | ||
3095 | dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK); | 3095 | dss_select_dispc_clk_source(DSS_CLK_SRC_FCK); |
3096 | dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK); | 3096 | dss_select_dsi_clk_source(DSS_CLK_SRC_FCK); |
3097 | dsi_complexio_uninit(); | 3097 | dsi_complexio_uninit(); |
3098 | dsi_pll_uninit(); | 3098 | dsi_pll_uninit(); |
3099 | } | 3099 | } |
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 01be82a4f42f..998c188c8823 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -278,12 +278,12 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src) | |||
278 | { | 278 | { |
279 | int b; | 279 | int b; |
280 | 280 | ||
281 | BUG_ON(clk_src != DSS_SRC_DSI1_PLL_FCLK && | 281 | BUG_ON(clk_src != DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC && |
282 | clk_src != DSS_SRC_DSS1_ALWON_FCLK); | 282 | clk_src != DSS_CLK_SRC_FCK); |
283 | 283 | ||
284 | b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; | 284 | b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; |
285 | 285 | ||
286 | if (clk_src == DSS_SRC_DSI1_PLL_FCLK) | 286 | if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC) |
287 | dsi_wait_dsi1_pll_active(); | 287 | dsi_wait_dsi1_pll_active(); |
288 | 288 | ||
289 | REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ | 289 | REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ |
@@ -295,12 +295,12 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src) | |||
295 | { | 295 | { |
296 | int b; | 296 | int b; |
297 | 297 | ||
298 | BUG_ON(clk_src != DSS_SRC_DSI2_PLL_FCLK && | 298 | BUG_ON(clk_src != DSS_CLK_SRC_DSI_PLL_HSDIV_DSI && |
299 | clk_src != DSS_SRC_DSS1_ALWON_FCLK); | 299 | clk_src != DSS_CLK_SRC_FCK); |
300 | 300 | ||
301 | b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; | 301 | b = clk_src == DSS_CLK_SRC_FCK ? 0 : 1; |
302 | 302 | ||
303 | if (clk_src == DSS_SRC_DSI2_PLL_FCLK) | 303 | if (clk_src == DSS_CLK_SRC_DSI_PLL_HSDIV_DSI) |
304 | dsi_wait_dsi2_pll_active(); | 304 | dsi_wait_dsi2_pll_active(); |
305 | 305 | ||
306 | REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ | 306 | REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ |
@@ -601,8 +601,8 @@ static int dss_init(bool skip_init) | |||
601 | } | 601 | } |
602 | } | 602 | } |
603 | 603 | ||
604 | dss.dsi_clk_source = DSS_SRC_DSS1_ALWON_FCLK; | 604 | dss.dsi_clk_source = DSS_CLK_SRC_FCK; |
605 | dss.dispc_clk_source = DSS_SRC_DSS1_ALWON_FCLK; | 605 | dss.dispc_clk_source = DSS_CLK_SRC_FCK; |
606 | 606 | ||
607 | dss_save_context(); | 607 | dss_save_context(); |
608 | 608 | ||
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 7fe32d1647f9..a166ff36ec90 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h | |||
@@ -118,9 +118,9 @@ enum dss_clock { | |||
118 | }; | 118 | }; |
119 | 119 | ||
120 | enum dss_clk_source { | 120 | enum dss_clk_source { |
121 | DSS_SRC_DSI1_PLL_FCLK, | 121 | DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* DSI1_PLL_FCLK */ |
122 | DSS_SRC_DSI2_PLL_FCLK, | 122 | DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* DSI2_PLL_FCLK */ |
123 | DSS_SRC_DSS1_ALWON_FCLK, | 123 | DSS_CLK_SRC_FCK, /* DSS1_ALWON_FCLK */ |
124 | }; | 124 | }; |
125 | 125 | ||
126 | struct dss_clock_info { | 126 | struct dss_clock_info { |