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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-09-10 11:01:26 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2010-10-01 03:32:17 -0400
commit74d99f395901502747a44a1379f3b4fdb638dafa (patch)
treeadc6607c0f451f7a65f9c552c7cebbbb42a56509
parent79901478e0a2854c4becbb2e77f176bd7fa37caa (diff)
ARM: mx5/clock-mx51: new macro that defines a clk with all members
Acked-by: Jason Wang <jason77.wang@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index fe658bf5b490..0e396981c27c 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -764,21 +764,21 @@ static struct clk kpp_clk = {
764 .id = 0, 764 .id = 0,
765}; 765};
766 766
767#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ 767#define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s) \
768 static struct clk name = { \ 768 static struct clk name = { \
769 .id = i, \ 769 .id = i, \
770 .enable_reg = er, \ 770 .enable_reg = er, \
771 .enable_shift = es, \ 771 .enable_shift = es, \
772 .get_rate = gr, \ 772 .get_rate = gr, \
773 .set_rate = sr, \ 773 .set_rate = sr, \
774 .enable = _clk_ccgr_enable, \ 774 .enable = e, \
775 .disable = _clk_ccgr_disable, \ 775 .disable = d, \
776 .parent = p, \ 776 .parent = p, \
777 .secondary = s, \ 777 .secondary = s, \
778 } 778 }
779 779
780/* DEFINE_CLOCK(name, id, enable_reg, enable_shift, 780#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \
781 get_rate, set_rate, parent, secondary); */ 781 DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, _clk_ccgr_enable, _clk_ccgr_disable, p, s)
782 782
783/* Shared peripheral bus arbiter */ 783/* Shared peripheral bus arbiter */
784DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET, 784DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,