diff options
author | Dave Peterson <dsp@llnl.gov> | 2006-03-26 04:38:45 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-26 11:57:07 -0500 |
commit | 749ede57443b2a7ede2db105145f21047efcea6a (patch) | |
tree | 0d0ee972f55e8fbb9d8fba6209a6304fdd3c98f1 | |
parent | d38fde84f7521973fdfa5c3d03d62f014b42cd03 (diff) |
[PATCH] EDAC: cleanup code for clearing initial errors
Fix xxx_probe1() functions so they call xxx_get_error_info() functions
to clear initial errors. This is simpler and cleaner than duplicating
the low-level code for accessing PCI config space.
Signed-off-by: David S. Peterson <dsp@llnl.gov>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | drivers/edac/amd76x_edac.c | 5 | ||||
-rw-r--r-- | drivers/edac/e752x_edac.c | 22 | ||||
-rw-r--r-- | drivers/edac/e7xxx_edac.c | 5 | ||||
-rw-r--r-- | drivers/edac/edac_mc.c | 3 | ||||
-rw-r--r-- | drivers/edac/i82860_edac.c | 4 | ||||
-rw-r--r-- | drivers/edac/i82875p_edac.c | 4 | ||||
-rw-r--r-- | drivers/edac/r82600_edac.c | 14 |
7 files changed, 13 insertions, 44 deletions
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 6b7a441f0482..821c252d414c 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c | |||
@@ -211,6 +211,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
211 | }; | 211 | }; |
212 | u32 ems; | 212 | u32 ems; |
213 | u32 ems_mode; | 213 | u32 ems_mode; |
214 | struct amd76x_error_info discard; | ||
214 | 215 | ||
215 | debugf0("%s()\n", __func__); | 216 | debugf0("%s()\n", __func__); |
216 | 217 | ||
@@ -270,9 +271,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) | |||
270 | csrow->edac_mode = ems_modes[ems_mode]; | 271 | csrow->edac_mode = ems_modes[ems_mode]; |
271 | } | 272 | } |
272 | 273 | ||
273 | /* clear counters */ | 274 | amd76x_get_error_info(mci, &discard); /* clear counters */ |
274 | pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, (u32) (0x3 << 8), | ||
275 | (u32) (0x3 << 8)); | ||
276 | 275 | ||
277 | if (edac_mc_add_mc(mci)) { | 276 | if (edac_mc_add_mc(mci)) { |
278 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 277 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index f31725a55e54..24446542d8d6 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c | |||
@@ -747,8 +747,6 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) | |||
747 | int rc = -ENODEV; | 747 | int rc = -ENODEV; |
748 | int index; | 748 | int index; |
749 | u16 pci_data; | 749 | u16 pci_data; |
750 | u32 stat32; | ||
751 | u16 stat16; | ||
752 | u8 stat8; | 750 | u8 stat8; |
753 | struct mem_ctl_info *mci = NULL; | 751 | struct mem_ctl_info *mci = NULL; |
754 | struct e752x_pvt *pvt = NULL; | 752 | struct e752x_pvt *pvt = NULL; |
@@ -760,6 +758,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) | |||
760 | u32 dra; | 758 | u32 dra; |
761 | unsigned long last_cumul_size; | 759 | unsigned long last_cumul_size; |
762 | struct pci_dev *dev = NULL; | 760 | struct pci_dev *dev = NULL; |
761 | struct e752x_error_info discard; | ||
763 | 762 | ||
764 | debugf0("%s(): mci\n", __func__); | 763 | debugf0("%s(): mci\n", __func__); |
765 | debugf0("Starting Probe1\n"); | 764 | debugf0("Starting Probe1\n"); |
@@ -938,24 +937,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) | |||
938 | pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00); | 937 | pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00); |
939 | pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00); | 938 | pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00); |
940 | /* clear other MCH errors */ | 939 | /* clear other MCH errors */ |
941 | pci_read_config_dword(dev, E752X_FERR_GLOBAL, &stat32); | 940 | e752x_get_error_info(mci, &discard); |
942 | pci_write_config_dword(dev, E752X_FERR_GLOBAL, stat32); | ||
943 | pci_read_config_dword(dev, E752X_NERR_GLOBAL, &stat32); | ||
944 | pci_write_config_dword(dev, E752X_NERR_GLOBAL, stat32); | ||
945 | pci_read_config_byte(dev, E752X_HI_FERR, &stat8); | ||
946 | pci_write_config_byte(dev, E752X_HI_FERR, stat8); | ||
947 | pci_read_config_byte(dev, E752X_HI_NERR, &stat8); | ||
948 | pci_write_config_byte(dev, E752X_HI_NERR, stat8); | ||
949 | pci_read_config_dword(dev, E752X_SYSBUS_FERR, &stat32); | ||
950 | pci_write_config_dword(dev, E752X_SYSBUS_FERR, stat32); | ||
951 | pci_read_config_byte(dev, E752X_BUF_FERR, &stat8); | ||
952 | pci_write_config_byte(dev, E752X_BUF_FERR, stat8); | ||
953 | pci_read_config_byte(dev, E752X_BUF_NERR, &stat8); | ||
954 | pci_write_config_byte(dev, E752X_BUF_NERR, stat8); | ||
955 | pci_read_config_word(dev, E752X_DRAM_FERR, &stat16); | ||
956 | pci_write_config_word(dev, E752X_DRAM_FERR, stat16); | ||
957 | pci_read_config_word(dev, E752X_DRAM_NERR, &stat16); | ||
958 | pci_write_config_word(dev, E752X_DRAM_NERR, stat16); | ||
959 | 941 | ||
960 | /* get this far and it's successful */ | 942 | /* get this far and it's successful */ |
961 | debugf3("%s(): success\n", __func__); | 943 | debugf3("%s(): success\n", __func__); |
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index ec6eb77edaed..8b0da35ae47c 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c | |||
@@ -357,7 +357,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) | |||
357 | int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ | 357 | int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ |
358 | u32 dra; | 358 | u32 dra; |
359 | unsigned long last_cumul_size; | 359 | unsigned long last_cumul_size; |
360 | 360 | struct e7xxx_error_info discard; | |
361 | 361 | ||
362 | debugf0("%s(): mci\n", __func__); | 362 | debugf0("%s(): mci\n", __func__); |
363 | 363 | ||
@@ -470,8 +470,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) | |||
470 | pvt->tolm, pvt->remapbase, pvt->remaplimit); | 470 | pvt->tolm, pvt->remapbase, pvt->remaplimit); |
471 | 471 | ||
472 | /* clear any pending errors, or initial state bits */ | 472 | /* clear any pending errors, or initial state bits */ |
473 | pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03); | 473 | e7xxx_get_error_info(mci, &discard); |
474 | pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03); | ||
475 | 474 | ||
476 | if (edac_mc_add_mc(mci) != 0) { | 475 | if (edac_mc_add_mc(mci) != 0) { |
477 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 476 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 499ac90ad67e..eac09cc86aac 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c | |||
@@ -2095,9 +2095,6 @@ static int __init edac_mc_init(void) | |||
2095 | */ | 2095 | */ |
2096 | clear_pci_parity_errors(); | 2096 | clear_pci_parity_errors(); |
2097 | 2097 | ||
2098 | /* perform check for first time to harvest boot leftovers */ | ||
2099 | do_edac_check(); | ||
2100 | |||
2101 | /* Create the MC sysfs entires */ | 2098 | /* Create the MC sysfs entires */ |
2102 | if (edac_sysfs_memctrl_setup()) { | 2099 | if (edac_sysfs_memctrl_setup()) { |
2103 | edac_printk(KERN_ERR, EDAC_MC, | 2100 | edac_printk(KERN_ERR, EDAC_MC, |
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index e832778fc603..942129df0212 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c | |||
@@ -134,6 +134,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) | |||
134 | int index; | 134 | int index; |
135 | struct mem_ctl_info *mci = NULL; | 135 | struct mem_ctl_info *mci = NULL; |
136 | unsigned long last_cumul_size; | 136 | unsigned long last_cumul_size; |
137 | struct i82860_error_info discard; | ||
137 | 138 | ||
138 | u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ | 139 | u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ |
139 | 140 | ||
@@ -200,8 +201,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) | |||
200 | csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE; | 201 | csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE; |
201 | } | 202 | } |
202 | 203 | ||
203 | /* clear counters */ | 204 | i82860_get_error_info(mci, &discard); /* clear counters */ |
204 | pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003); | ||
205 | 205 | ||
206 | if (edac_mc_add_mc(mci)) { | 206 | if (edac_mc_add_mc(mci)) { |
207 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 207 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index c521178183de..40ba2be6169a 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c | |||
@@ -286,6 +286,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) | |||
286 | u32 drc_chan; /* Number of channels 0=1chan,1=2chan */ | 286 | u32 drc_chan; /* Number of channels 0=1chan,1=2chan */ |
287 | u32 nr_chans; | 287 | u32 nr_chans; |
288 | u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ | 288 | u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ |
289 | struct i82875p_error_info discard; | ||
289 | 290 | ||
290 | debugf0("%s()\n", __func__); | 291 | debugf0("%s()\n", __func__); |
291 | 292 | ||
@@ -397,8 +398,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) | |||
397 | csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; | 398 | csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; |
398 | } | 399 | } |
399 | 400 | ||
400 | /* clear counters */ | 401 | i82875p_get_error_info(mci, &discard); /* clear counters */ |
401 | pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081); | ||
402 | 402 | ||
403 | if (edac_mc_add_mc(mci)) { | 403 | if (edac_mc_add_mc(mci)) { |
404 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 404 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index ac1359828e78..787a7652c7ef 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c | |||
@@ -219,7 +219,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) | |||
219 | u32 scrub_disabled; | 219 | u32 scrub_disabled; |
220 | u32 sdram_refresh_rate; | 220 | u32 sdram_refresh_rate; |
221 | u32 row_high_limit_last = 0; | 221 | u32 row_high_limit_last = 0; |
222 | u32 eap_init_bits; | 222 | struct r82600_error_info discard; |
223 | 223 | ||
224 | debugf0("%s()\n", __func__); | 224 | debugf0("%s()\n", __func__); |
225 | 225 | ||
@@ -311,8 +311,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) | |||
311 | row_high_limit_last = row_high_limit; | 311 | row_high_limit_last = row_high_limit; |
312 | } | 312 | } |
313 | 313 | ||
314 | /* clear counters */ | 314 | r82600_get_error_info(mci, &discard); /* clear counters */ |
315 | /* FIXME should we? */ | ||
316 | 315 | ||
317 | if (edac_mc_add_mc(mci)) { | 316 | if (edac_mc_add_mc(mci)) { |
318 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 317 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
@@ -321,19 +320,12 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) | |||
321 | 320 | ||
322 | /* get this far and it's successful */ | 321 | /* get this far and it's successful */ |
323 | 322 | ||
324 | /* Clear error flags to allow next error to be reported [p.62] */ | ||
325 | /* Test systems seem to always have the UE flag raised on boot */ | ||
326 | |||
327 | eap_init_bits = BIT(0) & BIT(1); | ||
328 | if (disable_hardware_scrub) { | 323 | if (disable_hardware_scrub) { |
329 | eap_init_bits |= BIT(31); | ||
330 | debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n", | 324 | debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n", |
331 | __func__); | 325 | __func__); |
326 | pci_write_bits32(mci->pdev, R82600_EAP, BIT(31), BIT(31)); | ||
332 | } | 327 | } |
333 | 328 | ||
334 | pci_write_bits32(mci->pdev, R82600_EAP, eap_init_bits, | ||
335 | eap_init_bits); | ||
336 | |||
337 | debugf3("%s(): success\n", __func__); | 329 | debugf3("%s(): success\n", __func__); |
338 | return 0; | 330 | return 0; |
339 | 331 | ||