diff options
author | Todd Poynor <toddpoynor@google.com> | 2011-07-15 22:13:47 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-07-15 22:13:47 -0400 |
commit | 691abd0abf8fd496c96fdb5b4fb64721f02aa513 (patch) | |
tree | e8a7e9ded2937b3edfbf99ce8e104e1a17981df3 | |
parent | 620917de59eeb934b9f8cf35cc2d95c1ac8ed0fc (diff) |
ARM: SAMSUNG: Check NULL return from irq_alloc_generic_chip
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/plat-samsung/irq-uart.c | 7 | ||||
-rw-r--r-- | arch/arm/plat-samsung/irq-vic-timer.c | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 32582c0958e3..38c53646bd64 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c | |||
@@ -54,6 +54,13 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) | |||
54 | 54 | ||
55 | gc = irq_alloc_generic_chip("s3c-uart", 1, uirq->base_irq, reg_base, | 55 | gc = irq_alloc_generic_chip("s3c-uart", 1, uirq->base_irq, reg_base, |
56 | handle_level_irq); | 56 | handle_level_irq); |
57 | |||
58 | if (!gc) { | ||
59 | pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n", | ||
60 | __func__, uirq->base_irq); | ||
61 | return; | ||
62 | } | ||
63 | |||
57 | ct = gc->chip_types; | 64 | ct = gc->chip_types; |
58 | ct->chip.irq_ack = irq_gc_ack; | 65 | ct->chip.irq_ack = irq_gc_ack; |
59 | ct->chip.irq_mask = irq_gc_mask_set_bit; | 66 | ct->chip.irq_mask = irq_gc_mask_set_bit; |
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c index a607546ddbd0..f714d060370d 100644 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ b/arch/arm/plat-samsung/irq-vic-timer.c | |||
@@ -54,6 +54,13 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq) | |||
54 | 54 | ||
55 | s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, | 55 | s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, |
56 | S3C64XX_TINT_CSTAT, handle_level_irq); | 56 | S3C64XX_TINT_CSTAT, handle_level_irq); |
57 | |||
58 | if (!s3c_tgc) { | ||
59 | pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n", | ||
60 | __func__, timer_irq); | ||
61 | return; | ||
62 | } | ||
63 | |||
57 | ct = s3c_tgc->chip_types; | 64 | ct = s3c_tgc->chip_types; |
58 | ct->chip.irq_mask = irq_gc_mask_clr_bit; | 65 | ct->chip.irq_mask = irq_gc_mask_clr_bit; |
59 | ct->chip.irq_unmask = irq_gc_mask_set_bit; | 66 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |