diff options
author | Len Brown <len.brown@intel.com> | 2013-01-31 15:22:15 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2013-02-08 19:26:16 -0500 |
commit | 679204183472af16e8e75d2b1479459ad19bc67c (patch) | |
tree | 0508a4b33d9bfbb608c854da62da02224e0c1aa1 | |
parent | 70b43400bc290764b49ff3497a9824604c66c409 (diff) |
tools/power turbostat: decode MSR_IA32_POWER_CTL
When verbose is enabled, print the C1E-Enable
bit in MSR_IA32_POWER_CTL.
also delete some redundant tests on the verbose variable.
Signed-off-by: Len Brown <len.brown@intel.com>
-rw-r--r-- | arch/x86/include/uapi/asm/msr-index.h | 2 | ||||
-rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 13 |
2 files changed, 9 insertions, 6 deletions
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index 433a59fb1a74..7bdaf7c9b1e0 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h | |||
@@ -103,6 +103,8 @@ | |||
103 | #define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10) | 103 | #define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10) |
104 | #define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11) | 104 | #define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11) |
105 | 105 | ||
106 | #define MSR_IA32_POWER_CTL 0x000001fc | ||
107 | |||
106 | #define MSR_IA32_MC0_CTL 0x00000400 | 108 | #define MSR_IA32_MC0_CTL 0x00000400 |
107 | #define MSR_IA32_MC0_STATUS 0x00000401 | 109 | #define MSR_IA32_MC0_STATUS 0x00000401 |
108 | #define MSR_IA32_MC0_ADDR 0x00000402 | 110 | #define MSR_IA32_MC0_ADDR 0x00000402 |
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index b326878bd5d1..75f64e05ec30 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c | |||
@@ -908,8 +908,7 @@ void print_verbose_header(void) | |||
908 | 908 | ||
909 | get_msr(0, MSR_NHM_PLATFORM_INFO, &msr); | 909 | get_msr(0, MSR_NHM_PLATFORM_INFO, &msr); |
910 | 910 | ||
911 | if (verbose) | 911 | fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr); |
912 | fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr); | ||
913 | 912 | ||
914 | ratio = (msr >> 40) & 0xFF; | 913 | ratio = (msr >> 40) & 0xFF; |
915 | fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", | 914 | fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", |
@@ -919,13 +918,16 @@ void print_verbose_header(void) | |||
919 | fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n", | 918 | fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n", |
920 | ratio, bclk, ratio * bclk); | 919 | ratio, bclk, ratio * bclk); |
921 | 920 | ||
921 | get_msr(0, MSR_IA32_POWER_CTL, &msr); | ||
922 | fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E: %sabled)\n", | ||
923 | msr, msr & 0x2 ? "EN" : "DIS"); | ||
924 | |||
922 | if (!do_ivt_turbo_ratio_limit) | 925 | if (!do_ivt_turbo_ratio_limit) |
923 | goto print_nhm_turbo_ratio_limits; | 926 | goto print_nhm_turbo_ratio_limits; |
924 | 927 | ||
925 | get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr); | 928 | get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr); |
926 | 929 | ||
927 | if (verbose) | 930 | fprintf(stderr, "cpu0: MSR_IVT_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); |
928 | fprintf(stderr, "cpu0: MSR_IVT_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); | ||
929 | 931 | ||
930 | ratio = (msr >> 56) & 0xFF; | 932 | ratio = (msr >> 56) & 0xFF; |
931 | if (ratio) | 933 | if (ratio) |
@@ -1016,8 +1018,7 @@ print_nhm_turbo_ratio_limits: | |||
1016 | 1018 | ||
1017 | get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr); | 1019 | get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr); |
1018 | 1020 | ||
1019 | if (verbose) | 1021 | fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); |
1020 | fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); | ||
1021 | 1022 | ||
1022 | ratio = (msr >> 56) & 0xFF; | 1023 | ratio = (msr >> 56) & 0xFF; |
1023 | if (ratio) | 1024 | if (ratio) |