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authorKukjin Kim <kgene.kim@samsung.com>2010-10-01 06:38:26 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-22 22:50:53 -0400
commit54bce6c73dcd6d150d917e954154521de116e17b (patch)
tree9b3f11bf15296889fd3ab7abb37b1699cb262a75
parentaef698a72fbb8ba97cff1abb1fdb035c791bd106 (diff)
ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgall_range()
This patch changes the code setting range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgpin_range(). NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c1.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
index 5d5dd3c4edba..6ad3b986021c 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -25,16 +25,14 @@ struct platform_device; /* don't need the contents */
25 25
26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) 26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
27{ 27{
28 s3c_gpio_cfgpin_range(S5P6440_GPR(9), 2, S3C_GPIO_SFN(6)); 28 s3c_gpio_cfgall_range(S5P6440_GPR(9), 2,
29 s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); 29 S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
30 s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
31} 30}
32 31
33void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) 32void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
34{ 33{
35 s3c_gpio_cfgpin_range(S5P6450_GPR(9), 2, S3C_GPIO_SFN(6)); 34 s3c_gpio_cfgall_range(S5P6450_GPR(9), 2,
36 s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); 35 S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
37 s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
38} 36}
39 37
40void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } 38void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }